@@ -235,7 +235,7 @@ class SparcOperand : public MCParsedAsmOperand {
235235 };
236236
237237 struct RegOp {
238- unsigned RegNum ;
238+ MCRegister Reg ;
239239 RegisterKind Kind;
240240 };
241241
@@ -244,8 +244,8 @@ class SparcOperand : public MCParsedAsmOperand {
244244 };
245245
246246 struct MemOp {
247- unsigned Base;
248- unsigned OffsetReg;
247+ MCRegister Base;
248+ MCRegister OffsetReg;
249249 const MCExpr *Off;
250250 };
251251
@@ -326,20 +326,20 @@ class SparcOperand : public MCParsedAsmOperand {
326326
327327 MCRegister getReg () const override {
328328 assert ((Kind == k_Register) && " Invalid access!" );
329- return Reg.RegNum ;
329+ return Reg.Reg ;
330330 }
331331
332332 const MCExpr *getImm () const {
333333 assert ((Kind == k_Immediate) && " Invalid access!" );
334334 return Imm.Val ;
335335 }
336336
337- unsigned getMemBase () const {
337+ MCRegister getMemBase () const {
338338 assert ((Kind == k_MemoryReg || Kind == k_MemoryImm) && " Invalid access!" );
339339 return Mem.Base ;
340340 }
341341
342- unsigned getMemOffsetReg () const {
342+ MCRegister getMemOffsetReg () const {
343343 assert ((Kind == k_MemoryReg) && " Invalid access!" );
344344 return Mem.OffsetReg ;
345345 }
@@ -376,12 +376,16 @@ class SparcOperand : public MCParsedAsmOperand {
376376 void print (raw_ostream &OS, const MCAsmInfo &MAI) const override {
377377 switch (Kind) {
378378 case k_Token: OS << " Token: " << getToken () << " \n " ; break ;
379- case k_Register: OS << " Reg: #" << getReg () << " \n " ; break ;
379+ case k_Register:
380+ OS << " Reg: #" << getReg ().id () << " \n " ;
381+ break ;
380382 case k_Immediate: OS << " Imm: " << getImm () << " \n " ; break ;
381- case k_MemoryReg: OS << " Mem: " << getMemBase () << " +"
382- << getMemOffsetReg () << " \n " ; break ;
383+ case k_MemoryReg:
384+ OS << " Mem: " << getMemBase ().id () << " +" << getMemOffsetReg ().id ()
385+ << " \n " ;
386+ break ;
383387 case k_MemoryImm: assert (getMemOff () != nullptr );
384- OS << " Mem: " << getMemBase () << " +" ;
388+ OS << " Mem: " << getMemBase (). id () << " +" ;
385389 MAI.printExpr (OS, *getMemOff ());
386390 OS << " \n " ;
387391 break ;
@@ -432,7 +436,7 @@ class SparcOperand : public MCParsedAsmOperand {
432436
433437 Inst.addOperand (MCOperand::createReg (getMemBase ()));
434438
435- assert (getMemOffsetReg () != 0 && " Invalid offset" );
439+ assert (getMemOffsetReg (). isValid () && " Invalid offset" );
436440 Inst.addOperand (MCOperand::createReg (getMemOffsetReg ()));
437441 }
438442
@@ -480,10 +484,10 @@ class SparcOperand : public MCParsedAsmOperand {
480484 return Op;
481485 }
482486
483- static std::unique_ptr<SparcOperand> CreateReg (unsigned RegNum , unsigned Kind,
487+ static std::unique_ptr<SparcOperand> CreateReg (MCRegister Reg , unsigned Kind,
484488 SMLoc S, SMLoc E) {
485489 auto Op = std::make_unique<SparcOperand>(k_Register);
486- Op->Reg .RegNum = RegNum ;
490+ Op->Reg .Reg = Reg ;
487491 Op->Reg .Kind = (SparcOperand::RegisterKind)Kind;
488492 Op->StartLoc = S;
489493 Op->EndLoc = E;
@@ -540,7 +544,7 @@ class SparcOperand : public MCParsedAsmOperand {
540544 regIdx = Reg - Sparc::I0 + 24 ;
541545 if (regIdx % 2 || regIdx > 31 )
542546 return false ;
543- Op.Reg .RegNum = IntPairRegs[regIdx / 2 ];
547+ Op.Reg .Reg = IntPairRegs[regIdx / 2 ];
544548 Op.Reg .Kind = rk_IntPairReg;
545549 return true ;
546550 }
@@ -551,7 +555,7 @@ class SparcOperand : public MCParsedAsmOperand {
551555 unsigned regIdx = Reg - Sparc::F0;
552556 if (regIdx % 2 || regIdx > 31 )
553557 return false ;
554- Op.Reg .RegNum = DoubleRegs[regIdx / 2 ];
558+ Op.Reg .Reg = DoubleRegs[regIdx / 2 ];
555559 Op.Reg .Kind = rk_DoubleReg;
556560 return true ;
557561 }
@@ -574,7 +578,7 @@ class SparcOperand : public MCParsedAsmOperand {
574578 Reg = QuadFPRegs[regIdx / 2 ];
575579 break ;
576580 }
577- Op.Reg .RegNum = Reg;
581+ Op.Reg .Reg = Reg;
578582 Op.Reg .Kind = rk_QuadReg;
579583 return true ;
580584 }
@@ -587,13 +591,13 @@ class SparcOperand : public MCParsedAsmOperand {
587591 regIdx = Reg - Sparc::C0;
588592 if (regIdx % 2 || regIdx > 31 )
589593 return false ;
590- Op.Reg .RegNum = CoprocPairRegs[regIdx / 2 ];
594+ Op.Reg .Reg = CoprocPairRegs[regIdx / 2 ];
591595 Op.Reg .Kind = rk_CoprocPairReg;
592596 return true ;
593597 }
594598
595599 static std::unique_ptr<SparcOperand>
596- MorphToMEMrr (unsigned Base, std::unique_ptr<SparcOperand> Op) {
600+ MorphToMEMrr (MCRegister Base, std::unique_ptr<SparcOperand> Op) {
597601 MCRegister offsetReg = Op->getReg ();
598602 Op->Kind = k_MemoryReg;
599603 Op->Mem .Base = Base;
@@ -602,8 +606,8 @@ class SparcOperand : public MCParsedAsmOperand {
602606 return Op;
603607 }
604608
605- static std::unique_ptr<SparcOperand>
606- CreateMEMr ( unsigned Base, SMLoc S, SMLoc E) {
609+ static std::unique_ptr<SparcOperand> CreateMEMr (MCRegister Base, SMLoc S,
610+ SMLoc E) {
607611 auto Op = std::make_unique<SparcOperand>(k_MemoryReg);
608612 Op->Mem .Base = Base;
609613 Op->Mem .OffsetReg = Sparc::G0; // always 0
@@ -614,11 +618,11 @@ class SparcOperand : public MCParsedAsmOperand {
614618 }
615619
616620 static std::unique_ptr<SparcOperand>
617- MorphToMEMri (unsigned Base, std::unique_ptr<SparcOperand> Op) {
621+ MorphToMEMri (MCRegister Base, std::unique_ptr<SparcOperand> Op) {
618622 const MCExpr *Imm = Op->getImm ();
619623 Op->Kind = k_MemoryImm;
620624 Op->Mem .Base = Base;
621- Op->Mem .OffsetReg = 0 ;
625+ Op->Mem .OffsetReg = MCRegister () ;
622626 Op->Mem .Off = Imm;
623627 return Op;
624628 }
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