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rastogishubhamrastogishubham
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Handle #dbg_values in SROA.
This patch properly handles #dbg_values in SROA by making sure that any #dbg_values get moved to before a store just like the right alloca after an aggregate alloca is broken up.
1 parent 2ede8d9 commit cabe19e

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8 files changed

+166
-76
lines changed

8 files changed

+166
-76
lines changed

‎llvm/lib/IR/DebugInfo.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@ using namespace llvm::dwarf;
4646

4747
TinyPtrVector<DbgDeclareInst *> llvm::findDbgDeclares(Value *V) {
4848
// This function is hot. Check whether the value has any metadata to avoid a
49-
// DenseMap lookup.
49+
// DenseMap lookup. This check is a bitfield datamember lookup.
5050
if (!V->isUsedByMetadata())
5151
return {};
5252
auto *L = LocalAsMetadata::getIfExists(V);
@@ -65,7 +65,7 @@ TinyPtrVector<DbgDeclareInst *> llvm::findDbgDeclares(Value *V) {
6565
}
6666
TinyPtrVector<DbgVariableRecord *> llvm::findDVRDeclares(Value *V) {
6767
// This function is hot. Check whether the value has any metadata to avoid a
68-
// DenseMap lookup.
68+
// DenseMap lookup. This check is a bitfield datamember lookup.
6969
if (!V->isUsedByMetadata())
7070
return {};
7171
auto *L = LocalAsMetadata::getIfExists(V);
@@ -82,7 +82,7 @@ TinyPtrVector<DbgVariableRecord *> llvm::findDVRDeclares(Value *V) {
8282

8383
TinyPtrVector<DbgVariableRecord *> llvm::findDVRValues(Value *V) {
8484
// This function is hot. Check whether the value has any metadata to avoid a
85-
// DenseMap lookup.
85+
// DenseMap lookup. This check is a bitfield datamember lookup.
8686
if (!V->isUsedByMetadata())
8787
return {};
8888
auto *L = LocalAsMetadata::getIfExists(V);

‎llvm/lib/Transforms/Scalar/SROA.cpp‎

Lines changed: 20 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5000,10 +5000,25 @@ static void insertNewDbgInst(DIBuilder &DIB, DbgVariableRecord *Orig,
50005000
BeforeInst->getIterator());
50015001
return;
50025002
}
5003+
5004+
if (Orig->isDbgValue()) {
5005+
DbgVariableRecord *DVR = DbgVariableRecord::createDbgVariableRecord(
5006+
NewAddr, Orig->getVariable(), NewFragmentExpr, Orig->getDebugLoc());
5007+
// Drop debug information if the expression doesn't start with a
5008+
// DW_OP_deref. This is because without a DW_OP_deref, the #dbg_value
5009+
// describes the address of alloca rather than the value inside the alloca.
5010+
if (!NewFragmentExpr->startsWithDeref())
5011+
DVR->setKillAddress();
5012+
BeforeInst->getParent()->insertDbgRecordBefore(DVR,
5013+
BeforeInst->getIterator());
5014+
return;
5015+
}
5016+
50035017
if (!NewAddr->hasMetadata(LLVMContext::MD_DIAssignID)) {
50045018
NewAddr->setMetadata(LLVMContext::MD_DIAssignID,
50055019
DIAssignID::getDistinct(NewAddr->getContext()));
50065020
}
5021+
50075022
DbgVariableRecord *NewAssign = DbgVariableRecord::createLinkedDVRAssign(
50085023
NewAddr, Orig->getValue(), Orig->getVariable(), NewFragmentExpr, NewAddr,
50095024
Orig->getAddressExpression(), Orig->getDebugLoc());
@@ -5176,7 +5191,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
51765191
};
51775192
for_each(findDbgDeclares(Fragment.Alloca), RemoveOne);
51785193
for_each(findDVRDeclares(Fragment.Alloca), RemoveOne);
5179-
5194+
for_each(findDVRValues(Fragment.Alloca), RemoveOne);
51805195
insertNewDbgInst(DIB, DbgVariable, Fragment.Alloca, FragmentExpr, &AI);
51815196
}
51825197
};
@@ -5185,6 +5200,7 @@ bool SROA::splitAlloca(AllocaInst &AI, AllocaSlices &AS) {
51855200
// and the individual partitions.
51865201
for_each(findDbgDeclares(&AI), MigrateOne);
51875202
for_each(findDVRDeclares(&AI), MigrateOne);
5203+
for_each(findDVRValues(&AI), MigrateOne);
51885204
for_each(at::getAssignmentMarkers(&AI), MigrateOne);
51895205
for_each(at::getDVRAssignmentMarkers(&AI), MigrateOne);
51905206

@@ -5312,6 +5328,8 @@ bool SROA::deleteDeadInstructions(
53125328
OldDII->eraseFromParent();
53135329
for (DbgVariableRecord *OldDII : findDVRDeclares(AI))
53145330
OldDII->eraseFromParent();
5331+
for (DbgVariableRecord *OldDII : findDVRValues(AI))
5332+
OldDII->eraseFromParent();
53155333
}
53165334

53175335
at::deleteAssignmentMarkers(I);
@@ -5361,6 +5379,7 @@ std::pair<bool /*Changed*/, bool /*CFGChanged*/> SROA::runSROA(Function &F) {
53615379
BasicBlock &EntryBB = F.getEntryBlock();
53625380
for (BasicBlock::iterator I = EntryBB.begin(), E = std::prev(EntryBB.end());
53635381
I != E; ++I) {
5382+
53645383
if (AllocaInst *AI = dyn_cast<AllocaInst>(I)) {
53655384
if (DL.getTypeAllocSize(AI->getAllocatedType()).isScalable() &&
53665385
isAllocaPromotable(AI))

‎llvm/lib/Transforms/Utils/Local.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1731,11 +1731,18 @@ void llvm::ConvertDebugDeclareToDebugValue(DbgVariableIntrinsic *DII,
17311731
SI->getIterator());
17321732
}
17331733

1734+
static DIExpression *dropInitialDeref(const DIExpression *DIExpr) {
1735+
int NumEltDropped = DIExpr->getElements()[0] == dwarf::DW_OP_LLVM_arg ? 3 : 1;
1736+
return DIExpression::get(DIExpr->getContext(),
1737+
DIExpr->getElements().drop_front(NumEltDropped));
1738+
}
1739+
17341740
void llvm::InsertDebugValueAtStoreLoc(DbgVariableIntrinsic *DII, StoreInst *SI,
17351741
DIBuilder &Builder) {
17361742
auto *DIVar = DII->getVariable();
17371743
assert(DIVar && "Missing variable");
17381744
auto *DIExpr = DII->getExpression();
1745+
DIExpr = dropInitialDeref(DIExpr);
17391746
Value *DV = SI->getValueOperand();
17401747

17411748
DebugLoc NewLoc = getDebugValueLoc(DII);
@@ -1823,6 +1830,7 @@ void llvm::InsertDebugValueAtStoreLoc(DbgVariableRecord *DVR, StoreInst *SI,
18231830
auto *DIVar = DVR->getVariable();
18241831
assert(DIVar && "Missing variable");
18251832
auto *DIExpr = DVR->getExpression();
1833+
DIExpr = dropInitialDeref(DIExpr);
18261834
Value *DV = SI->getValueOperand();
18271835

18281836
DebugLoc NewLoc = getDebugValueLoc(DVR);

‎llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -598,6 +598,10 @@ rewriteSingleStoreAlloca(AllocaInst *AI, AllocaInfo &Info, LargeBlockInfo &LBI,
598598
if (DbgItem->isAddressOfVariable()) {
599599
ConvertDebugDeclareToDebugValue(DbgItem, Info.OnlyStore, DIB);
600600
DbgItem->eraseFromParent();
601+
} else if (DbgItem->isValueOfVariable() &&
602+
DbgItem->getExpression()->startsWithDeref()) {
603+
InsertDebugValueAtStoreLoc(DbgItem, Info.OnlyStore, DIB);
604+
DbgItem->eraseFromParent();
601605
} else if (DbgItem->getExpression()->startsWithDeref()) {
602606
DbgItem->eraseFromParent();
603607
}

‎llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-1.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,7 @@
2121
; CHECK: define dso_local void @fun(i32 %param)
2222
; CHECK-NEXT: entry:
2323
; CHECK-NEXT: #dbg_value(i32 %param, ![[PARAM:[0-9]+]], !DIExpression(),
24-
; CHECK-NOT: #dbg_value({{.*}}, ![[PARAM]]
24+
; CHECK-NEXT: #dbg_value(i32 %param, ![[PARAM]], !DIExpression(),
2525
; CHECK: ![[PARAM]] = !DILocalVariable(name: "param",
2626

2727
@g = dso_local global i32 0, align 4, !dbg !0

‎llvm/test/DebugInfo/sroa-handle-dbg-value.ll‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
; This test was obtained from swift source code and then automatically reducing it via Delta.
2+
; The swift source code was from the test test/DebugInfo/debug_scope_distinct.swift.
3+
4+
; RUN: opt %s -S -p=sroa -o - | FileCheck %s
5+
6+
; CHECK: [[SROA_5_SROA_21:%.*]] = alloca [7 x i8], align 8
7+
; CHECK-NEXT: #dbg_value(ptr [[SROA_5_SROA_21]], [[META59:![0-9]+]], !DIExpression(DW_OP_deref, DW_OP_LLVM_fragment, 72, 56), [[DBG72:![0-9]+]])
8+
9+
; CHECK: #dbg_value(ptr [[REG1:%[0-9]+]], [[META54:![0-9]+]], !DIExpression(DW_OP_deref), [[DBG78:![0-9]+]]
10+
; CHECK-NEXT: #dbg_value(ptr [[REG2:%[0-9]+]], [[META56:![0-9]+]], !DIExpression(DW_OP_deref), [[DBG78]]
11+
; CHECK-NEXT: #dbg_value(i64 0, [[META57:![0-9]+]], !DIExpression(), [[DBG78]]
12+
13+
; CHECK: [[SROA_418_SROA_COPYLOAD:%.*]] = load i8, ptr [[SROA_418_0_U1_IDX:%.*]], align 8, !dbg [[DBG78]]
14+
; CHECK-NEXT: #dbg_value(i8 [[SROA_418_SROA_COPYLOAD]], [[META59]], !DIExpression(DW_OP_LLVM_fragment, 64, 8), [[DBG72]]
15+
16+
%T4main1TV13TangentVectorV = type <{ %T4main1UV13TangentVectorV, [7 x i8], %T4main1UV13TangentVectorV }>
17+
%T4main1UV13TangentVectorV = type <{ %T1M1SVySfG, [7 x i8], %T4main1VV13TangentVectorV }>
18+
%T1M1SVySfG = type <{ ptr, %Ts4Int8V }>
19+
%Ts4Int8V = type <{ i8 }>
20+
%T4main1VV13TangentVectorV = type <{ %T1M1SVySfG }>
21+
define hidden swiftcc void @"$s4main1TV13TangentVectorV1poiyA2E_AEtFZ"(ptr noalias nocapture sret(%T4main1TV13TangentVectorV) %0, ptr noalias nocapture dereferenceable(57) %1, ptr noalias nocapture dereferenceable(57) %2) #0 !dbg !44 {
22+
entry:
23+
%3 = alloca %T4main1VV13TangentVectorV
24+
%4 = alloca %T4main1UV13TangentVectorV
25+
call void @llvm.dbg.value(metadata ptr %1, metadata !54, metadata !DIExpression(DW_OP_deref)), !dbg !61
26+
call void @llvm.dbg.value(metadata ptr %2, metadata !56, metadata !DIExpression(DW_OP_deref)), !dbg !61
27+
call void @llvm.dbg.value(metadata i64 0, metadata !57, metadata !DIExpression()), !dbg !61
28+
%.u1 = getelementptr inbounds %T4main1TV13TangentVectorV, ptr %1, i32 0, i32 0
29+
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %4, ptr align 8 %.u1, i64 25, i1 false), !dbg !61
30+
call void @llvm.dbg.value(metadata ptr %4, metadata !62, metadata !DIExpression(DW_OP_deref)), !dbg !75
31+
%.s = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 0
32+
%.s.b = getelementptr inbounds %T1M1SVySfG, ptr %.s, i32 0, i32 1
33+
%.s.b._value = getelementptr inbounds %Ts4Int8V, ptr %.s.b, i32 0, i32 0
34+
%12 = load i8, ptr %.s.b._value
35+
%.v = getelementptr inbounds %T4main1UV13TangentVectorV, ptr %4, i32 0, i32 2
36+
call void @llvm.memcpy.p0.p0.i64(ptr align 8 %3, ptr align 8 %.v, i64 9, i1 false)
37+
%.s4 = getelementptr inbounds %T4main1VV13TangentVectorV, ptr %3, i32 0, i32 0
38+
%.s4.c = getelementptr inbounds %T1M1SVySfG, ptr %.s4, i32 0, i32 0
39+
%18 = load ptr, ptr %.s4.c
40+
ret void
41+
}
42+
!llvm.module.flags = !{ !7, !15}
43+
!7 = !{i32 2, !"Debug Info Version", i32 3}
44+
!15 = !{i32 1, !"Swift Minor Version", i8 0}
45+
!16 = distinct !DICompileUnit(language: DW_LANG_Swift, file: !17, sdk: "MacOSX14.4.sdk")
46+
!17 = !DIFile(filename: "/Users/debug_scope_distinct.swift", directory: "/Users/")
47+
!44 = distinct !DISubprogram( unit: !16, retainedNodes: !53)
48+
!53 = !{}
49+
!54 = !DILocalVariable(name: "lhs", scope: !44, flags: DIFlagArtificial)
50+
!56 = !DILocalVariable(name: "rhs", scope: !44, flags: DIFlagArtificial)
51+
!57 = !DILocalVariable(name: "self", scope: !44, flags: DIFlagArtificial)
52+
!61 = !DILocation( scope: !44)
53+
!62 = !DILocalVariable( scope: !63, flags: DIFlagArtificial)
54+
!63 = distinct !DISubprogram( unit: !16, retainedNodes: !70)
55+
!70 = !{}
56+
!75 = !DILocation( scope: !63, inlinedAt: !76)
57+
!76 = distinct !DILocation( scope: !44)

‎llvm/test/Transforms/SROA/alignment.ll‎

Lines changed: 23 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,8 @@ define void @test1(ptr %a, ptr %b) {
2323
;
2424
; CHECK-DEBUGLOC-LABEL: @test1(
2525
; CHECK-DEBUGLOC-NEXT: entry:
26-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META9:![0-9]+]], !DIExpression(), [[META14:![0-9]+]])
26+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META9:![0-9]+]], !DIExpression(DW_OP_LLVM_fragment, 0, 8), [[META14:![0-9]+]])
27+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META9]], !DIExpression(DW_OP_LLVM_fragment, 8, 8), [[META14]])
2728
; CHECK-DEBUGLOC-NEXT: [[GEP_A:%.*]] = getelementptr { i8, i8 }, ptr [[A:%.*]], i32 0, i32 0, !dbg [[DBG15:![0-9]+]]
2829
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[GEP_A]], [[META11:![0-9]+]], !DIExpression(), [[DBG15]])
2930
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META12:![0-9]+]], !DIExpression(), [[META16:![0-9]+]])
@@ -57,24 +58,24 @@ define void @test2() {
5758
; CHECK-NEXT: entry:
5859
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca i16, align 2
5960
; CHECK-NEXT: store volatile i16 0, ptr [[A_SROA_0]], align 2
60-
; CHECK-NEXT: [[A_SROA_0_1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1
61-
; CHECK-NEXT: [[A_SROA_0_1_A_SROA_0_2_RESULT:%.*]] = load i8, ptr [[A_SROA_0_1_SROA_IDX]], align 1
62-
; CHECK-NEXT: [[A_SROA_0_1_SROA_IDX2:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1
63-
; CHECK-NEXT: store i8 42, ptr [[A_SROA_0_1_SROA_IDX2]], align 1
61+
; CHECK-NEXT: [[A_SROA_0_1_GEP2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1
62+
; CHECK-NEXT: [[A_SROA_0_1_A_SROA_0_2_RESULT:%.*]] = load i8, ptr [[A_SROA_0_1_GEP2_SROA_IDX]], align 1
63+
; CHECK-NEXT: [[A_SROA_0_1_GEP2_SROA_IDX2:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1
64+
; CHECK-NEXT: store i8 42, ptr [[A_SROA_0_1_GEP2_SROA_IDX2]], align 1
6465
; CHECK-NEXT: ret void
6566
;
6667
; CHECK-DEBUGLOC-LABEL: @test2(
6768
; CHECK-DEBUGLOC-NEXT: entry:
6869
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0:%.*]] = alloca i16, align 2, !dbg [[DBG28:![0-9]+]]
69-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META23:![0-9]+]], !DIExpression(), [[DBG28]])
70+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[A_SROA_0]], [[META23:![0-9]+]], !DIExpression(DW_OP_LLVM_fragment, 8, 16), [[DBG28]])
7071
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META24:![0-9]+]], !DIExpression(), [[META29:![0-9]+]])
7172
; CHECK-DEBUGLOC-NEXT: store volatile i16 0, ptr [[A_SROA_0]], align 2, !dbg [[DBG30:![0-9]+]]
7273
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META25:![0-9]+]], !DIExpression(), [[META31:![0-9]+]])
73-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1, !dbg [[DBG32:![0-9]+]]
74-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_A_SROA_0_2_RESULT:%.*]] = load i8, ptr [[A_SROA_0_1_SROA_IDX]], align 1, !dbg [[DBG32]]
74+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_GEP2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1, !dbg [[DBG32:![0-9]+]]
75+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_A_SROA_0_2_RESULT:%.*]] = load i8, ptr [[A_SROA_0_1_GEP2_SROA_IDX]], align 1, !dbg [[DBG32]]
7576
; CHECK-DEBUGLOC-NEXT: #dbg_value(i8 [[A_SROA_0_1_A_SROA_0_2_RESULT]], [[META26:![0-9]+]], !DIExpression(), [[DBG32]])
76-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_SROA_IDX2:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1, !dbg [[DBG33:![0-9]+]]
77-
; CHECK-DEBUGLOC-NEXT: store i8 42, ptr [[A_SROA_0_1_SROA_IDX2]], align 1, !dbg [[DBG33]]
77+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_1_GEP2_SROA_IDX2:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 1, !dbg [[DBG33:![0-9]+]]
78+
; CHECK-DEBUGLOC-NEXT: store i8 42, ptr [[A_SROA_0_1_GEP2_SROA_IDX2]], align 1, !dbg [[DBG33]]
7879
; CHECK-DEBUGLOC-NEXT: ret void, !dbg [[DBG34:![0-9]+]]
7980
;
8081
entry:
@@ -117,7 +118,6 @@ define void @test3(ptr %x) {
117118
; expecting. However, also check that any offset within an alloca can in turn
118119
; reduce the alignment.
119120
;
120-
;
121121
; CHECK-LABEL: @test3(
122122
; CHECK-NEXT: entry:
123123
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [22 x i8], align 8
@@ -129,9 +129,8 @@ define void @test3(ptr %x) {
129129
; CHECK-DEBUGLOC-LABEL: @test3(
130130
; CHECK-DEBUGLOC-NEXT: entry:
131131
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0:%.*]] = alloca [22 x i8], align 8, !dbg [[DBG47:![0-9]+]]
132-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META44:![0-9]+]], !DIExpression(), [[DBG47]])
132+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[A_SROA_0]], [[META44:![0-9]+]], !DIExpression(), [[DBG47]])
133133
; CHECK-DEBUGLOC-NEXT: [[B_SROA_0:%.*]] = alloca [18 x i8], align 2, !dbg [[DBG48:![0-9]+]]
134-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META45:![0-9]+]], !DIExpression(), [[DBG48]])
135134
; CHECK-DEBUGLOC-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 8 [[A_SROA_0]], ptr align 8 [[X:%.*]], i32 22, i1 false), !dbg [[DBG49:![0-9]+]]
136135
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META46:![0-9]+]], !DIExpression(), [[META50:![0-9]+]])
137136
; CHECK-DEBUGLOC-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 2 [[B_SROA_0]], ptr align 2 [[X]], i32 18, i1 false), !dbg [[DBG51:![0-9]+]]
@@ -158,31 +157,31 @@ define void @test5() {
158157
; CHECK-NEXT: [[A_SROA_0:%.*]] = alloca [9 x i8], align 1
159158
; CHECK-NEXT: [[A_SROA_3:%.*]] = alloca [9 x i8], align 1
160159
; CHECK-NEXT: store volatile double 0.000000e+00, ptr [[A_SROA_0]], align 1
161-
; CHECK-NEXT: [[A_SROA_0_7_SROA_IDX1:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 7
162-
; CHECK-NEXT: [[A_SROA_0_7_A_SROA_0_7_WEIRD_LOAD1:%.*]] = load volatile i16, ptr [[A_SROA_0_7_SROA_IDX1]], align 1
160+
; CHECK-NEXT: [[A_SROA_0_7_WEIRD_GEP1_SROA_IDX1:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 7
161+
; CHECK-NEXT: [[A_SROA_0_7_A_SROA_0_7_WEIRD_LOAD1:%.*]] = load volatile i16, ptr [[A_SROA_0_7_WEIRD_GEP1_SROA_IDX1]], align 1
163162
; CHECK-NEXT: [[A_SROA_0_0_A_SROA_0_0_D1:%.*]] = load double, ptr [[A_SROA_0]], align 1
164163
; CHECK-NEXT: store volatile double [[A_SROA_0_0_A_SROA_0_0_D1]], ptr [[A_SROA_3]], align 1
165-
; CHECK-NEXT: [[A_SROA_3_7_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_3]], i64 7
166-
; CHECK-NEXT: [[A_SROA_3_7_A_SROA_3_16_WEIRD_LOAD2:%.*]] = load volatile i16, ptr [[A_SROA_3_7_SROA_IDX]], align 1
164+
; CHECK-NEXT: [[A_SROA_3_7_WEIRD_GEP2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_3]], i64 7
165+
; CHECK-NEXT: [[A_SROA_3_7_A_SROA_3_16_WEIRD_LOAD2:%.*]] = load volatile i16, ptr [[A_SROA_3_7_WEIRD_GEP2_SROA_IDX]], align 1
167166
; CHECK-NEXT: ret void
168167
;
169168
; CHECK-DEBUGLOC-LABEL: @test5(
170169
; CHECK-DEBUGLOC-NEXT: entry:
171170
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0:%.*]] = alloca [9 x i8], align 1, !dbg [[DBG63:![0-9]+]]
172171
; CHECK-DEBUGLOC-NEXT: [[A_SROA_3:%.*]] = alloca [9 x i8], align 1, !dbg [[DBG63]]
173-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META55:![0-9]+]], !DIExpression(), [[DBG63]])
172+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[A_SROA_0]], [[META55:![0-9]+]], !DIExpression(), [[DBG63]])
174173
; CHECK-DEBUGLOC-NEXT: store volatile double 0.000000e+00, ptr [[A_SROA_0]], align 1, !dbg [[DBG64:![0-9]+]]
175174
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META56:![0-9]+]], !DIExpression(), [[META65:![0-9]+]])
176-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_7_SROA_IDX1:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 7, !dbg [[DBG66:![0-9]+]]
177-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_7_A_SROA_0_7_WEIRD_LOAD1:%.*]] = load volatile i16, ptr [[A_SROA_0_7_SROA_IDX1]], align 1, !dbg [[DBG66]]
175+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_7_WEIRD_GEP1_SROA_IDX1:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_0]], i64 7, !dbg [[DBG66:![0-9]+]]
176+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_7_A_SROA_0_7_WEIRD_LOAD1:%.*]] = load volatile i16, ptr [[A_SROA_0_7_WEIRD_GEP1_SROA_IDX1]], align 1, !dbg [[DBG66]]
178177
; CHECK-DEBUGLOC-NEXT: #dbg_value(i16 [[A_SROA_0_7_A_SROA_0_7_WEIRD_LOAD1]], [[META57:![0-9]+]], !DIExpression(), [[DBG66]])
179178
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META59:![0-9]+]], !DIExpression(), [[META67:![0-9]+]])
180179
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_0_A_SROA_0_0_D1:%.*]] = load double, ptr [[A_SROA_0]], align 1, !dbg [[DBG68:![0-9]+]]
181180
; CHECK-DEBUGLOC-NEXT: #dbg_value(double [[A_SROA_0_0_A_SROA_0_0_D1]], [[META60:![0-9]+]], !DIExpression(), [[DBG68]])
182181
; CHECK-DEBUGLOC-NEXT: store volatile double [[A_SROA_0_0_A_SROA_0_0_D1]], ptr [[A_SROA_3]], align 1, !dbg [[DBG69:![0-9]+]]
183182
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META61:![0-9]+]], !DIExpression(), [[META70:![0-9]+]])
184-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_3_7_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_3]], i64 7, !dbg [[DBG71:![0-9]+]]
185-
; CHECK-DEBUGLOC-NEXT: [[A_SROA_3_7_A_SROA_3_16_WEIRD_LOAD2:%.*]] = load volatile i16, ptr [[A_SROA_3_7_SROA_IDX]], align 1, !dbg [[DBG71]]
183+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_3_7_WEIRD_GEP2_SROA_IDX:%.*]] = getelementptr inbounds i8, ptr [[A_SROA_3]], i64 7, !dbg [[DBG71:![0-9]+]]
184+
; CHECK-DEBUGLOC-NEXT: [[A_SROA_3_7_A_SROA_3_16_WEIRD_LOAD2:%.*]] = load volatile i16, ptr [[A_SROA_3_7_WEIRD_GEP2_SROA_IDX]], align 1, !dbg [[DBG71]]
186185
; CHECK-DEBUGLOC-NEXT: #dbg_value(i16 [[A_SROA_3_7_A_SROA_3_16_WEIRD_LOAD2]], [[META62:![0-9]+]], !DIExpression(), [[DBG71]])
187186
; CHECK-DEBUGLOC-NEXT: ret void, !dbg [[DBG72:![0-9]+]]
188187
;
@@ -219,7 +218,7 @@ define void @test6() {
219218
; CHECK-DEBUGLOC-NEXT: entry:
220219
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0:%.*]] = alloca double, align 8, !dbg [[DBG78:![0-9]+]]
221220
; CHECK-DEBUGLOC-NEXT: [[A_SROA_2:%.*]] = alloca double, align 8, !dbg [[DBG78]]
222-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META75:![0-9]+]], !DIExpression(), [[DBG78]])
221+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[A_SROA_0]], [[META75:![0-9]+]], !DIExpression(), [[DBG78]])
223222
; CHECK-DEBUGLOC-NEXT: store volatile double 0.000000e+00, ptr [[A_SROA_0]], align 8, !dbg [[DBG79:![0-9]+]]
224223
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META76:![0-9]+]], !DIExpression(), [[META80:![0-9]+]])
225224
; CHECK-DEBUGLOC-NEXT: [[A_SROA_0_0_A_SROA_0_0_VAL:%.*]] = load double, ptr [[A_SROA_0]], align 8, !dbg [[DBG81:![0-9]+]]
@@ -442,7 +441,7 @@ define dso_local i32 @pr45010(ptr %A) {
442441
;
443442
; CHECK-DEBUGLOC-LABEL: @pr45010(
444443
; CHECK-DEBUGLOC-NEXT: [[B_SROA_0:%.*]] = alloca i32, align 4, !dbg [[DBG129:![0-9]+]]
445-
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr undef, [[META125:![0-9]+]], !DIExpression(), [[DBG129]])
444+
; CHECK-DEBUGLOC-NEXT: #dbg_value(ptr [[B_SROA_0]], [[META125:![0-9]+]], !DIExpression(DW_OP_LLVM_fragment, 0, 32), [[DBG129]])
446445
; CHECK-DEBUGLOC-NEXT: [[TMP1:%.*]] = load i32, ptr [[A:%.*]], align 4, !dbg [[DBG130:![0-9]+]]
447446
; CHECK-DEBUGLOC-NEXT: #dbg_value(i32 [[TMP1]], [[META126:![0-9]+]], !DIExpression(), [[DBG130]])
448447
; CHECK-DEBUGLOC-NEXT: store atomic volatile i32 [[TMP1]], ptr [[B_SROA_0]] release, align 4, !dbg [[DBG131:![0-9]+]]

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