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fixup! [AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions
Rename more `def`s
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llvm/lib/Target/AArch64/AArch64InstrFormats.td

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6538,7 +6538,7 @@ multiclass SIMDThreeSameVectorFML<bit U, bit b13, bits<3> size, string asm,
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}
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multiclass SIMDThreeSameVectorMLA<bit Q, string asm, SDPatternOperator op> {
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def v8f16_v16i8 : BaseSIMDThreeSameVectorDot<Q, 0b0, 0b11, 0b1111, asm, ".8h", ".16b",
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def v16i8_v8f16 : BaseSIMDThreeSameVectorDot<Q, 0b0, 0b11, 0b1111, asm, ".8h", ".16b",
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V128, v8f16, v16i8, op>;
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}
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@@ -6553,14 +6553,14 @@ multiclass SIMDThreeSameVectorFMLA<string asm> {
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}
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multiclass SIMDThreeSameVectorFMLAWiden<string asm> {
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def v4f32_v8f16 : BaseSIMDThreeSameVectorDot<0b1, 0b0, 0b01, 0b1101, asm, ".4s", ".8h",
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def v8f16_v4f32 : BaseSIMDThreeSameVectorDot<0b1, 0b0, 0b01, 0b1101, asm, ".4s", ".8h",
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V128, v4f32, v8f16, null_frag>;
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}
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multiclass SIMDThreeSameVectorFDot<string asm, SDPatternOperator OpNode = null_frag> {
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def v2f32_v4f16 : BaseSIMDThreeSameVectorDot<0, 0, 0b10, 0b1111, asm, ".2s", ".4h", V64,
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def v4f16_v2f32 : BaseSIMDThreeSameVectorDot<0, 0, 0b10, 0b1111, asm, ".2s", ".4h", V64,
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v2f32, v4f16, OpNode>;
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def v4f32_v8f16 : BaseSIMDThreeSameVectorDot<1, 0, 0b10, 0b1111, asm, ".4s", ".8h", V128,
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def v8f16_v4f32 : BaseSIMDThreeSameVectorDot<1, 0, 0b10, 0b1111, asm, ".4s", ".8h", V128,
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v4f32, v8f16, OpNode>;
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}
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