Move RegClassByHwModeUses definition to header

Author: arsenm

llvm/test/TableGen/RegClassByHwMode.td

@@ -6,9 +6,13 @@
 
 include "llvm/Target/Target.td"
 
-// INSTRINFO: #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR)
-// INSTRINFO-NEXT: namespace {
-// INSTRINFO-NEXT: enum RegClassByHwModeUses : uint16_t {
+// INSTRINFO: #ifdef GET_INSTRINFO_ENUM
+// INSTRINFO-NEXT: #undef GET_INSTRINFO_ENUM
+// INSTRINFO-NEXT: namespace llvm::MyTarget {
+// INSTRINFO-NEXT: enum {
+// INSTRINFO-NEXT: PHI
+// INSTRINFO: };
+// INSTRINFO: enum RegClassByHwModeUses : uint16_t {
 // INSTRINFO-NEXT:   MyPtrRC,
 // INSTRINFO-NEXT:   XRegs_EvenIfRequired,
 // INSTRINFO-NEXT:   YRegs_EvenIfRequired,
@@ -17,10 +21,10 @@ include "llvm/Target/Target.td"
 
 // INSTRINFO: { MyTarget::XRegsRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
 // INSTRINFO: { MyTarget::XRegs_EvenRegClassID, 0, MCOI::OPERAND_REGISTER, 0 },
-// INSTRINFO: { YRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
-// INSTRINFO: { XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
-// INSTRINFO: { XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { MyPtrRC, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
-// INSTRINFO: { YRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
+// INSTRINFO: { MyTarget::YRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
+// INSTRINFO: { MyTarget::XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
+// INSTRINFO: { MyTarget::XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { MyTarget::MyPtrRC, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
+// INSTRINFO: { MyTarget::YRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 }, { MyTarget::XRegs_EvenIfRequired, 0|(1<<MCOI::LookupRegClassByHwMode), MCOI::OPERAND_REGISTER, 0 },
 
 // INSTRINFO: extern const int16_t MyTargetRegClassByHwModeTables[4][3] = {
 // INSTRINFO-NEXT:  { // DefaultMode

llvm/utils/TableGen/InstrInfoEmitter.cpp

@@ -115,6 +115,7 @@ class InstrInfoEmitter {
 InstrInfoEmitter::OperandInfoTy
 InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
   OperandInfoTy Result;
+  StringRef Namespace = CDP.getTargetInfo().getInstNamespace();
 
   for (auto &Op : Inst.Operands) {
     // Handle aggregate operands and normal operands the same way by expanding
@@ -147,6 +148,8 @@ InstrInfoEmitter::GetOperandInfo(const CodeGenInstruction &Inst) {
         OpR = OpR->getValueAsDef("RegClass");
 
       if (OpR->isSubClassOf("RegClassByHwMode")) {
+        Res += Namespace;
+        Res += "::";
         Res += OpR->getName();
         Res += ", ";
       } else if (OpR->isSubClassOf("RegisterClass"))
@@ -934,13 +937,6 @@ void InstrInfoEmitter::run(raw_ostream &OS) {
   OS << "#if defined(GET_INSTRINFO_MC_DESC) || "
         "defined(GET_INSTRINFO_CTOR_DTOR)\n";
 
-  OS << "namespace {\n";
-  OS << "enum RegClassByHwModeUses : uint16_t {\n";
-  for (const Record *ClassByHwMode : Target.getAllRegClassByHwMode())
-    OS << "  " << ClassByHwMode->getName() << ",\n";
-  OS << "};\n";
-  OS << "}\n";
-
   OS << "namespace llvm {\n\n";
 
   OS << "struct " << TargetName << "InstrTable {\n";
@@ -1398,6 +1394,14 @@ void InstrInfoEmitter::emitEnums(
   }
   OS << "    INSTRUCTION_LIST_END = " << NumberedInstructions.size() << '\n';
   OS << "  };\n";
+
+  if (!Target.getAllRegClassByHwMode().empty()) {
+    OS << "  enum RegClassByHwModeUses : uint16_t {\n";
+    for (const Record *ClassByHwMode : Target.getAllRegClassByHwMode())
+      OS << indent(4) << ClassByHwMode->getName() << ",\n";
+    OS << "  };\n";
+  }
+
   OS << "} // end namespace llvm::" << Namespace << '\n';
   OS << "#endif // GET_INSTRINFO_ENUM\n\n";