AMDGPU: Replace undef global initializers in tests with poison

Author: arsenm

llvm/test/CodeGen/AMDGPU/32-bit-local-address-space.ll

@@ -80,7 +80,7 @@ define amdgpu_kernel void @mul_32bit_ptr(ptr addrspace(1) %out, ptr addrspace(3)
   ret void
 }
 
-@g_lds = addrspace(3) global float undef, align 4
+@g_lds = addrspace(3) global float poison, align 4
 
 ; FUNC-LABEL: {{^}}infer_ptr_alignment_global_offset:
 ; SI: v_mov_b32_e32 [[PTR:v[0-9]+]], 0{{$}}
@@ -93,7 +93,7 @@ define amdgpu_kernel void @infer_ptr_alignment_global_offset(ptr addrspace(1) %o
 
 
 @ptr = addrspace(3) global ptr addrspace(3) poison
-@dst = addrspace(3) global [16383 x i32] undef
+@dst = addrspace(3) global [16383 x i32] poison
 
 ; FUNC-LABEL: {{^}}global_ptr:
 ; SI: ds_write_b32

llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll

@@ -8,8 +8,8 @@
 ; FIXME: Merge with other test. DS offset folding doesn't work due to
 ; register bank copies, and no return optimization is missing.
 
-@lds0 = internal addrspace(3) global [512 x i32] undef
-@lds1 = internal addrspace(3) global [512 x i64] undef, align 8
+@lds0 = internal addrspace(3) global [512 x i32] poison
+@lds1 = internal addrspace(3) global [512 x i64] poison, align 8
 
 declare i32 @llvm.amdgcn.workitem.id.x() #0
 

llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll

@@ -9,8 +9,8 @@
 ; FIXME: Merge with other test. DS offset folding doesn't work due to
 ; register bank copies, and no return optimization is missing.
 
-@lds0 = internal addrspace(3) global [512 x i32] undef, align 4
-@lds1 = internal addrspace(3) global [512 x i64] undef, align 8
+@lds0 = internal addrspace(3) global [512 x i32] poison, align 4
+@lds1 = internal addrspace(3) global [512 x i64] poison, align 8
 
 declare i32 @llvm.amdgcn.workitem.id.x() #0
 

llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll

@@ -4,7 +4,7 @@
 ; ERR: LLVM ERROR: unable to legalize instruction: %{{[0-9]+}}:_(p5) = G_GLOBAL_VALUE @external_private (in function: fn_external_private)
 
 @external_private = external addrspace(5) global i32, align 4
-@internal_private = internal addrspace(5) global i32 undef, align 4
+@internal_private = internal addrspace(5) global i32 poison, align 4
 
 define ptr addrspace(5) @fn_external_private() {
   ret ptr addrspace(5) @external_private

llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll

@@ -1,9 +1,9 @@
 ; RUN: llc -global-isel -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -o - %s | FileCheck %s
 
-@lds0 = addrspace(3) global [512 x float] undef
-@lds1 = addrspace(3) global [256 x float] undef
-@lds2 = addrspace(3) global [4096 x float] undef
-@lds3 = addrspace(3) global [67 x i8] undef
+@lds0 = addrspace(3) global [512 x float] poison
+@lds1 = addrspace(3) global [256 x float] poison
+@lds2 = addrspace(3) global [4096 x float] poison
+@lds3 = addrspace(3) global [67 x i8] poison
 
 @dynamic_shared0 = external addrspace(3) global [0 x float]
 @dynamic_shared1 = external addrspace(3) global [0 x double]

llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll

@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
 ; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -stop-after=irtranslator -o - %s | FileCheck %s
 
-@var = global i32 undef
+@var = global i32 poison
 
 define i32 @test() {
   ; CHECK-LABEL: name: test

llvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll

@@ -2,8 +2,8 @@
 ; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s
 ; TODO: Replace with existing DAG tests
 
-@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4
-@lds_4_8 = addrspace(3) global i32 undef, align 8
+@lds_512_4 = internal unnamed_addr addrspace(3) global [128 x i32] poison, align 4
+@lds_4_8 = addrspace(3) global i32 poison, align 8
 
 define amdgpu_kernel void @use_lds_globals(ptr addrspace(1) %out, ptr addrspace(3) %in) #0 {
 ; CHECK-LABEL: use_lds_globals:

llvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll

@@ -2,7 +2,7 @@
 ; FIXME: Merge with DAG test
 
 @lds.external = external unnamed_addr addrspace(3) global [0 x i32]
-@lds.defined = unnamed_addr addrspace(3) global [8 x i32] undef, align 8
+@lds.defined = unnamed_addr addrspace(3) global [8 x i32] poison, align 8
 
 ; GCN-LABEL: {{^}}test_basic:
 ; GCN: s_add_u32 s0, lds.defined@abs32@lo, s0 ; encoding: [0xff,0x00,0x00,0x80,A,A,A,A]

llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll

@@ -87,10 +87,10 @@ bb2:
 
 ; FIXME: These aren't localized because thesee were legalized before
 ; the localizer, and are no longer G_GLOBAL_VALUE.
-@gv0 = addrspace(1) global i32 undef, align 4
-@gv1 = addrspace(1) global i32 undef, align 4
-@gv2 = addrspace(1) global i32 undef, align 4
-@gv3 = addrspace(1) global i32 undef, align 4
+@gv0 = addrspace(1) global i32 poison, align 4
+@gv1 = addrspace(1) global i32 poison, align 4
+@gv2 = addrspace(1) global i32 poison, align 4
+@gv3 = addrspace(1) global i32 poison, align 4
 
 define amdgpu_kernel void @localize_globals(i1 %cond) {
 ; GFX9-LABEL: localize_globals:
@@ -159,10 +159,10 @@ bb2:
   ret void
 }
 
-@static.gv0 = internal addrspace(1) global i32 undef, align 4
-@static.gv1 = internal addrspace(1) global i32 undef, align 4
-@static.gv2 = internal addrspace(1) global i32 undef, align 4
-@static.gv3 = internal addrspace(1) global i32 undef, align 4
+@static.gv0 = internal addrspace(1) global i32 poison, align 4
+@static.gv1 = internal addrspace(1) global i32 poison, align 4
+@static.gv2 = internal addrspace(1) global i32 poison, align 4
+@static.gv3 = internal addrspace(1) global i32 poison, align 4
 
 define void @localize_internal_globals(i1 %cond) {
 ; GFX9-LABEL: localize_internal_globals:

llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll

@@ -4,17 +4,17 @@
 
 declare void @llvm.memcpy.p1.p4.i32(ptr addrspace(1) nocapture, ptr addrspace(4) nocapture, i32, i1) #0
 
-@lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
-@lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
+@lds.i32 = unnamed_addr addrspace(3) global i32 poison, align 4
+@lds.arr = unnamed_addr addrspace(3) global [256 x i32] poison, align 4
 
-@global.i32 = unnamed_addr addrspace(1) global i32 undef, align 4
-@global.arr = unnamed_addr addrspace(1) global [256 x i32] undef, align 4
+@global.i32 = unnamed_addr addrspace(1) global i32 poison, align 4
+@global.arr = unnamed_addr addrspace(1) global [256 x i32] poison, align 4
 
 ;.
-; HSA: @lds.i32 = unnamed_addr addrspace(3) global i32 undef, align 4
-; HSA: @lds.arr = unnamed_addr addrspace(3) global [256 x i32] undef, align 4
-; HSA: @global.i32 = unnamed_addr addrspace(1) global i32 undef, align 4
-; HSA: @global.arr = unnamed_addr addrspace(1) global [256 x i32] undef, align 4
+; HSA: @lds.i32 = unnamed_addr addrspace(3) global i32 poison, align 4
+; HSA: @lds.arr = unnamed_addr addrspace(3) global [256 x i32] poison, align 4
+; HSA: @global.i32 = unnamed_addr addrspace(1) global i32 poison, align 4
+; HSA: @global.arr = unnamed_addr addrspace(1) global [256 x i32] poison, align 4
 ;.
 define amdgpu_kernel void @store_cast_0_flat_to_group_addrspacecast() #1 {
 ; HSA-LABEL: define {{[^@]+}}@store_cast_0_flat_to_group_addrspacecast