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update tests
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‎llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvinsve0.ll‎

Lines changed: 44 additions & 200 deletions
Original file line numberDiff line numberDiff line change
@@ -8,10 +8,8 @@ define void @xvinsve0_v8i32_l_0(ptr %d, ptr %a, ptr %b) nounwind {
88
; CHECK: # %bb.0: # %entry
99
; CHECK-NEXT: xvld $xr0, $a1, 0
1010
; CHECK-NEXT: xvld $xr1, $a2, 0
11-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI0_0)
12-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI0_0)
13-
; CHECK-NEXT: xvshuf.w $xr2, $xr1, $xr0
14-
; CHECK-NEXT: xvst $xr2, $a0, 0
11+
; CHECK-NEXT: xvinsve0.w $xr0, $xr1, 0
12+
; CHECK-NEXT: xvst $xr0, $a0, 0
1513
; CHECK-NEXT: ret
1614
entry:
1715
%va = load <8 x i32>, ptr %a
@@ -22,52 +20,13 @@ entry:
2220
}
2321

2422
define void @xvinsve0_v8i32_l_4(ptr %d, ptr %a, ptr %b) nounwind {
25-
; LA32-LABEL: xvinsve0_v8i32_l_4:
26-
; LA32: # %bb.0: # %entry
27-
; LA32-NEXT: ld.w $a2, $a2, 0
28-
; LA32-NEXT: xvld $xr0, $a1, 0
29-
; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
30-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 5
31-
; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 1
32-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 6
33-
; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 2
34-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 7
35-
; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 3
36-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 0
37-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 0
38-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 1
39-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 1
40-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 2
41-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 2
42-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 3
43-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 3
44-
; LA32-NEXT: xvpermi.q $xr2, $xr1, 2
45-
; LA32-NEXT: xvst $xr2, $a0, 0
46-
; LA32-NEXT: ret
47-
;
48-
; LA64-LABEL: xvinsve0_v8i32_l_4:
49-
; LA64: # %bb.0: # %entry
50-
; LA64-NEXT: xvld $xr0, $a2, 0
51-
; LA64-NEXT: xvld $xr1, $a1, 0
52-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 0
53-
; LA64-NEXT: vinsgr2vr.w $vr0, $a1, 0
54-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 5
55-
; LA64-NEXT: vinsgr2vr.w $vr0, $a1, 1
56-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 6
57-
; LA64-NEXT: vinsgr2vr.w $vr0, $a1, 2
58-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 7
59-
; LA64-NEXT: vinsgr2vr.w $vr0, $a1, 3
60-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 0
61-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 0
62-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 1
63-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 1
64-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 2
65-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 2
66-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 3
67-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 3
68-
; LA64-NEXT: xvpermi.q $xr2, $xr0, 2
69-
; LA64-NEXT: xvst $xr2, $a0, 0
70-
; LA64-NEXT: ret
23+
; CHECK-LABEL: xvinsve0_v8i32_l_4:
24+
; CHECK: # %bb.0: # %entry
25+
; CHECK-NEXT: xvld $xr0, $a1, 0
26+
; CHECK-NEXT: xvld $xr1, $a2, 0
27+
; CHECK-NEXT: xvinsve0.w $xr0, $xr1, 4
28+
; CHECK-NEXT: xvst $xr0, $a0, 0
29+
; CHECK-NEXT: ret
7130
entry:
7231
%va = load <8 x i32>, ptr %a
7332
%vb = load <8 x i32>, ptr %b
@@ -81,10 +40,8 @@ define void @xvinsve0_v8f32_l(ptr %d, ptr %a, ptr %b) nounwind {
8140
; CHECK: # %bb.0: # %entry
8241
; CHECK-NEXT: xvld $xr0, $a1, 0
8342
; CHECK-NEXT: xvld $xr1, $a2, 0
84-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI2_0)
85-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI2_0)
86-
; CHECK-NEXT: xvshuf.w $xr2, $xr1, $xr0
87-
; CHECK-NEXT: xvst $xr2, $a0, 0
43+
; CHECK-NEXT: xvinsve0.w $xr0, $xr1, 0
44+
; CHECK-NEXT: xvst $xr0, $a0, 0
8845
; CHECK-NEXT: ret
8946
entry:
9047
%va = load <8 x float>, ptr %a
@@ -99,10 +56,8 @@ define void @xvinsve0_v8i32_h_1(ptr %d, ptr %a, ptr %b) nounwind {
9956
; CHECK: # %bb.0: # %entry
10057
; CHECK-NEXT: xvld $xr0, $a1, 0
10158
; CHECK-NEXT: xvld $xr1, $a2, 0
102-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI3_0)
103-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI3_0)
104-
; CHECK-NEXT: xvshuf.w $xr2, $xr1, $xr0
105-
; CHECK-NEXT: xvst $xr2, $a0, 0
59+
; CHECK-NEXT: xvinsve0.w $xr1, $xr0, 1
60+
; CHECK-NEXT: xvst $xr1, $a0, 0
10661
; CHECK-NEXT: ret
10762
entry:
10863
%va = load <8 x i32>, ptr %a
@@ -113,52 +68,13 @@ entry:
11368
}
11469

11570
define void @xvinsve0_v8i32_h_6(ptr %d, ptr %a, ptr %b) nounwind {
116-
; LA32-LABEL: xvinsve0_v8i32_h_6:
117-
; LA32: # %bb.0: # %entry
118-
; LA32-NEXT: xvld $xr0, $a2, 0
119-
; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 4
120-
; LA32-NEXT: ld.w $a1, $a1, 0
121-
; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0
122-
; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 5
123-
; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 1
124-
; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 2
125-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 7
126-
; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 3
127-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 0
128-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 0
129-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 1
130-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 1
131-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 2
132-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 2
133-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 3
134-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 3
135-
; LA32-NEXT: xvpermi.q $xr2, $xr1, 2
136-
; LA32-NEXT: xvst $xr2, $a0, 0
137-
; LA32-NEXT: ret
138-
;
139-
; LA64-LABEL: xvinsve0_v8i32_h_6:
140-
; LA64: # %bb.0: # %entry
141-
; LA64-NEXT: xvld $xr0, $a2, 0
142-
; LA64-NEXT: xvld $xr1, $a1, 0
143-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 4
144-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 0
145-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 5
146-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 1
147-
; LA64-NEXT: xvpickve2gr.w $a1, $xr1, 0
148-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 2
149-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 7
150-
; LA64-NEXT: vinsgr2vr.w $vr2, $a1, 3
151-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 0
152-
; LA64-NEXT: vinsgr2vr.w $vr1, $a1, 0
153-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 1
154-
; LA64-NEXT: vinsgr2vr.w $vr1, $a1, 1
155-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 2
156-
; LA64-NEXT: vinsgr2vr.w $vr1, $a1, 2
157-
; LA64-NEXT: xvpickve2gr.w $a1, $xr0, 3
158-
; LA64-NEXT: vinsgr2vr.w $vr1, $a1, 3
159-
; LA64-NEXT: xvpermi.q $xr1, $xr2, 2
160-
; LA64-NEXT: xvst $xr1, $a0, 0
161-
; LA64-NEXT: ret
71+
; CHECK-LABEL: xvinsve0_v8i32_h_6:
72+
; CHECK: # %bb.0: # %entry
73+
; CHECK-NEXT: xvld $xr0, $a1, 0
74+
; CHECK-NEXT: xvld $xr1, $a2, 0
75+
; CHECK-NEXT: xvinsve0.w $xr1, $xr0, 6
76+
; CHECK-NEXT: xvst $xr1, $a0, 0
77+
; CHECK-NEXT: ret
16278
entry:
16379
%va = load <8 x i32>, ptr %a
16480
%vb = load <8 x i32>, ptr %b
@@ -172,10 +88,8 @@ define void @xvinsve0_v8f32_h(ptr %d, ptr %a, ptr %b) nounwind {
17288
; CHECK: # %bb.0: # %entry
17389
; CHECK-NEXT: xvld $xr0, $a1, 0
17490
; CHECK-NEXT: xvld $xr1, $a2, 0
175-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI5_0)
176-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI5_0)
177-
; CHECK-NEXT: xvshuf.w $xr2, $xr1, $xr0
178-
; CHECK-NEXT: xvst $xr2, $a0, 0
91+
; CHECK-NEXT: xvinsve0.w $xr1, $xr0, 0
92+
; CHECK-NEXT: xvst $xr1, $a0, 0
17993
; CHECK-NEXT: ret
18094
entry:
18195
%va = load <8 x float>, ptr %a
@@ -191,10 +105,8 @@ define void @xvinsve0_v4i64_l_1(ptr %d, ptr %a, ptr %b) nounwind {
191105
; CHECK: # %bb.0: # %entry
192106
; CHECK-NEXT: xvld $xr0, $a1, 0
193107
; CHECK-NEXT: xvld $xr1, $a2, 0
194-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI6_0)
195-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI6_0)
196-
; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0
197-
; CHECK-NEXT: xvst $xr2, $a0, 0
108+
; CHECK-NEXT: xvinsve0.d $xr0, $xr1, 1
109+
; CHECK-NEXT: xvst $xr0, $a0, 0
198110
; CHECK-NEXT: ret
199111
entry:
200112
%va = load <4 x i64>, ptr %a
@@ -205,44 +117,13 @@ entry:
205117
}
206118

207119
define void @xvinsve0_v4i64_l_2(ptr %d, ptr %a, ptr %b) nounwind {
208-
; LA32-LABEL: xvinsve0_v4i64_l_2:
209-
; LA32: # %bb.0: # %entry
210-
; LA32-NEXT: xvld $xr0, $a2, 0
211-
; LA32-NEXT: xvpickve2gr.w $a2, $xr0, 0
212-
; LA32-NEXT: xvld $xr1, $a1, 0
213-
; LA32-NEXT: vinsgr2vr.w $vr2, $a2, 0
214-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 1
215-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 1
216-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 6
217-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 2
218-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 7
219-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 3
220-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 0
221-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
222-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 1
223-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 1
224-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 2
225-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 2
226-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 3
227-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 3
228-
; LA32-NEXT: xvpermi.q $xr0, $xr2, 2
229-
; LA32-NEXT: xvst $xr0, $a0, 0
230-
; LA32-NEXT: ret
231-
;
232-
; LA64-LABEL: xvinsve0_v4i64_l_2:
233-
; LA64: # %bb.0: # %entry
234-
; LA64-NEXT: ld.d $a2, $a2, 0
235-
; LA64-NEXT: xvld $xr0, $a1, 0
236-
; LA64-NEXT: vinsgr2vr.d $vr1, $a2, 0
237-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 3
238-
; LA64-NEXT: vinsgr2vr.d $vr1, $a1, 1
239-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 0
240-
; LA64-NEXT: vinsgr2vr.d $vr2, $a1, 0
241-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 1
242-
; LA64-NEXT: vinsgr2vr.d $vr2, $a1, 1
243-
; LA64-NEXT: xvpermi.q $xr2, $xr1, 2
244-
; LA64-NEXT: xvst $xr2, $a0, 0
245-
; LA64-NEXT: ret
120+
; CHECK-LABEL: xvinsve0_v4i64_l_2:
121+
; CHECK: # %bb.0: # %entry
122+
; CHECK-NEXT: xvld $xr0, $a1, 0
123+
; CHECK-NEXT: xvld $xr1, $a2, 0
124+
; CHECK-NEXT: xvinsve0.d $xr0, $xr1, 2
125+
; CHECK-NEXT: xvst $xr0, $a0, 0
126+
; CHECK-NEXT: ret
246127
entry:
247128
%va = load <4 x i64>, ptr %a
248129
%vb = load <4 x i64>, ptr %b
@@ -256,10 +137,8 @@ define void @xvinsve0_v4f64_l(ptr %d, ptr %a, ptr %b) nounwind {
256137
; CHECK: # %bb.0: # %entry
257138
; CHECK-NEXT: xvld $xr0, $a1, 0
258139
; CHECK-NEXT: xvld $xr1, $a2, 0
259-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI8_0)
260-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI8_0)
261-
; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0
262-
; CHECK-NEXT: xvst $xr2, $a0, 0
140+
; CHECK-NEXT: xvinsve0.d $xr0, $xr1, 0
141+
; CHECK-NEXT: xvst $xr0, $a0, 0
263142
; CHECK-NEXT: ret
264143
entry:
265144
%va = load <4 x double>, ptr %a
@@ -274,10 +153,8 @@ define void @xvinsve0_v4i64_h_0(ptr %d, ptr %a, ptr %b) nounwind {
274153
; CHECK: # %bb.0: # %entry
275154
; CHECK-NEXT: xvld $xr0, $a1, 0
276155
; CHECK-NEXT: xvld $xr1, $a2, 0
277-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI9_0)
278-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI9_0)
279-
; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0
280-
; CHECK-NEXT: xvst $xr2, $a0, 0
156+
; CHECK-NEXT: xvinsve0.d $xr1, $xr0, 0
157+
; CHECK-NEXT: xvst $xr1, $a0, 0
281158
; CHECK-NEXT: ret
282159
entry:
283160
%va = load <4 x i64>, ptr %a
@@ -288,44 +165,13 @@ entry:
288165
}
289166

290167
define void @xvinsve0_v4i64_h_2(ptr %d, ptr %a, ptr %b) nounwind {
291-
; LA32-LABEL: xvinsve0_v4i64_h_2:
292-
; LA32: # %bb.0: # %entry
293-
; LA32-NEXT: xvld $xr0, $a1, 0
294-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 0
295-
; LA32-NEXT: xvld $xr1, $a2, 0
296-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 0
297-
; LA32-NEXT: xvpickve2gr.w $a1, $xr0, 1
298-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 1
299-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 6
300-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 2
301-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 7
302-
; LA32-NEXT: vinsgr2vr.w $vr2, $a1, 3
303-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 0
304-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
305-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 1
306-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 1
307-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 2
308-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 2
309-
; LA32-NEXT: xvpickve2gr.w $a1, $xr1, 3
310-
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 3
311-
; LA32-NEXT: xvpermi.q $xr0, $xr2, 2
312-
; LA32-NEXT: xvst $xr0, $a0, 0
313-
; LA32-NEXT: ret
314-
;
315-
; LA64-LABEL: xvinsve0_v4i64_h_2:
316-
; LA64: # %bb.0: # %entry
317-
; LA64-NEXT: ld.d $a1, $a1, 0
318-
; LA64-NEXT: xvld $xr0, $a2, 0
319-
; LA64-NEXT: vinsgr2vr.d $vr1, $a1, 0
320-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 3
321-
; LA64-NEXT: vinsgr2vr.d $vr1, $a1, 1
322-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 0
323-
; LA64-NEXT: vinsgr2vr.d $vr2, $a1, 0
324-
; LA64-NEXT: xvpickve2gr.d $a1, $xr0, 1
325-
; LA64-NEXT: vinsgr2vr.d $vr2, $a1, 1
326-
; LA64-NEXT: xvpermi.q $xr2, $xr1, 2
327-
; LA64-NEXT: xvst $xr2, $a0, 0
328-
; LA64-NEXT: ret
168+
; CHECK-LABEL: xvinsve0_v4i64_h_2:
169+
; CHECK: # %bb.0: # %entry
170+
; CHECK-NEXT: xvld $xr0, $a1, 0
171+
; CHECK-NEXT: xvld $xr1, $a2, 0
172+
; CHECK-NEXT: xvinsve0.d $xr1, $xr0, 2
173+
; CHECK-NEXT: xvst $xr1, $a0, 0
174+
; CHECK-NEXT: ret
329175
entry:
330176
%va = load <4 x i64>, ptr %a
331177
%vb = load <4 x i64>, ptr %b
@@ -339,10 +185,8 @@ define void @xvinsve0_v4f64_h(ptr %d, ptr %a, ptr %b) nounwind {
339185
; CHECK: # %bb.0: # %entry
340186
; CHECK-NEXT: xvld $xr0, $a1, 0
341187
; CHECK-NEXT: xvld $xr1, $a2, 0
342-
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI11_0)
343-
; CHECK-NEXT: xvld $xr2, $a1, %pc_lo12(.LCPI11_0)
344-
; CHECK-NEXT: xvshuf.d $xr2, $xr1, $xr0
345-
; CHECK-NEXT: xvst $xr2, $a0, 0
188+
; CHECK-NEXT: xvinsve0.d $xr1, $xr0, 0
189+
; CHECK-NEXT: xvst $xr1, $a0, 0
346190
; CHECK-NEXT: ret
347191
entry:
348192
%va = load <4 x double>, ptr %a

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