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[AArch64][llvm] Fix DC CIGDVAPS instruction to require FEAT_MTE2 (#148636)
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llvm/lib/Target/AArch64/AArch64SystemOperands.td

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@@ -2387,6 +2387,9 @@ def : RWSysReg<"TRBSR_EL3", 0b11, 0b110, 0b1001, 0b1011, 0b011>;
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// v9.6 FEAT_PoPS
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//
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let Requires = [{ {AArch64::FeaturePoPS} }] in {
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def : DC<"CIGDVAPS", 0b000, 0b0111, 0b1111, 0b101>;
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def : DC<"CIVAPS", 0b000, 0b0111, 0b1111, 0b001>;
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}
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let Requires = [{ {AArch64::FeaturePoPS, AArch64::FeatureMTE} }] in {
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def : DC<"CIGDVAPS", 0b000, 0b0111, 0b1111, 0b101>;
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}

llvm/test/MC/AArch64/armv9.6a-ras.s

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@@ -1,9 +1,9 @@
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// RUN: not llvm-mc -triple aarch64 -show-encoding < %s 2>&1 | FileCheck %s --check-prefix NO-POPS
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// RUN: llvm-mc -triple aarch64 -mattr=+pops -show-encoding < %s 2>&1 | FileCheck %s --check-prefix HAS-POPS
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// RUN: llvm-mc -triple aarch64 -mattr=+pops,+mte -show-encoding < %s 2>&1 | FileCheck %s --check-prefix HAS-POPS
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dc CIGDVAPS, x3
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dc CIVAPS, x3
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// NO-POPS: error: DC CIGDVAPS requires: pops
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// NO-POPS: error: DC CIGDVAPS requires: mte, memtag, pops
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// NO-POPS: error: DC CIVAPS requires: pops
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# HAS-POPS: dc cigdvaps, x3 // encoding: [0xa3,0x7f,0x08,0xd5]

llvm/test/MC/Disassembler/AArch64/armv9.6a-ras.txt

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# RUN: llvm-mc -triple aarch64 -mattr=+pops -disassemble < %s | FileCheck %s
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# RUN: llvm-mc -triple aarch64 -mattr=+pops,+mte -disassemble < %s | FileCheck %s
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#------------------------------------------------------------------------------
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# ARMV9.6-A RAS Extensions

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