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Commit b0163a6

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liuzhenya
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fix: ci
1 parent 6900fd0 commit b0163a6

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clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -82,9 +82,10 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned builtinID,
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bool isSignaling) {
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assert(!cir::MissingFeatures::cgFPOptionsRAII());
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auto loc = getLoc(expr->getExprLoc());
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mlir::Value cmp;
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assert(cir::MissingFeatures::emitConstrainedFPCall());
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cmp = builder.createVecCompare(loc, pred, ops[0], ops[1]);
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// TODO: Add isSignaling boolean once emitConstrainedFPCall implemented
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assert(!cir::MissingFeatures::emitConstrainedFPCall() &&
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"constrained FP compare NYI");
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mlir::Value cmp = builder.createVecCompare(loc, pred, ops[0], ops[1]);
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mlir::Value bitCast = builder.createBitcast(
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shouldInvert ? builder.createNot(cmp) : cmp, ops[0].getType());
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return bitCast;

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