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rebase and update multiple-result-intrinsics.ll test
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llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll

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@@ -37,7 +37,6 @@ define void @sincos_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noali
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;
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; CHECK-ARMPL-LABEL: define void @sincos_f32(
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; CHECK-ARMPL-SAME: ptr noalias [[IN:%.*]], ptr noalias writeonly [[OUT_A:%.*]], ptr noalias writeonly [[OUT_B:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-ARMPL: [[ENTRY:.*:]]
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; CHECK-ARMPL: [[VECTOR_PH:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY1:.*:]]
@@ -51,15 +50,6 @@ define void @sincos_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noali
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP15]], ptr [[TMP22:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP16]], ptr [[TMP24:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP17]], ptr [[TMP27:%.*]], align 4
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; CHECK-ARMPL: [[MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[TMP29:%.*]] = call { <4 x float>, <4 x float> } @llvm.sincos.v4f32(<4 x float> [[WIDE_LOAD3:%.*]])
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; CHECK-ARMPL: [[TMP25:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 0
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; CHECK-ARMPL: [[TMP26:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 1
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; CHECK-ARMPL: store <4 x float> [[TMP25]], ptr [[TMP30:%.*]], align 4
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; CHECK-ARMPL: store <4 x float> [[TMP26]], ptr [[TMP28:%.*]], align 4
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; CHECK-ARMPL: [[VEC_EPILOG_MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY1:.*:]]
@@ -269,7 +259,6 @@ define void @modf_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noalias
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;
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; CHECK-ARMPL-LABEL: define void @modf_f32(
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; CHECK-ARMPL-SAME: ptr noalias [[IN:%.*]], ptr noalias writeonly [[OUT_A:%.*]], ptr noalias writeonly [[OUT_B:%.*]]) #[[ATTR0]] {
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; CHECK-ARMPL: [[ENTRY:.*:]]
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; CHECK-ARMPL: [[VECTOR_PH:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY1:.*:]]
@@ -283,15 +272,6 @@ define void @modf_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noalias
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP15]], ptr [[TMP22:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP16]], ptr [[TMP24:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP17]], ptr [[TMP27:%.*]], align 4
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; CHECK-ARMPL: [[MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[TMP29:%.*]] = call { <4 x float>, <4 x float> } @llvm.modf.v4f32(<4 x float> [[WIDE_LOAD3:%.*]])
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; CHECK-ARMPL: [[TMP25:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 0
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; CHECK-ARMPL: [[TMP26:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 1
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; CHECK-ARMPL: store <4 x float> [[TMP25]], ptr [[TMP30:%.*]], align 4
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; CHECK-ARMPL: store <4 x float> [[TMP26]], ptr [[TMP28:%.*]], align 4
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; CHECK-ARMPL: [[VEC_EPILOG_MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY1:.*:]]
@@ -429,7 +409,6 @@ define void @sincospi_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noa
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;
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; CHECK-ARMPL-LABEL: define void @sincospi_f32(
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; CHECK-ARMPL-SAME: ptr noalias [[IN:%.*]], ptr noalias writeonly [[OUT_A:%.*]], ptr noalias writeonly [[OUT_B:%.*]]) #[[ATTR0]] {
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; CHECK-ARMPL: [[ENTRY:.*:]]
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; CHECK-ARMPL: [[VECTOR_PH:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[VECTOR_BODY1:.*:]]
@@ -443,15 +422,6 @@ define void @sincospi_f32(ptr noalias %in, ptr noalias writeonly %out_a, ptr noa
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP15]], ptr [[TMP22:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP16]], ptr [[TMP24:%.*]], align 4
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; CHECK-ARMPL: store <vscale x 4 x float> [[TMP17]], ptr [[TMP27:%.*]], align 4
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; CHECK-ARMPL: [[MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_VECTOR_BODY:.*:]]
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; CHECK-ARMPL: [[TMP29:%.*]] = call { <4 x float>, <4 x float> } @llvm.sincospi.v4f32(<4 x float> [[WIDE_LOAD3:%.*]])
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; CHECK-ARMPL: [[TMP25:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 0
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; CHECK-ARMPL: [[TMP26:%.*]] = extractvalue { <4 x float>, <4 x float> } [[TMP29]], 1
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; CHECK-ARMPL: store <4 x float> [[TMP25]], ptr [[TMP30:%.*]], align 4
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; CHECK-ARMPL: store <4 x float> [[TMP26]], ptr [[TMP28:%.*]], align 4
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; CHECK-ARMPL: [[VEC_EPILOG_MIDDLE_BLOCK:.*:]]
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; CHECK-ARMPL: [[VEC_EPILOG_SCALAR_PH:.*:]]
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; CHECK-ARMPL: [[FOR_BODY1:.*:]]

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