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[LSR] Preserve LCSSA when rewriting instruction with PHI user
Fixes #61182. LoopStrengthReduce may sometimes break LCSSA form when applying a rewrite for an instruction used in a PHI. It happens if: - The PHI is in a loop exit block, - The edge from the corresponding exiting block to that exit is critical, - The PHI has at least two inputs coming from loop blocks, - and the rewritten instruction is inserted in the loop. In such case we split the critical edge and then replace PHI inputs with the rewritten instruction. However ExitBlock is no longer a loop exit, so LCSSA form is broken. This patch fixes it by collecting all inserted instructions for PHIs whose parent block is not a loop exit and then forming LCSSA for them. Differential Revision: https://reviews.llvm.org/D146811
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12 files changed

+109
-51
lines changed

12 files changed

+109
-51
lines changed

‎llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5538,6 +5538,13 @@ void LSRInstance::RewriteForPHI(
55385538
PHINode *PN, const LSRUse &LU, const LSRFixup &LF, const Formula &F,
55395539
SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
55405540
DenseMap<BasicBlock *, Value *> Inserted;
5541+
5542+
// Inserting instructions in the loop and using them as PHI's input could
5543+
// break LCSSA in case if PHI's parent block is not a loop exit (i.e. the
5544+
// corresponding incoming block is not loop exiting). So collect all such
5545+
// instructions to form LCSSA for them later.
5546+
SmallVector<Instruction *, 4> InsertedNonLCSSAInsts;
5547+
55415548
for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
55425549
if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
55435550
bool needUpdateFixups = false;
@@ -5603,6 +5610,13 @@ void LSRInstance::RewriteForPHI(
56035610
FullV, LF.OperandValToReplace->getType(),
56045611
"tmp", BB->getTerminator());
56055612

5613+
// If the incoming block for this value is not in the loop, it means the
5614+
// current PHI is not in a loop exit, so we must create a LCSSA PHI for
5615+
// the inserted value.
5616+
if (auto *I = dyn_cast<Instruction>(FullV))
5617+
if (L->contains(I) && !L->contains(BB))
5618+
InsertedNonLCSSAInsts.push_back(I);
5619+
56065620
PN->setIncomingValue(i, FullV);
56075621
Pair.first->second = FullV;
56085622
}
@@ -5645,6 +5659,9 @@ void LSRInstance::RewriteForPHI(
56455659
}
56465660
}
56475661
}
5662+
5663+
IRBuilder<> Builder(L->getHeader()->getContext());
5664+
formLCSSAForInstructions(InsertedNonLCSSAInsts, DT, LI, &SE, Builder);
56485665
}
56495666

56505667
/// Emit instructions for the leading candidate expression for this LSRUse (this

‎llvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@ define ptr @test1() {
2020
; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 1
2121
; CHECK-NEXT: br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
2222
; CHECK: loopexit:
23+
; CHECK-NEXT: [[SCEVGEP_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]
2324
; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
2425
; CHECK: bbA:
2526
; CHECK-NEXT: switch i32 0, label [[BBA_BB89_CRIT_EDGE:%.*]] [
@@ -36,7 +37,7 @@ define ptr @test1() {
3637
; CHECK: bbB.bb89_crit_edge:
3738
; CHECK-NEXT: br label [[BB89]]
3839
; CHECK: bb89:
39-
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP]], [[BBA_BB89_CRIT_EDGE]] ], [ [[SCEVGEP]], [[BBB_BB89_CRIT_EDGE]] ]
40+
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA]], [[BBA_BB89_CRIT_EDGE]] ], [ [[SCEVGEP_LCSSA]], [[BBB_BB89_CRIT_EDGE]] ]
4041
; CHECK-NEXT: br label [[EXIT:%.*]]
4142
; CHECK: exit:
4243
; CHECK-NEXT: ret ptr [[TMP75PHI]]
@@ -84,6 +85,8 @@ define ptr @test2() {
8485
; CHECK-NEXT: [[SCEVGEP]] = getelementptr i8, ptr [[LSR_IV]], i64 1
8586
; CHECK-NEXT: br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
8687
; CHECK: loopexit:
88+
; CHECK-NEXT: [[SCEVGEP_LCSSA1:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]
89+
; CHECK-NEXT: [[SCEVGEP_LCSSA:%.*]] = phi ptr [ [[SCEVGEP]], [[LOOP]] ]
8790
; CHECK-NEXT: br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
8891
; CHECK: bbA:
8992
; CHECK-NEXT: switch i32 0, label [[BB89:%.*]] [
@@ -98,10 +101,10 @@ define ptr @test2() {
98101
; CHECK: bbB.exit_crit_edge:
99102
; CHECK-NEXT: br label [[EXIT:%.*]]
100103
; CHECK: bb89:
101-
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP]], [[BBA]] ], [ [[SCEVGEP]], [[BBA]] ], [ [[SCEVGEP]], [[BBA]] ]
104+
; CHECK-NEXT: [[TMP75PHI:%.*]] = phi ptr [ [[SCEVGEP_LCSSA1]], [[BBA]] ], [ [[SCEVGEP_LCSSA1]], [[BBA]] ], [ [[SCEVGEP_LCSSA1]], [[BBA]] ]
102105
; CHECK-NEXT: br label [[EXIT]]
103106
; CHECK: exit:
104-
; CHECK-NEXT: [[RESULT:%.*]] = phi ptr [ [[TMP75PHI]], [[BB89]] ], [ [[SCEVGEP]], [[BBB_EXIT_CRIT_EDGE]] ]
107+
; CHECK-NEXT: [[RESULT:%.*]] = phi ptr [ [[TMP75PHI]], [[BB89]] ], [ [[SCEVGEP_LCSSA]], [[BBB_EXIT_CRIT_EDGE]] ]
105108
; CHECK-NEXT: ret ptr [[RESULT]]
106109
;
107110
entry:

‎llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-invalid-ptr-extend.ll‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,12 @@ define amdgpu_kernel void @scaledregtest() local_unnamed_addr {
1616
; CHECK-NEXT: entry:
1717
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1818
; CHECK: loopexit:
19+
; CHECK-NEXT: [[SCEVGEP13_LCSSA:%.*]] = phi ptr [ [[SCEVGEP13:%.*]], [[FOR_BODY]] ]
20+
; CHECK-NEXT: [[SCEVGEP11_LCSSA:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP11:%.*]], [[FOR_BODY]] ]
1921
; CHECK-NEXT: br label [[FOR_BODY_1:%.*]]
2022
; CHECK: for.body.1:
21-
; CHECK-NEXT: [[LSR_IV5:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP6:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP11:%.*]], [[LOOPEXIT:%.*]] ]
22-
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP2:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP13:%.*]], [[LOOPEXIT]] ]
23+
; CHECK-NEXT: [[LSR_IV5:%.*]] = phi ptr addrspace(5) [ [[SCEVGEP6:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP11_LCSSA]], [[LOOPEXIT:%.*]] ]
24+
; CHECK-NEXT: [[LSR_IV1:%.*]] = phi ptr [ [[SCEVGEP2:%.*]], [[FOR_BODY_1]] ], [ [[SCEVGEP13_LCSSA]], [[LOOPEXIT]] ]
2325
; CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr addrspace(5) [[LSR_IV5]], align 8
2426
; CHECK-NEXT: store ptr [[TMP0]], ptr [[LSR_IV1]], align 8
2527
; CHECK-NEXT: [[SCEVGEP2]] = getelementptr i8, ptr [[LSR_IV1]], i64 8

‎llvm/test/Transforms/LoopStrengthReduce/X86/2011-11-29-postincphi.ll‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,17 +20,16 @@ define i64 @sqlite3DropTriggerPtr() nounwind {
2020
; CHECK-NEXT: .p2align 4, 0x90
2121
; CHECK-NEXT: .LBB0_1: # %bb1
2222
; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
23+
; CHECK-NEXT: movq %rbx, %rcx
2324
; CHECK-NEXT: testb %al, %al
24-
; CHECK-NEXT: je .LBB0_4
25+
; CHECK-NEXT: je .LBB0_3
2526
; CHECK-NEXT: # %bb.2: # %bb4
2627
; CHECK-NEXT: # in Loop: Header=BB0_1 Depth=1
27-
; CHECK-NEXT: incq %rbx
28+
; CHECK-NEXT: leaq 1(%rcx), %rbx
2829
; CHECK-NEXT: testb %al, %al
2930
; CHECK-NEXT: jne .LBB0_1
30-
; CHECK-NEXT: # %bb.3: # %bb8split
31-
; CHECK-NEXT: decq %rbx
32-
; CHECK-NEXT: .LBB0_4: # %bb8
33-
; CHECK-NEXT: movq %rbx, %rax
31+
; CHECK-NEXT: .LBB0_3: # %bb8
32+
; CHECK-NEXT: movq %rcx, %rax
3433
; CHECK-NEXT: popq %rbx
3534
; CHECK-NEXT: retq
3635
bb:

‎llvm/test/Transforms/LoopStrengthReduce/X86/expander-crashes.ll‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,12 @@ define i64 @blam(%struct.hoge* %start, %struct.hoge* %end, %struct.hoge* %ptr.2)
2121
; CHECK-NEXT: [[EC:%.*]] = icmp eq %struct.hoge* [[IV_NEXT]], [[END:%.*]]
2222
; CHECK-NEXT: br i1 [[EC]], label [[LOOP_2_PH:%.*]], label [[LOOP_1_HEADER]]
2323
; CHECK: loop.2.ph:
24+
; CHECK-NEXT: [[IV_NEXT_LCSSA:%.*]] = phi %struct.hoge* [ [[IV_NEXT]], [[LOOP_1_HEADER]] ]
25+
; CHECK-NEXT: [[LSR_IV_NEXT6_LCSSA:%.*]] = phi i64 [ [[LSR_IV_NEXT6]], [[LOOP_1_HEADER]] ]
2426
; CHECK-NEXT: br label [[LOOP_2_HEADER:%.*]]
2527
; CHECK: loop.2.header:
26-
; CHECK-NEXT: [[LSR_IV2:%.*]] = phi i64 [ [[LSR_IV_NEXT3:%.*]], [[LOOP_2_LATCH:%.*]] ], [ [[LSR_IV_NEXT6]], [[LOOP_2_PH]] ]
27-
; CHECK-NEXT: [[IV2:%.*]] = phi %struct.hoge* [ [[IV2_NEXT:%.*]], [[LOOP_2_LATCH]] ], [ [[IV_NEXT]], [[LOOP_2_PH]] ]
28+
; CHECK-NEXT: [[LSR_IV2:%.*]] = phi i64 [ [[LSR_IV_NEXT3:%.*]], [[LOOP_2_LATCH:%.*]] ], [ [[LSR_IV_NEXT6_LCSSA]], [[LOOP_2_PH]] ]
29+
; CHECK-NEXT: [[IV2:%.*]] = phi %struct.hoge* [ [[IV2_NEXT:%.*]], [[LOOP_2_LATCH]] ], [ [[IV_NEXT_LCSSA]], [[LOOP_2_PH]] ]
2830
; CHECK-NEXT: [[IV24:%.*]] = bitcast %struct.hoge* [[IV2]] to i32*
2931
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[LSR_IV2]], 12
3032
; CHECK-NEXT: call void @use.i64(i64 [[TMP0]])

‎llvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,10 @@ define void @test(ptr %ioptr, i32 %X, ptr %start, ptr %end) {
2626
; CHECK-NEXT: [[EC0:%.*]] = icmp eq ptr [[ADD_PTR94]], [[END:%.*]]
2727
; CHECK-NEXT: br i1 [[EC0]], label [[FOR_BODY37]], label [[FOR_END_LOOPEXIT:%.*]]
2828
; CHECK: for.end.loopexit:
29+
; CHECK-NEXT: [[ADD_PTR94_LCSSA:%.*]] = phi ptr [ [[ADD_PTR94]], [[FOR_BODY37]] ]
2930
; CHECK-NEXT: br label [[FOR_END:%.*]]
3031
; CHECK: for.end:
31-
; CHECK-NEXT: [[P0R_0_LCSSA:%.*]] = phi ptr [ [[ADD_PTR94]], [[FOR_END_LOOPEXIT]] ]
32+
; CHECK-NEXT: [[P0R_0_LCSSA:%.*]] = phi ptr [ [[ADD_PTR94_LCSSA]], [[FOR_END_LOOPEXIT]] ]
3233
; CHECK-NEXT: [[EC1:%.*]] = icmp eq ptr [[P0R_0_LCSSA]], [[END]]
3334
; CHECK-NEXT: br i1 [[EC1]], label [[FOR_BODY15]], label [[FOR_INC133:%.*]]
3435
; CHECK: for.inc133:

‎llvm/test/Transforms/LoopStrengthReduce/X86/sibling-loops.ll‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,32 +44,35 @@ define void @foo(i64 %N) local_unnamed_addr {
4444
; CHECK-NEXT: [[TOBOOL12:%.*]] = icmp eq i64 [[T2]], 0
4545
; CHECK-NEXT: br i1 [[TOBOOL12]], label [[DO_BODY14_PREHEADER:%.*]], label [[DO_BODY8]]
4646
; CHECK: do.body14.preheader:
47+
; CHECK-NEXT: [[INC10_LCSSA:%.*]] = phi i64 [ [[INC10]], [[DO_BODY8]] ]
4748
; CHECK-NEXT: br label [[DO_BODY14:%.*]]
4849
; CHECK: do.body14:
4950
; CHECK-NEXT: [[I_3:%.*]] = phi i64 [ [[INC15:%.*]], [[DO_BODY14]] ], [ 0, [[DO_BODY14_PREHEADER]] ]
50-
; CHECK-NEXT: [[J_3:%.*]] = phi i64 [ [[INC16:%.*]], [[DO_BODY14]] ], [ [[INC10]], [[DO_BODY14_PREHEADER]] ]
51+
; CHECK-NEXT: [[J_3:%.*]] = phi i64 [ [[INC16:%.*]], [[DO_BODY14]] ], [ [[INC10_LCSSA]], [[DO_BODY14_PREHEADER]] ]
5152
; CHECK-NEXT: tail call void @goo(i64 [[I_3]], i64 [[J_3]])
5253
; CHECK-NEXT: [[INC15]] = add nuw nsw i64 [[I_3]], 1
5354
; CHECK-NEXT: [[INC16]] = add i64 [[J_3]], 1
5455
; CHECK-NEXT: [[T3:%.*]] = load i64, ptr @cond, align 8
5556
; CHECK-NEXT: [[TOBOOL18:%.*]] = icmp eq i64 [[T3]], 0
5657
; CHECK-NEXT: br i1 [[TOBOOL18]], label [[DO_BODY20_PREHEADER:%.*]], label [[DO_BODY14]]
5758
; CHECK: do.body20.preheader:
59+
; CHECK-NEXT: [[INC16_LCSSA:%.*]] = phi i64 [ [[INC16]], [[DO_BODY14]] ]
5860
; CHECK-NEXT: br label [[DO_BODY20:%.*]]
5961
; CHECK: do.body20:
6062
; CHECK-NEXT: [[I_4:%.*]] = phi i64 [ [[INC21:%.*]], [[DO_BODY20]] ], [ 0, [[DO_BODY20_PREHEADER]] ]
61-
; CHECK-NEXT: [[J_4:%.*]] = phi i64 [ [[INC22:%.*]], [[DO_BODY20]] ], [ [[INC16]], [[DO_BODY20_PREHEADER]] ]
63+
; CHECK-NEXT: [[J_4:%.*]] = phi i64 [ [[INC22:%.*]], [[DO_BODY20]] ], [ [[INC16_LCSSA]], [[DO_BODY20_PREHEADER]] ]
6264
; CHECK-NEXT: tail call void @goo(i64 [[I_4]], i64 [[J_4]])
6365
; CHECK-NEXT: [[INC21]] = add nuw nsw i64 [[I_4]], 1
6466
; CHECK-NEXT: [[INC22]] = add i64 [[J_4]], 1
6567
; CHECK-NEXT: [[T4:%.*]] = load i64, ptr @cond, align 8
6668
; CHECK-NEXT: [[TOBOOL24:%.*]] = icmp eq i64 [[T4]], 0
6769
; CHECK-NEXT: br i1 [[TOBOOL24]], label [[DO_BODY26_PREHEADER:%.*]], label [[DO_BODY20]]
6870
; CHECK: do.body26.preheader:
71+
; CHECK-NEXT: [[INC22_LCSSA:%.*]] = phi i64 [ [[INC22]], [[DO_BODY20]] ]
6972
; CHECK-NEXT: br label [[DO_BODY26:%.*]]
7073
; CHECK: do.body26:
7174
; CHECK-NEXT: [[I_5:%.*]] = phi i64 [ [[INC27:%.*]], [[DO_BODY26]] ], [ 0, [[DO_BODY26_PREHEADER]] ]
72-
; CHECK-NEXT: [[J_5:%.*]] = phi i64 [ [[INC28:%.*]], [[DO_BODY26]] ], [ [[INC22]], [[DO_BODY26_PREHEADER]] ]
75+
; CHECK-NEXT: [[J_5:%.*]] = phi i64 [ [[INC28:%.*]], [[DO_BODY26]] ], [ [[INC22_LCSSA]], [[DO_BODY26_PREHEADER]] ]
7376
; CHECK-NEXT: tail call void @goo(i64 [[I_5]], i64 [[J_5]])
7477
; CHECK-NEXT: [[INC27]] = add nuw nsw i64 [[I_5]], 1
7578
; CHECK-NEXT: [[INC28]] = add nsw i64 [[J_5]], 1

‎llvm/test/Transforms/LoopStrengthReduce/callbr-critical-edge-splitting.ll‎

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,19 +16,18 @@ define dso_local i32 @test1() local_unnamed_addr {
1616
; LEGACYPM: cond.true.i:
1717
; LEGACYPM-NEXT: br label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE:%.*]]
1818
; LEGACYPM: do.body.i.i.do.body.i.i_crit_edge:
19-
; LEGACYPM-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE]] ], [ undef, [[COND_TRUE_I]] ]
20-
; LEGACYPM-NEXT: [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], 1
2119
; LEGACYPM-NEXT: br i1 true, label [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE:%.*]], label [[DO_BODY_I_I_DO_BODY_I_I_CRIT_EDGE]]
2220
; LEGACYPM: do.body.i.i.rdrand_int.exit.i_crit_edge:
2321
; LEGACYPM-NEXT: br i1 true, label [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE:%.*]], label [[FOR_INC:%.*]]
2422
; LEGACYPM: do.body.i.i.rdrand_int.exit.i_crit_edge.for.end_crit_edge:
23+
; LEGACYPM-NEXT: [[LSR_IV_NEXT_LCSSA_LCSSA:%.*]] = phi i64 [ undef, [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE]] ]
2524
; LEGACYPM-NEXT: br label [[FOR_END:%.*]]
2625
; LEGACYPM: for.inc:
2726
; LEGACYPM-NEXT: br label [[FOR_COND]]
2827
; LEGACYPM: for.endsplit:
2928
; LEGACYPM-NEXT: br label [[FOR_END]]
3029
; LEGACYPM: for.end:
31-
; LEGACYPM-NEXT: [[PGOCOUNT_PROMOTED24:%.*]] = phi i64 [ [[LSR_IV_NEXT]], [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE]] ], [ undef, [[FOR_ENDSPLIT:%.*]] ]
30+
; LEGACYPM-NEXT: [[PGOCOUNT_PROMOTED24:%.*]] = phi i64 [ [[LSR_IV_NEXT_LCSSA_LCSSA]], [[DO_BODY_I_I_RDRAND_INT_EXIT_I_CRIT_EDGE_FOR_END_CRIT_EDGE]] ], [ undef, [[FOR_ENDSPLIT:%.*]] ]
3231
; LEGACYPM-NEXT: ret i32 undef
3332
;
3433
; NEWPM-LABEL: @test1(

‎llvm/test/Transforms/LoopStrengthReduce/depth-limit-overrun.ll‎

Lines changed: 27 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -74,49 +74,51 @@ define void @test(i32 %A, i32 %B, i32 %C) {
7474
;
7575
; LIMIT-LABEL: @test(
7676
; LIMIT-NEXT: entry:
77+
; LIMIT-NEXT: [[TMP0:%.*]] = mul i32 [[C:%.*]], -3
7778
; LIMIT-NEXT: br label [[OUTER_LOOP:%.*]]
7879
; LIMIT: outer_loop:
7980
; LIMIT-NEXT: [[PHI2:%.*]] = phi i32 [ [[A:%.*]], [[ENTRY:%.*]] ], [ 204, [[OUTER_TAIL:%.*]] ]
8081
; LIMIT-NEXT: [[PHI3:%.*]] = phi i32 [ [[A]], [[ENTRY]] ], [ 243, [[OUTER_TAIL]] ]
8182
; LIMIT-NEXT: [[PHI4:%.*]] = phi i32 [ [[B:%.*]], [[ENTRY]] ], [ [[I35:%.*]], [[OUTER_TAIL]] ]
8283
; LIMIT-NEXT: br label [[GUARD:%.*]]
8384
; LIMIT: guard:
84-
; LIMIT-NEXT: [[LCMP_MOD:%.*]] = icmp eq i32 [[C:%.*]], 0
85+
; LIMIT-NEXT: [[LCMP_MOD:%.*]] = icmp eq i32 [[C]], 0
8586
; LIMIT-NEXT: br i1 [[LCMP_MOD]], label [[OUTER_TAIL]], label [[PREHEADER:%.*]]
8687
; LIMIT: preheader:
8788
; LIMIT-NEXT: [[I15:%.*]] = shl i32 [[B]], 1
88-
; LIMIT-NEXT: [[TMP0:%.*]] = mul i32 [[PHI2]], -1
89-
; LIMIT-NEXT: [[TMP1:%.*]] = mul i32 [[TMP0]], -1
90-
; LIMIT-NEXT: [[TMP2:%.*]] = sub i32 [[PHI4]], [[TMP1]]
91-
; LIMIT-NEXT: [[TMP3:%.*]] = add i32 [[B]], [[PHI4]]
92-
; LIMIT-NEXT: [[TMP4:%.*]] = sub i32 [[TMP3]], [[TMP1]]
93-
; LIMIT-NEXT: [[TMP5:%.*]] = sub i32 14, [[TMP4]]
89+
; LIMIT-NEXT: [[TMP1:%.*]] = mul i32 [[PHI2]], -1
90+
; LIMIT-NEXT: [[TMP2:%.*]] = mul i32 [[TMP1]], -1
91+
; LIMIT-NEXT: [[TMP3:%.*]] = sub i32 [[PHI4]], [[TMP2]]
92+
; LIMIT-NEXT: [[TMP4:%.*]] = add i32 [[B]], [[PHI4]]
93+
; LIMIT-NEXT: [[TMP5:%.*]] = sub i32 [[TMP4]], [[TMP2]]
94+
; LIMIT-NEXT: [[TMP6:%.*]] = sub i32 14, [[TMP5]]
95+
; LIMIT-NEXT: [[TMP7:%.*]] = add i32 [[TMP0]], [[PHI2]]
9496
; LIMIT-NEXT: br label [[INNER_LOOP:%.*]]
9597
; LIMIT: inner_loop:
96-
; LIMIT-NEXT: [[LSR_IV3:%.*]] = phi i32 [ [[LSR_IV_NEXT4:%.*]], [[INNER_LOOP]] ], [ [[TMP5]], [[PREHEADER]] ]
97-
; LIMIT-NEXT: [[LSR_IV1:%.*]] = phi i32 [ [[LSR_IV_NEXT2:%.*]], [[INNER_LOOP]] ], [ [[TMP4]], [[PREHEADER]] ]
98-
; LIMIT-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[INNER_LOOP]] ], [ [[TMP2]], [[PREHEADER]] ]
98+
; LIMIT-NEXT: [[LSR_IV3:%.*]] = phi i32 [ [[LSR_IV_NEXT4:%.*]], [[INNER_LOOP]] ], [ [[TMP6]], [[PREHEADER]] ]
99+
; LIMIT-NEXT: [[LSR_IV1:%.*]] = phi i32 [ [[LSR_IV_NEXT2:%.*]], [[INNER_LOOP]] ], [ [[TMP5]], [[PREHEADER]] ]
100+
; LIMIT-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[INNER_LOOP]] ], [ [[TMP3]], [[PREHEADER]] ]
99101
; LIMIT-NEXT: [[PHI5:%.*]] = phi i32 [ [[PHI3]], [[PREHEADER]] ], [ [[I30:%.*]], [[INNER_LOOP]] ]
100102
; LIMIT-NEXT: [[PHI6:%.*]] = phi i32 [ [[PHI2]], [[PREHEADER]] ], [ [[I33:%.*]], [[INNER_LOOP]] ]
101103
; LIMIT-NEXT: [[ITER:%.*]] = phi i32 [ [[C]], [[PREHEADER]] ], [ [[ITER_SUB:%.*]], [[INNER_LOOP]] ]
102104
; LIMIT-NEXT: [[I17:%.*]] = sub i32 [[PHI4]], [[PHI6]]
103105
; LIMIT-NEXT: [[I18:%.*]] = sub i32 14, [[PHI5]]
104106
; LIMIT-NEXT: [[I19:%.*]] = mul i32 [[I18]], [[C]]
105107
; LIMIT-NEXT: [[FACTOR_PROL:%.*]] = shl i32 [[PHI5]], 1
106-
; LIMIT-NEXT: [[TMP6:%.*]] = add i32 [[LSR_IV1]], [[I19]]
107-
; LIMIT-NEXT: [[TMP7:%.*]] = add i32 [[TMP6]], [[FACTOR_PROL]]
108-
; LIMIT-NEXT: [[TMP8:%.*]] = shl i32 [[TMP7]], 1
109-
; LIMIT-NEXT: [[TMP9:%.*]] = add i32 [[LSR_IV]], [[TMP8]]
110-
; LIMIT-NEXT: [[TMP10:%.*]] = sub i32 [[LSR_IV3]], [[I19]]
111-
; LIMIT-NEXT: [[TMP11:%.*]] = sub i32 [[TMP10]], [[FACTOR_PROL]]
112-
; LIMIT-NEXT: [[TMP12:%.*]] = mul i32 [[C]], [[TMP11]]
113-
; LIMIT-NEXT: [[TMP13:%.*]] = add i32 [[LSR_IV1]], [[I19]]
114-
; LIMIT-NEXT: [[TMP14:%.*]] = add i32 [[TMP13]], [[FACTOR_PROL]]
115-
; LIMIT-NEXT: [[TMP15:%.*]] = shl i32 [[TMP14]], 1
116-
; LIMIT-NEXT: [[TMP16:%.*]] = add i32 [[TMP12]], [[TMP15]]
117-
; LIMIT-NEXT: [[TMP17:%.*]] = add i32 [[LSR_IV]], [[TMP16]]
118-
; LIMIT-NEXT: [[I29:%.*]] = mul i32 [[TMP9]], [[C]]
119-
; LIMIT-NEXT: [[FACTOR_2_PROL:%.*]] = shl i32 [[TMP17]], 1
108+
; LIMIT-NEXT: [[TMP8:%.*]] = add i32 [[LSR_IV1]], [[I19]]
109+
; LIMIT-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[FACTOR_PROL]]
110+
; LIMIT-NEXT: [[TMP10:%.*]] = shl i32 [[TMP9]], 1
111+
; LIMIT-NEXT: [[TMP11:%.*]] = add i32 [[LSR_IV]], [[TMP10]]
112+
; LIMIT-NEXT: [[TMP12:%.*]] = sub i32 [[LSR_IV3]], [[I19]]
113+
; LIMIT-NEXT: [[TMP13:%.*]] = sub i32 [[TMP12]], [[FACTOR_PROL]]
114+
; LIMIT-NEXT: [[TMP14:%.*]] = mul i32 [[C]], [[TMP13]]
115+
; LIMIT-NEXT: [[TMP15:%.*]] = add i32 [[LSR_IV1]], [[I19]]
116+
; LIMIT-NEXT: [[TMP16:%.*]] = add i32 [[TMP15]], [[FACTOR_PROL]]
117+
; LIMIT-NEXT: [[TMP17:%.*]] = shl i32 [[TMP16]], 1
118+
; LIMIT-NEXT: [[TMP18:%.*]] = add i32 [[TMP14]], [[TMP17]]
119+
; LIMIT-NEXT: [[TMP19:%.*]] = add i32 [[LSR_IV]], [[TMP18]]
120+
; LIMIT-NEXT: [[I29:%.*]] = mul i32 [[TMP11]], [[C]]
121+
; LIMIT-NEXT: [[FACTOR_2_PROL:%.*]] = shl i32 [[TMP19]], 1
120122
; LIMIT-NEXT: [[I30]] = add i32 [[I17]], [[FACTOR_2_PROL]]
121123
; LIMIT-NEXT: [[I33]] = add i32 [[PHI6]], -3
122124
; LIMIT-NEXT: [[ITER_SUB]] = add i32 [[ITER]], -1
@@ -128,7 +130,7 @@ define void @test(i32 %A, i32 %B, i32 %C) {
128130
; LIMIT: outer_tail.loopexit:
129131
; LIMIT-NEXT: br label [[OUTER_TAIL]]
130132
; LIMIT: outer_tail:
131-
; LIMIT-NEXT: [[PHI7:%.*]] = phi i32 [ [[PHI2]], [[GUARD]] ], [ [[I33]], [[OUTER_TAIL_LOOPEXIT]] ]
133+
; LIMIT-NEXT: [[PHI7:%.*]] = phi i32 [ [[PHI2]], [[GUARD]] ], [ [[TMP7]], [[OUTER_TAIL_LOOPEXIT]] ]
132134
; LIMIT-NEXT: [[I35]] = sub i32 [[A]], [[PHI7]]
133135
; LIMIT-NEXT: [[CMP:%.*]] = icmp sgt i32 [[I35]], 9876
134136
; LIMIT-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[OUTER_LOOP]]

‎llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,6 +44,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 %radix, %struct.Vector2*
4444
; CHECK-NEXT: [[LSR_IV_NEXT17]] = add i64 [[LSR_IV16]], 1
4545
; CHECK-NEXT: br i1 [[TMP0]], label [[DO_BODY]], label [[DO_END:%.*]]
4646
; CHECK: do.end:
47+
; CHECK-NEXT: [[DOTLCSSA:%.*]] = phi [33 x i16]* [ [[TMP2]], [[DO_BODY]] ]
4748
; CHECK-NEXT: [[XAP_0:%.*]] = inttoptr i64 [[LSR_IV_NEXT17]] to i1*
4849
; CHECK-NEXT: [[CAP_0:%.*]] = ptrtoint i1* [[XAP_0]] to i64
4950
; CHECK-NEXT: [[SUB_PTR_SUB:%.*]] = sub i64 [[SUB_PTR_LHS_CAST]], [[SUB_PTR_RHS_CAST]]
@@ -62,7 +63,7 @@ define void @_Z15IntegerToStringjjR7Vector2(i32 %i, i32 %radix, %struct.Vector2*
6263
; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast i16* [[SCEVGEP]] to i8*
6364
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
6465
; CHECK: for.body:
65-
; CHECK-NEXT: [[LSR_IV9:%.*]] = phi [33 x i16]* [ [[TMP3:%.*]], [[FOR_BODY]] ], [ [[TMP2]], [[FOR_BODY_LR_PH]] ]
66+
; CHECK-NEXT: [[LSR_IV9:%.*]] = phi [33 x i16]* [ [[TMP3:%.*]], [[FOR_BODY]] ], [ [[DOTLCSSA]], [[FOR_BODY_LR_PH]] ]
6667
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[FOR_BODY_LR_PH]] ]
6768
; CHECK-NEXT: [[LSR_IV911:%.*]] = bitcast [33 x i16]* [[LSR_IV9]] to i16*
6869
; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, i8* [[SCEVGEP1]], i64 [[LSR_IV]]

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