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farzonlfarzonl
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remove return handling
1 parent ecd32db commit 8d8782d

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4 files changed

+14
-77
lines changed

4 files changed

+14
-77
lines changed

‎llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp‎

Lines changed: 3 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -605,23 +605,11 @@ static bool expandTypedBufferLoadIntrinsic(CallInst *Orig) {
605605

606606
Value *CheckBit = nullptr;
607607
for (User *U : make_early_inc_range(Orig->users())) {
608-
if (auto *Ret = dyn_cast<ReturnInst>(U)) {
609-
// For return instructions, we need to handle the case where the function
610-
// is directly returning the result of the call
611-
Type *RetTy = Ret->getFunction()->getReturnType();
612-
Value *StructRet = PoisonValue::get(RetTy);
613-
StructRet = Builder.CreateInsertValue(StructRet, Result, {0});
614-
Value *CheckBitForRet = Builder.CreateExtractValue(Load, {1});
615-
StructRet = Builder.CreateInsertValue(StructRet, CheckBitForRet, {1});
616-
Ret->setOperand(0, StructRet);
617-
continue;
618-
}
608+
// If it's not a ExtractValueInst, we don't know how to
609+
// handle it
619610
auto *EVI = dyn_cast<ExtractValueInst>(U);
620-
if (!EVI) {
621-
// If it's not a ReturnInst or ExtractValueInst, we don't know how to
622-
// handle it
611+
if (!EVI)
623612
llvm_unreachable("Unexpected user of typedbufferload");
624-
}
625613

626614
ArrayRef<unsigned> Indices = EVI->getIndices();
627615
assert(Indices.size() == 1);

‎llvm/test/CodeGen/DirectX/BufferLoadDouble.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: opt -S -dxil-intrinsic-expansion %s | FileCheck %s
22

3-
target triple = "dxil-pc-shadermodel6.2-compute"
3+
target triple = "dxil-pc-shadermodel6.6-compute"
44

55
define void @loadf64() {
66
; check the handle from binding is unchanged

‎llvm/test/CodeGen/DirectX/BufferLoadInt64.ll‎

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33

44
target triple = "dxil-pc-shadermodel6.2-compute"
55

6-
define { i64, i1 } @loadi64() {
7-
; CHECK-LABEL: define { i64, i1 } @loadi64() {
6+
define void @loadi64() {
7+
; CHECK-LABEL: define void @loadi64() {
88
; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
99
; CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v2i32.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) [[BUFFER]], i32 0)
1010
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 0
@@ -14,19 +14,15 @@ define { i64, i1 } @loadi64() {
1414
; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[TMP4]] to i64
1515
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 32
1616
; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP5]], [[TMP7]]
17-
; CHECK-NEXT: [[TMP9:%.*]] = insertvalue { i64, i1 } poison, i64 [[TMP8]], 0
18-
; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 1
19-
; CHECK-NEXT: [[TMP11:%.*]] = insertvalue { i64, i1 } [[TMP9]], i1 [[TMP10]], 1
20-
; CHECK-NEXT: ret { i64, i1 } [[TMP11]]
17+
; CHECK-NEXT: ret void
2118
;
2219
%buffer = tail call target("dx.TypedBuffer", i64, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
23-
%result = call { i64, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(
24-
target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0)
25-
ret { i64, i1 } %result
20+
%result = call { i64, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_i64_1_0_0t(target("dx.TypedBuffer", i64, 1, 0, 0) %buffer, i32 0)
21+
ret void
2622
}
2723

28-
define { <2 x i64>, i1 } @loadv2i64() {
29-
; CHECK-LABEL: define { <2 x i64>, i1 } @loadv2i64() {
24+
define void @loadv2i64() {
25+
; CHECK-LABEL: define void @loadv2i64() {
3026
; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
3127
; CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v4i32.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) [[BUFFER]], i32 0)
3228
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 0
@@ -44,13 +40,9 @@ define { <2 x i64>, i1 } @loadv2i64() {
4440
; CHECK-NEXT: [[TMP14:%.*]] = shl i64 [[TMP13]], 32
4541
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP12]], [[TMP14]]
4642
; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i64> [[TMP11]], i64 [[TMP15]], i32 1
47-
; CHECK-NEXT: [[TMP17:%.*]] = insertvalue { <2 x i64>, i1 } poison, <2 x i64> [[TMP16]], 0
48-
; CHECK-NEXT: [[TMP18:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 1
49-
; CHECK-NEXT: [[TMP19:%.*]] = insertvalue { <2 x i64>, i1 } [[TMP17]], i1 [[TMP18]], 1
50-
; CHECK-NEXT: ret { <2 x i64>, i1 } [[TMP19]]
43+
; CHECK-NEXT: ret void
5144
;
5245
%buffer = tail call target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2i64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
53-
%result = call { <2 x i64>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(
54-
target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0)
55-
ret { <2 x i64>, i1 } %result
46+
%result = call { <2 x i64>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2i64_1_0_0t(target("dx.TypedBuffer", <2 x i64>, 1, 0, 0) %buffer, i32 0)
47+
ret void
5648
}

‎llvm/test/CodeGen/DirectX/BufferStoreDouble.ll‎

Lines changed: 0 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -45,46 +45,3 @@ define void @storev2f64(<2 x double> %0) {
4545
<2 x double> %0)
4646
ret void
4747
}
48-
49-
define { double, i1 } @loadAndReturnf64() {
50-
; CHECK-LABEL: define { double, i1 } @loadAndReturnf64() {
51-
; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
52-
; CHECK-NEXT: [[TMP1:%.*]] = call { <2 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v2i32.tdx.TypedBuffer_f64_1_0_0t(target("dx.TypedBuffer", double, 1, 0, 0) [[BUFFER]], i32 0)
53-
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 0
54-
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 0
55-
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <2 x i32> [[TMP2]], i32 1
56-
; CHECK-NEXT: [[TMP5:%.*]] = call double @llvm.dx.asdouble.i32(i32 [[TMP3]], i32 [[TMP4]])
57-
; CHECK-NEXT: [[TMP6:%.*]] = insertvalue { double, i1 } poison, double [[TMP5]], 0
58-
; CHECK-NEXT: [[TMP7:%.*]] = extractvalue { <2 x i32>, i1 } [[TMP1]], 1
59-
; CHECK-NEXT: [[TMP8:%.*]] = insertvalue { double, i1 } [[TMP6]], i1 [[TMP7]], 1
60-
; CHECK-NEXT: ret { double, i1 } [[TMP8]]
61-
;
62-
%buffer = tail call target("dx.TypedBuffer", double, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
63-
%result = call { double, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_f64_1_0_0t(
64-
target("dx.TypedBuffer", double, 1, 0, 0) %buffer, i32 0)
65-
ret { double, i1 } %result
66-
}
67-
68-
define { <2 x double>, i1 } @loadAndReturnv2f64() {
69-
; CHECK-LABEL: define { <2 x double>, i1 } @loadAndReturnv2f64() {
70-
; CHECK-NEXT: [[BUFFER:%.*]] = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
71-
; CHECK-NEXT: [[TMP1:%.*]] = call { <4 x i32>, i1 } @llvm.dx.resource.load.typedbuffer.v4i32.tdx.TypedBuffer_v2f64_1_0_0t(target("dx.TypedBuffer", <2 x double>, 1, 0, 0) [[BUFFER]], i32 0)
72-
; CHECK-NEXT: [[TMP2:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 0
73-
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 0
74-
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <4 x i32> [[TMP2]], i32 1
75-
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <4 x i32> [[TMP2]], i32 2
76-
; CHECK-NEXT: [[TMP6:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3
77-
; CHECK-NEXT: [[TMP7:%.*]] = call double @llvm.dx.asdouble.i32(i32 [[TMP3]], i32 [[TMP4]])
78-
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x double> poison, double [[TMP7]], i32 0
79-
; CHECK-NEXT: [[TMP9:%.*]] = call double @llvm.dx.asdouble.i32(i32 [[TMP5]], i32 [[TMP6]])
80-
; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x double> [[TMP8]], double [[TMP9]], i32 1
81-
; CHECK-NEXT: [[TMP11:%.*]] = insertvalue { <2 x double>, i1 } poison, <2 x double> [[TMP10]], 0
82-
; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <4 x i32>, i1 } [[TMP1]], 1
83-
; CHECK-NEXT: [[TMP13:%.*]] = insertvalue { <2 x double>, i1 } [[TMP11]], i1 [[TMP12]], 1
84-
; CHECK-NEXT: ret { <2 x double>, i1 } [[TMP13]]
85-
;
86-
%buffer = tail call target("dx.TypedBuffer", <2 x double>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v2f64_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false, ptr null)
87-
%result = call { <2 x double>, i1 } @llvm.dx.resource.load.typedbuffer.tdx.TypedBuffer_v2f64_1_0_0t(
88-
target("dx.TypedBuffer", <2 x double>, 1, 0, 0) %buffer, i32 0)
89-
ret { <2 x double>, i1 } %result
90-
}

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