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arsenmarsenm
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AtomicExpand: Regenerate baseline checks (#103063)
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11 files changed

+1674
-1689
lines changed

11 files changed

+1674
-1689
lines changed

‎llvm/test/Transforms/AtomicExpand/AArch64/atomicrmw-fp.ll‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -6,17 +6,17 @@ define float @test_atomicrmw_fadd_f32(ptr %ptr, float %value) {
66
; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
77
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
88
; CHECK: atomicrmw.start:
9-
; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
9+
; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
1010
; CHECK-NEXT: [[NEW:%.*]] = fadd float [[LOADED]], [[VALUE:%.*]]
11-
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
12-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
13-
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
14-
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
15-
; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
16-
; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
11+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
12+
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
13+
; CHECK-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
14+
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
15+
; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
16+
; CHECK-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
1717
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
1818
; CHECK: atomicrmw.end:
19-
; CHECK-NEXT: ret float [[TMP6]]
19+
; CHECK-NEXT: ret float [[TMP5]]
2020
;
2121
%res = atomicrmw fadd ptr %ptr, float %value seq_cst
2222
ret float %res
@@ -27,17 +27,17 @@ define float @test_atomicrmw_fsub_f32(ptr %ptr, float %value) {
2727
; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[PTR:%.*]], align 4
2828
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
2929
; CHECK: atomicrmw.start:
30-
; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP6:%.*]], [[ATOMICRMW_START]] ]
30+
; CHECK-NEXT: [[LOADED:%.*]] = phi float [ [[TMP1]], [[TMP0:%.*]] ], [ [[TMP5:%.*]], [[ATOMICRMW_START]] ]
3131
; CHECK-NEXT: [[NEW:%.*]] = fsub float [[LOADED]], [[VALUE:%.*]]
32-
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[NEW]] to i32
33-
; CHECK-NEXT: [[TMP4:%.*]] = bitcast float [[LOADED]] to i32
34-
; CHECK-NEXT: [[TMP5:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP4]], i32 [[TMP3]] seq_cst seq_cst
35-
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP5]], 1
36-
; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP5]], 0
37-
; CHECK-NEXT: [[TMP6]] = bitcast i32 [[NEWLOADED]] to float
32+
; CHECK-NEXT: [[TMP2:%.*]] = bitcast float [[NEW]] to i32
33+
; CHECK-NEXT: [[TMP3:%.*]] = bitcast float [[LOADED]] to i32
34+
; CHECK-NEXT: [[TMP4:%.*]] = cmpxchg ptr [[PTR]], i32 [[TMP3]], i32 [[TMP2]] seq_cst seq_cst, align 4
35+
; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP4]], 1
36+
; CHECK-NEXT: [[NEWLOADED:%.*]] = extractvalue { i32, i1 } [[TMP4]], 0
37+
; CHECK-NEXT: [[TMP5]] = bitcast i32 [[NEWLOADED]] to float
3838
; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]
3939
; CHECK: atomicrmw.end:
40-
; CHECK-NEXT: ret float [[TMP6]]
40+
; CHECK-NEXT: ret float [[TMP5]]
4141
;
4242
%res = atomicrmw fsub ptr %ptr, float %value seq_cst
4343
ret float %res

‎llvm/test/Transforms/AtomicExpand/AArch64/expand-atomicrmw-xchg-fp.ll‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -4,23 +4,23 @@
44

55
define void @atomic_swap_f16(ptr %ptr, half %val) nounwind {
66
; CHECK-LABEL: @atomic_swap_f16(
7-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast half [[VAL:%.*]] to i16
7+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i16
88
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
99
; CHECK: atomicrmw.start:
10-
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) [[PTR:%.*]])
11-
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i16
12-
; CHECK-NEXT: [[TMP5:%.*]] = zext i16 [[TMP2]] to i64
13-
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP5]], ptr elementtype(i16) [[PTR]])
14-
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
10+
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) [[PTR:%.*]])
11+
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i16
12+
; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP1]] to i64
13+
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i16) [[PTR]])
14+
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 0
1515
; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
1616
; CHECK: atomicrmw.end:
17-
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP4]] to half
17+
; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to half
1818
; CHECK-NEXT: ret void
1919
;
2020
; OUTLINE-ATOMICS-LABEL: @atomic_swap_f16(
21-
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast half [[VAL:%.*]] to i16
22-
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i16 [[TMP2]] acquire, align 2
23-
; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i16 [[TMP3]] to half
21+
; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i16
22+
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i16 [[TMP1]] acquire, align 2
23+
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP2]] to half
2424
; OUTLINE-ATOMICS-NEXT: ret void
2525
;
2626
%t1 = atomicrmw xchg ptr %ptr, half %val acquire
@@ -29,23 +29,23 @@ define void @atomic_swap_f16(ptr %ptr, half %val) nounwind {
2929

3030
define void @atomic_swap_f32(ptr %ptr, float %val) nounwind {
3131
; CHECK-LABEL: @atomic_swap_f32(
32-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast float [[VAL:%.*]] to i32
32+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i32
3333
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
3434
; CHECK: atomicrmw.start:
35-
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) [[PTR:%.*]])
36-
; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i32
37-
; CHECK-NEXT: [[TMP5:%.*]] = zext i32 [[TMP2]] to i64
38-
; CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP5]], ptr elementtype(i32) [[PTR]])
39-
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP6]], 0
35+
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) [[PTR:%.*]])
36+
; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
37+
; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP1]] to i64
38+
; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i32) [[PTR]])
39+
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 0
4040
; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
4141
; CHECK: atomicrmw.end:
42-
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP4]] to float
42+
; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to float
4343
; CHECK-NEXT: ret void
4444
;
4545
; OUTLINE-ATOMICS-LABEL: @atomic_swap_f32(
46-
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast float [[VAL:%.*]] to i32
47-
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i32 [[TMP2]] acquire, align 4
48-
; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to float
46+
; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i32
47+
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i32 [[TMP1]] acquire, align 4
48+
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float
4949
; OUTLINE-ATOMICS-NEXT: ret void
5050
;
5151
%t1 = atomicrmw xchg ptr %ptr, float %val acquire
@@ -54,21 +54,21 @@ define void @atomic_swap_f32(ptr %ptr, float %val) nounwind {
5454

5555
define void @atomic_swap_f64(ptr %ptr, double %val) nounwind {
5656
; CHECK-LABEL: @atomic_swap_f64(
57-
; CHECK-NEXT: [[TMP2:%.*]] = bitcast double [[VAL:%.*]] to i64
57+
; CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i64
5858
; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]
5959
; CHECK: atomicrmw.start:
60-
; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) [[PTR:%.*]])
61-
; CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP2]], ptr elementtype(i64) [[PTR]])
62-
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP4]], 0
60+
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) [[PTR:%.*]])
61+
; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP1]], ptr elementtype(i64) [[PTR]])
62+
; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP3]], 0
6363
; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]]
6464
; CHECK: atomicrmw.end:
65-
; CHECK-NEXT: [[TMP5:%.*]] = bitcast i64 [[TMP3]] to double
65+
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP2]] to double
6666
; CHECK-NEXT: ret void
6767
;
6868
; OUTLINE-ATOMICS-LABEL: @atomic_swap_f64(
69-
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = bitcast double [[VAL:%.*]] to i64
70-
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i64 [[TMP2]] acquire, align 8
71-
; OUTLINE-ATOMICS-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP3]] to double
69+
; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i64
70+
; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i64 [[TMP1]] acquire, align 8
71+
; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to double
7272
; OUTLINE-ATOMICS-NEXT: ret void
7373
;
7474
%t1 = atomicrmw xchg ptr %ptr, double %val acquire

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