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[TargetParser][AArch64] Add alias for FEAT_RDM.
This patch allows using the name "rdma" as an alias for "rdm". The name makes its way to target attributes as well as the command line via the -march and -mcpu options. The motivation was originally to support this in Function Multi Versioning but it also makes sense to align with GCC on the command line.
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‎clang/docs/ReleaseNotes.rst

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@@ -333,6 +333,11 @@ Arm and AArch64 Support
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improvements for most targets. We have not changed the default behavior for
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ARMv6, but may revisit that decision in the future. Users can restore the old
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behavior with -m[no-]unaligned-access.
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- An alias identifier (rdma) has been added for targeting the AArch64
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Architecture Extension which uses Rounding Doubling Multiply Accumulate
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instructions (rdm). The identifier is available on the command line as
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a feature modifier for -march and -mcpu as well as via target attributes
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like ``target_version`` or ``target_clones``.
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Android Support
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^^^^^^^^^^^^^^^

‎clang/test/CodeGen/attr-target-version.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ int foo() {
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}
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inline int __attribute__((target_version("sha1+pmull+f64mm"))) fmv_inline(void) { return 1; }
28-
inline int __attribute__((target_version("fp16+fcma+sme+ fp16 "))) fmv_inline(void) { return 2; }
28+
inline int __attribute__((target_version("fp16+fcma+rdma+sme+ fp16 "))) fmv_inline(void) { return 2; }
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inline int __attribute__((target_version("sha3+i8mm+f32mm"))) fmv_inline(void) { return 12; }
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inline int __attribute__((target_version("dit+sve-ebf16"))) fmv_inline(void) { return 8; }
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inline int __attribute__((target_version("dpb+rcpc2 "))) fmv_inline(void) { return 6; }
@@ -261,12 +261,12 @@ int hoo(void) {
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// CHECK-NEXT: resolver_entry:
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// CHECK-NEXT: call void @__init_cpu_features_resolver()
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// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
264-
// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 4398048608256
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608256
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// CHECK-NEXT: [[TMP1:%.*]] = and i64 [[TMP0]], 4398048608320
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// CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 4398048608320
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// CHECK-NEXT: [[TMP3:%.*]] = and i1 true, [[TMP2]]
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// CHECK-NEXT: br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
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// CHECK: resolver_return:
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// CHECK-NEXT: ret ptr @fmv_inline._MfcmaMfp16Mfp16Msme
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// CHECK-NEXT: ret ptr @fmv_inline._MfcmaMfp16Mfp16MrdmMsme
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// CHECK: resolver_else:
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// CHECK-NEXT: [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
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// CHECK-NEXT: [[TMP5:%.*]] = and i64 [[TMP4]], 864726312827224064
@@ -575,7 +575,7 @@ int hoo(void) {
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//
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//
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// CHECK: Function Attrs: noinline nounwind optnone
578-
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16Msme
578+
// CHECK-LABEL: define {{[^@]+}}@fmv_inline._MfcmaMfp16Mfp16MrdmMsme
579579
// CHECK-SAME: () #[[ATTR13:[0-9]+]] {
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret i32 2
@@ -829,7 +829,7 @@ int hoo(void) {
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// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fullfp16,+ls64,+sme,+sme2" }
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// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp,+fullfp16,+ls64" }
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// CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+aes,+f64mm,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
832-
// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+sme" }
832+
// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+complxnum,+fp-armv8,+fullfp16,+ls64,+neon,+rdm,+sme" }
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// CHECK: attributes #[[ATTR14]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+f32mm,+fp-armv8,+fullfp16,+i8mm,+ls64,+neon,+sha2,+sha3,+sve" }
834834
// CHECK: attributes #[[ATTR15]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+dit,+fp-armv8,+fullfp16,+ls64,+neon,+sve" }
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// CHECK: attributes #[[ATTR16]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp,+fullfp16,+ls64,+rcpc" }

‎clang/test/Driver/aarch64-rdm.c

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@@ -1,13 +1,16 @@
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// RUN: %clang --target=aarch64-none-elf -march=armv8a+rdm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
2+
// RUN: %clang --target=aarch64-none-elf -march=armv8a+rdma -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
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// RUN: %clang --target=aarch64-none-elf -mcpu=generic+rdm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
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// RUN: %clang --target=aarch64-none-elf -mcpu=falkor -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
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// RUN: %clang --target=aarch64-none-elf -mcpu=thunderx2t99 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
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// CHECK-RDM: "-target-feature" "+rdm"
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78
// RUN: %clang --target=aarch64-none-elf -march=armv8a+nordm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s
9+
// RUN: %clang --target=aarch64-none-elf -march=armv8a+nordma -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s
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// RUN: %clang --target=aarch64-none-elf -mcpu=generic+nordm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM %s
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// CHECK-NORDM-NOT: "-target-feature" "+rdm"
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//
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// RUN: %clang --target=aarch64-none-elf -march=armv8.1a -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-RDM %s
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// RUN: %clang --target=aarch64-none-elf -march=armv8.1a+nordm -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM-DEFAULT %s
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// RUN: %clang --target=aarch64-none-elf -march=armv8.1a+nordma -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-NORDM-DEFAULT %s
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// CHECK-NORDM-DEFAULT: "-target-feature" "-rdm"

‎clang/test/Sema/attr-target-clones-aarch64.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: %clang_cc1 -triple aarch64-linux-gnu -fsyntax-only -verify %s
22

3-
void __attribute__((target_clones("fp16+sve2-aes", "sb+sve2-sha3+rcpc3+mops"))) no_def(void);
3+
void __attribute__((target_clones("fp16+sve2-aes", "sb+sve2-sha3+rcpc3+mops", "rdma"))) no_def(void);
44

55
// expected-warning@+1 {{unsupported 'default' in the 'target_clones' attribute string; 'target_clones' attribute ignored}}
66
void __attribute__((target_clones("default+sha3"))) warn1(void);

‎clang/test/SemaCXX/attr-target-version.cpp

Lines changed: 1 addition & 0 deletions
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@@ -7,6 +7,7 @@ void __attribute__((target_version("dotprod"))) no_def(void);
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void __attribute__((target_version("rdm+fp"))) no_def(void);
88
void __attribute__((target_version("rcpc3"))) no_def(void);
99
void __attribute__((target_version("mops"))) no_def(void);
10+
void __attribute__((target_version("rdma"))) no_def(void);
1011

1112
// expected-error@+1 {{no matching function for call to 'no_def'}}
1213
void foo(void) { no_def(); }

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -813,21 +813,24 @@ inline constexpr CpuInfo CpuInfos[] = {
813813
AArch64::AEK_SSBS, AArch64::AEK_CSSC}))},
814814
};
815815

816-
// An alias for a CPU.
817-
struct CpuAlias {
818-
StringRef Alias;
816+
// Name alias.
817+
struct Alias {
818+
StringRef AltName;
819819
StringRef Name;
820820
};
821821

822-
inline constexpr CpuAlias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
823-
{"grace", "neoverse-v2"}};
822+
inline constexpr Alias CpuAliases[] = {{"cobalt-100", "neoverse-n2"},
823+
{"grace", "neoverse-v2"}};
824+
825+
inline constexpr Alias ExtAliases[] = {{"rdma", "rdm"}};
824826

825827
bool getExtensionFeatures(
826828
const AArch64::ExtensionBitset &Extensions,
827829
std::vector<StringRef> &Features);
828830

829831
StringRef getArchExtFeature(StringRef ArchExt);
830832
StringRef resolveCPUAlias(StringRef CPU);
833+
StringRef resolveExtAlias(StringRef ArchExt);
831834

832835
// Information by Name
833836
const ArchInfo *getArchForCpu(StringRef CPU);

‎llvm/lib/TargetParser/AArch64TargetParser.cpp

Lines changed: 13 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,7 +69,14 @@ bool AArch64::getExtensionFeatures(
6969

7070
StringRef AArch64::resolveCPUAlias(StringRef Name) {
7171
for (const auto &A : CpuAliases)
72-
if (A.Alias == Name)
72+
if (A.AltName == Name)
73+
return A.Name;
74+
return Name;
75+
}
76+
77+
StringRef AArch64::resolveExtAlias(StringRef Name) {
78+
for (const auto &A : ExtAliases)
79+
if (A.AltName == Name)
7380
return A.Name;
7481
return Name;
7582
}
@@ -91,7 +98,7 @@ void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
9198
Values.push_back(C.Name);
9299

93100
for (const auto &Alias : CpuAliases)
94-
Values.push_back(Alias.Alias);
101+
Values.push_back(Alias.AltName);
95102
}
96103

97104
bool AArch64::isX18ReservedByDefault(const Triple &TT) {
@@ -114,6 +121,10 @@ const AArch64::ArchInfo *AArch64::parseArch(StringRef Arch) {
114121
}
115122

116123
std::optional<AArch64::ExtensionInfo> AArch64::parseArchExtension(StringRef ArchExt) {
124+
// Resolve aliases first.
125+
ArchExt = resolveExtAlias(ArchExt);
126+
127+
// Then find the Extension name.
117128
for (const auto &A : Extensions) {
118129
if (ArchExt == A.Name)
119130
return A;

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