Skip to content

Commit 6b02cb3

Browse files
committed
fix amdgpu.permlane_swap code example
1 parent cb163bf commit 6b02cb3

File tree

2 files changed

+5
-5
lines changed

2 files changed

+5
-5
lines changed

mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -670,8 +670,8 @@ def AMDGPU_PermlaneSwapOp : AMDGPU_Op<"permlane_swap", [Pure, AllTypesMatch<["re
670670

671671
Example:
672672
```mlir
673-
%0 = amdgpu.permlane %src 16 : f16
674-
%1 = amdgpu.permlane %src 32 { fetch_inactive = true, bound_ctrl = true } : f16
673+
%0 = amdgpu.permlane_swap %src 16 : f16
674+
%1 = amdgpu.permlane_swap %src 32 { fetch_inactive = true, bound_ctrl = true } : f16
675675
```
676676

677677
Operands:

mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1893,7 +1893,7 @@ struct AMDGPUPermlaneLowering : public ConvertOpToLLVMPattern<PermlaneSwapOp> {
18931893
Location loc = op.getLoc();
18941894
Type i32 = rewriter.getI32Type();
18951895
Value src = adaptor.getSrc();
1896-
unsigned row_length = op.getRowLength();
1896+
unsigned rowLength = op.getRowLength();
18971897
bool fi = op.getFetchInactive();
18981898
bool boundctrl = op.getBoundCtrl();
18991899

@@ -1906,10 +1906,10 @@ struct AMDGPUPermlaneLowering : public ConvertOpToLLVMPattern<PermlaneSwapOp> {
19061906
Type i32pair = LLVM::LLVMStructType::getLiteral(
19071907
rewriter.getContext(), {v.getType(), v.getType()});
19081908

1909-
if (row_length == 16)
1909+
if (rowLength == 16)
19101910
res = ROCDL::Permlane16SwapOp::create(rewriter, loc, i32pair, v, v, fi,
19111911
boundctrl);
1912-
else if (row_length == 32)
1912+
else if (rowLength == 32)
19131913
res = ROCDL::Permlane32SwapOp::create(rewriter, loc, i32pair, v, v, fi,
19141914
boundctrl);
19151915
else

0 commit comments

Comments
 (0)