Skip to content

Commit 69816f4

Browse files
committed
Refactor vector insertion checks to use assertions
1 parent 257075d commit 69816f4

File tree

3 files changed

+8
-14
lines changed

3 files changed

+8
-14
lines changed

clang/include/clang/Basic/BuiltinsX86.td

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -497,6 +497,9 @@ let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWid
497497
def blendps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant int)">;
498498
def blendvpd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Vector<4, double>)">;
499499
def blendvps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Vector<8, float>)">;
500+
def vinsertf128_pd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<2, double>, _Constant int)">;
501+
def vinsertf128_ps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<4, float>, _Constant int)">;
502+
def vinsertf128_si256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Vector<4, int>, _Constant int)">;
500503
}
501504

502505
let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
@@ -510,11 +513,6 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in
510513
def roundps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Constant int)">;
511514
}
512515

513-
let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
514-
def vinsertf128_pd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<2, double>, _Constant int)">;
515-
def vinsertf128_ps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<4, float>, _Constant int)">;
516-
def vinsertf128_si256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Vector<4, int>, _Constant int)">;
517-
}
518516

519517
let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
520518
def vtestzpd : X86Builtin<"int(_Vector<2, double>, _Vector<2, double>)">;
@@ -614,9 +612,6 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
614612
def extract128i256 : X86Builtin<"_Vector<2, long long int>(_Vector<4, long long int>, _Constant int)">;
615613
}
616614

617-
let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
618-
def insert128i256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<2, long long int>, _Constant int)">;
619-
}
620615

621616
let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
622617
def pavgb256 : X86Builtin<"_Vector<32, unsigned char>(_Vector<32, unsigned char>, _Vector<32, unsigned char>)">;
@@ -650,6 +645,8 @@ let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWi
650645
def psrlv8si : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Vector<8, int>)">;
651646
def psllv4di : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<4, long long int>)">;
652647
def psrlv4di : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<4, long long int>)">;
648+
649+
def insert128i256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<2, long long int>, _Constant int)">;
653650
}
654651

655652
let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {

clang/lib/AST/ByteCode/InterpBuiltin.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2936,8 +2936,7 @@ static bool interp__builtin_x86_insert_subvector(InterpState &S, CodePtr OpPC,
29362936
unsigned DstElements = DstVec.getNumElems();
29372937
unsigned SubElements = SubVec.getNumElems();
29382938

2939-
if (SubElements == 0 || DstElements == 0 || (DstElements % SubElements) != 0)
2940-
return false;
2939+
assert(SubElements != 0 && DstElements != 0 && (DstElements % SubElements) == 0);
29412940

29422941
unsigned NumLanes = DstElements / SubElements;
29432942
unsigned Lane = static_cast<unsigned>(Index % NumLanes);

clang/lib/AST/ExprConstant.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -12156,12 +12156,10 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1215612156

1215712157
if (!SourceDst.isVector() || !SourceSub.isVector())
1215812158
return false;
12159-
12159+
assert(SourceDst.isVector() && SourceSub.isVector());
1216012160
unsigned DstLen = SourceDst.getVectorLength();
1216112161
unsigned SubLen = SourceSub.getVectorLength();
12162-
if (SubLen == 0 || DstLen == 0 || (DstLen % SubLen) != 0)
12163-
return false;
12164-
12162+
assert(SubLen != 0 && DstLen != 0 && (DstLen % SubLen) == 0);
1216512163
unsigned NumLanes = DstLen / SubLen;
1216612164
unsigned LaneIdx = (Imm.getZExtValue() % NumLanes) * SubLen;
1216712165

0 commit comments

Comments
 (0)