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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6 |
| 2 | +; RUN: opt -p loop-vectorize -force-vector-width=8 -S %s | FileCheck %s |
| 3 | + |
| 4 | +define void @call_loop_invariant_operand_bundle(ptr %dst, {float, float} %sv) { |
| 5 | +; CHECK-LABEL: define void @call_loop_invariant_operand_bundle( |
| 6 | +; CHECK-SAME: ptr [[DST:%.*]], { float, float } [[SV:%.*]]) { |
| 7 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 8 | +; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| 9 | +; CHECK: [[VECTOR_PH]]: |
| 10 | +; CHECK-NEXT: [[TMP0:%.*]] = extractvalue { float, float } [[SV]], 0 |
| 11 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x float> poison, float [[TMP0]], i64 0 |
| 12 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer |
| 13 | +; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { float, float } [[SV]], 1 |
| 14 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x float> poison, float [[TMP1]], i64 0 |
| 15 | +; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT1]], <8 x float> poison, <8 x i32> zeroinitializer |
| 16 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 17 | +; CHECK: [[VECTOR_BODY]]: |
| 18 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 19 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[DST]], i32 [[INDEX]] |
| 20 | +; CHECK-NEXT: [[TMP3:%.*]] = call <8 x float> @llvm.pow.v8f32(<8 x float> [[BROADCAST_SPLAT]], <8 x float> [[BROADCAST_SPLAT2]]) [ "deopt"(float 1.000000e+01) ] |
| 21 | +; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP2]], align 4 |
| 22 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 |
| 23 | +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000 |
| 24 | +; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
| 25 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 26 | +; CHECK-NEXT: br label %[[EXIT:.*]] |
| 27 | +; CHECK: [[EXIT]]: |
| 28 | +; CHECK-NEXT: ret void |
| 29 | +; |
| 30 | +entry: |
| 31 | + br label %loop |
| 32 | + |
| 33 | +loop: |
| 34 | + %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] |
| 35 | + %a = extractvalue { float, float } %sv, 0 |
| 36 | + %b = extractvalue { float, float } %sv, 1 |
| 37 | + %addr = getelementptr float, ptr %dst, i32 %iv |
| 38 | + %p = call float @llvm.pow.f32(float %a, float %b) [ "deopt"(float 10.0) ] |
| 39 | + store float %p, ptr %addr |
| 40 | + %iv.next = add nsw i32 %iv, 1 |
| 41 | + %cond = icmp ne i32 %iv.next, 1000 |
| 42 | + br i1 %cond, label %loop, label %exit |
| 43 | + |
| 44 | +exit: |
| 45 | + ret void |
| 46 | +} |
| 47 | + |
| 48 | +define void @call_unknown_operand_bundle(ptr %dst, {float, float} %sv) { |
| 49 | +; CHECK-LABEL: define void @call_unknown_operand_bundle( |
| 50 | +; CHECK-SAME: ptr [[DST:%.*]], { float, float } [[SV:%.*]]) { |
| 51 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 52 | +; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| 53 | +; CHECK: [[VECTOR_PH]]: |
| 54 | +; CHECK-NEXT: [[TMP0:%.*]] = extractvalue { float, float } [[SV]], 0 |
| 55 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x float> poison, float [[TMP0]], i64 0 |
| 56 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer |
| 57 | +; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { float, float } [[SV]], 1 |
| 58 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x float> poison, float [[TMP1]], i64 0 |
| 59 | +; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT1]], <8 x float> poison, <8 x i32> zeroinitializer |
| 60 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 61 | +; CHECK: [[VECTOR_BODY]]: |
| 62 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 63 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[DST]], i32 [[INDEX]] |
| 64 | +; CHECK-NEXT: [[TMP3:%.*]] = call <8 x float> @llvm.pow.v8f32(<8 x float> [[BROADCAST_SPLAT]], <8 x float> [[BROADCAST_SPLAT2]]) [ "unknown"(ptr null) ] |
| 65 | +; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP2]], align 4 |
| 66 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 |
| 67 | +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000 |
| 68 | +; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
| 69 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 70 | +; CHECK-NEXT: br label %[[EXIT:.*]] |
| 71 | +; CHECK: [[EXIT]]: |
| 72 | +; CHECK-NEXT: ret void |
| 73 | +; |
| 74 | +entry: |
| 75 | + br label %loop |
| 76 | + |
| 77 | +loop: |
| 78 | + %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] |
| 79 | + %a = extractvalue { float, float } %sv, 0 |
| 80 | + %b = extractvalue { float, float } %sv, 1 |
| 81 | + %addr = getelementptr float, ptr %dst, i32 %iv |
| 82 | + %p = call float @llvm.pow.f32(float %a, float %b) [ "unknown"(ptr null) ] |
| 83 | + store float %p, ptr %addr |
| 84 | + %iv.next = add nsw i32 %iv, 1 |
| 85 | + %cond = icmp ne i32 %iv.next, 1000 |
| 86 | + br i1 %cond, label %loop, label %exit |
| 87 | + |
| 88 | +exit: |
| 89 | + ret void |
| 90 | +} |
| 91 | + |
| 92 | +define void @call_cold_operand_bundle(ptr %dst, {float, float} %sv) { |
| 93 | +; CHECK-LABEL: define void @call_cold_operand_bundle( |
| 94 | +; CHECK-SAME: ptr [[DST:%.*]], { float, float } [[SV:%.*]]) { |
| 95 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 96 | +; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| 97 | +; CHECK: [[VECTOR_PH]]: |
| 98 | +; CHECK-NEXT: [[TMP0:%.*]] = extractvalue { float, float } [[SV]], 0 |
| 99 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <8 x float> poison, float [[TMP0]], i64 0 |
| 100 | +; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT]], <8 x float> poison, <8 x i32> zeroinitializer |
| 101 | +; CHECK-NEXT: [[TMP1:%.*]] = extractvalue { float, float } [[SV]], 1 |
| 102 | +; CHECK-NEXT: [[BROADCAST_SPLATINSERT1:%.*]] = insertelement <8 x float> poison, float [[TMP1]], i64 0 |
| 103 | +; CHECK-NEXT: [[BROADCAST_SPLAT2:%.*]] = shufflevector <8 x float> [[BROADCAST_SPLATINSERT1]], <8 x float> poison, <8 x i32> zeroinitializer |
| 104 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 105 | +; CHECK: [[VECTOR_BODY]]: |
| 106 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 107 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[DST]], i32 [[INDEX]] |
| 108 | +; CHECK-NEXT: [[TMP3:%.*]] = call <8 x float> @llvm.pow.v8f32(<8 x float> [[BROADCAST_SPLAT]], <8 x float> [[BROADCAST_SPLAT2]]) [ "cold"() ] |
| 109 | +; CHECK-NEXT: store <8 x float> [[TMP3]], ptr [[TMP2]], align 4 |
| 110 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 8 |
| 111 | +; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000 |
| 112 | +; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]] |
| 113 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 114 | +; CHECK-NEXT: br label %[[EXIT:.*]] |
| 115 | +; CHECK: [[EXIT]]: |
| 116 | +; CHECK-NEXT: ret void |
| 117 | +; |
| 118 | +entry: |
| 119 | + br label %loop |
| 120 | + |
| 121 | +loop: |
| 122 | + %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ] |
| 123 | + %a = extractvalue { float, float } %sv, 0 |
| 124 | + %b = extractvalue { float, float } %sv, 1 |
| 125 | + %addr = getelementptr float, ptr %dst, i32 %iv |
| 126 | + %p = call float @llvm.pow.f32(float %a, float %b) [ "cold"() ] |
| 127 | + store float %p, ptr %addr |
| 128 | + %iv.next = add nsw i32 %iv, 1 |
| 129 | + %cond = icmp ne i32 %iv.next, 1000 |
| 130 | + br i1 %cond, label %loop, label %exit |
| 131 | + |
| 132 | +exit: |
| 133 | + ret void |
| 134 | +} |
| 135 | + |
| 136 | +define void @assume_loop_variant_operand_bundle(ptr noalias %a, ptr noalias %b) { |
| 137 | +; CHECK-LABEL: define void @assume_loop_variant_operand_bundle( |
| 138 | +; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) { |
| 139 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 140 | +; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| 141 | +; CHECK: [[VECTOR_PH]]: |
| 142 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 143 | +; CHECK: [[VECTOR_BODY]]: |
| 144 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 145 | +; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0 |
| 146 | +; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[INDEX]], 1 |
| 147 | +; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[INDEX]], 2 |
| 148 | +; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 3 |
| 149 | +; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 4 |
| 150 | +; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDEX]], 5 |
| 151 | +; CHECK-NEXT: [[TMP6:%.*]] = add i64 [[INDEX]], 6 |
| 152 | +; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 7 |
| 153 | +; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[TMP0]] |
| 154 | +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP8]], align 4 |
| 155 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP0]]) ] |
| 156 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP1]]) ] |
| 157 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP2]]) ] |
| 158 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP3]]) ] |
| 159 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP4]]) ] |
| 160 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP5]]) ] |
| 161 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP6]]) ] |
| 162 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "align"(ptr [[A]], i64 [[TMP7]]) ] |
| 163 | +; CHECK-NEXT: [[TMP9:%.*]] = fadd <8 x float> [[WIDE_LOAD]], splat (float 1.000000e+00) |
| 164 | +; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[TMP0]] |
| 165 | +; CHECK-NEXT: store <8 x float> [[TMP9]], ptr [[TMP10]], align 4 |
| 166 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| 167 | +; CHECK-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1600 |
| 168 | +; CHECK-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]] |
| 169 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 170 | +; CHECK-NEXT: br label %[[EXIT:.*]] |
| 171 | +; CHECK: [[EXIT]]: |
| 172 | +; CHECK-NEXT: ret void |
| 173 | +; |
| 174 | +entry: |
| 175 | + br label %loop |
| 176 | + |
| 177 | +loop: |
| 178 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 179 | + %arrayidx = getelementptr inbounds float, ptr %b, i64 %iv |
| 180 | + %0 = load float, ptr %arrayidx, align 4 |
| 181 | + %cmp1 = fcmp ogt float %0, 1.000000e+02 |
| 182 | + tail call void @llvm.assume(i1 true) [ "align"(ptr %a, i64 %iv) ] |
| 183 | + %add = fadd float %0, 1.000000e+00 |
| 184 | + %arrayidx5 = getelementptr inbounds float, ptr %a, i64 %iv |
| 185 | + store float %add, ptr %arrayidx5, align 4 |
| 186 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 187 | + %exitcond = icmp eq i64 %iv, 1599 |
| 188 | + br i1 %exitcond, label %exit, label %loop |
| 189 | + |
| 190 | +exit: |
| 191 | + ret void |
| 192 | +} |
| 193 | + |
| 194 | +define void @assume_cold_operand_bundle(ptr noalias %a, ptr noalias %b) { |
| 195 | +; CHECK-LABEL: define void @assume_cold_operand_bundle( |
| 196 | +; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]]) { |
| 197 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 198 | +; CHECK-NEXT: br label %[[VECTOR_PH:.*]] |
| 199 | +; CHECK: [[VECTOR_PH]]: |
| 200 | +; CHECK-NEXT: br label %[[VECTOR_BODY:.*]] |
| 201 | +; CHECK: [[VECTOR_BODY]]: |
| 202 | +; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ] |
| 203 | +; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds float, ptr [[B]], i64 [[INDEX]] |
| 204 | +; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <8 x float>, ptr [[TMP0]], align 4 |
| 205 | +; CHECK-NEXT: tail call void @llvm.assume(i1 true) [ "cold"() ] |
| 206 | +; CHECK-NEXT: [[TMP1:%.*]] = fadd <8 x float> [[WIDE_LOAD]], splat (float 1.000000e+00) |
| 207 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[A]], i64 [[INDEX]] |
| 208 | +; CHECK-NEXT: store <8 x float> [[TMP1]], ptr [[TMP2]], align 4 |
| 209 | +; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8 |
| 210 | +; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 1600 |
| 211 | +; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]] |
| 212 | +; CHECK: [[MIDDLE_BLOCK]]: |
| 213 | +; CHECK-NEXT: br label %[[EXIT:.*]] |
| 214 | +; CHECK: [[EXIT]]: |
| 215 | +; CHECK-NEXT: ret void |
| 216 | +; |
| 217 | +entry: |
| 218 | + br label %loop |
| 219 | + |
| 220 | +loop: |
| 221 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 222 | + %arrayidx = getelementptr inbounds float, ptr %b, i64 %iv |
| 223 | + %0 = load float, ptr %arrayidx, align 4 |
| 224 | + %cmp1 = fcmp ogt float %0, 1.000000e+02 |
| 225 | + tail call void @llvm.assume(i1 true) [ "cold"() ] |
| 226 | + %add = fadd float %0, 1.000000e+00 |
| 227 | + %arrayidx5 = getelementptr inbounds float, ptr %a, i64 %iv |
| 228 | + store float %add, ptr %arrayidx5, align 4 |
| 229 | + %iv.next = add nuw nsw i64 %iv, 1 |
| 230 | + %exitcond = icmp eq i64 %iv, 1599 |
| 231 | + br i1 %exitcond, label %exit, label %loop |
| 232 | + |
| 233 | +exit: |
| 234 | + ret void |
| 235 | +} |
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