@@ -173,6 +173,19 @@ static DecodeStatus s32_0ImmDecoder(MCInst &MI, unsigned tmp,
173173 const MCDisassembler *Decoder);
174174static DecodeStatus brtargetDecoder (MCInst &MI, unsigned tmp, uint64_t Address,
175175 const MCDisassembler *Decoder);
176+
177+ static DecodeStatus n1ConstDecoder (MCInst &MI, const MCDisassembler *Decoder) {
178+ MCContext &Ctx = Decoder->getContext ();
179+ MI.addOperand (MCOperand::createExpr (MCConstantExpr::create (-1 , Ctx)));
180+ return DecodeStatus::Success;
181+ }
182+
183+ static DecodeStatus sgp10ConstDecoder (MCInst &MI,
184+ const MCDisassembler *Decoder) {
185+ MI.addOperand (MCOperand::createReg (Hexagon::SGP1_0));
186+ return DecodeStatus::Success;
187+ }
188+
176189#include " HexagonDepDecoders.inc"
177190#include " HexagonGenDisassemblerTables.inc"
178191
@@ -349,21 +362,6 @@ void HexagonDisassembler::remapInstruction(MCInst &Instr) const {
349362 }
350363}
351364
352- static void adjustDuplex (MCInst &MI, MCContext &Context) {
353- switch (MI.getOpcode ()) {
354- case Hexagon::SA1_setin1:
355- MI.insert (MI.begin () + 1 ,
356- MCOperand::createExpr (MCConstantExpr::create (-1 , Context)));
357- break ;
358- case Hexagon::SA1_dec:
359- MI.insert (MI.begin () + 2 ,
360- MCOperand::createExpr (MCConstantExpr::create (-1 , Context)));
361- break ;
362- default :
363- break ;
364- }
365- }
366-
367365DecodeStatus HexagonDisassembler::getSingleInstruction (MCInst &MI, MCInst &MCB,
368366 ArrayRef<uint8_t > Bytes,
369367 uint64_t Address,
@@ -468,12 +466,10 @@ DecodeStatus HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
468466 CurrentExtender = TmpExtender;
469467 if (Result != DecodeStatus::Success)
470468 return DecodeStatus::Fail;
471- adjustDuplex (*MILow, getContext ());
472469 Result = decodeInstruction (
473470 DecodeHigh, *MIHigh, (Instruction >> 16 ) & 0x1fff , Address, this , STI);
474471 if (Result != DecodeStatus::Success)
475472 return DecodeStatus::Fail;
476- adjustDuplex (*MIHigh, getContext ());
477473 MCOperand OPLow = MCOperand::createInst (MILow);
478474 MCOperand OPHigh = MCOperand::createInst (MIHigh);
479475 MI.addOperand (OPLow);
@@ -499,41 +495,6 @@ DecodeStatus HexagonDisassembler::getSingleInstruction(MCInst &MI, MCInst &MCB,
499495
500496 }
501497
502- switch (MI.getOpcode ()) {
503- case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
504- case Hexagon::J4_cmpeqn1_f_jumpnv_t:
505- case Hexagon::J4_cmpeqn1_fp0_jump_nt:
506- case Hexagon::J4_cmpeqn1_fp0_jump_t:
507- case Hexagon::J4_cmpeqn1_fp1_jump_nt:
508- case Hexagon::J4_cmpeqn1_fp1_jump_t:
509- case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
510- case Hexagon::J4_cmpeqn1_t_jumpnv_t:
511- case Hexagon::J4_cmpeqn1_tp0_jump_nt:
512- case Hexagon::J4_cmpeqn1_tp0_jump_t:
513- case Hexagon::J4_cmpeqn1_tp1_jump_nt:
514- case Hexagon::J4_cmpeqn1_tp1_jump_t:
515- case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
516- case Hexagon::J4_cmpgtn1_f_jumpnv_t:
517- case Hexagon::J4_cmpgtn1_fp0_jump_nt:
518- case Hexagon::J4_cmpgtn1_fp0_jump_t:
519- case Hexagon::J4_cmpgtn1_fp1_jump_nt:
520- case Hexagon::J4_cmpgtn1_fp1_jump_t:
521- case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
522- case Hexagon::J4_cmpgtn1_t_jumpnv_t:
523- case Hexagon::J4_cmpgtn1_tp0_jump_nt:
524- case Hexagon::J4_cmpgtn1_tp0_jump_t:
525- case Hexagon::J4_cmpgtn1_tp1_jump_nt:
526- case Hexagon::J4_cmpgtn1_tp1_jump_t:
527- MI.insert (MI.begin () + 1 ,
528- MCOperand::createExpr (MCConstantExpr::create (-1 , getContext ())));
529- break ;
530- case Hexagon::Y4_crswap10:
531- MI.addOperand (MCOperand::createReg (Hexagon::SGP1_0));
532- break ;
533- default :
534- break ;
535- }
536-
537498 if (HexagonMCInstrInfo::isNewValue (*MCII, MI)) {
538499 unsigned OpIndex = HexagonMCInstrInfo::getNewValueOp (*MCII, MI);
539500 MCOperand &MCO = MI.getOperand (OpIndex);
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