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[LV] Pre-commit tests for const-folder
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‎llvm/test/Transforms/LoopVectorize/constantfolder.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s
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define void @const_fold_ptradd(ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @const_fold_ptradd(
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; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 true, i64 0, i64 [[D]]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i16, ptr [[DST]], i64 [[PREDPHI]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: store i16 0, ptr [[TMP0]], align 2
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
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; CHECK-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[CONST_0:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 0, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr i16, ptr [[DST]], i64 [[CONST_0]]
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; CHECK-NEXT: store i16 0, ptr [[GEP]], align 2
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 true, label %loop.latch, label %else
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else:
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br label %loop.latch
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loop.latch:
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%const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ]
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%gep = getelementptr i16, ptr %dst, i64 %const.0
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store i16 0, ptr %gep, align 2
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
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exit:
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ret void
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}
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define void @const_fold_inbounds_ptradd(ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @const_fold_inbounds_ptradd(
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; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[PREDPHI:%.*]] = select i1 true, i64 0, i64 [[D]]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i16, ptr [[DST]], i64 [[PREDPHI]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: store i16 0, ptr [[TMP0]], align 2
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
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; CHECK-NEXT: br i1 [[TMP1]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[CONST_0:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 0, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i16, ptr [[DST]], i64 [[CONST_0]]
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; CHECK-NEXT: store i16 0, ptr [[GEP]], align 2
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 true, label %loop.latch, label %else
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else:
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br label %loop.latch
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loop.latch:
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%const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ]
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%gep = getelementptr inbounds i16, ptr %dst, i64 %const.0
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store i16 0, ptr %gep, align 2
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
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exit:
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ret void
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}
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define void @const_fold_select(ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @const_fold_select(
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; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[D]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> splat (i1 true), <4 x i64> splat (i64 1), <4 x i64> [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP0:%.*]] = or <4 x i64> [[BROADCAST_SPLAT]], [[PREDPHI]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[TMP0]], i32 0
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; CHECK-NEXT: store i64 [[TMP3]], ptr [[DST]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
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; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[CONST_1:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 1, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[OR:%.*]] = or i64 [[D]], [[CONST_1]]
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; CHECK-NEXT: store i64 [[OR]], ptr [[DST]], align 8
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP7:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 true, label %loop.latch, label %else
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else:
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br label %loop.latch
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loop.latch:
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%const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ]
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%or = or i64 %d, %const.1
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store i64 %or, ptr %dst, align 8
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
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exit:
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ret void
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}
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define void @const_fold_and_or_xor(ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @const_fold_and_or_xor(
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; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[D]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> splat (i1 true), <4 x i64> splat (i64 1), <4 x i64> [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP0:%.*]] = or <4 x i64> splat (i64 2), [[PREDPHI]]
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; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i64> [[TMP0]], [[PREDPHI]]
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; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i64> [[TMP1]], [[PREDPHI]]
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP3:%.*]] = extractelement <4 x i64> [[TMP2]], i32 0
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; CHECK-NEXT: store i64 [[TMP3]], ptr [[DST]], align 8
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP4:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
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; CHECK-NEXT: br i1 [[TMP4]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
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; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[CONST_1:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 1, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[OR:%.*]] = or i64 2, [[CONST_1]]
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[OR]], [[CONST_1]]
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; CHECK-NEXT: [[XOR:%.*]] = and i64 [[AND]], [[CONST_1]]
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; CHECK-NEXT: store i64 [[XOR]], ptr [[DST]], align 8
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP9:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
225+
br i1 true, label %loop.latch, label %else
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else:
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br label %loop.latch
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230+
loop.latch:
231+
%const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ]
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%or = or i64 2, %const.1
233+
%and = and i64 %or, %const.1
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%xor = and i64 %and, %const.1
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store i64 %xor, ptr %dst, align 8
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
239+
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exit:
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ret void
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}
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define void @const_fold_cmp_zext(ptr %dst, i64 %d) {
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; CHECK-LABEL: define void @const_fold_cmp_zext(
246+
; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
247+
; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[D]], i64 0
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; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
252+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> splat (i1 true), <4 x i64> splat (i64 1), <4 x i64> [[BROADCAST_SPLAT]]
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; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt <4 x i64> splat (i64 2), [[PREDPHI]]
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; CHECK-NEXT: [[TMP1:%.*]] = zext <4 x i1> [[TMP0]] to <4 x i8>
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = extractelement <4 x i8> [[TMP1]], i32 0
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; CHECK-NEXT: store i8 [[TMP2]], ptr [[DST]], align 1
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
262+
; CHECK-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
263+
; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
267+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
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; CHECK: [[LOOP_HEADER]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
270+
; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
271+
; CHECK: [[ELSE]]:
272+
; CHECK-NEXT: br label %[[LOOP_LATCH]]
273+
; CHECK: [[LOOP_LATCH]]:
274+
; CHECK-NEXT: [[CONST_1:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 1, %[[LOOP_HEADER]] ]
275+
; CHECK-NEXT: [[VAL:%.*]] = icmp ugt i64 2, [[CONST_1]]
276+
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[VAL]] to i8
277+
; CHECK-NEXT: store i8 [[ZEXT]], ptr [[DST]], align 1
278+
; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
279+
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
280+
; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP11:![0-9]+]]
281+
; CHECK: [[EXIT]]:
282+
; CHECK-NEXT: ret void
283+
;
284+
entry:
285+
br label %loop.header
286+
287+
loop.header: ; preds = %loop.latch, %entry
288+
%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
289+
br i1 true, label %loop.latch, label %else
290+
291+
else:
292+
br label %loop.latch
293+
294+
loop.latch:
295+
%const.1 = phi i64 [ %d, %else ], [ 1, %loop.header ]
296+
%val = icmp ugt i64 2, %const.1
297+
%zext = zext i1 %val to i8
298+
store i8 %zext, ptr %dst, align 1
299+
%iv.next = add i64 %iv, 1
300+
%cmp = icmp ult i64 %iv.next, 101
301+
br i1 %cmp, label %loop.header, label %exit
302+
303+
exit:
304+
ret void
305+
}
306+
307+
define void @const_fold_trunc(ptr %dst, i64 %d) {
308+
; CHECK-LABEL: define void @const_fold_trunc(
309+
; CHECK-SAME: ptr [[DST:%.*]], i64 [[D:%.*]]) {
310+
; CHECK-NEXT: [[ENTRY:.*]]:
311+
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
312+
; CHECK: [[VECTOR_PH]]:
313+
; CHECK-NEXT: [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i64> poison, i64 [[D]], i64 0
314+
; CHECK-NEXT: [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i64> [[BROADCAST_SPLATINSERT]], <4 x i64> poison, <4 x i32> zeroinitializer
315+
; CHECK-NEXT: [[PREDPHI:%.*]] = select <4 x i1> splat (i1 true), <4 x i64> zeroinitializer, <4 x i64> [[BROADCAST_SPLAT]]
316+
; CHECK-NEXT: [[TMP0:%.*]] = trunc <4 x i64> [[PREDPHI]] to <4 x i16>
317+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
318+
; CHECK: [[VECTOR_BODY]]:
319+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
320+
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i16> [[TMP0]], i32 0
321+
; CHECK-NEXT: store i16 [[TMP1]], ptr [[DST]], align 2
322+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
323+
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i64 [[INDEX_NEXT]], 100
324+
; CHECK-NEXT: br i1 [[TMP2]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
325+
; CHECK: [[MIDDLE_BLOCK]]:
326+
; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
327+
; CHECK: [[SCALAR_PH]]:
328+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ 100, %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
329+
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
330+
; CHECK: [[LOOP_HEADER]]:
331+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], %[[LOOP_LATCH:.*]] ]
332+
; CHECK-NEXT: br i1 true, label %[[LOOP_LATCH]], label %[[ELSE:.*]]
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; CHECK: [[ELSE]]:
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; CHECK-NEXT: br label %[[LOOP_LATCH]]
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; CHECK: [[LOOP_LATCH]]:
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; CHECK-NEXT: [[CONST_0:%.*]] = phi i64 [ [[D]], %[[ELSE]] ], [ 0, %[[LOOP_HEADER]] ]
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc i64 [[CONST_0]] to i16
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; CHECK-NEXT: store i16 [[TRUNC]], ptr [[DST]], align 2
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; CHECK-NEXT: [[IV_NEXT]] = add i64 [[IV]], 1
340+
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[IV_NEXT]], 101
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; CHECK-NEXT: br i1 [[CMP]], label %[[LOOP_HEADER]], label %[[EXIT]], !llvm.loop [[LOOP13:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop.header
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loop.header: ; preds = %loop.latch, %entry
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
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br i1 true, label %loop.latch, label %else
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else:
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br label %loop.latch
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loop.latch:
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%const.0 = phi i64 [ %d, %else ], [ 0, %loop.header ]
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%trunc = trunc i64 %const.0 to i16
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store i16 %trunc, ptr %dst, align 2
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%iv.next = add i64 %iv, 1
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%cmp = icmp ult i64 %iv.next, 101
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br i1 %cmp, label %loop.header, label %exit
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exit:
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ret void
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}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
370+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]]}
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; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META2]], [[META1]]}
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; CHECK: [[LOOP6]] = distinct !{[[LOOP6]], [[META1]], [[META2]]}
374+
; CHECK: [[LOOP7]] = distinct !{[[LOOP7]], [[META2]], [[META1]]}
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; CHECK: [[LOOP8]] = distinct !{[[LOOP8]], [[META1]], [[META2]]}
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; CHECK: [[LOOP9]] = distinct !{[[LOOP9]], [[META2]], [[META1]]}
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; CHECK: [[LOOP10]] = distinct !{[[LOOP10]], [[META1]], [[META2]]}
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; CHECK: [[LOOP11]] = distinct !{[[LOOP11]], [[META2]], [[META1]]}
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; CHECK: [[LOOP12]] = distinct !{[[LOOP12]], [[META1]], [[META2]]}
380+
; CHECK: [[LOOP13]] = distinct !{[[LOOP13]], [[META2]], [[META1]]}
381+
;.

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