[AMDGPU] WMMA convergent flag fix

  Fixed test

Author: mssefat

llvm/test/CodeGen/AMDGPU/wmma-gfx12-convergent.mir

@@ -1,30 +1,13 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
 # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx12-generic -run-pass=machine-sink %s -o - | FileCheck %s
 
---- |
-  ; ModuleID = 'test-wmma-convergent'
-  target triple = "amdgcn-amd-amdhsa"
-
-  define void @wmma_test() {
-  entry:
-    br label %if.then
-
-  if.then:
-    br label %if.end
-
-  if.end:
-    ret void
-  }
-
-...
 ---
 name:            wmma_test
-alignment:       1
 tracksRegLiveness: true
 body:             |
   ; CHECK-LABEL: name: wmma_test
-  ; CHECK: bb.0.entry:
-  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
+  ; CHECK: bb.0:
+  ; CHECK-NEXT:   successors: %bb.2(0x40000000), %bb.1(0x40000000)
   ; CHECK-NEXT: {{  $}}
   ; CHECK-NEXT:   [[DEF:%[0-9]+]]:vreg_128 = IMPLICIT_DEF
   ; CHECK-NEXT:   [[DEF1:%[0-9]+]]:vreg_128 = IMPLICIT_DEF
@@ -33,45 +16,26 @@ body:             |
   ; CHECK-NEXT:   [[SI_IF:%[0-9]+]]:sreg_32 = SI_IF [[DEF2]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
   ; CHECK-NEXT:   S_BRANCH %bb.1
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.1.if.then:
+  ; CHECK-NEXT: bb.1:
   ; CHECK-NEXT:   successors: %bb.2(0x80000000)
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vgpr_32 = COPY %3.sub1
-  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vgpr_32 = COPY %3.sub3
-  ; CHECK-NEXT:   [[COPY2:%[0-9]+]]:vgpr_32 = COPY %3.sub5
-  ; CHECK-NEXT:   [[COPY3:%[0-9]+]]:vgpr_32 = COPY %3.sub7
-  ; CHECK-NEXT:   [[COPY4:%[0-9]+]]:vgpr_32 = COPY %3.sub6
-  ; CHECK-NEXT:   [[COPY5:%[0-9]+]]:vgpr_32 = COPY %3.sub4
-  ; CHECK-NEXT:   [[COPY6:%[0-9]+]]:vgpr_32 = COPY %3.sub2
-  ; CHECK-NEXT:   [[COPY7:%[0-9]+]]:vgpr_32 = COPY %3.sub0
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vreg_256 = COPY %3.sub1
   ; CHECK-NEXT: {{  $}}
-  ; CHECK-NEXT: bb.2.if.end:
+  ; CHECK-NEXT: bb.2:
   ; CHECK-NEXT:   SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
   ; CHECK-NEXT:   S_ENDPGM 0
-
-  bb.0.entry:
-    successors: %bb.1, %bb.2
-
+  bb.0:
     %0:vreg_128 = IMPLICIT_DEF
     %1:vreg_128 = IMPLICIT_DEF
     %2:sreg_32 = IMPLICIT_DEF
     early-clobber %3:vreg_256 = V_WMMA_F32_16X16X16_F16_w32_threeaddr 8, %0:vreg_128, 8, %1:vreg_128, 8, 0, 0, 0, implicit $exec
     %4:sreg_32 = SI_IF %2:sreg_32, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
     S_BRANCH %bb.1
 
-  bb.1.if.then:
-    successors: %bb.2
-
-    %5:vgpr_32 = COPY %3.sub1:vreg_256
-    %6:vgpr_32 = COPY %3.sub3:vreg_256
-    %7:vgpr_32 = COPY %3.sub5:vreg_256
-    %8:vgpr_32 = COPY %3.sub7:vreg_256
-    %9:vgpr_32 = COPY %3.sub6:vreg_256
-    %10:vgpr_32 = COPY %3.sub4:vreg_256
-    %11:vgpr_32 = COPY %3.sub2:vreg_256
-    %12:vgpr_32 = COPY %3.sub0:vreg_256
+  bb.1:
+    %5:vreg_256 = COPY %3.sub1:vreg_256
 
-  bb.2.if.end:
+  bb.2:
     SI_END_CF %4:sreg_32, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
     S_ENDPGM 0