[RISCV][NFC] precommit testcase

Author: BeMg

llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir

@@ -0,0 +1,19 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
+# RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs -run-pass=riscv-init-undef -o - %s | FileCheck %s --check-prefix=MIR
+...
+---
+name:            vrgather_all_undef
+tracksRegLiveness: true
+body:             |
+  bb.0.entry:
+    ; MIR-LABEL: name: vrgather_all_undef
+    ; MIR: [[PseudoRVVInitUndefM1_:%[0-9]+]]:vr = PseudoRVVInitUndefM1
+    ; MIR-NEXT: early-clobber %1:vr = PseudoVRGATHER_VI_M1 $noreg, killed [[PseudoRVVInitUndefM1_]], 0, 0, 5 /* e32 */, 0 /* tu, mu */
+    ; MIR-NEXT: $v8 = COPY %1
+    ; MIR-NEXT: PseudoRET implicit $v8
+    %2:vr = IMPLICIT_DEF
+    early-clobber %1:vr = PseudoVRGATHER_VI_M1 $noreg, killed undef %2, 0, 0, 5 /* e32 */, 0 /* tu, mu */
+    $v8 = COPY %1
+    PseudoRET implicit $v8
+
+...