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1 parent cfc20ea commit 372e999Copy full SHA for 372e999
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -14017,7 +14017,6 @@ const uint32_t ModeMask32 = ~RISCVExceptFlags::ALL;
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SDValue RISCVTargetLowering::lowerGET_FPMODE(SDValue Op,
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SelectionDAG &DAG) const {
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const MVT XLenVT = Subtarget.getXLenVT();
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- const uint64_t ModeMaskValue = Subtarget.is64Bit() ? ModeMask64 : ModeMask32;
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SDLoc DL(Op);
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SDValue Chain = Op->getOperand(0);
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SDValue SysRegNo = DAG.getTargetConstant(RISCVSysReg::fcsr, DL, XLenVT);
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