@@ -455,14 +455,14 @@ define void @hoist_previous_value_and_operand_load(ptr %dst, i64 %mask) {
455455; CHECK-NEXT: br label [[LOOP1:%.*]]
456456; CHECK: loop:
457457; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 337, [[SCALAR_PH]] ], [ [[ADD:%.*]], [[LOOP1]] ]
458- ; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[SCALAR_PH]] ], [ [[TRUNC :%.*]], [[LOOP1]] ]
458+ ; CHECK-NEXT: [[FOR_1:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT]], [[SCALAR_PH]] ], [ [[LOAD :%.*]], [[LOOP1]] ]
459459; CHECK-NEXT: [[FOR_2:%.*]] = phi i32 [ [[VECTOR_RECUR_EXTRACT2]], [[SCALAR_PH]] ], [ [[OR:%.*]], [[LOOP1]] ]
460460; CHECK-NEXT: [[OR]] = or i32 [[FOR_1]], 3
461461; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1
462462; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST]], i64 [[IV]]
463463; CHECK-NEXT: store i32 [[FOR_2]], ptr [[GEP]], align 4
464464; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337
465- ; CHECK-NEXT: [[TRUNC ]] = load i32, ptr [[DST]], align 4
465+ ; CHECK-NEXT: [[LOAD ]] = load i32, ptr [[DST]], align 4
466466; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP1]], label [[EXIT:%.*]], !llvm.loop [[LOOP8:![0-9]+]]
467467; CHECK: exit:
468468; CHECK-NEXT: ret void
@@ -472,14 +472,55 @@ bb:
472472
473473loop:
474474 %iv = phi i64 [ 1 , %bb ], [ %add , %loop ]
475- %for.1 = phi i32 [ 1 , %bb ], [ %trunc , %loop ]
475+ %for.1 = phi i32 [ 1 , %bb ], [ %load , %loop ]
476476 %for.2 = phi i32 [ 0 , %bb ], [ %or , %loop ]
477477 %or = or i32 %for.1 , 3
478478 %add = add i64 %iv , 1
479479 %gep = getelementptr inbounds i32 , ptr %dst , i64 %iv
480480 store i32 %for.2 , ptr %gep , align 4
481481 %icmp = icmp ult i64 %iv , 337
482- %trunc = load i32 , ptr %dst
482+ %load = load i32 , ptr %dst
483+ br i1 %icmp , label %loop , label %exit
484+
485+ exit:
486+ ret void
487+ }
488+
489+ define void @hoist_previous_value_and_operand_assume (ptr %dst , i64 %mask ) {
490+ ; CHECK-LABEL: @hoist_previous_value_and_operand_assume(
491+ ; CHECK-NEXT: bb:
492+ ; CHECK-NEXT: br label [[LOOP:%.*]]
493+ ; CHECK: loop:
494+ ; CHECK-NEXT: [[IV:%.*]] = phi i64 [ 1, [[BB:%.*]] ], [ [[ADD:%.*]], [[LOOP]] ]
495+ ; CHECK-NEXT: [[FOR_1:%.*]] = phi i1 [ true, [[BB]] ], [ [[TRUNC:%.*]], [[LOOP]] ]
496+ ; CHECK-NEXT: [[FOR_2:%.*]] = phi i1 [ false, [[BB]] ], [ [[OR:%.*]], [[LOOP]] ]
497+ ; CHECK-NEXT: [[OR]] = or i1 [[FOR_1]], true
498+ ; CHECK-NEXT: [[ADD]] = add i64 [[IV]], 1
499+ ; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]
500+ ; CHECK-NEXT: store i1 [[FOR_2]], ptr [[GEP]], align 4
501+ ; CHECK-NEXT: [[ICMP:%.*]] = icmp ult i64 [[IV]], 337
502+ ; CHECK-NEXT: call void @llvm.assume(i1 [[FOR_1]])
503+ ; CHECK-NEXT: [[A:%.*]] = and i64 [[IV]], [[MASK:%.*]]
504+ ; CHECK-NEXT: [[TRUNC]] = trunc i64 [[A]] to i1
505+ ; CHECK-NEXT: br i1 [[ICMP]], label [[LOOP]], label [[EXIT:%.*]]
506+ ; CHECK: exit:
507+ ; CHECK-NEXT: ret void
508+ ;
509+ bb:
510+ br label %loop
511+
512+ loop:
513+ %iv = phi i64 [ 1 , %bb ], [ %add , %loop ]
514+ %for.1 = phi i1 [ 1 , %bb ], [ %trunc , %loop ]
515+ %for.2 = phi i1 [ 0 , %bb ], [ %or , %loop ]
516+ %or = or i1 %for.1 , 3
517+ %add = add i64 %iv , 1
518+ %gep = getelementptr inbounds i32 , ptr %dst , i64 %iv
519+ store i1 %for.2 , ptr %gep , align 4
520+ %icmp = icmp ult i64 %iv , 337
521+ call void @llvm.assume (i1 %for.1 )
522+ %a = and i64 %iv , %mask
523+ %trunc = trunc i64 %a to i1
483524 br i1 %icmp , label %loop , label %exit
484525
485526exit:
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