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Author: optimisan

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -1718,17 +1718,15 @@ bool GCNTargetMachine::parseMachineFunctionInfo(
     MFI->reserveWWMRegister(ParsedReg);
   }
 
-  auto setRegisterFlags = [&](const VRegInfo &Info) {
-    for (uint8_t Flag : Info.Flags) {
-      MFI->setFlag(Info.VReg, Flag);
-    }
-  };
-
   for (const auto &[_, Info] : PFS.VRegInfosNamed) {
-    setRegisterFlags(*Info);
+    for (uint8_t Flag : Info->Flags) {
+      MFI->setFlag(Info->VReg, Flag);
+    }
   }
   for (const auto &[_, Info] : PFS.VRegInfos) {
-    setRegisterFlags(*Info);
+    for (uint8_t Flag : Info->Flags) {
+      MFI->setFlag(Info->VReg, Flag);
+    }
   }
 
   auto parseAndCheckArgument = [&](const std::optional<yaml::SIArgument> &A,

llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp

@@ -3857,8 +3857,7 @@ SIRegisterInfo::getVRegFlagsOfReg(Register Reg,
                                   const MachineFunction &MF) const {
   SmallVector<StringLiteral> RegFlags;
   const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
-  if (FuncInfo->checkFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG)) {
+  if (FuncInfo->checkFlag(Reg, AMDGPU::VirtRegFlag::WWM_REG))
     RegFlags.push_back("WWM_REG");
-  }
   return RegFlags;
 }