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1 parent 9f311a0 commit 2d5d5c3Copy full SHA for 2d5d5c3
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -9170,9 +9170,8 @@ int SIInstrInfo::pseudoToMCOpcode(int Opcode) const {
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unsigned Gen = subtargetEncodingFamily(ST);
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- if (isRenamedInGFX9(Opcode) && ST.getGeneration() == AMDGPUSubtarget::GFX9) {
+ if (ST.getGeneration() == AMDGPUSubtarget::GFX9 && isRenamedInGFX9(Opcode))
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Gen = SIEncodingFamily::GFX9;
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- }
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// Adjust the encoding family to GFX80 for D16 buffer instructions when the
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// subtarget has UnpackedD16VMem feature.
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