@@ -495,8 +495,8 @@ static void applyBitsNotInRegMaskToRegUnitsMask(const TargetRegisterInfo &TRI,
495495 break ;
496496
497497 if (PhysReg && !((Word >> Bit) & 1 )) {
498- for (MCRegUnitIterator RUI (PhysReg, &TRI); RUI. isValid (); ++RUI )
499- RUsFromRegsNotInMask.set (*RUI );
498+ for (MCRegUnit Unit : TRI. regunits (PhysReg) )
499+ RUsFromRegsNotInMask.set (Unit );
500500 }
501501 }
502502 }
@@ -542,10 +542,10 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
542542
543543 if (!MO.isDef ()) {
544544 if (!HasNonInvariantUse) {
545- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI ) {
545+ for (MCRegUnit Unit : TRI-> regunits (Reg) ) {
546546 // If it's using a non-loop-invariant register, then it's obviously
547547 // not safe to hoist.
548- if (RUDefs.test (*RUI ) || RUClobbers.test (*RUI )) {
548+ if (RUDefs.test (Unit ) || RUClobbers.test (Unit )) {
549549 HasNonInvariantUse = true ;
550550 break ;
551551 }
@@ -555,8 +555,8 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
555555 }
556556
557557 if (MO.isImplicit ()) {
558- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI )
559- RUClobbers.set (*RUI );
558+ for (MCRegUnit Unit : TRI-> regunits (Reg) )
559+ RUClobbers.set (Unit );
560560 if (!MO.isDead ())
561561 // Non-dead implicit def? This cannot be hoisted.
562562 RuledOut = true ;
@@ -575,17 +575,17 @@ void MachineLICMImpl::ProcessMI(MachineInstr *MI, BitVector &RUDefs,
575575 // If we have already seen another instruction that defines the same
576576 // register, then this is not safe. Two defs is indicated by setting a
577577 // PhysRegClobbers bit.
578- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI ) {
579- if (RUDefs.test (*RUI )) {
580- RUClobbers.set (*RUI );
578+ for (MCRegUnit Unit : TRI-> regunits (Reg) ) {
579+ if (RUDefs.test (Unit )) {
580+ RUClobbers.set (Unit );
581581 RuledOut = true ;
582- } else if (RUClobbers.test (*RUI )) {
582+ } else if (RUClobbers.test (Unit )) {
583583 // MI defined register is seen defined by another instruction in
584584 // the loop, it cannot be a LICM candidate.
585585 RuledOut = true ;
586586 }
587587
588- RUDefs.set (*RUI );
588+ RUDefs.set (Unit );
589589 }
590590 }
591591
@@ -625,8 +625,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
625625 // FIXME: That means a reload that're reused in successor block(s) will not
626626 // be LICM'ed.
627627 for (const auto &LI : BB->liveins ()) {
628- for (MCRegUnitIterator RUI (LI.PhysReg , TRI); RUI. isValid (); ++RUI )
629- RUDefs.set (*RUI );
628+ for (MCRegUnit Unit : TRI-> regunits (LI.PhysReg ) )
629+ RUDefs.set (Unit );
630630 }
631631
632632 // Funclet entry blocks will clobber all registers
@@ -661,8 +661,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
661661 Register Reg = MO.getReg ();
662662 if (!Reg)
663663 continue ;
664- for (MCRegUnitIterator RUI (Reg, TRI); RUI. isValid (); ++RUI )
665- TermRUs.set (*RUI );
664+ for (MCRegUnit Unit : TRI-> regunits (Reg) )
665+ TermRUs.set (Unit );
666666 }
667667 }
668668
@@ -681,8 +681,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
681681
682682 Register Def = Candidate.Def ;
683683 bool Safe = true ;
684- for (MCRegUnitIterator RUI (Def, TRI); RUI. isValid (); ++RUI ) {
685- if (RUClobbers.test (*RUI ) || TermRUs.test (*RUI )) {
684+ for (MCRegUnit Unit : TRI-> regunits (Def) ) {
685+ if (RUClobbers.test (Unit ) || TermRUs.test (Unit )) {
686686 Safe = false ;
687687 break ;
688688 }
@@ -695,8 +695,8 @@ void MachineLICMImpl::HoistRegionPostRA(MachineLoop *CurLoop) {
695695 for (const MachineOperand &MO : MI->all_uses ()) {
696696 if (!MO.getReg ())
697697 continue ;
698- for (MCRegUnitIterator RUI (MO.getReg (), TRI); RUI. isValid (); ++RUI ) {
699- if (RUDefs.test (*RUI ) || RUClobbers.test (*RUI )) {
698+ for (MCRegUnit Unit : TRI-> regunits (MO.getReg ()) ) {
699+ if (RUDefs.test (Unit ) || RUClobbers.test (Unit )) {
700700 // If it's using a non-loop-invariant register, then it's obviously
701701 // not safe to hoist.
702702 Safe = false ;
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