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[X86] Fix scalar load latencies for WriteLoad scheduler class
Atom was missing a load latency value (so was defaulting to 1cy) Znver1/Znver2 were using vector load latency values (which is what WriteFLoad*/WriteVecLoad* are for) instead of the scalar load latency value TBH I'm not sure clflush/clzero/prefetch ops should be tagged as WriteLoad but at least this makes us more consistent
1 parent 0e9dfff commit 244331a

20 files changed

+40
-40
lines changed

‎llvm/lib/Target/X86/X86ScheduleAtom.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -168,7 +168,7 @@ defm : X86WriteRes<WriteSHDmrcl,[AtomPort01], 4, [4], 1>;
168168
// Loads, stores, and moves, not folded with other operations.
169169
////////////////////////////////////////////////////////////////////////////////
170170

171-
def : WriteRes<WriteLoad, [AtomPort0]>;
171+
def : WriteRes<WriteLoad, [AtomPort0]> { let Latency = 3; }
172172
def : WriteRes<WriteStore, [AtomPort0]>;
173173
def : WriteRes<WriteStoreNT, [AtomPort0]>;
174174
def : WriteRes<WriteMove, [AtomPort01]>;

‎llvm/lib/Target/X86/X86ScheduleZnver1.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ def : WriteRes<WriteRMW, [ZnAGU]>;
177177
def : WriteRes<WriteStore, [ZnAGU]>;
178178
def : WriteRes<WriteStoreNT, [ZnAGU]>;
179179
def : WriteRes<WriteMove, [ZnALU]>;
180-
def : WriteRes<WriteLoad, [ZnAGU]> { let Latency = 8; }
180+
def : WriteRes<WriteLoad, [ZnAGU]> { let Latency = 4; }
181181

182182
// Model the effect of clobbering the read-write mask operand of the GATHER operation.
183183
// Does not cost anything by itself, only has latency, matching that of the WriteLoad,

‎llvm/lib/Target/X86/X86ScheduleZnver2.td

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -176,7 +176,7 @@ def : WriteRes<WriteRMW, [Zn2AGU]>;
176176
def : WriteRes<WriteStore, [Zn2AGU]>;
177177
def : WriteRes<WriteStoreNT, [Zn2AGU]>;
178178
def : WriteRes<WriteMove, [Zn2ALU]>;
179-
def : WriteRes<WriteLoad, [Zn2AGU]> { let Latency = 8; }
179+
def : WriteRes<WriteLoad, [Zn2AGU]> { let Latency = 4; }
180180

181181
// Model the effect of clobbering the read-write mask operand of the GATHER operation.
182182
// Does not cost anything by itself, only has latency, matching that of the WriteLoad,

‎llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -282,10 +282,10 @@ xorps (%rax), %xmm2
282282
# CHECK-NEXT: 1 3 3.00 pmovmskb %mm0, %ecx
283283
# CHECK-NEXT: 1 4 1.00 pmulhuw %mm0, %mm2
284284
# CHECK-NEXT: 1 4 1.00 * pmulhuw (%rax), %mm2
285-
# CHECK-NEXT: 1 1 1.00 * * prefetcht0 (%rax)
286-
# CHECK-NEXT: 1 1 1.00 * * prefetcht1 (%rax)
287-
# CHECK-NEXT: 1 1 1.00 * * prefetcht2 (%rax)
288-
# CHECK-NEXT: 1 1 1.00 * * prefetchnta (%rax)
285+
# CHECK-NEXT: 1 3 1.00 * * prefetcht0 (%rax)
286+
# CHECK-NEXT: 1 3 1.00 * * prefetcht1 (%rax)
287+
# CHECK-NEXT: 1 3 1.00 * * prefetcht2 (%rax)
288+
# CHECK-NEXT: 1 3 1.00 * * prefetchnta (%rax)
289289
# CHECK-NEXT: 1 4 1.00 psadbw %mm0, %mm2
290290
# CHECK-NEXT: 1 4 1.00 * psadbw (%rax), %mm2
291291
# CHECK-NEXT: 1 1 1.00 pshufw $1, %mm0, %mm2

‎llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -415,7 +415,7 @@ xorpd (%rax), %xmm2
415415
# CHECK-NEXT: 1 1 1.00 * andnpd (%rax), %xmm2
416416
# CHECK-NEXT: 1 1 0.50 andpd %xmm0, %xmm2
417417
# CHECK-NEXT: 1 1 1.00 * andpd (%rax), %xmm2
418-
# CHECK-NEXT: 1 1 1.00 * * U clflush (%rax)
418+
# CHECK-NEXT: 1 3 1.00 * * U clflush (%rax)
419419
# CHECK-NEXT: 3 6 5.00 cmpeqpd %xmm0, %xmm2
420420
# CHECK-NEXT: 4 7 6.00 * cmpeqpd (%rax), %xmm2
421421
# CHECK-NEXT: 1 5 1.00 cmpeqsd %xmm0, %xmm2

‎llvm/test/tools/llvm-mca/X86/Atom/resources-x87.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -276,8 +276,8 @@ fyl2xp1
276276
# CHECK-NEXT: 1 2 1.00 * U fisttpl (%ecx)
277277
# CHECK-NEXT: 1 2 1.00 * U fisttpll (%eax)
278278
# CHECK-NEXT: 1 1 1.00 U fld %st(0)
279-
# CHECK-NEXT: 1 1 1.00 * U flds (%edx)
280-
# CHECK-NEXT: 1 1 1.00 * U fldl (%ecx)
279+
# CHECK-NEXT: 1 3 1.00 * U flds (%edx)
280+
# CHECK-NEXT: 1 3 1.00 * U fldl (%ecx)
281281
# CHECK-NEXT: 1 4 2.00 * U fldt (%eax)
282282
# CHECK-NEXT: 1 5 2.50 * U fldcw (%eax)
283283
# CHECK-NEXT: 1 100 0.50 * U fldenv (%eax)

‎llvm/test/tools/llvm-mca/X86/Znver1/resources-clflushopt.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ clflushopt (%rax)
1212
# CHECK-NEXT: [6]: HasSideEffects (U)
1313

1414
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
15-
# CHECK-NEXT: 1 8 0.50 * * U clflushopt (%rax)
15+
# CHECK-NEXT: 1 4 0.50 * * U clflushopt (%rax)
1616

1717
# CHECK: Resources:
1818
# CHECK-NEXT: [0] - ZnAGU0

‎llvm/test/tools/llvm-mca/X86/Znver1/resources-clzero.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ clzero
1212
# CHECK-NEXT: [6]: HasSideEffects (U)
1313

1414
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
15-
# CHECK-NEXT: 1 8 0.50 U clzero
15+
# CHECK-NEXT: 1 4 0.50 U clzero
1616

1717
# CHECK: Resources:
1818
# CHECK-NEXT: [0] - ZnAGU0

‎llvm/test/tools/llvm-mca/X86/Znver1/resources-prefetchw.s

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@ prefetchw (%rax)
1313
# CHECK-NEXT: [6]: HasSideEffects (U)
1414

1515
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
16-
# CHECK-NEXT: 1 8 0.50 * * prefetch (%rax)
17-
# CHECK-NEXT: 1 8 0.50 * * prefetchw (%rax)
16+
# CHECK-NEXT: 1 4 0.50 * * prefetch (%rax)
17+
# CHECK-NEXT: 1 4 0.50 * * prefetchw (%rax)
1818

1919
# CHECK: Resources:
2020
# CHECK-NEXT: [0] - ZnAGU0

‎llvm/test/tools/llvm-mca/X86/Znver1/resources-sse1.s

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -282,10 +282,10 @@ xorps (%rax), %xmm2
282282
# CHECK-NEXT: 1 1 1.00 pmovmskb %mm0, %ecx
283283
# CHECK-NEXT: 1 4 1.00 pmulhuw %mm0, %mm2
284284
# CHECK-NEXT: 1 11 1.00 * pmulhuw (%rax), %mm2
285-
# CHECK-NEXT: 1 8 0.50 * * prefetcht0 (%rax)
286-
# CHECK-NEXT: 1 8 0.50 * * prefetcht1 (%rax)
287-
# CHECK-NEXT: 1 8 0.50 * * prefetcht2 (%rax)
288-
# CHECK-NEXT: 1 8 0.50 * * prefetchnta (%rax)
285+
# CHECK-NEXT: 1 4 0.50 * * prefetcht0 (%rax)
286+
# CHECK-NEXT: 1 4 0.50 * * prefetcht1 (%rax)
287+
# CHECK-NEXT: 1 4 0.50 * * prefetcht2 (%rax)
288+
# CHECK-NEXT: 1 4 0.50 * * prefetchnta (%rax)
289289
# CHECK-NEXT: 1 3 1.00 psadbw %mm0, %mm2
290290
# CHECK-NEXT: 1 10 1.00 * psadbw (%rax), %mm2
291291
# CHECK-NEXT: 1 1 0.50 pshufw $1, %mm0, %mm2

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