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[MCP] Remove dead copies from basic blocks with successors. (#86973)
Previously we wouldn't remove dead copies from basic blocks with successors. The comment said we didn't want to trust the live-in lists. The comment is very old so I'm not sure if that's still a concern today. This patch checks the live-in lists and removes copies from MaybeDeadCopies if they are referenced by any live-ins in any successors. We only do this if the tracksLiveness property is set. If that property is not set, we retain the old behavior.
1 parent 62d6beb commit 23d45e5

13 files changed

+40
-43
lines changed

‎llvm/lib/CodeGen/MachineCopyPropagation.cpp‎

Lines changed: 28 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -411,6 +411,7 @@ class MachineCopyPropagation : public MachineFunctionPass {
411411
typedef enum { DebugUse = false, RegularUse = true } DebugType;
412412

413413
void ReadRegister(MCRegister Reg, MachineInstr &Reader, DebugType DT);
414+
void readSuccessorLiveIns(const MachineBasicBlock &MBB);
414415
void ForwardCopyPropagateBlock(MachineBasicBlock &MBB);
415416
void BackwardCopyPropagateBlock(MachineBasicBlock &MBB);
416417
void EliminateSpillageCopies(MachineBasicBlock &MBB);
@@ -463,6 +464,22 @@ void MachineCopyPropagation::ReadRegister(MCRegister Reg, MachineInstr &Reader,
463464
}
464465
}
465466

467+
void MachineCopyPropagation::readSuccessorLiveIns(
468+
const MachineBasicBlock &MBB) {
469+
if (MaybeDeadCopies.empty())
470+
return;
471+
472+
// If a copy result is livein to a successor, it is not dead.
473+
for (const MachineBasicBlock *Succ : MBB.successors()) {
474+
for (const auto &LI : Succ->liveins()) {
475+
for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) {
476+
if (MachineInstr *Copy = Tracker.findCopyForUnit(Unit, *TRI))
477+
MaybeDeadCopies.remove(Copy);
478+
}
479+
}
480+
}
481+
}
482+
466483
/// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
467484
/// This fact may have been obscured by sub register usage or may not be true at
468485
/// all even though Src and Def are subregisters of the registers used in
@@ -914,10 +931,17 @@ void MachineCopyPropagation::ForwardCopyPropagateBlock(MachineBasicBlock &MBB) {
914931
Tracker.clobberRegister(Reg, *TRI, *TII, UseCopyInstr);
915932
}
916933

917-
// If MBB doesn't have successors, delete the copies whose defs are not used.
918-
// If MBB does have successors, then conservative assume the defs are live-out
919-
// since we don't want to trust live-in lists.
920-
if (MBB.succ_empty()) {
934+
bool TracksLiveness = MRI->tracksLiveness();
935+
936+
// If liveness is tracked, we can use the live-in lists to know which
937+
// copies aren't dead.
938+
if (TracksLiveness)
939+
readSuccessorLiveIns(MBB);
940+
941+
// If MBB doesn't have succesor, delete copies whose defs are not used.
942+
// If MBB does have successors, we can only delete copies if we are able to
943+
// use liveness information from successors to confirm they are really dead.
944+
if (MBB.succ_empty() || TracksLiveness) {
921945
for (MachineInstr *MaybeDead : MaybeDeadCopies) {
922946
LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
923947
MaybeDead->dump());

‎llvm/test/CodeGen/AArch64/machine-cp-sub-reg.mir‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@ body: |
1010
; CHECK-NEXT: successors: %bb.1(0x80000000)
1111
; CHECK-NEXT: liveins: $w0
1212
; CHECK-NEXT: {{ $}}
13-
; CHECK-NEXT: $x8 = ORRXrs $xzr, $x0, 0, implicit $w0
1413
; CHECK-NEXT: $w8 = ORRWrs $wzr, $w0, 0, implicit-def $x8
1514
; CHECK-NEXT: {{ $}}
1615
; CHECK-NEXT: bb.1:

‎llvm/test/CodeGen/AArch64/ragreedy-local-interval-cost.ll‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -147,10 +147,10 @@ define dso_local void @run_test() local_unnamed_addr uwtable {
147147
; CHECK-NEXT: mov v19.16b, v23.16b
148148
; CHECK-NEXT: mov v3.d[1], x20
149149
; CHECK-NEXT: mov v23.16b, v27.16b
150-
; CHECK-NEXT: mov v27.16b, v9.16b
151-
; CHECK-NEXT: mul x15, x4, x5
152150
; CHECK-NEXT: add v27.2d, v9.2d, v1.2d
151+
; CHECK-NEXT: mul x15, x4, x5
153152
; CHECK-NEXT: str q11, [sp, #80] // 16-byte Folded Spill
153+
; CHECK-NEXT: mov v11.16b, v15.16b
154154
; CHECK-NEXT: mov v4.d[1], x22
155155
; CHECK-NEXT: add v19.2d, v19.2d, v1.2d
156156
; CHECK-NEXT: add v7.2d, v7.2d, v1.2d
@@ -171,9 +171,7 @@ define dso_local void @run_test() local_unnamed_addr uwtable {
171171
; CHECK-NEXT: mov v10.16b, v26.16b
172172
; CHECK-NEXT: mov v14.d[1], x13
173173
; CHECK-NEXT: mov v22.16b, v31.16b
174-
; CHECK-NEXT: mov v20.16b, v8.16b
175174
; CHECK-NEXT: ldp q26, q31, [sp] // 32-byte Folded Reload
176-
; CHECK-NEXT: mov v11.16b, v15.16b
177175
; CHECK-NEXT: mov v0.d[1], x12
178176
; CHECK-NEXT: add v13.2d, v13.2d, v14.2d
179177
; CHECK-NEXT: add v31.2d, v31.2d, v14.2d

‎llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -477,7 +477,6 @@ define amdgpu_ps void @add_i32_varying(ptr addrspace(8) inreg %out, ptr addrspac
477477
; GFX1032-NEXT: s_cbranch_execz .LBB1_3
478478
; GFX1032-NEXT: ; %bb.2:
479479
; GFX1032-NEXT: v_mov_b32_e32 v0, s11
480-
; GFX1032-NEXT: s_mov_b32 s10, s11
481480
; GFX1032-NEXT: buffer_atomic_add v0, off, s[4:7], 0 glc
482481
; GFX1032-NEXT: .LBB1_3:
483482
; GFX1032-NEXT: s_waitcnt_depctr 0xffe3
@@ -615,7 +614,6 @@ define amdgpu_ps void @add_i32_varying(ptr addrspace(8) inreg %out, ptr addrspac
615614
; GFX1132-NEXT: s_cbranch_execz .LBB1_3
616615
; GFX1132-NEXT: ; %bb.2:
617616
; GFX1132-NEXT: v_mov_b32_e32 v0, s11
618-
; GFX1132-NEXT: s_mov_b32 s10, s11
619617
; GFX1132-NEXT: buffer_atomic_add_u32 v0, off, s[4:7], 0 glc
620618
; GFX1132-NEXT: .LBB1_3:
621619
; GFX1132-NEXT: s_or_b32 exec_lo, exec_lo, s9

‎llvm/test/CodeGen/PowerPC/stack-restore-with-setjmp.ll‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,9 +29,7 @@ define dso_local signext i32 @main(i32 signext %argc, ptr nocapture readnone %ar
2929
; CHECK-NEXT: nop
3030
; CHECK-NEXT: # kill: def $r3 killed $r3 killed $x3
3131
; CHECK-NEXT: cmpwi 3, 0
32-
; CHECK-NEXT: crmove 20, 10
3332
; CHECK-NEXT: crorc 20, 10, 2
34-
; CHECK-NEXT: crmove 21, 2
3533
; CHECK-NEXT: bc 4, 20, .LBB0_4
3634
; CHECK-NEXT: # %bb.2: # %if.end5
3735
; CHECK-NEXT: addis 3, 2, .L.str@toc@ha
@@ -76,11 +74,9 @@ define dso_local signext i32 @main(i32 signext %argc, ptr nocapture readnone %ar
7674
; BE-NEXT: addi 3, 31, 128
7775
; BE-NEXT: bl _setjmp
7876
; BE-NEXT: nop
79-
; BE-NEXT: crmove 20, 10
8077
; BE-NEXT: # kill: def $r3 killed $r3 killed $x3
8178
; BE-NEXT: cmpwi 3, 0
8279
; BE-NEXT: crorc 20, 10, 2
83-
; BE-NEXT: crmove 21, 2
8480
; BE-NEXT: bc 4, 20, .LBB0_4
8581
; BE-NEXT: # %bb.2: # %if.end5
8682
; BE-NEXT: addis 3, 2, .L.str@toc@ha

‎llvm/test/CodeGen/Thumb2/aligned-nonfallthrough.ll‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,9 +42,8 @@ define i64 @loopif(ptr nocapture readonly %x, i32 %y, i32 %n) {
4242
; CHECK-NEXT: cmp r2, #1
4343
; CHECK-NEXT: blt .LBB1_4
4444
; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph
45-
; CHECK-NEXT: mov lr, r2
46-
; CHECK-NEXT: mov r12, r0
4745
; CHECK-NEXT: dls lr, r2
46+
; CHECK-NEXT: mov r12, r0
4847
; CHECK-NEXT: movs r0, #0
4948
; CHECK-NEXT: movs r3, #0
5049
; CHECK-NEXT: .p2align 2

‎llvm/test/CodeGen/Thumb2/mve-gather-increment.ll‎

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -542,9 +542,7 @@ define arm_aapcs_vfpcc void @gather_inc_v8i16_simple(ptr noalias nocapture reado
542542
; CHECK-NEXT: .pad #28
543543
; CHECK-NEXT: sub sp, #28
544544
; CHECK-NEXT: cmp r2, #1
545-
; CHECK-NEXT: str r1, [sp, #4] @ 4-byte Spill
546-
; CHECK-NEXT: mov r1, r2
547-
; CHECK-NEXT: str r2, [sp, #8] @ 4-byte Spill
545+
; CHECK-NEXT: strd r1, r2, [sp, #4] @ 8-byte Folded Spill
548546
; CHECK-NEXT: blt .LBB11_5
549547
; CHECK-NEXT: @ %bb.1: @ %vector.ph.preheader
550548
; CHECK-NEXT: ldr r1, [sp, #8] @ 4-byte Reload
@@ -661,9 +659,7 @@ define arm_aapcs_vfpcc void @gather_inc_v8i16_complex(ptr noalias nocapture read
661659
; CHECK-NEXT: .pad #136
662660
; CHECK-NEXT: sub sp, #136
663661
; CHECK-NEXT: cmp r2, #1
664-
; CHECK-NEXT: str r1, [sp, #64] @ 4-byte Spill
665-
; CHECK-NEXT: mov r1, r2
666-
; CHECK-NEXT: str r2, [sp, #68] @ 4-byte Spill
662+
; CHECK-NEXT: strd r1, r2, [sp, #64] @ 8-byte Folded Spill
667663
; CHECK-NEXT: blt.w .LBB12_5
668664
; CHECK-NEXT: @ %bb.1: @ %vector.ph.preheader
669665
; CHECK-NEXT: ldr r1, [sp, #68] @ 4-byte Reload
@@ -952,11 +948,9 @@ define arm_aapcs_vfpcc void @gather_inc_v16i8_complex(ptr noalias nocapture read
952948
; CHECK-NEXT: vstrw.32 q1, [sp, #152] @ 16-byte Spill
953949
; CHECK-NEXT: vldrw.u32 q1, [sp, #296] @ 16-byte Reload
954950
; CHECK-NEXT: vstrw.32 q0, [sp, #168] @ 16-byte Spill
955-
; CHECK-NEXT: vmov q0, q2
956-
; CHECK-NEXT: vmov q3, q5
957-
; CHECK-NEXT: vadd.i32 q1, q1, r0
958951
; CHECK-NEXT: vldrw.u32 q0, [sp, #248] @ 16-byte Reload
959952
; CHECK-NEXT: vldrw.u32 q3, [sp, #216] @ 16-byte Reload
953+
; CHECK-NEXT: vadd.i32 q1, q1, r0
960954
; CHECK-NEXT: vstrw.32 q5, [sp, #120] @ 16-byte Spill
961955
; CHECK-NEXT: vadd.i32 q0, q0, r0
962956
; CHECK-NEXT: subs.w r11, r11, #16
@@ -1243,9 +1237,7 @@ define arm_aapcs_vfpcc void @gather_inc_v16i8_simple(ptr noalias nocapture reado
12431237
; CHECK-NEXT: .pad #64
12441238
; CHECK-NEXT: sub sp, #64
12451239
; CHECK-NEXT: cmp r2, #1
1246-
; CHECK-NEXT: str r1, [sp, #56] @ 4-byte Spill
1247-
; CHECK-NEXT: mov r1, r2
1248-
; CHECK-NEXT: str r2, [sp, #60] @ 4-byte Spill
1240+
; CHECK-NEXT: strd r1, r2, [sp, #56] @ 8-byte Folded Spill
12491241
; CHECK-NEXT: blt.w .LBB14_5
12501242
; CHECK-NEXT: @ %bb.1: @ %vector.ph.preheader
12511243
; CHECK-NEXT: adr r5, .LCPI14_3

‎llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -609,7 +609,6 @@ define dso_local void @arm_mat_mult_q15(ptr noalias nocapture readonly %A, ptr n
609609
; CHECK-NEXT: strd r0, r2, [sp, #24] @ 8-byte Folded Spill
610610
; CHECK-NEXT: cmp r3, #0
611611
; CHECK-NEXT: str r3, [sp, #8] @ 4-byte Spill
612-
; CHECK-NEXT: mov r0, r3
613612
; CHECK-NEXT: itt ne
614613
; CHECK-NEXT: ldrne r0, [sp, #136]
615614
; CHECK-NEXT: cmpne r0, #0

‎llvm/test/CodeGen/Thumb2/mve-laneinterleaving-reduct.ll‎

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -108,9 +108,7 @@ define void @correlate(ptr nocapture noundef readonly %ID, ptr nocapture noundef
108108
; CHECK-NEXT: .pad #12
109109
; CHECK-NEXT: sub sp, #12
110110
; CHECK-NEXT: cmp r3, #1
111-
; CHECK-NEXT: strd r0, r1, [sp] @ 8-byte Folded Spill
112-
; CHECK-NEXT: mov r1, r3
113-
; CHECK-NEXT: str r3, [sp, #8] @ 4-byte Spill
111+
; CHECK-NEXT: stm.w sp, {r0, r1, r3} @ 12-byte Folded Spill
114112
; CHECK-NEXT: blt .LBB4_12
115113
; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph
116114
; CHECK-NEXT: ldr r1, [sp, #48]

‎llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1062,9 +1062,8 @@ define arm_aapcs_vfpcc void @_Z37_arm_radix4_butterfly_inverse_f32_mvePK21arm_cf
10621062
; CHECK-NEXT: .pad #40
10631063
; CHECK-NEXT: sub sp, #40
10641064
; CHECK-NEXT: cmp r2, #8
1065-
; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill
10661065
; CHECK-NEXT: vstr s0, [sp] @ 4-byte Spill
1067-
; CHECK-NEXT: mov r1, r2
1066+
; CHECK-NEXT: str r1, [sp, #16] @ 4-byte Spill
10681067
; CHECK-NEXT: str r2, [sp, #4] @ 4-byte Spill
10691068
; CHECK-NEXT: blo .LBB7_9
10701069
; CHECK-NEXT: @ %bb.1:

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