@@ -207,7 +207,7 @@ namespace {
207207 }
208208
209209 private:
210- bool ReverseBranchCondition (BBInfo &BBI) const ;
210+ bool reverseBranchCondition (BBInfo &BBI) const ;
211211 bool ValidSimple (BBInfo &TrueBBI, unsigned &Dups,
212212 BranchProbability Prediction) const ;
213213 bool ValidTriangle (BBInfo &TrueBBI, BBInfo &FalseBBI,
@@ -501,10 +501,10 @@ static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
501501
502502// / Reverse the condition of the end of the block branch. Swap block's 'true'
503503// / and 'false' successors.
504- bool IfConverter::ReverseBranchCondition (BBInfo &BBI) const {
504+ bool IfConverter::reverseBranchCondition (BBInfo &BBI) const {
505505 DebugLoc dl; // FIXME: this is nowhere
506- if (!TII->ReverseBranchCondition (BBI.BrCond )) {
507- TII->RemoveBranch (*BBI.BB );
506+ if (!TII->reverseBranchCondition (BBI.BrCond )) {
507+ TII->removeBranch (*BBI.BB );
508508 TII->insertBranch (*BBI.BB , BBI.FalseBB , BBI.TrueBB , BBI.BrCond , dl);
509509 std::swap (BBI.TrueBB , BBI.FalseBB );
510510 return true ;
@@ -857,11 +857,11 @@ bool IfConverter::ValidForkedDiamond(
857857 if (!FalseBBI.IsBrReversible )
858858 return false ;
859859 FalseReversed = true ;
860- ReverseBranchCondition (FalseBBI);
860+ reverseBranchCondition (FalseBBI);
861861 }
862862 auto UnReverseOnExit = make_scope_exit ([&]() {
863863 if (FalseReversed)
864- ReverseBranchCondition (FalseBBI);
864+ reverseBranchCondition (FalseBBI);
865865 });
866866
867867 // Count duplicate instructions at the beginning of the true and false blocks.
@@ -955,7 +955,7 @@ void IfConverter::AnalyzeBranches(BBInfo &BBI) {
955955 !TII->analyzeBranch (*BBI.BB , BBI.TrueBB , BBI.FalseBB , BBI.BrCond );
956956 SmallVector<MachineOperand, 4 > RevCond (BBI.BrCond .begin (), BBI.BrCond .end ());
957957 BBI.IsBrReversible = (RevCond.size () == 0 ) ||
958- !TII->ReverseBranchCondition (RevCond);
958+ !TII->reverseBranchCondition (RevCond);
959959 BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr ;
960960
961961 if (BBI.BrCond .size ()) {
@@ -1113,10 +1113,10 @@ bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
11131113 SmallVector<MachineOperand, 4 > RevPred (Pred.begin (), Pred.end ());
11141114 SmallVector<MachineOperand, 4 > Cond (BBI.BrCond .begin (), BBI.BrCond .end ());
11151115 if (RevBranch) {
1116- if (TII->ReverseBranchCondition (Cond))
1116+ if (TII->reverseBranchCondition (Cond))
11171117 return false ;
11181118 }
1119- if (TII->ReverseBranchCondition (RevPred) ||
1119+ if (TII->reverseBranchCondition (RevPred) ||
11201120 !TII->SubsumesPredicate (Cond, RevPred))
11211121 return false ;
11221122 }
@@ -1202,7 +1202,7 @@ void IfConverter::AnalyzeBlock(
12021202
12031203 SmallVector<MachineOperand, 4 >
12041204 RevCond (BBI.BrCond .begin (), BBI.BrCond .end ());
1205- bool CanRevCond = !TII->ReverseBranchCondition (RevCond);
1205+ bool CanRevCond = !TII->reverseBranchCondition (RevCond);
12061206
12071207 unsigned Dups = 0 ;
12081208 unsigned Dups2 = 0 ;
@@ -1502,7 +1502,7 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
15021502 return false ;
15031503
15041504 if (Kind == ICSimpleFalse)
1505- if (TII->ReverseBranchCondition (Cond))
1505+ if (TII->reverseBranchCondition (Cond))
15061506 llvm_unreachable (" Unable to reverse branch condition!" );
15071507
15081508 // Initialize liveins to the first BB. These are potentiall redefined by
@@ -1517,7 +1517,7 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
15171517 DontKill.addLiveIns (NextMBB);
15181518
15191519 if (CvtMBB.pred_size () > 1 ) {
1520- BBI.NonPredSize -= TII->RemoveBranch (*BBI.BB );
1520+ BBI.NonPredSize -= TII->removeBranch (*BBI.BB );
15211521 // Copy instructions in the true block, predicate them, and add them to
15221522 // the entry block.
15231523 CopyAndPredicateBlock (BBI, *CvtBBI, Cond);
@@ -1530,7 +1530,7 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
15301530 PredicateBlock (*CvtBBI, CvtMBB.end (), Cond);
15311531
15321532 // Merge converted block into entry block.
1533- BBI.NonPredSize -= TII->RemoveBranch (*BBI.BB );
1533+ BBI.NonPredSize -= TII->removeBranch (*BBI.BB );
15341534 MergeBlocks (BBI, *CvtBBI);
15351535 }
15361536
@@ -1590,11 +1590,11 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
15901590 return false ;
15911591
15921592 if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1593- if (TII->ReverseBranchCondition (Cond))
1593+ if (TII->reverseBranchCondition (Cond))
15941594 llvm_unreachable (" Unable to reverse branch condition!" );
15951595
15961596 if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1597- if (ReverseBranchCondition (*CvtBBI)) {
1597+ if (reverseBranchCondition (*CvtBBI)) {
15981598 // BB has been changed, modify its predecessors (except for this
15991599 // one) so they don't get ifcvt'ed based on bad intel.
16001600 for (MachineBasicBlock *PBB : CvtMBB.predecessors ()) {
@@ -1629,7 +1629,7 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
16291629 }
16301630
16311631 if (CvtMBB.pred_size () > 1 ) {
1632- BBI.NonPredSize -= TII->RemoveBranch (*BBI.BB );
1632+ BBI.NonPredSize -= TII->removeBranch (*BBI.BB );
16331633 // Copy instructions in the true block, predicate them, and add them to
16341634 // the entry block.
16351635 CopyAndPredicateBlock (BBI, *CvtBBI, Cond, true );
@@ -1639,19 +1639,19 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
16391639 BBI.BB ->removeSuccessor (&CvtMBB, true );
16401640 } else {
16411641 // Predicate the 'true' block after removing its branch.
1642- CvtBBI->NonPredSize -= TII->RemoveBranch (CvtMBB);
1642+ CvtBBI->NonPredSize -= TII->removeBranch (CvtMBB);
16431643 PredicateBlock (*CvtBBI, CvtMBB.end (), Cond);
16441644
16451645 // Now merge the entry of the triangle with the true block.
1646- BBI.NonPredSize -= TII->RemoveBranch (*BBI.BB );
1646+ BBI.NonPredSize -= TII->removeBranch (*BBI.BB );
16471647 MergeBlocks (BBI, *CvtBBI, false );
16481648 }
16491649
16501650 // If 'true' block has a 'false' successor, add an exit branch to it.
16511651 if (HasEarlyExit) {
16521652 SmallVector<MachineOperand, 4 > RevCond (CvtBBI->BrCond .begin (),
16531653 CvtBBI->BrCond .end ());
1654- if (TII->ReverseBranchCondition (RevCond))
1654+ if (TII->reverseBranchCondition (RevCond))
16551655 llvm_unreachable (" Unable to reverse branch condition!" );
16561656
16571657 // Update the edge probability for both CvtBBI->FalseBB and NextBBI.
@@ -1744,7 +1744,7 @@ bool IfConverter::IfConvertDiamondCommon(
17441744 BBInfo *BBI1 = &TrueBBI;
17451745 BBInfo *BBI2 = &FalseBBI;
17461746 SmallVector<MachineOperand, 4 > RevCond (BBI.BrCond .begin (), BBI.BrCond .end ());
1747- if (TII->ReverseBranchCondition (RevCond))
1747+ if (TII->reverseBranchCondition (RevCond))
17481748 llvm_unreachable (" Unable to reverse branch condition!" );
17491749 SmallVector<MachineOperand, 4 > *Cond1 = &BBI.BrCond ;
17501750 SmallVector<MachineOperand, 4 > *Cond2 = &RevCond;
@@ -1764,7 +1764,7 @@ bool IfConverter::IfConvertDiamondCommon(
17641764 }
17651765
17661766 // Remove the conditional branch from entry to the blocks.
1767- BBI.NonPredSize -= TII->RemoveBranch (*BBI.BB );
1767+ BBI.NonPredSize -= TII->removeBranch (*BBI.BB );
17681768
17691769 MachineBasicBlock &MBB1 = *BBI1->BB ;
17701770 MachineBasicBlock &MBB2 = *BBI2->BB ;
@@ -1819,7 +1819,7 @@ bool IfConverter::IfConvertDiamondCommon(
18191819 if (!BBI1->IsBrAnalyzable )
18201820 verifySameBranchInstructions (&MBB1, &MBB2);
18211821#endif
1822- BBI1->NonPredSize -= TII->RemoveBranch (*BBI1->BB );
1822+ BBI1->NonPredSize -= TII->removeBranch (*BBI1->BB );
18231823 // Remove duplicated instructions.
18241824 DI1 = MBB1.end ();
18251825 for (unsigned i = 0 ; i != NumDups2; ) {
@@ -1841,7 +1841,7 @@ bool IfConverter::IfConvertDiamondCommon(
18411841 // The branches have been checked to match. Skip over the branch in the false
18421842 // block so that we don't try to predicate it.
18431843 if (RemoveBranch)
1844- BBI2->NonPredSize -= TII->RemoveBranch (*BBI2->BB );
1844+ BBI2->NonPredSize -= TII->removeBranch (*BBI2->BB );
18451845 else {
18461846 do {
18471847 assert (DI2 != MBB2.begin ());
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