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1 parent 8625df4 commit 15a9d34Copy full SHA for 15a9d34
llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
@@ -2378,6 +2378,19 @@ SILoadStoreOptimizer::collectMergeableInsts(
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if (Swizzled != -1 && MI.getOperand(Swizzled).getImm())
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continue;
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+ if (InstClass == TBUFFER_LOAD || InstClass == TBUFFER_STORE) {
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+ const MachineOperand *Fmt =
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+ TII->getNamedOperand(MI, AMDGPU::OpName::format);
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+ if (!Fmt) {
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+ LLVM_DEBUG(dbgs() << "Skip tbuffer without format operand: " << MI);
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+ continue;
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+ }
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+ if (!AMDGPU::getGcnBufferFormatInfo(Fmt->getImm(), *STM)) {
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+ LLVM_DEBUG(dbgs() << "Skip tbuffer with unknown format: " << MI);
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+
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CombineInfo CI;
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CI.setMI(MI, *this);
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CI.Order = Order++;
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