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mahesh-attardemattardeRKSimon
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[X86][GlobalIsel] support G_FABS (#136718)
Adds support for G_FABS for f80. --------- Co-authored-by: mattarde <[email protected]> Co-authored-by: Simon Pilgrim <[email protected]>
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4 files changed

+133
-16
lines changed

4 files changed

+133
-16
lines changed

‎llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp‎

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -95,6 +95,8 @@ class X86InstructionSelector : public InstructionSelector {
9595
MachineFunction &MF) const;
9696
bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
9797
MachineFunction &MF) const;
98+
bool selectFAbs(MachineInstr &I, MachineRegisterInfo &MRI,
99+
MachineFunction &MF) const;
98100
bool selectUAddSub(MachineInstr &I, MachineRegisterInfo &MRI,
99101
MachineFunction &MF) const;
100102
bool selectDebugInstr(MachineInstr &I, MachineRegisterInfo &MRI) const;
@@ -391,6 +393,8 @@ bool X86InstructionSelector::select(MachineInstr &I) {
391393
switch (I.getOpcode()) {
392394
default:
393395
return false;
396+
case TargetOpcode::G_FABS:
397+
return selectFAbs(I, MRI, MF);
394398
case TargetOpcode::G_STORE:
395399
case TargetOpcode::G_LOAD:
396400
return selectLoadStoreOp(I, MRI, MF);
@@ -1050,6 +1054,35 @@ bool X86InstructionSelector::selectCmp(MachineInstr &I,
10501054
I.eraseFromParent();
10511055
return true;
10521056
}
1057+
bool X86InstructionSelector::selectFAbs(MachineInstr &I,
1058+
MachineRegisterInfo &MRI,
1059+
MachineFunction &MF) const {
1060+
assert((I.getOpcode() == TargetOpcode::G_FABS) && "unexpected instruction");
1061+
Register SrcReg = I.getOperand(1).getReg();
1062+
Register DstReg = I.getOperand(0).getReg();
1063+
LLT Ty = MRI.getType(SrcReg);
1064+
unsigned OpAbs;
1065+
const TargetRegisterClass *DstRC;
1066+
switch (Ty.getSizeInBits()) {
1067+
default:
1068+
return false;
1069+
case 32:
1070+
OpAbs = X86::ABS_Fp32;
1071+
DstRC = &X86::FR32RegClass;
1072+
break;
1073+
case 64:
1074+
OpAbs = X86::ABS_Fp64;
1075+
DstRC = &X86::FR64RegClass;
1076+
break;
1077+
}
1078+
MRI.setRegClass(DstReg, DstRC);
1079+
MachineInstr &FAbsInst =
1080+
*BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(OpAbs), DstReg)
1081+
.addReg(SrcReg);
1082+
constrainSelectedInstRegOperands(FAbsInst, TII, TRI, RBI);
1083+
I.eraseFromParent();
1084+
return true;
1085+
}
10531086

10541087
bool X86InstructionSelector::selectFCmp(MachineInstr &I,
10551088
MachineRegisterInfo &MRI,

‎llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -418,6 +418,10 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
418418
.legalFor(HasAVX512, {v16s32, v8s64})
419419
.legalFor(UseX87, {s80});
420420

421+
getActionDefinitionsBuilder(G_FABS)
422+
.legalFor(UseX87 && !HasSSE2 && !HasSSE1, {s64, s80})
423+
.lower();
424+
421425
// fp comparison
422426
getActionDefinitionsBuilder(G_FCMP)
423427
.legalFor(HasSSE1 || UseX87, {s8, s32})

‎llvm/test/CodeGen/X86/isel-fabs-x87.ll‎

Lines changed: 43 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,48 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
22
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64
3-
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
4-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86
5-
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-ISEL
6+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X86,Fast-ISEL
7+
; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=0 | FileCheck %s --check-prefixes=X86,GISEL-ISEL
8+
9+
define void @test_float_abs(ptr %argptr) {
10+
; SDAG-ISEL-LABEL: test_float_abs:
11+
; SDAG-ISEL: # %bb.0:
12+
; SDAG-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
13+
; SDAG-ISEL-NEXT: andb $127, 3(%eax)
14+
; SDAG-ISEL-NEXT: retl
15+
;
16+
; Fast-ISEL-LABEL: test_float_abs:
17+
; Fast-ISEL: # %bb.0:
18+
; Fast-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
19+
; Fast-ISEL-NEXT: andb $127, 3(%eax)
20+
; Fast-ISEL-NEXT: retl
21+
;
22+
; GISEL-ISEL-LABEL: test_float_abs:
23+
; GISEL-ISEL: # %bb.0:
24+
; GISEL-ISEL-NEXT: movl {{[0-9]+}}(%esp), %eax
25+
; GISEL-ISEL-NEXT: andl $2147483647, (%eax) # imm = 0x7FFFFFFF
26+
; GISEL-ISEL-NEXT: retl
27+
%arg = load float, float* %argptr
28+
%abs = tail call float @llvm.fabs.f32(float %arg)
29+
store float %abs, ptr %argptr
30+
ret void
31+
}
32+
33+
define void @test_double_abs(ptr %argptr) {
34+
; X86-LABEL: test_double_abs:
35+
; X86: # %bb.0:
36+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
37+
; X86-NEXT: fldl (%eax)
38+
; X86-NEXT: fabs
39+
; X86-NEXT: fstpl (%eax)
40+
; X86-NEXT: retl
41+
%arg = load double, double* %argptr
42+
%abs = tail call double @llvm.fabs.f64(double %arg)
43+
store double %abs, double* %argptr
44+
ret void
45+
}
646

747
define x86_fp80 @test_x86_fp80_abs(x86_fp80 %arg) {
848
; X64-LABEL: test_x86_fp80_abs:

‎llvm/test/CodeGen/X86/isel-fabs.ll‎

Lines changed: 53 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1,37 +1,61 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2-
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 | FileCheck %s --check-prefixes=X64
3-
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
4-
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s --check-prefixes=X86
5-
; RUN: llc < %s -mtriple=i686-- -mattr=-x87 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
2+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X64
3+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
4+
; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
5+
; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X86
6+
; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
7+
; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
68

7-
8-
define float @test_float_abs(float %arg) {
9+
define float @test_float_abs(float %arg) nounwind {
910
; X64-LABEL: test_float_abs:
1011
; X64: # %bb.0:
1112
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1213
; X64-NEXT: retq
1314
;
15+
; GISEL-X64-LABEL: test_float_abs:
16+
; GISEL-X64: # %bb.0:
17+
; GISEL-X64-NEXT: movd %xmm0, %eax
18+
; GISEL-X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
19+
; GISEL-X64-NEXT: movd %eax, %xmm0
20+
; GISEL-X64-NEXT: retq
21+
;
1422
; X86-LABEL: test_float_abs:
1523
; X86: # %bb.0:
16-
; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
17-
; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
24+
; X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
25+
; X86-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
26+
; X86-NEXT: movd %xmm0, %eax
1827
; X86-NEXT: retl
1928
;
2029
; FASTISEL-X86-LABEL: test_float_abs:
2130
; FASTISEL-X86: # %bb.0:
22-
; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
23-
; FASTISEL-X86-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
31+
; FASTISEL-X86-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
32+
; FASTISEL-X86-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
33+
; FASTISEL-X86-NEXT: movd %xmm0, %eax
2434
; FASTISEL-X86-NEXT: retl
35+
;
36+
; GISEL-X86-LABEL: test_float_abs:
37+
; GISEL-X86: # %bb.0:
38+
; GISEL-X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
39+
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
40+
; GISEL-X86-NEXT: retl
2541
%abs = tail call float @llvm.fabs.f32(float %arg)
2642
ret float %abs
2743
}
2844

29-
define double @test_double_abs(double %arg) {
45+
define double @test_double_abs(double %arg) nounwind {
3046
; X64-LABEL: test_double_abs:
3147
; X64: # %bb.0:
3248
; X64-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
3349
; X64-NEXT: retq
3450
;
51+
; GISEL-X64-LABEL: test_double_abs:
52+
; GISEL-X64: # %bb.0:
53+
; GISEL-X64-NEXT: movabsq $9223372036854775807, %rax # imm = 0x7FFFFFFFFFFFFFFF
54+
; GISEL-X64-NEXT: movq %xmm0, %rcx
55+
; GISEL-X64-NEXT: andq %rax, %rcx
56+
; GISEL-X64-NEXT: movq %rcx, %xmm0
57+
; GISEL-X64-NEXT: retq
58+
;
3559
; X86-LABEL: test_double_abs:
3660
; X86: # %bb.0:
3761
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
@@ -41,10 +65,26 @@ define double @test_double_abs(double %arg) {
4165
;
4266
; FASTISEL-X86-LABEL: test_double_abs:
4367
; FASTISEL-X86: # %bb.0:
68+
; FASTISEL-X86-NEXT: pushl %ebp
69+
; FASTISEL-X86-NEXT: movl %esp, %ebp
70+
; FASTISEL-X86-NEXT: andl $-8, %esp
71+
; FASTISEL-X86-NEXT: subl $8, %esp
72+
; FASTISEL-X86-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
73+
; FASTISEL-X86-NEXT: andps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
74+
; FASTISEL-X86-NEXT: movlps %xmm0, (%esp)
75+
; FASTISEL-X86-NEXT: movl (%esp), %eax
4476
; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %edx
45-
; FASTISEL-X86-NEXT: movl {{[0-9]+}}(%esp), %eax
46-
; FASTISEL-X86-NEXT: andl $2147483647, %edx # imm = 0x7FFFFFFF
77+
; FASTISEL-X86-NEXT: movl %ebp, %esp
78+
; FASTISEL-X86-NEXT: popl %ebp
4779
; FASTISEL-X86-NEXT: retl
80+
;
81+
; GISEL-X86-LABEL: test_double_abs:
82+
; GISEL-X86: # %bb.0:
83+
; GISEL-X86-NEXT: movl $-1, %eax
84+
; GISEL-X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
85+
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %eax
86+
; GISEL-X86-NEXT: andl {{[0-9]+}}(%esp), %edx
87+
; GISEL-X86-NEXT: retl
4888
%abs = tail call double @llvm.fabs.f64(double %arg)
4989
ret double %abs
5090
}

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