diff --git a/clang/include/clang/CIR/Dialect/IR/CIROps.td b/clang/include/clang/CIR/Dialect/IR/CIROps.td index a277366f75e6..267ad6500736 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIROps.td +++ b/clang/include/clang/CIR/Dialect/IR/CIROps.td @@ -2596,13 +2596,13 @@ def CIR_VTableAddrPointOp : CIR_Op<"vtable.address_point",[ (as specified by Itanium ABI), and `address_point.offset` (address point index) the actual address point within that vtable. - The return type is always a `!cir.ptr i32>>`. + The return type is always a `!cir.ptr`. Example: ```mlir cir.global linkonce_odr @_ZTV1B = ... ... - %3 = cir.vtable.address_point(@_ZTV1B, address_point = ) : !cir.ptr i32>> + %3 = cir.vtable.address_point(@_ZTV1B, address_point = ) : !cir.vtable_ptr ``` }]; diff --git a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td index 19057ae80c9b..d09e3d22b791 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td +++ b/clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td @@ -263,13 +263,21 @@ def CIR_PtrToExceptionInfoType def CIR_AnyDataMemberType : CIR_TypeBase<"::cir::DataMemberType", "data member type">; +//===----------------------------------------------------------------------===// +// VTable type predicates +//===----------------------------------------------------------------------===// + +def CIR_AnyVTableType : CIR_TypeBase<"::cir::VTableType", + "vtable type">; + + //===----------------------------------------------------------------------===// // Scalar Type predicates //===----------------------------------------------------------------------===// defvar CIR_ScalarTypes = [ CIR_AnyBoolType, CIR_AnyIntType, CIR_AnyFloatType, CIR_AnyPtrType, - CIR_AnyDataMemberType + CIR_AnyDataMemberType, CIR_AnyVTableType ]; def CIR_AnyScalarType : AnyTypeOf { diff --git a/clang/include/clang/CIR/Dialect/IR/CIRTypes.td b/clang/include/clang/CIR/Dialect/IR/CIRTypes.td index 47cb8a302465..4cd3b37bc9a5 100644 --- a/clang/include/clang/CIR/Dialect/IR/CIRTypes.td +++ b/clang/include/clang/CIR/Dialect/IR/CIRTypes.td @@ -343,6 +343,22 @@ def CIR_DataMemberType : CIR_Type<"DataMember", "data_member", }]; } +//===----------------------------------------------------------------------===// +// CIR_VTableType +//===----------------------------------------------------------------------===// + +def CIR_VTableType : CIR_Type<"VTable", "vtable", + [DeclareTypeInterfaceMethods]> { + + let summary = "CIR type that is used for pointers that point to a C++ vtable"; + let description = [{ + `cir.vtable` is a special type used as the pointee type for pointers to + vtables. This avoids using arbitrary pointer types to declare vtable + pointer values. + }]; +} + + //===----------------------------------------------------------------------===// // BoolType //===----------------------------------------------------------------------===// @@ -751,7 +767,8 @@ def CIRRecordType : Type< def CIR_AnyType : AnyTypeOf<[ CIR_IntType, CIR_PointerType, CIR_DataMemberType, CIR_MethodType, CIR_BoolType, CIR_ArrayType, CIR_VectorType, CIR_FuncType, CIR_VoidType, - CIR_RecordType, CIR_ExceptionType, CIR_AnyFloatType, CIR_ComplexType + CIR_RecordType, CIR_ExceptionType, CIR_AnyFloatType, CIR_ComplexType, + CIR_VTableType ]>; #endif // MLIR_CIR_DIALECT_CIR_TYPES diff --git a/clang/lib/CIR/CodeGen/CIRGenBuilder.h b/clang/lib/CIR/CodeGen/CIRGenBuilder.h index aaeaa3ea5701..bda7f8c845c3 100644 --- a/clang/lib/CIR/CodeGen/CIRGenBuilder.h +++ b/clang/lib/CIR/CodeGen/CIRGenBuilder.h @@ -424,12 +424,8 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy { llvm_unreachable("unsupported long double format"); } - mlir::Type getVirtualFnPtrType(bool isVarArg = false) { - // FIXME: replay LLVM codegen for now, perhaps add a vtable ptr special - // type so it's a bit more clear and C++ idiomatic. - auto fnTy = cir::FuncType::get({}, getUInt32Ty(), isVarArg); - assert(!cir::MissingFeatures::isVarArg()); - return getPointerTo(getPointerTo(fnTy)); + mlir::Type getVirtualFnPtrType() { + return cir::PointerType::get(cir::VTableType::get(getContext())); } cir::FuncType getFuncType(llvm::ArrayRef params, mlir::Type retTy, diff --git a/clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp b/clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp index 82f676cf3632..3844a12d8ec4 100644 --- a/clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp +++ b/clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp @@ -1007,7 +1007,7 @@ CIRGenItaniumCXXABI::getVTableAddressPoint(BaseSubobject Base, .getAddressPoint(Base); auto &builder = CGM.getBuilder(); - auto vtablePtrTy = builder.getVirtualFnPtrType(/*isVarArg=*/false); + auto vtablePtrTy = builder.getVirtualFnPtrType(); return builder.create( CGM.getLoc(VTableClass->getSourceRange()), vtablePtrTy, diff --git a/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp b/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp index c4edbee33dea..035e33412f77 100644 --- a/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp +++ b/clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp @@ -488,8 +488,6 @@ void CIRRecordLowering::accumulateVPtrs() { } mlir::Type CIRRecordLowering::getVFPtrType() { - // FIXME: replay LLVM codegen for now, perhaps add a vtable ptr special - // type so it's a bit more clear and C++ idiomatic. return builder.getVirtualFnPtrType(); } diff --git a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp index 18ef47095e6e..cd6d856b47b5 100644 --- a/clang/lib/CIR/Dialect/IR/CIRDialect.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRDialect.cpp @@ -2423,10 +2423,7 @@ LogicalResult cir::VTableAddrPointOp::verify() { return success(); auto resultType = getAddr().getType(); - auto intTy = cir::IntType::get(getContext(), 32, /*isSigned=*/false); - auto fnTy = cir::FuncType::get({}, intTy); - - auto resTy = cir::PointerType::get(cir::PointerType::get(fnTy)); + auto resTy = cir::PointerType::get(cir::VTableType::get(getContext())); if (resultType != resTy) return emitOpError("result type must be '") diff --git a/clang/lib/CIR/Dialect/IR/CIRTypes.cpp b/clang/lib/CIR/Dialect/IR/CIRTypes.cpp index 09ad0f3b9f51..ceb6dcf687e8 100644 --- a/clang/lib/CIR/Dialect/IR/CIRTypes.cpp +++ b/clang/lib/CIR/Dialect/IR/CIRTypes.cpp @@ -407,6 +407,20 @@ DataMemberType::getABIAlignment(const ::mlir::DataLayout &dataLayout, return 8; } +llvm::TypeSize +VTableType::getTypeSizeInBits(const ::mlir::DataLayout &dataLayout, + ::mlir::DataLayoutEntryListRef params) const { + // FIXME: consider size differences under different ABIs + return llvm::TypeSize::getFixed(64); +} + +uint64_t +VTableType::getABIAlignment(const ::mlir::DataLayout &dataLayout, + ::mlir::DataLayoutEntryListRef params) const { + // FIXME: consider alignment differences under different ABIs + return 8; +} + llvm::TypeSize ArrayType::getTypeSizeInBits(const ::mlir::DataLayout &dataLayout, ::mlir::DataLayoutEntryListRef params) const { diff --git a/clang/test/CIR/CodeGen/dtors.cpp b/clang/test/CIR/CodeGen/dtors.cpp index 4a001680aea3..dc2f57cdb463 100644 --- a/clang/test/CIR/CodeGen/dtors.cpp +++ b/clang/test/CIR/CodeGen/dtors.cpp @@ -36,7 +36,7 @@ class B : public A }; // Class A -// CHECK: ![[ClassA:rec_.*]] = !cir.record !u32i>>>} #cir.record.decl.ast> +// CHECK: ![[ClassA:rec_.*]] = !cir.record} #cir.record.decl.ast> // Class B // CHECK: ![[ClassB:rec_.*]] = !cir.record diff --git a/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp b/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp index ba2b56ebf2ea..06171b304998 100644 --- a/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp +++ b/clang/test/CIR/CodeGen/dynamic-cast-exact.cpp @@ -16,10 +16,10 @@ struct Derived final : Base1 {}; Derived *ptr_cast(Base1 *ptr) { return dynamic_cast(ptr); // CHECK: %[[#SRC:]] = cir.load{{.*}} %{{.+}} : !cir.ptr>, !cir.ptr - // CHECK-NEXT: %[[#EXPECTED_VPTR:]] = cir.vtable.address_point(@_ZTV7Derived, address_point = ) : !cir.ptr !u32i>>> - // CHECK-NEXT: %[[#SRC_VPTR_PTR:]] = cir.cast(bitcast, %[[#SRC]] : !cir.ptr), !cir.ptr !u32i>>>> - // CHECK-NEXT: %[[#SRC_VPTR:]] = cir.load{{.*}} %[[#SRC_VPTR_PTR]] : !cir.ptr !u32i>>>>, !cir.ptr !u32i>>> - // CHECK-NEXT: %[[#SUCCESS:]] = cir.cmp(eq, %[[#SRC_VPTR]], %[[#EXPECTED_VPTR]]) : !cir.ptr !u32i>>>, !cir.bool + // CHECK-NEXT: %[[#EXPECTED_VPTR:]] = cir.vtable.address_point(@_ZTV7Derived, address_point = ) : !cir.ptr + // CHECK-NEXT: %[[#SRC_VPTR_PTR:]] = cir.cast(bitcast, %[[#SRC]] : !cir.ptr), !cir.ptr> + // CHECK-NEXT: %[[#SRC_VPTR:]] = cir.load{{.*}} %[[#SRC_VPTR_PTR]] : !cir.ptr>, !cir.ptr + // CHECK-NEXT: %[[#SUCCESS:]] = cir.cmp(eq, %[[#SRC_VPTR]], %[[#EXPECTED_VPTR]]) : !cir.ptr, !cir.bool // CHECK-NEXT: %{{.+}} = cir.ternary(%[[#SUCCESS]], true { // CHECK-NEXT: %[[#RES:]] = cir.cast(bitcast, %[[#SRC]] : !cir.ptr), !cir.ptr // CHECK-NEXT: cir.yield %[[#RES]] : !cir.ptr @@ -39,10 +39,10 @@ Derived *ptr_cast(Base1 *ptr) { Derived &ref_cast(Base1 &ref) { return dynamic_cast(ref); // CHECK: %[[#SRC:]] = cir.load{{.*}} %{{.+}} : !cir.ptr>, !cir.ptr - // CHECK-NEXT: %[[#EXPECTED_VPTR:]] = cir.vtable.address_point(@_ZTV7Derived, address_point = ) : !cir.ptr !u32i>>> - // CHECK-NEXT: %[[#SRC_VPTR_PTR:]] = cir.cast(bitcast, %[[#SRC]] : !cir.ptr), !cir.ptr !u32i>>>> - // CHECK-NEXT: %[[#SRC_VPTR:]] = cir.load{{.*}} %[[#SRC_VPTR_PTR]] : !cir.ptr !u32i>>>>, !cir.ptr !u32i>>> - // CHECK-NEXT: %[[#SUCCESS:]] = cir.cmp(eq, %[[#SRC_VPTR]], %[[#EXPECTED_VPTR]]) : !cir.ptr !u32i>>>, !cir.bool + // CHECK-NEXT: %[[#EXPECTED_VPTR:]] = cir.vtable.address_point(@_ZTV7Derived, address_point = ) : !cir.ptr + // CHECK-NEXT: %[[#SRC_VPTR_PTR:]] = cir.cast(bitcast, %[[#SRC]] : !cir.ptr), !cir.ptr> + // CHECK-NEXT: %[[#SRC_VPTR:]] = cir.load{{.*}} %[[#SRC_VPTR_PTR]] : !cir.ptr>, !cir.ptr + // CHECK-NEXT: %[[#SUCCESS:]] = cir.cmp(eq, %[[#SRC_VPTR]], %[[#EXPECTED_VPTR]]) : !cir.ptr, !cir.bool // CHECK-NEXT: %[[#FAILED:]] = cir.unary(not, %[[#SUCCESS]]) : !cir.bool, !cir.bool // CHECK-NEXT: cir.if %[[#FAILED]] { // CHECK-NEXT: cir.call @__cxa_bad_cast() : () -> () diff --git a/clang/test/CIR/CodeGen/dynamic-cast.cpp b/clang/test/CIR/CodeGen/dynamic-cast.cpp index 715a129d31df..106563dda51b 100644 --- a/clang/test/CIR/CodeGen/dynamic-cast.cpp +++ b/clang/test/CIR/CodeGen/dynamic-cast.cpp @@ -1,5 +1,7 @@ -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -fclangir -emit-cir -mmlir --mlir-print-ir-before=cir-lowering-prepare %s -o %t.cir 2>&1 | FileCheck %s -check-prefix=BEFORE -// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -fclangir -emit-cir -mmlir --mlir-print-ir-after=cir-lowering-prepare %s -o %t.cir 2>&1 | FileCheck %s -check-prefix=AFTER +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -fclangir -emit-cir -mmlir --mlir-print-ir-before=cir-lowering-prepare %s -o %t.cir 2> %t.before.log +// RUN: FileCheck %s --input-file=%t.before.log -check-prefix=BEFORE +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -fclangir -emit-cir -mmlir --mlir-print-ir-after=cir-lowering-prepare %s -o %t.cir 2> %t.after.log +// RUN: FileCheck %s --input-file=%t.after.log -check-prefix=AFTER struct Base { virtual ~Base(); @@ -7,9 +9,9 @@ struct Base { struct Derived : Base {}; -// BEFORE: #dyn_cast_info__ZTI4Base__ZTI7Derived = #cir.dyn_cast_info<#cir.global_view<@_ZTI4Base> : !cir.ptr, #cir.global_view<@_ZTI7Derived> : !cir.ptr, @__dynamic_cast, @__cxa_bad_cast, #cir.int<0> : !s64i> -// BEFORE: !rec_Base = !cir.record -// BEFORE: !rec_Derived = !cir.record +// BEFORE-DAG: #dyn_cast_info__ZTI4Base__ZTI7Derived = #cir.dyn_cast_info<#cir.global_view<@_ZTI4Base> : !cir.ptr, #cir.global_view<@_ZTI7Derived> : !cir.ptr, @__dynamic_cast, @__cxa_bad_cast, #cir.int<0> : !s64i> +// BEFORE-DAG: !rec_Base = !cir.record +// BEFORE-DAG: !rec_Derived = !cir.record Derived *ptr_cast(Base *b) { return dynamic_cast(b); diff --git a/clang/test/CIR/CodeGen/multi-vtable.cpp b/clang/test/CIR/CodeGen/multi-vtable.cpp index 4f49d43814e6..ed44562af88e 100644 --- a/clang/test/CIR/CodeGen/multi-vtable.cpp +++ b/clang/test/CIR/CodeGen/multi-vtable.cpp @@ -29,19 +29,19 @@ int main() { return 0; } -// CIR: ![[VTypeInfoA:rec_.*]] = !cir.record, !cir.ptr}> -// CIR: ![[VTypeInfoB:rec_.*]] = !cir.record, !cir.ptr, !u32i, !u32i, !cir.ptr, !s64i, !cir.ptr, !s64i}> -// CIR: ![[VTableTypeMother:rec_.*]] = !cir.record x 4>}> -// CIR: ![[VTableTypeFather:rec_.*]] = !cir.record x 3>}> -// CIR: ![[VTableTypeChild:rec_.*]] = !cir.record x 4>, !cir.array x 3>}> -// CIR: !rec_Father = !cir.record !u32i>>>} #cir.record.decl.ast> -// CIR: !rec_Mother = !cir.record !u32i>>>} #cir.record.decl.ast> -// CIR: !rec_Child = !cir.record +// CIR-DAG: ![[VTypeInfoA:rec_.*]] = !cir.record, !cir.ptr}> +// CIR-DAG: ![[VTypeInfoB:rec_.*]] = !cir.record, !cir.ptr, !u32i, !u32i, !cir.ptr, !s64i, !cir.ptr, !s64i}> +// CIR-DAG: ![[VTableTypeMother:rec_.*]] = !cir.record x 4>}> +// CIR-DAG: ![[VTableTypeFather:rec_.*]] = !cir.record x 3>}> +// CIR-DAG: ![[VTableTypeChild:rec_.*]] = !cir.record x 4>, !cir.array x 3>}> +// CIR-DAG: !rec_Father = !cir.record} #cir.record.decl.ast> +// CIR-DAG: !rec_Mother = !cir.record} #cir.record.decl.ast> +// CIR-DAG: !rec_Child = !cir.record // CIR: cir.func linkonce_odr @_ZN6MotherC2Ev(%arg0: !cir.ptr -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV6Mother, address_point = ) : !cir.ptr !u32i>>> -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %2, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV6Mother, address_point = ) : !cir.ptr +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %2, %{{[0-9]+}} : !cir.ptr, !cir.ptr> // CIR: cir.return // CIR: } @@ -52,13 +52,13 @@ int main() { // LLVM-DAG: } // CIR: cir.func linkonce_odr @_ZN5ChildC2Ev(%arg0: !cir.ptr -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = ) : !cir.ptr !u32i>>> -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = ) : !cir.ptr !u32i>>> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = ) : !cir.ptr +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = ) : !cir.ptr // CIR: %7 = cir.base_class_addr %1 : !cir.ptr nonnull [8] -> !cir.ptr -// CIR: %8 = cir.cast(bitcast, %7 : !cir.ptr), !cir.ptr !u32i>>>> loc(#loc8) -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CIR: %8 = cir.cast(bitcast, %7 : !cir.ptr), !cir.ptr> loc(#loc8) +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> // CIR: cir.return // CIR: } diff --git a/clang/test/CIR/CodeGen/tbaa-vptr.cpp b/clang/test/CIR/CodeGen/tbaa-vptr.cpp index 4a460b9760ca..8f646e2d6565 100644 --- a/clang/test/CIR/CodeGen/tbaa-vptr.cpp +++ b/clang/test/CIR/CodeGen/tbaa-vptr.cpp @@ -9,7 +9,7 @@ // NO-TBAA-NOT: !tbaa -// CIR: #tbaa[[VPTR:.*]] = #cir.tbaa_vptr !u32i>>>> +// CIR: #tbaa[[VPTR:.*]] = #cir.tbaa_vptr> struct Member { ~Member(); @@ -26,7 +26,7 @@ struct B : A { B::~B() { } // CIR-LABEL: _ZN1BD2Ev -// CIR: cir.store{{.*}} %{{.*}}, %{{.*}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> tbaa(#tbaa[[VPTR]]) +// CIR: cir.store{{.*}} %{{.*}}, %{{.*}} : !cir.ptr, !cir.ptr> tbaa(#tbaa[[VPTR]]) // LLVM-LABEL: _ZN1BD2Ev // LLVM: store ptr getelementptr inbounds nuw (i8, ptr @_ZTV1B, i64 16), ptr %{{.*}}, align 8, !tbaa ![[TBAA_VPTR:.*]] diff --git a/clang/test/CIR/CodeGen/vtable-rtti.cpp b/clang/test/CIR/CodeGen/vtable-rtti.cpp index 80716ae0ad81..634f3939212d 100644 --- a/clang/test/CIR/CodeGen/vtable-rtti.cpp +++ b/clang/test/CIR/CodeGen/vtable-rtti.cpp @@ -20,19 +20,19 @@ class B : public A }; // Type info B. -// CHECK: ![[TypeInfoB:rec_.*]] = !cir.record, !cir.ptr, !cir.ptr}> +// CHECK-DAG: ![[TypeInfoB:rec_.*]] = !cir.record, !cir.ptr, !cir.ptr}> // vtable for A type -// CHECK: ![[VTableTypeA:rec_.*]] = !cir.record x 5>}> -// RTTI_DISABLED: ![[VTableTypeA:rec_.*]] = !cir.record x 5>}> +// CHECK-DAG: ![[VTableTypeA:rec_.*]] = !cir.record x 5>}> +// RTTI_DISABLED-DAG: ![[VTableTypeA:rec_.*]] = !cir.record x 5>}> // Class A -// CHECK: ![[ClassA:rec_.*]] = !cir.record !u32i>>>} #cir.record.decl.ast> -// RTTI_DISABLED: ![[ClassA:rec_.*]] = !cir.record !u32i>>>} #cir.record.decl.ast> +// CHECK-DAG: ![[ClassA:rec_.*]] = !cir.record} #cir.record.decl.ast> +// RTTI_DISABLED-DAG: ![[ClassA:rec_.*]] = !cir.record} #cir.record.decl.ast> // Class B -// CHECK: ![[ClassB:rec_.*]] = !cir.record -// RTTI_DISABLED: ![[ClassB:rec_.*]] = !cir.record +// CHECK-DAG: ![[ClassB:rec_.*]] = !cir.record +// RTTI_DISABLED-DAG: ![[ClassB:rec_.*]] = !cir.record // B ctor => @B::B() // Calls @A::A() and initialize __vptr with address of B's vtable. @@ -45,9 +45,9 @@ class B : public A // CHECK: %1 = cir.load %0 : !cir.ptr>, !cir.ptr // CHECK: %2 = cir.base_class_addr %1 : !cir.ptr nonnull [0] -> !cir.ptr // CHECK: cir.call @_ZN1AC2Ev(%2) : (!cir.ptr) -> () -// CHECK: %3 = cir.vtable.address_point(@_ZTV1B, address_point = ) : !cir.ptr !u32i>>> -// CHECK: %4 = cir.cast(bitcast, %1 : !cir.ptr), !cir.ptr !u32i>>>> -// CHECK: cir.store{{.*}} %3, %4 : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CHECK: %3 = cir.vtable.address_point(@_ZTV1B, address_point = ) : !cir.ptr +// CHECK: %4 = cir.cast(bitcast, %1 : !cir.ptr), !cir.ptr> +// CHECK: cir.store{{.*}} %3, %4 : !cir.ptr, !cir.ptr> // CHECK: cir.return // CHECK: } @@ -73,9 +73,9 @@ class B : public A // CHECK: %0 = cir.alloca !cir.ptr, !cir.ptr>, ["this", init] {alignment = 8 : i64} // CHECK: cir.store{{.*}} %arg0, %0 : !cir.ptr, !cir.ptr> // CHECK: %1 = cir.load %0 : !cir.ptr>, !cir.ptr -// CHECK: %2 = cir.vtable.address_point(@_ZTV1A, address_point = ) : !cir.ptr !u32i>>> -// CHECK: %3 = cir.cast(bitcast, %1 : !cir.ptr), !cir.ptr !u32i>>>> -// CHECK: cir.store{{.*}} %2, %3 : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CHECK: %2 = cir.vtable.address_point(@_ZTV1A, address_point = ) : !cir.ptr +// CHECK: %3 = cir.cast(bitcast, %1 : !cir.ptr), !cir.ptr> +// CHECK: cir.store{{.*}} %2, %3 : !cir.ptr, !cir.ptr> // CHECK: cir.return // CHECK: } diff --git a/clang/test/CIR/CodeGen/vtt.cpp b/clang/test/CIR/CodeGen/vtt.cpp index ac24873d96a9..589d03818668 100644 --- a/clang/test/CIR/CodeGen/vtt.cpp +++ b/clang/test/CIR/CodeGen/vtt.cpp @@ -38,9 +38,9 @@ int f() { // Class A constructor // CIR: cir.func linkonce_odr @_ZN1AC2Ev(%arg0: !cir.ptr -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1A, address_point = ) : !cir.ptr !u32i>>> -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1A, address_point = ) : !cir.ptr +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> // CIR: } // Vtable of Class D @@ -115,19 +115,19 @@ int f() { // CIR: %[[VTT_D_TO_C:.*]] = cir.vtt.address_point @_ZTT1D, offset = 3 -> !cir.ptr> // CIR: cir.call @_ZN1CC2Ev(%[[C_PTR]], %[[VTT_D_TO_C]]) : (!cir.ptr, !cir.ptr>) -> () -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr !u32i>>> -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr !u32i>>> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr // CIR: %{{[0-9]+}} = cir.base_class_addr %{{[0-9]+}} : !cir.ptr nonnull [40] -> !cir.ptr -// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> -// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr !u32i>>> +// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> +// CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV1D, address_point = ) : !cir.ptr // CIR: cir.base_class_addr %{{[0-9]+}} : !cir.ptr nonnull [16] -> !cir.ptr -// CIR: cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr !u32i>>>> -// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr !u32i>>>, !cir.ptr !u32i>>>> +// CIR: cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr), !cir.ptr> +// CIR: cir.store{{.*}} %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr, !cir.ptr> // CIR: cir.return // CIR: }