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PikachuHyAPikachuHyA
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[CIR][Lowering][debuginfo] Disable debug info if -g is not specified (#1145)
Fix #793
1 parent 7c8ffe9 commit 1b052da

33 files changed

+256
-227
lines changed

‎clang/include/clang/CIR/LowerToLLVM.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,8 @@ namespace cir {
3131
namespace direct {
3232
std::unique_ptr<llvm::Module> lowerDirectlyFromCIRToLLVMIR(
3333
mlir::ModuleOp theModule, llvm::LLVMContext &llvmCtx,
34-
bool disableVerifier = false, bool disableCCLowering = false);
34+
bool disableVerifier = false, bool disableCCLowering = false,
35+
bool disableDebugInfo = false);
3536
}
3637

3738
// Lower directly from pristine CIR to LLVMIR.

‎clang/lib/CIR/FrontendAction/CIRGenAction.cpp‎

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -94,10 +94,11 @@ getBackendActionFromOutputType(CIRGenAction::OutputType action) {
9494
static std::unique_ptr<llvm::Module> lowerFromCIRToLLVMIR(
9595
const clang::FrontendOptions &feOptions, mlir::ModuleOp mlirMod,
9696
std::unique_ptr<mlir::MLIRContext> mlirCtx, llvm::LLVMContext &llvmCtx,
97-
bool disableVerifier = false, bool disableCCLowering = false) {
97+
bool disableVerifier = false, bool disableCCLowering = false,
98+
bool disableDebugInfo = false) {
9899
if (feOptions.ClangIRDirectLowering)
99100
return direct::lowerDirectlyFromCIRToLLVMIR(
100-
mlirMod, llvmCtx, disableVerifier, disableCCLowering);
101+
mlirMod, llvmCtx, disableVerifier, disableCCLowering, disableDebugInfo);
101102
else
102103
return lowerFromCIRToMLIRToLLVMIR(mlirMod, std::move(mlirCtx), llvmCtx);
103104
}
@@ -284,10 +285,12 @@ class CIRGenConsumer : public clang::ASTConsumer {
284285
case CIRGenAction::OutputType::EmitObj:
285286
case CIRGenAction::OutputType::EmitAssembly: {
286287
llvm::LLVMContext llvmCtx;
287-
auto llvmModule =
288-
lowerFromCIRToLLVMIR(feOptions, mlirMod, std::move(mlirCtx), llvmCtx,
289-
feOptions.ClangIRDisableCIRVerifier,
290-
!feOptions.ClangIRCallConvLowering);
288+
bool disableDebugInfo =
289+
codeGenOptions.getDebugInfo() == llvm::codegenoptions::NoDebugInfo;
290+
auto llvmModule = lowerFromCIRToLLVMIR(
291+
feOptions, mlirMod, std::move(mlirCtx), llvmCtx,
292+
feOptions.ClangIRDisableCIRVerifier,
293+
!feOptions.ClangIRCallConvLowering, disableDebugInfo);
291294

292295
BackendAction backendAction = getBackendActionFromOutputType(action);
293296

@@ -436,10 +439,12 @@ void CIRGenAction::ExecuteAction() {
436439

437440
// FIXME(cir): This compilation path does not account for some flags.
438441
llvm::LLVMContext llvmCtx;
442+
bool disableDebugInfo =
443+
ci.getCodeGenOpts().getDebugInfo() == llvm::codegenoptions::NoDebugInfo;
439444
auto llvmModule = lowerFromCIRToLLVMIR(
440445
ci.getFrontendOpts(), mlirModule.release(),
441446
std::unique_ptr<mlir::MLIRContext>(mlirContext), llvmCtx,
442-
/*disableVerifier=*/false, /*disableCCLowering=*/true);
447+
/*disableVerifier=*/false, /*disableCCLowering=*/true, disableDebugInfo);
443448

444449
if (outstream)
445450
llvmModule->print(*outstream, nullptr);
@@ -479,7 +484,8 @@ EmitObjAction::EmitObjAction(mlir::MLIRContext *_MLIRContext)
479484
: CIRGenAction(OutputType::EmitObj, _MLIRContext) {}
480485
} // namespace cir
481486

482-
// Used for -fclangir-analysis-only: use CIR analysis but still use original LLVM codegen path
487+
// Used for -fclangir-analysis-only: use CIR analysis but still use original
488+
// LLVM codegen path
483489
void AnalysisOnlyActionBase::anchor() {}
484490
AnalysisOnlyActionBase::AnalysisOnlyActionBase(unsigned _Act,
485491
llvm::LLVMContext *_VMContext)

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4402,7 +4402,8 @@ extern void registerCIRDialectTranslation(mlir::MLIRContext &context);
44024402

44034403
std::unique_ptr<llvm::Module>
44044404
lowerDirectlyFromCIRToLLVMIR(mlir::ModuleOp theModule, LLVMContext &llvmCtx,
4405-
bool disableVerifier, bool disableCCLowering) {
4405+
bool disableVerifier, bool disableCCLowering,
4406+
bool disableDebugInfo) {
44064407
llvm::TimeTraceScope scope("lower from CIR to LLVM directly");
44074408

44084409
mlir::MLIRContext *mlirCtx = theModule.getContext();
@@ -4412,8 +4413,9 @@ lowerDirectlyFromCIRToLLVMIR(mlir::ModuleOp theModule, LLVMContext &llvmCtx,
44124413
// This is necessary to have line tables emitted and basic
44134414
// debugger working. In the future we will add proper debug information
44144415
// emission directly from our frontend.
4415-
pm.addPass(mlir::LLVM::createDIScopeForLLVMFuncOpPass());
4416-
4416+
if (!disableDebugInfo) {
4417+
pm.addPass(mlir::LLVM::createDIScopeForLLVMFuncOpPass());
4418+
}
44174419
// FIXME(cir): this shouldn't be necessary. It's meant to be a temporary
44184420
// workaround until we understand why some unrealized casts are being
44194421
// emmited and how to properly avoid them.

‎clang/test/CIR/CodeGen/AArch64/neon.c‎

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -10156,7 +10156,7 @@ uint8x16_t test_vld1q_u8(uint8_t const *a) {
1015610156
// CIR: cir.load align(1) %[[CAST]] : !cir.ptr<!cir.vector<!u8i x 16>>, !cir.vector<!u8i x 16>
1015710157

1015810158
// LLVM-LABEL: @test_vld1q_u8
10159-
// LLVM: [[TMP1:%.*]] = load <16 x i8>, ptr %0, align 1,
10159+
// LLVM: [[TMP1:%.*]] = load <16 x i8>, ptr %0, align 1
1016010160
}
1016110161

1016210162
uint16x8_t test_vld1q_u16(uint16_t const *a) {
@@ -10166,7 +10166,7 @@ uint16x8_t test_vld1q_u16(uint16_t const *a) {
1016610166
// CIR: cir.load align(2) %[[CAST]] : !cir.ptr<!cir.vector<!u16i x 8>>, !cir.vector<!u16i x 8>
1016710167

1016810168
// LLVM-LABEL: @test_vld1q_u16
10169-
// LLVM: [[TMP1:%.*]] = load <8 x i16>, ptr %0, align 2,
10169+
// LLVM: [[TMP1:%.*]] = load <8 x i16>, ptr %0, align 2
1017010170
}
1017110171

1017210172
uint32x4_t test_vld1q_u32(uint32_t const *a) {
@@ -10176,7 +10176,7 @@ uint32x4_t test_vld1q_u32(uint32_t const *a) {
1017610176
// CIR: cir.load align(4) %[[CAST]] : !cir.ptr<!cir.vector<!u32i x 4>>, !cir.vector<!u32i x 4>
1017710177

1017810178
// LLVM-LABEL: @test_vld1q_u32
10179-
// LLVM: [[TMP1:%.*]] = load <4 x i32>, ptr %0, align 4,
10179+
// LLVM: [[TMP1:%.*]] = load <4 x i32>, ptr %0, align 4
1018010180
}
1018110181

1018210182
uint64x2_t test_vld1q_u64(uint64_t const *a) {
@@ -10186,7 +10186,7 @@ uint64x2_t test_vld1q_u64(uint64_t const *a) {
1018610186
// CIR: cir.load align(8) %[[CAST]] : !cir.ptr<!cir.vector<!u64i x 2>>, !cir.vector<!u64i x 2>
1018710187

1018810188
// LLVM-LABEL: @test_vld1q_u64
10189-
// LLVM: [[TMP1:%.*]] = load <2 x i64>, ptr %0, align 8,
10189+
// LLVM: [[TMP1:%.*]] = load <2 x i64>, ptr %0, align 8
1019010190
}
1019110191

1019210192
int8x16_t test_vld1q_s8(int8_t const *a) {
@@ -10196,7 +10196,7 @@ int8x16_t test_vld1q_s8(int8_t const *a) {
1019610196
// CIR: cir.load align(1) %[[CAST]] : !cir.ptr<!cir.vector<!s8i x 16>>, !cir.vector<!s8i x 16>
1019710197

1019810198
// LLVM-LABEL: @test_vld1q_s8
10199-
// LLVM: [[TMP1:%.*]] = load <16 x i8>, ptr %0, align 1,
10199+
// LLVM: [[TMP1:%.*]] = load <16 x i8>, ptr %0, align 1
1020010200
}
1020110201

1020210202
int16x8_t test_vld1q_s16(int16_t const *a) {
@@ -10206,7 +10206,7 @@ int16x8_t test_vld1q_s16(int16_t const *a) {
1020610206
// CIR: cir.load align(2) %[[CAST]] : !cir.ptr<!cir.vector<!s16i x 8>>, !cir.vector<!s16i x 8>
1020710207

1020810208
// LLVM-LABEL: @test_vld1q_s16
10209-
// LLVM: [[TMP1:%.*]] = load <8 x i16>, ptr %0, align 2,
10209+
// LLVM: [[TMP1:%.*]] = load <8 x i16>, ptr %0, align 2
1021010210
}
1021110211

1021210212
int32x4_t test_vld1q_s32(int32_t const *a) {
@@ -10216,7 +10216,7 @@ int32x4_t test_vld1q_s32(int32_t const *a) {
1021610216
// CIR: cir.load align(4) %[[CAST]] : !cir.ptr<!cir.vector<!s32i x 4>>, !cir.vector<!s32i x 4>
1021710217

1021810218
// LLVM-LABEL: @test_vld1q_s32
10219-
// LLVM: [[TMP1:%.*]] = load <4 x i32>, ptr %0, align 4,
10219+
// LLVM: [[TMP1:%.*]] = load <4 x i32>, ptr %0, align 4
1022010220
}
1022110221

1022210222
int64x2_t test_vld1q_s64(int64_t const *a) {
@@ -10226,7 +10226,7 @@ int64x2_t test_vld1q_s64(int64_t const *a) {
1022610226
// CIR: cir.load align(8) %[[CAST]] : !cir.ptr<!cir.vector<!s64i x 2>>, !cir.vector<!s64i x 2>
1022710227

1022810228
// LLVM-LABEL: @test_vld1q_s64
10229-
// LLVM: [[TMP1:%.*]] = load <2 x i64>, ptr %0, align 8,
10229+
// LLVM: [[TMP1:%.*]] = load <2 x i64>, ptr %0, align 8
1023010230
}
1023110231

1023210232
// NYI-LABEL: @test_vld1q_f16(
@@ -11389,7 +11389,7 @@ void test_vst1q_u8(uint8_t *a, uint8x16_t b) {
1138911389
// CIR: cir.store align(1) %{{.*}}, %[[CAST]] : !cir.vector<!u8i x 16>, !cir.ptr<!cir.vector<!u8i x 16>>
1139011390

1139111391
// LLVM-LABEL: @test_vst1q_u8
11392-
// LLVM: store <16 x i8> %{{.*}}, ptr %0, align 1,
11392+
// LLVM: store <16 x i8> %{{.*}}, ptr %0, align 1
1139311393
}
1139411394

1139511395
void test_vst1q_u16(uint16_t *a, uint16x8_t b) {
@@ -11399,7 +11399,7 @@ void test_vst1q_u16(uint16_t *a, uint16x8_t b) {
1139911399
// CIR: cir.store align(2) %{{.*}}, %[[CAST]] : !cir.vector<!u16i x 8>, !cir.ptr<!cir.vector<!u16i x 8>>
1140011400

1140111401
// LLVM-LABEL: @test_vst1q_u16
11402-
// LLVM: store <8 x i16> %{{.*}}, ptr %0, align 2,
11402+
// LLVM: store <8 x i16> %{{.*}}, ptr %0, align 2
1140311403
}
1140411404

1140511405
void test_vst1q_u32(uint32_t *a, uint32x4_t b) {
@@ -11409,7 +11409,7 @@ void test_vst1q_u32(uint32_t *a, uint32x4_t b) {
1140911409
// CIR: cir.store align(4) %{{.*}}, %[[CAST]] : !cir.vector<!u32i x 4>, !cir.ptr<!cir.vector<!u32i x 4>>
1141011410

1141111411
// LLVM-LABEL: @test_vst1q_u32
11412-
// LLVM: store <4 x i32> %{{.*}}, ptr %0, align 4,
11412+
// LLVM: store <4 x i32> %{{.*}}, ptr %0, align 4
1141311413
}
1141411414

1141511415
void test_vst1q_u64(uint64_t *a, uint64x2_t b) {
@@ -11419,7 +11419,7 @@ void test_vst1q_u64(uint64_t *a, uint64x2_t b) {
1141911419
// CIR: cir.store align(8) %{{.*}}, %[[CAST]] : !cir.vector<!u64i x 2>, !cir.ptr<!cir.vector<!u64i x 2>>
1142011420

1142111421
// LLVM-LABEL: @test_vst1q_u64
11422-
// LLVM: store <2 x i64> %{{.*}}, ptr %0, align 8,
11422+
// LLVM: store <2 x i64> %{{.*}}, ptr %0, align 8
1142311423
}
1142411424

1142511425
void test_vst1q_s8(int8_t *a, int8x16_t b) {
@@ -11429,7 +11429,7 @@ void test_vst1q_s8(int8_t *a, int8x16_t b) {
1142911429
// CIR: cir.store align(1) %{{.*}}, %[[CAST]] : !cir.vector<!s8i x 16>, !cir.ptr<!cir.vector<!s8i x 16>>
1143011430

1143111431
// LLVM-LABEL: @test_vst1q_s8
11432-
// LLVM: store <16 x i8> %{{.*}}, ptr %0, align 1,
11432+
// LLVM: store <16 x i8> %{{.*}}, ptr %0, align 1
1143311433
}
1143411434

1143511435
void test_vst1q_s16(int16_t *a, int16x8_t b) {
@@ -11439,7 +11439,7 @@ void test_vst1q_s16(int16_t *a, int16x8_t b) {
1143911439
// CIR: cir.store align(2) %{{.*}}, %[[CAST]] : !cir.vector<!s16i x 8>, !cir.ptr<!cir.vector<!s16i x 8>>
1144011440

1144111441
// LLVM-LABEL: @test_vst1q_s16
11442-
// LLVM: store <8 x i16> %{{.*}}, ptr %0, align 2,
11442+
// LLVM: store <8 x i16> %{{.*}}, ptr %0, align 2
1144311443
}
1144411444

1144511445
void test_vst1q_s32(int32_t *a, int32x4_t b) {
@@ -11449,7 +11449,7 @@ void test_vst1q_s32(int32_t *a, int32x4_t b) {
1144911449
// CIR: cir.store align(4) %{{.*}}, %[[CAST]] : !cir.vector<!s32i x 4>, !cir.ptr<!cir.vector<!s32i x 4>>
1145011450

1145111451
// LLVM-LABEL: @test_vst1q_s32
11452-
// LLVM: store <4 x i32> %{{.*}}, ptr %0, align 4,
11452+
// LLVM: store <4 x i32> %{{.*}}, ptr %0, align 4
1145311453
}
1145411454

1145511455
void test_vst1q_s64(int64_t *a, int64x2_t b) {
@@ -11459,7 +11459,7 @@ void test_vst1q_s64(int64_t *a, int64x2_t b) {
1145911459
// CIR: cir.store align(8) %{{.*}}, %[[CAST]] : !cir.vector<!s64i x 2>, !cir.ptr<!cir.vector<!s64i x 2>>
1146011460

1146111461
// LLVM-LABEL: @test_vst1q_s64
11462-
// LLVM: store <2 x i64> %{{.*}}, ptr %0, align 8,
11462+
// LLVM: store <2 x i64> %{{.*}}, ptr %0, align 8
1146311463
}
1146411464

1146511465
// NYI-LABEL: @test_vst1q_f16(

‎clang/test/CIR/CodeGen/OpenCL/convergent.cl‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ void non_convfun(void) {
2121
// External functions should be assumed convergent.
2222
void f(void);
2323
// CIR: cir.func{{.+}} @f(){{.*}} extra(#fn_attr[[CONV_DECL_ATTR]])
24-
// LLVM: declare {{.+}} spir_func void @f() local_unnamed_addr #[[CONV_ATTR:[0-9]+]]
24+
// LLVM: declare spir_func void @f() local_unnamed_addr #[[CONV_ATTR:[0-9]+]]
2525
void g(void);
2626
// CIR: cir.func{{.+}} @g(){{.*}} extra(#fn_attr[[CONV_DECL_ATTR]])
27-
// LLVM: declare {{.+}} spir_func void @g() local_unnamed_addr #[[CONV_ATTR]]
27+
// LLVM: declare spir_func void @g() local_unnamed_addr #[[CONV_ATTR]]
2828

2929
// Test two if's are merged and non_convfun duplicated.
3030
void test_merge_if(int a) {
@@ -68,7 +68,7 @@ void test_merge_if(int a) {
6868

6969
void convfun(void) __attribute__((convergent));
7070
// CIR: cir.func{{.+}} @convfun(){{.*}} extra(#fn_attr[[CONV_DECL_ATTR]])
71-
// LLVM: declare {{.+}} spir_func void @convfun() local_unnamed_addr #[[CONV_ATTR]]
71+
// LLVM: declare spir_func void @convfun() local_unnamed_addr #[[CONV_ATTR]]
7272

7373
// Test two if's are not merged.
7474
void test_no_merge_if(int a) {

‎clang/test/CIR/CodeGen/abstract-cond.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ int f6(int a0, struct s6 a1, struct s6 a2) {
2626
// LLVM-LABEL: @f6
2727
// LLVM: %[[LOAD_A0:.*]] = load i32, ptr {{.*}}
2828
// LLVM: %[[COND:.*]] = icmp ne i32 %[[LOAD_A0]], 0
29-
// LLVM: br i1 %[[COND]], label %[[A1_PATH:.*]], label %[[A2_PATH:.*]],
29+
// LLVM: br i1 %[[COND]], label %[[A1_PATH:.*]], label %[[A2_PATH:.*]]
3030
// LLVM: [[A1_PATH]]:
3131
// LLVM: call void @llvm.memcpy.p0.p0.i32(ptr %[[TMP:.*]], ptr {{.*}}, i32 4, i1 false)
3232
// LLVM: br label %[[EXIT:[a-z0-9]+]]

‎clang/test/CIR/CodeGen/annotations-var.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -37,5 +37,5 @@ void local(void) {
3737
// LLVM: call void @llvm.var.annotation.p0.p0(ptr %[[ALLOC2]], ptr @.str.annotation, ptr @.str.1.annotation, i32 24, ptr null)
3838
// LLVM: %[[ALLOC3:.*]] = alloca i32
3939
// LLVM: call void @llvm.var.annotation.p0.p0(ptr %[[ALLOC3]], ptr @.str.3.annotation,
40-
// LLVM-SAME: ptr @.str.1.annotation, i32 25, ptr @.args.annotation),
40+
// LLVM-SAME: ptr @.str.1.annotation, i32 25, ptr @.args.annotation)
4141
}

‎clang/test/CIR/CodeGen/atomic-xchg-field.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -58,11 +58,11 @@ void structAtomicExchange(unsigned referenceCount, wPtr item) {
5858
// LLVM: %[[RES:.*]] = cmpxchg weak ptr %9, i32 %[[EXP]], i32 %[[DES]] seq_cst seq_cst
5959
// LLVM: %[[OLD:.*]] = extractvalue { i32, i1 } %[[RES]], 0
6060
// LLVM: %[[CMP:.*]] = extractvalue { i32, i1 } %[[RES]], 1
61-
// LLVM: %[[Z:.*]] = zext i1 %[[CMP]] to i8, !dbg !16
62-
// LLVM: %[[X:.*]] = xor i8 %[[Z]], 1, !dbg !16
63-
// LLVM: %[[FAIL:.*]] = trunc i8 %[[X]] to i1, !dbg !16
61+
// LLVM: %[[Z:.*]] = zext i1 %[[CMP]] to i8
62+
// LLVM: %[[X:.*]] = xor i8 %[[Z]], 1
63+
// LLVM: %[[FAIL:.*]] = trunc i8 %[[X]] to i1
6464

65-
// LLVM: br i1 %[[FAIL:.*]], label %[[STORE_OLD:.*]], label %[[CONTINUE:.*]],
65+
// LLVM: br i1 %[[FAIL:.*]], label %[[STORE_OLD:.*]], label %[[CONTINUE:.*]]
6666
// LLVM: [[STORE_OLD]]:
6767
// LLVM: store i32 %[[OLD]], ptr
6868
// LLVM: br label %[[CONTINUE]]

‎clang/test/CIR/CodeGen/call-via-class-member-funcptr.cpp‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -38,17 +38,17 @@ void fn1() { f f1; }
3838
// LLVM: %class.f = type { %class.a }
3939
// LLVM: %class.a = type { i8 }
4040
// LLVM: @h = global i32 0
41-
// LLVM: declare {{.*}} ptr @_ZN1a1bEi(i32)
41+
// LLVM: declare ptr @_ZN1a1bEi(i32)
4242

4343
// LLVM: define dso_local ptr @_ZN1f1bEv(ptr [[ARG0:%.*]])
4444
// LLVM: [[ARG0_SAVE:%.*]] = alloca ptr, i64 1, align 8
4545
// LLVM: [[RET_SAVE:%.*]] = alloca ptr, i64 1, align 8
46-
// LLVM: store ptr [[ARG0]], ptr [[ARG0_SAVE]], align 8,
46+
// LLVM: store ptr [[ARG0]], ptr [[ARG0_SAVE]], align 8
4747
// LLVM: [[ARG0_LOAD:%.*]] = load ptr, ptr [[ARG0_SAVE]], align 8
48-
// LLVM: [[FUNC_PTR:%.*]] = getelementptr %class.f, ptr [[ARG0_LOAD]], i32 0, i32 0,
48+
// LLVM: [[FUNC_PTR:%.*]] = getelementptr %class.f, ptr [[ARG0_LOAD]], i32 0, i32 0
4949
// LLVM: [[VAR_H:%.*]] = load i32, ptr @h, align 4
50-
// LLVM: [[RET_VAL:%.*]] = call ptr @_ZN1a1bEi(i32 [[VAR_H]]),
51-
// LLVM: store ptr [[RET_VAL]], ptr [[RET_SAVE]], align 8,
50+
// LLVM: [[RET_VAL:%.*]] = call ptr @_ZN1a1bEi(i32 [[VAR_H]])
51+
// LLVM: store ptr [[RET_VAL]], ptr [[RET_SAVE]], align 8
5252
// LLVM: [[RET_VAL2:%.*]] = load ptr, ptr [[RET_SAVE]], align 8
5353
// LLVM: ret ptr [[RET_VAL2]]
5454

‎clang/test/CIR/CodeGen/clear_cache.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ char buffer[32] = "This is a largely unused buffer";
2020
// CIR: cir.clear_cache %[[VAL_3]] : !cir.ptr<!void>, %[[VAL_8]],
2121

2222
// LLVM-LABEL: main
23-
// LLVM: call void @llvm.clear_cache(ptr @buffer, ptr getelementptr (i8, ptr @buffer, i64 32)),
23+
// LLVM: call void @llvm.clear_cache(ptr @buffer, ptr getelementptr (i8, ptr @buffer, i64 32))
2424

2525
int main(void) {
2626
__builtin___clear_cache(buffer, buffer+32);

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