diff --git a/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetALambdaLoops/CMakeFiles/lcalsALambda.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetARawLoops/CMakeFiles/lcalsARaw.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetBLambdaLoops/CMakeFiles/lcalsBLambda.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetBRawLoops/CMakeFiles/lcalsBRaw.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetCLambdaLoops/CMakeFiles/lcalsCLambda.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s b/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s index c811ea5e..b809cb40 100644 --- a/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s +++ b/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSStats.s @@ -1789,8 +1789,8 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a2, $a2, 8 ldx.d $s3, $a0, $a1 sub.d $a0, $a2, $s3 - srli.d $a2, $a0, 4 - addi.w $a0, $a2, 0 + srli.d $a1, $a0, 4 + addi.w $a0, $a1, 0 st.d $a5, $sp, 128 # 8-byte Folded Spill beqz $a0, .LBB7_6 # %bb.11: # %.lr.ph.preheader @@ -1801,7 +1801,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $zero, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 144 # 8-byte Folded Spill addi.w $s6, $zero, -1 - bstrpick.d $s2, $a2, 31, 0 + bstrpick.d $s2, $a1, 31, 0 move $s5, $s6 lu32i.d $s5, -65537 lu52i.d $s7, $s5, 2047 @@ -1971,7 +1971,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcalau12i $a0, %pc_hi20(_ZL21s_loop_suite_run_info) ld.d $s0, $a0, %pc_lo12(_ZL21s_loop_suite_run_info) ld.wu $a0, $s0, 64 - st.d $s0, $sp, 96 # 8-byte Folded Spill + st.d $s0, $sp, 104 # 8-byte Folded Spill beqz $a0, .LBB7_29 # %bb.20: # %_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.exit slli.d $fp, $a0, 2 @@ -1984,7 +1984,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 ld.wu $a0, $s0, 64 - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $s7, $sp, 120 # 8-byte Folded Spill beqz $a0, .LBB7_30 # %bb.21: slli.d $fp, $a0, 4 @@ -1999,7 +1999,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 beqz $a0, .LBB7_31 # %bb.23: @@ -2015,9 +2015,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $a0, $a0, 64 - st.d $s1, $sp, 136 # 8-byte Folded Spill + st.d $s1, $sp, 152 # 8-byte Folded Spill beqz $a0, .LBB7_58 # %bb.25: slli.d $fp, $a0, 4 @@ -2032,10 +2032,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a2, $fp pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.wu $s0, $a0, 64 addi.w $a0, $s0, 0 - st.d $s2, $sp, 120 # 8-byte Folded Spill + st.d $s2, $sp, 136 # 8-byte Folded Spill beqz $a0, .LBB7_59 # %bb.27: slli.d $fp, $s0, 4 @@ -2045,7 +2045,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 .Ltmp13: # EH_LABEL # %bb.28: # %.noexc174 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill move $a1, $zero move $a2, $fp pcaddu18i $ra, %call36(memset) @@ -2055,33 +2055,33 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 bne $a1, $a0, .LBB7_33 b .LBB7_42 .LBB7_29: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill b .LBB7_32 .LBB7_30: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero move $s8, $zero b .LBB7_32 .LBB7_31: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill move $s0, $zero .LBB7_32: # %_ZNSt6vectorIeSaIeEEC2EmRKeRKS0_.exit175 - st.d $zero, $sp, 136 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload beq $a1, $a0, .LBB7_42 .LBB7_33: # %.lr.ph277.preheader - st.d $s8, $sp, 104 # 8-byte Folded Spill + st.d $s8, $sp, 112 # 8-byte Folded Spill move $a2, $zero b .LBB7_35 .p2align 4, , 16 .LBB7_34: # %.loopexit # in Loop: Header=BB7_35 Depth=1 - ld.d $a2, $sp, 88 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.d $a2, $a2, 1 bstrpick.d $a0, $a2, 31, 0 ld.d $a1, $sp, 40 # 8-byte Folded Reload @@ -2089,7 +2089,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_35: # %.lr.ph277 # =>This Loop Header: Depth=1 # Child Loop BB7_39 Depth 2 - st.d $a2, $sp, 88 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill ori $a0, $zero, 280 mul.d $a0, $a2, $a0 ld.d $a1, $sp, 56 # 8-byte Folded Reload @@ -2102,7 +2102,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a0, $a1, 216 st.d $a1, $sp, 192 # 8-byte Folded Spill ld.d $a1, $a1, 208 - st.d $a1, $sp, 128 # 8-byte Folded Spill + st.d $a1, $sp, 144 # 8-byte Folded Spill beq $a0, $a1, .LBB7_34 # %bb.37: # %.lr.ph275 # in Loop: Header=BB7_35 Depth=1 @@ -2110,10 +2110,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s1, $zero ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $s2, $a1, 40 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload sub.d $a0, $a0, $a1 srai.d $a0, $a0, 2 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $s4, $zero, 1 b .LBB7_39 .p2align 4, , 16 @@ -2123,33 +2123,32 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $s1, $s1, 4 addi.d $s8, $s8, 16 addi.w $s4, $s4, 1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload bgeu $a0, $a1, .LBB7_34 .LBB7_39: # Parent Loop BB7_35 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $s2, 0 beqz $a0, .LBB7_38 # %bb.40: # in Loop: Header=BB7_39 Depth=2 - ld.d $s7, $sp, 184 # 8-byte Folded Reload - ldx.w $a0, $s7, $s1 + ld.d $a1, $sp, 120 # 8-byte Folded Reload + ldx.w $a0, $a1, $s1 addi.d $a0, $a0, 1 - stx.w $a0, $s7, $s1 + stx.w $a0, $a1, $s1 ld.d $s0, $sp, 192 # 8-byte Folded Reload fld.d $fa0, $s0, 8 pcaddu18i $ra, %call36(__extenddftf2) jirl $ra, $ra, 0 - ld.d $fp, $sp, 104 # 8-byte Folded Reload + ld.d $fp, $sp, 112 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 move $a4, $a0 - st.d $a0, $sp, 176 # 8-byte Folded Spill - move $a5, $a1 - st.d $a1, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 184 # 8-byte Folded Spill + move $s7, $a1 move $a0, $a2 move $a1, $a3 move $a2, $a4 - move $a3, $a5 + move $a3, $s7 pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 ld.d $s3, $s0, 64 @@ -2158,7 +2157,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 add.d $s0, $s3, $s8 ldx.d $a0, $s3, $s8 ld.d $a1, $s0, 8 - ld.d $fp, $sp, 136 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload add.d $s6, $fp, $s8 ldx.d $a2, $fp, $s8 ld.d $a3, $s6, 8 @@ -2168,21 +2167,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $s6, 8 ldx.d $a2, $s3, $s8 ld.d $a3, $s0, 8 - ld.d $s5, $sp, 120 # 8-byte Folded Reload + ld.d $s5, $sp, 136 # 8-byte Folded Reload add.d $fp, $s5, $s8 ldx.d $a0, $s5, $s8 - st.d $a0, $sp, 160 # 8-byte Folded Spill - st.d $s7, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill ld.d $a0, $fp, 8 - st.d $a0, $sp, 152 # 8-byte Folded Spill - ld.d $s6, $sp, 176 # 8-byte Folded Reload + st.d $a0, $sp, 168 # 8-byte Folded Spill + ld.d $s6, $sp, 184 # 8-byte Folded Reload move $a0, $s6 - ld.d $s7, $sp, 168 # 8-byte Folded Reload move $a1, $s7 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(__addtf3) jirl $ra, $ra, 0 stx.d $a0, $s5, $s8 @@ -2195,7 +2192,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 jirl $ra, $ra, 0 ld.d $a2, $sp, 192 # 8-byte Folded Reload ld.d $a2, $a2, 232 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a3, $s1 ldx.w $a2, $a2, $s1 move $fp, $a0 @@ -2209,7 +2206,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $s5 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $s0, $sp, 112 # 8-byte Folded Reload + ld.d $s0, $sp, 128 # 8-byte Folded Reload add.d $fp, $s0, $s8 ldx.d $a2, $s0, $s8 ld.d $a3, $fp, 8 @@ -2225,9 +2222,9 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 st.d $a1, $fp, 8 b .LBB7_38 .LBB7_41: # %.preheader.loopexit - ld.d $a0, $sp, 96 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $s0, $a0, 64 - ld.d $s8, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 112 # 8-byte Folded Reload .LBB7_42: # %.preheader addi.w $a0, $s0, 0 beqz $a0, .LBB7_47 @@ -2237,19 +2234,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $s2, $zero ld.d $a0, $sp, 16 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a1, $a1, 456 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 480 slli.d $a3, $a0, 4 alsl.d $s3, $a0, $a3, 3 ldx.d $s4, $a1, $s3 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload ldx.d $s5, $a2, $s3 ori $a0, $zero, 0 lu32i.d $a0, -65536 lu52i.d $fp, $a0, 1023 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 120 # 8-byte Folded Reload b .LBB7_45 .p2align 4, , 16 .LBB7_44: # in Loop: Header=BB7_45 Depth=1 @@ -2263,7 +2260,7 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 .LBB7_45: # =>This Inner Loop Header: Depth=1 ld.w $a0, $s6, 0 st.w $a0, $s4, 0 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 152 # 8-byte Folded Reload vldx $vr0, $a2, $s1 vstx $vr0, $s5, $s1 blez $a0, .LBB7_44 @@ -2277,19 +2274,19 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__multf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload add.d $a3, $a2, $s1 ldx.d $a2, $a2, $s1 ld.d $a3, $a3, 8 pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 504 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 112 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload add.d $a0, $a1, $s1 ldx.d $a2, $a1, $s1 ld.d $a3, $a0, 8 @@ -2297,24 +2294,24 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 move $a1, $fp pcaddu18i $ra, %call36(__divtf3) jirl $ra, $ra, 0 - ld.d $a2, $sp, 96 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload ld.d $a2, $a2, 528 ldx.d $a2, $a2, $s3 add.d $a3, $a2, $s1 stx.d $a0, $a2, $s1 st.d $a1, $a3, 8 - ld.d $a1, $sp, 96 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload b .LBB7_44 .LBB7_47: # %._crit_edge280 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 128 # 8-byte Folded Reload beqz $a0, .LBB7_49 # %bb.48: pcaddu18i $ra, %call36(_ZdlPv) jirl $ra, $ra, 0 .LBB7_49: # %_ZNSt6vectorIeSaIeEED2Ev.exit177 - ld.d $fp, $sp, 136 # 8-byte Folded Reload - ld.d $a0, $sp, 120 # 8-byte Folded Reload - ld.d $s0, $sp, 184 # 8-byte Folded Reload + ld.d $fp, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB7_51 # %bb.50: pcaddu18i $ra, %call36(_ZdlPv) @@ -2364,10 +2361,10 @@ _Z12computeStatsjRSt6vectorI8LoopStatSaIS0_EEb: # @_Z12computeStatsjRSt6vectorI8 addi.d $sp, $sp, 288 ret .LBB7_58: - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill .LBB7_59: move $s0, $zero - st.d $zero, $sp, 112 # 8-byte Folded Spill + st.d $zero, $sp, 128 # 8-byte Folded Spill ld.d $a0, $sp, 56 # 8-byte Folded Reload ld.d $a1, $sp, 24 # 8-byte Folded Reload bne $a1, $a0, .LBB7_33 diff --git a/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s b/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s index 33dc72dd..b381818b 100644 --- a/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s +++ b/results/MicroBenchmarks/LCALS/SubsetCRawLoops/CMakeFiles/lcalsCRaw.dir/__/LCALSSuite.s @@ -34042,19 +34042,19 @@ _Z12loopFinalizejR8LoopStat10LoopLength: # @_Z12loopFinalizejR8LoopStat10LoopLen _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .cfi_startproc # %bb.0: - addi.d $sp, $sp, -256 - .cfi_def_cfa_offset 256 - st.d $ra, $sp, 248 # 8-byte Folded Spill - st.d $fp, $sp, 240 # 8-byte Folded Spill - st.d $s0, $sp, 232 # 8-byte Folded Spill - st.d $s1, $sp, 224 # 8-byte Folded Spill - st.d $s2, $sp, 216 # 8-byte Folded Spill - st.d $s3, $sp, 208 # 8-byte Folded Spill - st.d $s4, $sp, 200 # 8-byte Folded Spill - st.d $s5, $sp, 192 # 8-byte Folded Spill - st.d $s6, $sp, 184 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill - st.d $s8, $sp, 168 # 8-byte Folded Spill + addi.d $sp, $sp, -272 + .cfi_def_cfa_offset 272 + st.d $ra, $sp, 264 # 8-byte Folded Spill + st.d $fp, $sp, 256 # 8-byte Folded Spill + st.d $s0, $sp, 248 # 8-byte Folded Spill + st.d $s1, $sp, 240 # 8-byte Folded Spill + st.d $s2, $sp, 232 # 8-byte Folded Spill + st.d $s3, $sp, 224 # 8-byte Folded Spill + st.d $s4, $sp, 216 # 8-byte Folded Spill + st.d $s5, $sp, 208 # 8-byte Folded Spill + st.d $s6, $sp, 200 # 8-byte Folded Spill + st.d $s7, $sp, 192 # 8-byte Folded Spill + st.d $s8, $sp, 184 # 8-byte Folded Spill .cfi_offset 1, -8 .cfi_offset 22, -16 .cfi_offset 23, -24 @@ -34081,24 +34081,24 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s5, $a0, 5 pcalau12i $a0, %pc_hi20(.LCPI11_0) addi.d $a0, $a0, %pc_lo12(.LCPI11_0) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill move $fp, $zero ori $a0, $zero, 0 lu32i.d $a0, 1 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill lu12i.w $a0, -419431 ori $a0, $a0, 2458 lu32i.d $a0, 104857 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 144 # 16-byte Folded Spill + vst $vr0, $sp, 160 # 16-byte Folded Spill lu12i.w $a0, -307024 ori $a0, $a0, 3880 lu32i.d $a0, 129446 lu52i.d $a0, $a0, 1023 vreplgr2vr.d $vr0, $a0 - vst $vr0, $sp, 128 # 16-byte Folded Spill + vst $vr0, $sp, 144 # 16-byte Folded Spill ori $s0, $zero, 16 b .LBB11_2 .p2align 4, , 16 @@ -34116,17 +34116,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s2, $s2, $a0 addi.d $s1, $fp, 1 st.w $s1, $s2, 464 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s4 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 472 st.w $s6, $s2, 480 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_1 # %bb.3: # %vector.ph # in Loop: Header=BB11_2 Depth=1 @@ -34134,12 +34134,12 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $a1, 0 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 move $a2, $s5 - vld $vr1, $sp, 96 # 16-byte Folded Reload + vld $vr1, $sp, 112 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_4: # %vector.body # Parent Loop BB11_2 Depth=1 @@ -34187,23 +34187,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s0, $a0, 2 ori $a0, $zero, 1 st.w $a0, $s2, 848 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $a0, $sp, 160 + ld.d $a0, $sp, 176 st.d $a0, $s2, 856 st.w $s3, $s2, 864 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $fp, .LBB11_8 # %bb.6: # %vector.ph254 ld.bu $a1, $s2, 848 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34252,15 +34252,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $s2, 136 ori $a0, $zero, 2 st.w $a0, $s2, 872 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s1 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $a0, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $a0, $sp, 176 st.d $a0, $s2, 880 st.w $fp, $s2, 888 blez $fp, .LBB11_11 @@ -34268,7 +34268,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a1, $s2, 872 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 addi.d $a1, $a0, 16 @@ -34316,13 +34316,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $a0, $fp, 144 slli.d $s1, $s5, 2 st.w $zero, $fp, 896 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 904 st.w $s6, $fp, 912 blez $s6, .LBB11_13 @@ -34337,13 +34337,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 152 ori $a0, $zero, 1 st.w $a0, $fp, 920 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 928 st.w $s6, $fp, 936 blez $s6, .LBB11_15 @@ -34358,13 +34358,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 160 ori $a0, $zero, 2 st.w $a0, $fp, 944 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 952 st.w $s6, $fp, 960 blez $s6, .LBB11_17 @@ -34379,13 +34379,13 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 168 ori $a0, $zero, 3 st.w $a0, $fp, 968 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 976 st.w $s6, $fp, 984 blez $s6, .LBB11_19 @@ -34400,14 +34400,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s2, $fp, 176 ori $a0, $zero, 4 st.w $a0, $fp, 992 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 st.d $s3, $sp, 48 # 8-byte Folded Spill move $a2, $s3 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $fp, 1000 st.w $s6, $fp, 1008 blez $s6, .LBB11_21 @@ -34452,7 +34452,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34461,8 +34461,8 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav lu32i.d $a1, 1 vreplgr2vr.d $vr2, $a1 move $a1, $s5 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_25: # %vector.body293 # =>This Inner Loop Header: Depth=1 @@ -34517,15 +34517,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1048 st.w $s6, $s8, 1056 addi.d $s4, $s8, 1064 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_33 # %bb.30: # %vector.ph303 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34588,15 +34588,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1072 st.w $s6, $s8, 1080 addi.d $fp, $s8, 1088 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_39 # %bb.36: # %vector.ph320 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34659,15 +34659,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.d $s3, $s8, 1096 st.w $s6, $s8, 1104 addi.d $s4, $s8, 1112 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_45 # %bb.42: # %vector.ph337 ld.bu $a0, $fp, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34729,15 +34729,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_47: # %.loopexit.i.4 st.d $s2, $s8, 1120 st.w $s6, $s8, 1128 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s6, .LBB11_50 # %bb.48: # %vector.ph354 ld.bu $a0, $s4, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 alsl.d $a1, $a0, $s0, 3 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 vldrepl.d $vr0, $a0, 0 vldrepl.d $vr1, $a1, 0 @@ -34783,15 +34783,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s4, $s5, 3 ori $a0, $zero, 1 st.w $a0, $s8, 1136 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $fp, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $fp, $sp, 176 st.d $fp, $s8, 1144 st.w $s1, $s8, 1152 blez $s0, .LBB11_53 @@ -34799,7 +34799,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s8, 1136 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34875,23 +34875,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav vst $vr4, $sp, 96 # 16-byte Folded Spill ori $a0, $zero, 2 st.w $a0, $s1, 1160 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1168 st.w $s0, $s1, 1176 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_59 # %bb.57: # %vector.ph401 ld.bu $a0, $s1, 1160 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -34964,23 +34964,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_62: # %.loopexit186.1 ori $a0, $zero, 3 st.w $a0, $s1, 1184 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1192 st.w $s0, $s1, 1200 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_65 # %bb.63: # %vector.ph431 ld.bu $a0, $s1, 1184 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35053,23 +35053,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_68: # %.loopexit186.2 ori $a0, $zero, 4 st.w $a0, $s1, 1208 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s2 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 st.d $fp, $s1, 1216 st.w $s0, $s1, 1224 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_71 # %bb.69: # %vector.ph461 ld.bu $a0, $s1, 1208 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $fp, 16 @@ -35202,17 +35202,17 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav add.d $s3, $s3, $a0 addi.d $s8, $s4, 1 st.w $s8, $s3, 1232 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 ld.d $a2, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s3, 1240 st.w $s0, $s3, 1248 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s0, .LBB11_75 # %bb.77: # %vector.ph491 # in Loop: Header=BB11_76 Depth=1 @@ -35220,7 +35220,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $a0, 0 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35267,14 +35267,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_79: # %.preheader183 ori $a0, $zero, 1 st.w $a0, $s3, 1496 - st.d $zero, $sp, 160 + st.d $zero, $sp, 176 lu12i.w $s0, 8 - addi.d $a0, $sp, 160 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $fp, $sp, 160 + ld.d $fp, $sp, 176 move $a0, $zero ld.bu $a1, $s3, 1496 st.d $fp, $s3, 1504 @@ -35282,14 +35282,14 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav st.w $a2, $s3, 1512 andi $a1, $a1, 1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 vldrepl.d $vr0, $a1, 0 ori $a1, $zero, 0 lu32i.d $a1, 1 vreplgr2vr.d $vr1, $a1 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload .p2align 4, , 16 .LBB11_80: # %vector.body509 # =>This Inner Loop Header: Depth=1 @@ -35469,15 +35469,15 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav slli.d $s3, $a0, 3 ori $a0, $zero, 1 st.w $a0, $s2, 1520 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - vld $vr7, $sp, 128 # 16-byte Folded Reload - vld $vr6, $sp, 144 # 16-byte Folded Reload - ld.d $s1, $sp, 160 + vld $vr7, $sp, 144 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + ld.d $s1, $sp, 176 st.d $s1, $s2, 1528 st.w $fp, $s2, 1536 ld.d $s5, $sp, 96 # 8-byte Folded Reload @@ -35487,7 +35487,7 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ld.bu $a0, $s2, 1520 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35590,23 +35590,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_89: # %.loopexit ori $a0, $zero, 2 st.w $a0, $s4, 1544 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s1, $sp, 160 + ld.d $s1, $sp, 176 st.d $s1, $s4, 1552 st.w $s8, $s4, 1560 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_92 # %bb.90: # %vector.ph570 ld.bu $a0, $s4, 1544 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s1, 16 @@ -35709,23 +35709,23 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav .LBB11_97: # %.loopexit.1 ori $a0, $zero, 3 st.w $a0, $s4, 1568 - st.d $zero, $sp, 160 - addi.d $a0, $sp, 160 + st.d $zero, $sp, 176 + addi.d $a0, $sp, 176 ori $a1, $zero, 32 move $a2, $s0 pcaddu18i $ra, %call36(posix_memalign) jirl $ra, $ra, 0 - ld.d $s2, $sp, 160 + ld.d $s2, $sp, 176 st.d $s2, $s4, 1576 st.w $s8, $s4, 1584 - vld $vr6, $sp, 144 # 16-byte Folded Reload - vld $vr7, $sp, 128 # 16-byte Folded Reload + vld $vr6, $sp, 160 # 16-byte Folded Reload + vld $vr7, $sp, 144 # 16-byte Folded Reload blez $s8, .LBB11_100 # %bb.98: # %vector.ph613 ld.bu $a0, $s4, 1568 andi $a0, $a0, 1 sltui $a0, $a0, 1 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 vldrepl.d $vr0, $a0, 0 addi.d $a0, $s2, 16 @@ -35845,18 +35845,18 @@ _Z16allocateLoopDatav: # @_Z16allocateLoopDatav ori $a0, $zero, 10 st.w $a0, $s1, 1608 vst $vr0, $s1, 448 - ld.d $s8, $sp, 168 # 8-byte Folded Reload - ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s6, $sp, 184 # 8-byte Folded Reload - ld.d $s5, $sp, 192 # 8-byte Folded Reload - ld.d $s4, $sp, 200 # 8-byte Folded Reload - ld.d $s3, $sp, 208 # 8-byte Folded Reload - ld.d $s2, $sp, 216 # 8-byte Folded Reload - ld.d $s1, $sp, 224 # 8-byte Folded Reload - ld.d $s0, $sp, 232 # 8-byte Folded Reload - ld.d $fp, $sp, 240 # 8-byte Folded Reload - ld.d $ra, $sp, 248 # 8-byte Folded Reload - addi.d $sp, $sp, 256 + ld.d $s8, $sp, 184 # 8-byte Folded Reload + ld.d $s7, $sp, 192 # 8-byte Folded Reload + ld.d $s6, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 208 # 8-byte Folded Reload + ld.d $s4, $sp, 216 # 8-byte Folded Reload + ld.d $s3, $sp, 224 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload + ld.d $s1, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 248 # 8-byte Folded Reload + ld.d $fp, $sp, 256 # 8-byte Folded Reload + ld.d $ra, $sp, 264 # 8-byte Folded Reload + addi.d $sp, $sp, 272 ret .Lfunc_end11: .size _Z16allocateLoopDatav, .Lfunc_end11-_Z16allocateLoopDatav diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s index 9e9ed358..179e167a 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_autoit.s @@ -1238,7 +1238,7 @@ cli_scanautoit: # @cli_scanautoit bne $a0, $a2, .LBB0_145 # %bb.169: # in Loop: Header=BB0_53 Depth=2 st.d $t1, $sp, 32 # 8-byte Folded Spill - move $a5, $t0 + move $a3, $t0 bstrpick.d $a0, $s4, 15, 1 slli.d $s4, $a0, 1 ori $a0, $zero, 5 @@ -1390,7 +1390,7 @@ cli_scanautoit: # @cli_scanautoit ori $a1, $zero, 15 b .LBB0_191 .LBB0_189: # in Loop: Header=BB0_53 Depth=2 - move $t0, $a5 + move $t0, $a3 ori $s3, $zero, 10 b .LBB0_135 .LBB0_190: # %.preheader463.1.thread.i @@ -1743,11 +1743,11 @@ cli_scanautoit: # @cli_scanautoit bltu $a1, $a0, .LBB0_211 b .LBB0_134 .LBB0_234: # in Loop: Header=BB0_53 Depth=2 - move $t0, $a5 + move $t0, $a3 ori $s3, $zero, 41 b .LBB0_135 .LBB0_235: # in Loop: Header=BB0_53 Depth=2 - move $t0, $a5 + move $t0, $a3 b .LBB0_135 .LBB0_236: # %.thread845.i # in Loop: Header=BB0_12 Depth=1 diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_htmlnorm.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_htmlnorm.s index 581cd63a..2a822ddd 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_htmlnorm.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_htmlnorm.s @@ -516,9 +516,9 @@ cli_html_normalise: # @cli_html_normalise st.d $zero, $sp, 192 # 8-byte Folded Spill st.d $zero, $sp, 280 # 8-byte Folded Spill st.d $zero, $sp, 56 # 8-byte Folded Spill - st.d $zero, $sp, 240 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill addi.d $a1, $s5, 4 - st.d $a1, $sp, 232 # 8-byte Folded Spill + st.d $a1, $sp, 240 # 8-byte Folded Spill ld.d $a1, $sp, 272 # 8-byte Folded Reload addi.d $a1, $a1, 4 st.d $a1, $sp, 224 # 8-byte Folded Spill @@ -759,7 +759,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.57: # %html_output_flush.exit.i1228 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -769,7 +769,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_58: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 60 stx.b $a2, $a1, $a0 .LBB3_59: # in Loop: Header=BB3_47 Depth=2 @@ -868,7 +868,6 @@ cli_html_normalise: # @cli_html_normalise move $s4, $fp move $fp, $s1 move $s1, $s2 - ld.d $s2, $sp, 280 # 8-byte Folded Reload ld.d $s3, $sp, 168 # 8-byte Folded Reload slli.w $s3, $s3, 4 pcaddu18i $ra, %call36(__ctype_b_loc) @@ -973,9 +972,6 @@ cli_html_normalise: # @cli_html_normalise beqz $a0, .LBB3_304 # %bb.85: # in Loop: Header=BB3_47 Depth=2 move $s0, $s2 - ld.d $s2, $sp, 240 # 8-byte Folded Reload - move $fp, $s1 - ld.d $s1, $sp, 280 # 8-byte Folded Reload pcaddu18i $ra, %call36(__ctype_tolower_loc) jirl $ra, $ra, 0 move $s4, $a0 @@ -992,7 +988,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.87: # %html_output_flush.exit.i1483 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1002,13 +998,10 @@ cli_html_normalise: # @cli_html_normalise .LBB3_88: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s5, $a1, $a0 .LBB3_89: # in Loop: Header=BB3_47 Depth=2 - ld.d $s3, $sp, 200 # 8-byte Folded Reload - st.d $s1, $sp, 280 # 8-byte Folded Spill - move $s1, $fp - st.d $s2, $sp, 240 # 8-byte Folded Spill + ld.d $fp, $sp, 200 # 8-byte Folded Reload move $s2, $s0 beqz $s6, .LBB3_93 # %bb.90: # in Loop: Header=BB3_47 Depth=2 @@ -1031,7 +1024,6 @@ cli_html_normalise: # @cli_html_normalise stx.b $s5, $a1, $a0 .LBB3_93: # %html_output_c.exit1484 # in Loop: Header=BB3_47 Depth=2 - move $fp, $s3 ld.d $s3, $sp, 160 # 8-byte Folded Reload beqz $a4, .LBB3_97 # %bb.94: # in Loop: Header=BB3_47 Depth=2 @@ -1165,7 +1157,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.116: # %html_output_flush.exit.i1286 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1175,7 +1167,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_117: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 61 stx.b $a2, $a1, $a0 .LBB3_118: # in Loop: Header=BB3_47 Depth=2 @@ -1263,7 +1255,7 @@ cli_html_normalise: # @cli_html_normalise bne $s5, $a0, .LBB3_264 # %bb.132: # in Loop: Header=BB3_47 Depth=2 addi.d $a0, $sp, 311 - ld.d $s0, $sp, 240 # 8-byte Folded Reload + ld.d $s0, $sp, 232 # 8-byte Folded Reload stx.b $zero, $s0, $a0 addi.d $a0, $sp, 1336 addi.d $a1, $sp, 311 @@ -1309,7 +1301,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.138: # %html_output_flush.exit.i1427 # in Loop: Header=BB3_136 Depth=3 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 lu12i.w $a2, 2 @@ -1317,7 +1309,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_139: # in Loop: Header=BB3_136 Depth=3 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s2, $a1, $a0 .LBB3_140: # in Loop: Header=BB3_136 Depth=3 ld.d $s3, $sp, 200 # 8-byte Folded Reload @@ -1384,7 +1376,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.154: # %html_output_flush.exit.i1266 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1394,7 +1386,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_155: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 61 stx.b $a2, $a1, $a0 .LBB3_156: # in Loop: Header=BB3_47 Depth=2 @@ -1439,7 +1431,6 @@ cli_html_normalise: # @cli_html_normalise .LBB3_162: # in Loop: Header=BB3_47 Depth=2 move $s6, $s3 move $s4, $s2 - ld.d $s2, $sp, 280 # 8-byte Folded Reload pcaddu18i $ra, %call36(__ctype_tolower_loc) jirl $ra, $ra, 0 ld.d $s3, $sp, 264 # 8-byte Folded Reload @@ -1456,7 +1447,7 @@ cli_html_normalise: # @cli_html_normalise ld.w $a1, $s3, 0 move $s1, $a0 move $a0, $a1 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1467,7 +1458,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_165: # in Loop: Header=BB3_47 Depth=2 addi.d $a2, $a1, 1 stptr.w $a2, $s3, 8196 - ld.d $a2, $sp, 232 # 8-byte Folded Reload + ld.d $a2, $sp, 240 # 8-byte Folded Reload stx.b $s0, $a2, $a1 ld.bu $s5, $s8, 0 ld.d $a4, $sp, 288 # 8-byte Folded Reload @@ -1492,7 +1483,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.169: # %html_output_flush.exit.i # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1502,7 +1493,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_170: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 32 stx.b $a2, $a1, $a0 .LBB3_171: # in Loop: Header=BB3_47 Depth=2 @@ -1546,7 +1537,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.179: # %html_output_flush.exit.i1242 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1556,7 +1547,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_180: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 33 stx.b $a2, $a1, $a0 .LBB3_181: # %html_output_c.exit1243 @@ -1660,7 +1651,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.203: # %html_output_flush.exit.i1291 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -1670,7 +1661,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_204: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_205: # in Loop: Header=BB3_47 Depth=2 @@ -1749,12 +1740,10 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_698 .LBB3_217: # in Loop: Header=BB3_47 Depth=2 st.d $s2, $sp, 128 # 8-byte Folded Spill - ld.d $s2, $sp, 280 # 8-byte Folded Reload ld.d $s3, $sp, 168 # 8-byte Folded Reload - st.d $s2, $sp, 280 # 8-byte Folded Spill - ori $a0, $zero, 59 beqz $s3, .LBB3_315 # %bb.218: # in Loop: Header=BB3_47 Depth=2 + ori $a0, $zero, 59 bne $s5, $a0, .LBB3_327 b .LBB3_319 .LBB3_219: # in Loop: Header=BB3_47 Depth=2 @@ -1766,7 +1755,6 @@ cli_html_normalise: # @cli_html_normalise bltz $a0, .LBB3_370 # %bb.221: # in Loop: Header=BB3_47 Depth=2 move $s4, $s3 - ld.d $s2, $sp, 280 # 8-byte Folded Reload ld.d $a0, $sp, 80 # 8-byte Folded Reload addi.w $a0, $a0, 0 slli.d $a0, $a0, 2 @@ -1780,7 +1768,6 @@ cli_html_normalise: # @cli_html_normalise slli.d $a1, $s5, 2 ldx.w $s3, $a0, $a1 ori $a0, $zero, 255 - st.d $s2, $sp, 280 # 8-byte Folded Spill bne $s3, $a0, .LBB3_394 # %bb.222: # in Loop: Header=BB3_47 Depth=2 ld.bu $a0, $s8, 1 @@ -1834,9 +1821,7 @@ cli_html_normalise: # @cli_html_normalise move $s5, $s3 move $fp, $s1 move $s1, $s2 - ld.d $s2, $sp, 280 # 8-byte Folded Reload ld.d $s3, $sp, 168 # 8-byte Folded Reload - st.d $s2, $sp, 280 # 8-byte Folded Spill ori $a0, $zero, 2 beqz $s4, .LBB3_545 # %bb.231: # in Loop: Header=BB3_47 Depth=2 @@ -2014,7 +1999,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.258: # %html_output_flush.exit.i1422 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -2024,7 +2009,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_259: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 38 stx.b $a2, $a1, $a0 .LBB3_260: # in Loop: Header=BB3_47 Depth=2 @@ -2074,14 +2059,14 @@ cli_html_normalise: # @cli_html_normalise ld.d $a4, $sp, 288 # 8-byte Folded Reload lu12i.w $a5, 2 ori $a0, $zero, 1023 - ld.d $a1, $sp, 240 # 8-byte Folded Reload + ld.d $a1, $sp, 232 # 8-byte Folded Reload bltu $a0, $a1, .LBB3_615 .LBB3_268: # in Loop: Header=BB3_47 Depth=2 addi.d $a0, $sp, 311 stx.b $s5, $a1, $a0 addi.d $a0, $a1, 1 addi.d $s8, $s8, 1 - st.d $a0, $sp, 240 # 8-byte Folded Spill + st.d $a0, $sp, 232 # 8-byte Folded Spill .LBB3_269: # in Loop: Header=BB3_47 Depth=2 move $s6, $s7 ori $s7, $zero, 4 @@ -2107,7 +2092,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.274: # %html_output_flush.exit.i1271 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -2116,7 +2101,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_275: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 62 stx.b $a2, $a1, $a0 .LBB3_276: # in Loop: Header=BB3_47 Depth=2 @@ -2190,7 +2175,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.289: # %html_output_flush.exit.i1250 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s4, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -2200,7 +2185,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_290: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s4, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 62 stx.b $a2, $a1, $a0 .LBB3_291: # in Loop: Header=BB3_47 Depth=2 @@ -2342,7 +2327,6 @@ cli_html_normalise: # @cli_html_normalise .LBB3_308: # %html_output_c.exit1340 # in Loop: Header=BB3_47 Depth=2 ld.d $fp, $sp, 200 # 8-byte Folded Reload - st.d $s2, $sp, 280 # 8-byte Folded Spill ld.d $a1, $sp, 136 # 8-byte Folded Reload move $s3, $s6 move $s2, $s4 @@ -2390,6 +2374,7 @@ cli_html_normalise: # @cli_html_normalise addi.d $s8, $s8, 1 b .LBB3_46 .LBB3_315: # in Loop: Header=BB3_47 Depth=2 + ori $a0, $zero, 59 beq $s5, $a0, .LBB3_319 # %bb.316: # in Loop: Header=BB3_47 Depth=2 ori $a0, $zero, 120 @@ -2779,7 +2764,6 @@ cli_html_normalise: # @cli_html_normalise move $s6, $s7 or $s7, $a1, $a0 addi.d $s8, $s8, 1 - st.d $s2, $sp, 280 # 8-byte Folded Spill move $s2, $s1 move $s1, $fp move $fp, $s4 @@ -2824,7 +2808,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.379: # %html_output_flush.exit.i1258 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -2833,7 +2817,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_380: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s2, $a1, $a0 .LBB3_381: # in Loop: Header=BB3_47 Depth=2 ld.d $a4, $sp, 288 # 8-byte Folded Reload @@ -2925,7 +2909,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.396: # %html_output_flush.exit.i1536 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -2935,7 +2919,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_397: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s3, $a1, $a0 .LBB3_398: # in Loop: Header=BB3_47 Depth=2 beqz $s6, .LBB3_402 @@ -3059,8 +3043,6 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_699 .LBB3_419: # in Loop: Header=BB3_47 Depth=2 st.d $s2, $sp, 128 # 8-byte Folded Spill - ld.d $a0, $sp, 280 # 8-byte Folded Reload - st.d $a0, $sp, 280 # 8-byte Folded Spill ld.w $s0, $sp, 1512 ori $s6, $zero, 1 blez $s0, .LBB3_650 @@ -3093,7 +3075,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.425: # %html_output_flush.exit.i1432 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3102,7 +3084,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_426: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 38 stx.b $a2, $a1, $a0 .LBB3_427: # in Loop: Header=BB3_47 Depth=2 @@ -3175,7 +3157,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.440: # %html_output_flush.exit.i1442 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3185,7 +3167,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_441: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 59 stx.b $a2, $a1, $a0 .LBB3_442: # in Loop: Header=BB3_47 Depth=2 @@ -3211,7 +3193,7 @@ cli_html_normalise: # @cli_html_normalise stx.b $a2, $a1, $a0 .LBB3_446: # %html_output_c.exit1443 # in Loop: Header=BB3_47 Depth=2 - st.d $zero, $sp, 240 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill move $s6, $zero addi.d $s8, $s8, 1 b .LBB3_46 @@ -3239,7 +3221,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.452: # %html_output_flush.exit.i1306 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3248,7 +3230,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_453: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_454: # in Loop: Header=BB3_47 Depth=2 @@ -3318,7 +3300,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.466: # %html_output_flush.exit.i1321 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3327,7 +3309,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_467: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_468: # in Loop: Header=BB3_47 Depth=2 @@ -3395,8 +3377,6 @@ cli_html_normalise: # @cli_html_normalise # %bb.478: # in Loop: Header=BB3_47 Depth=2 move $s0, $s3 move $s4, $s2 - move $s2, $s1 - ld.d $s1, $sp, 280 # 8-byte Folded Reload pcaddu18i $ra, %call36(__ctype_tolower_loc) jirl $ra, $ra, 0 lu12i.w $a5, 2 @@ -3413,7 +3393,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.480: # %html_output_flush.exit.i1336 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $fp, $a2 move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) @@ -3425,12 +3405,10 @@ cli_html_normalise: # @cli_html_normalise .LBB3_481: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $a2, $a1, $a0 .LBB3_482: # in Loop: Header=BB3_47 Depth=2 ld.d $fp, $sp, 200 # 8-byte Folded Reload - st.d $s1, $sp, 280 # 8-byte Folded Spill - move $s1, $s2 move $s2, $s4 move $s3, $s0 beqz $s6, .LBB3_486 @@ -3548,7 +3526,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.505: # %html_output_flush.exit.i1276 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3557,7 +3535,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_506: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 32 stx.b $a2, $a1, $a0 .LBB3_507: # in Loop: Header=BB3_47 Depth=2 @@ -3600,7 +3578,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.513: # %html_output_flush.exit.i1281 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3610,7 +3588,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_514: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s2, $a1, $a0 .LBB3_515: # in Loop: Header=BB3_47 Depth=2 beqz $s6, .LBB3_519 @@ -3657,9 +3635,6 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_641 .LBB3_522: # in Loop: Header=BB3_47 Depth=2 move $s6, $s2 - ld.d $s2, $sp, 240 # 8-byte Folded Reload - move $fp, $s1 - ld.d $s1, $sp, 280 # 8-byte Folded Reload pcaddu18i $ra, %call36(__ctype_tolower_loc) jirl $ra, $ra, 0 move $s4, $a0 @@ -3676,7 +3651,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.524: # %html_output_flush.exit.i1236 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3685,14 +3660,11 @@ cli_html_normalise: # @cli_html_normalise .LBB3_525: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s0, $a1, $a0 .LBB3_526: # in Loop: Header=BB3_47 Depth=2 ld.d $a4, $sp, 288 # 8-byte Folded Reload - ld.d $s3, $sp, 200 # 8-byte Folded Reload - st.d $s1, $sp, 280 # 8-byte Folded Spill - move $s1, $fp - st.d $s2, $sp, 240 # 8-byte Folded Spill + ld.d $fp, $sp, 200 # 8-byte Folded Reload move $s2, $s6 beqz $s5, .LBB3_530 # %bb.527: # in Loop: Header=BB3_47 Depth=2 @@ -3715,7 +3687,6 @@ cli_html_normalise: # @cli_html_normalise stx.b $s0, $a1, $a0 .LBB3_530: # %html_output_c.exit1237 # in Loop: Header=BB3_47 Depth=2 - move $fp, $s3 ld.d $a0, $sp, 136 # 8-byte Folded Reload ld.d $s3, $sp, 160 # 8-byte Folded Reload beqz $a0, .LBB3_535 @@ -3834,7 +3805,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.554: # %html_output_flush.exit.i1326 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3844,7 +3815,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_555: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_556: # in Loop: Header=BB3_47 Depth=2 @@ -3914,7 +3885,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.568: # %html_output_flush.exit.i1478 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3924,7 +3895,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_569: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s3, $a1, $a0 .LBB3_570: # in Loop: Header=BB3_47 Depth=2 beqz $s6, .LBB3_713 @@ -3974,7 +3945,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.577: # %html_output_flush.exit.i1473 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s4, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -3984,7 +3955,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_578: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s4, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s0, $a1, $a0 .LBB3_579: # in Loop: Header=BB3_47 Depth=2 beqz $s6, .LBB3_836 @@ -4032,7 +4003,7 @@ cli_html_normalise: # @cli_html_normalise # in Loop: Header=BB3_47 Depth=2 ld.d $s0, $sp, 264 # 8-byte Folded Reload ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 move $a2, $zero @@ -4091,10 +4062,10 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_596 .p2align 4, , 16 .LBB3_595: # in Loop: Header=BB3_596 Depth=3 - ld.d $a0, $sp, 240 # 8-byte Folded Reload + ld.d $a0, $sp, 232 # 8-byte Folded Reload addi.d $a0, $a0, -1 addi.d $s0, $s0, 1 - st.d $a0, $sp, 240 # 8-byte Folded Spill + st.d $a0, $sp, 232 # 8-byte Folded Spill beqz $a0, .LBB3_435 .LBB3_596: # Parent Loop BB3_28 Depth=1 # Parent Loop BB3_47 Depth=2 @@ -4110,7 +4081,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.598: # %html_output_flush.exit.i1437 # in Loop: Header=BB3_596 Depth=3 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4120,7 +4091,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_599: # in Loop: Header=BB3_596 Depth=3 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s2, $a1, $a0 .LBB3_600: # in Loop: Header=BB3_596 Depth=3 beqz $s6, .LBB3_604 @@ -4210,7 +4181,7 @@ cli_html_normalise: # @cli_html_normalise ld.d $a4, $sp, 288 # 8-byte Folded Reload lu12i.w $a5, 2 ori $a0, $zero, 45 - ld.d $a1, $sp, 240 # 8-byte Folded Reload + ld.d $a1, $sp, 232 # 8-byte Folded Reload bne $s5, $a0, .LBB3_615 # %bb.614: # in Loop: Header=BB3_47 Depth=2 ori $a0, $zero, 1024 @@ -4237,7 +4208,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.620: # %html_output_flush.exit.i1447 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4247,7 +4218,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_621: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 38 stx.b $a2, $a1, $a0 .LBB3_622: # in Loop: Header=BB3_47 Depth=2 @@ -4276,7 +4247,7 @@ cli_html_normalise: # @cli_html_normalise stx.b $a2, $a1, $a0 .LBB3_626: # %html_output_c.exit1448 # in Loop: Header=BB3_47 Depth=2 - ld.d $a0, $sp, 240 # 8-byte Folded Reload + ld.d $a0, $sp, 232 # 8-byte Folded Reload beqz $a0, .LBB3_642 # %bb.627: # %.lr.ph1788 # in Loop: Header=BB3_47 Depth=2 @@ -4290,10 +4261,10 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_629 .p2align 4, , 16 .LBB3_628: # in Loop: Header=BB3_629 Depth=3 - ld.d $a0, $sp, 240 # 8-byte Folded Reload + ld.d $a0, $sp, 232 # 8-byte Folded Reload addi.d $a0, $a0, -1 addi.d $s0, $s0, 1 - st.d $a0, $sp, 240 # 8-byte Folded Spill + st.d $a0, $sp, 232 # 8-byte Folded Spill beqz $a0, .LBB3_640 .LBB3_629: # Parent Loop BB3_28 Depth=1 # Parent Loop BB3_47 Depth=2 @@ -4309,7 +4280,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.631: # %html_output_flush.exit.i1452 # in Loop: Header=BB3_629 Depth=3 ld.w $a0, $s5, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4319,7 +4290,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_632: # in Loop: Header=BB3_629 Depth=3 addi.d $a1, $a0, 1 stptr.w $a1, $s5, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s2, $a1, $a0 .LBB3_633: # in Loop: Header=BB3_629 Depth=3 beqz $s6, .LBB3_637 @@ -4357,7 +4328,7 @@ cli_html_normalise: # @cli_html_normalise st.d $a0, $sp, 248 # 8-byte Folded Spill b .LBB3_628 .LBB3_640: # in Loop: Header=BB3_47 Depth=2 - st.d $zero, $sp, 240 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill move $s6, $zero ld.d $a0, $sp, 160 # 8-byte Folded Reload ori $s0, $zero, 10 @@ -4369,7 +4340,7 @@ cli_html_normalise: # @cli_html_normalise move $s3, $a0 b .LBB3_46 .LBB3_642: # in Loop: Header=BB3_47 Depth=2 - st.d $zero, $sp, 240 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill move $s6, $zero b .LBB3_306 .LBB3_643: # in Loop: Header=BB3_47 Depth=2 @@ -4425,7 +4396,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.653: # %html_output_flush.exit.i1301 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4435,7 +4406,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_654: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_655: # in Loop: Header=BB3_47 Depth=2 @@ -4488,7 +4459,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.664: # %html_output_flush.exit.i1316 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4498,7 +4469,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_665: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_666: # in Loop: Header=BB3_47 Depth=2 @@ -4542,7 +4513,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.673: # %html_output_flush.exit.i1296 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4552,7 +4523,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_674: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s0, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 34 stx.b $a2, $a1, $a0 .LBB3_675: # in Loop: Header=BB3_47 Depth=2 @@ -4640,7 +4611,6 @@ cli_html_normalise: # @cli_html_normalise # %bb.690: # %.lr.ph.i1364 # in Loop: Header=BB3_47 Depth=2 move $s7, $s2 - ld.d $s5, $sp, 280 # 8-byte Folded Reload ld.d $s2, $sp, 1520 move $s1, $zero slli.d $s3, $s0, 3 @@ -4713,9 +4683,6 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_442 .LBB3_702: # in Loop: Header=BB3_47 Depth=2 move $s7, $s2 - ld.d $s2, $sp, 240 # 8-byte Folded Reload - move $fp, $s1 - ld.d $s1, $sp, 280 # 8-byte Folded Reload ld.d $a4, $sp, 288 # 8-byte Folded Reload ld.d $s3, $sp, 264 # 8-byte Folded Reload addi.d $s4, $sp, 1544 @@ -4728,7 +4695,7 @@ cli_html_normalise: # @cli_html_normalise ld.w $a1, $s3, 0 move $s0, $a0 move $a0, $a1 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4740,13 +4707,10 @@ cli_html_normalise: # @cli_html_normalise .LBB3_705: # in Loop: Header=BB3_47 Depth=2 addi.d $a2, $a1, 1 stptr.w $a2, $s3, 8196 - ld.d $a2, $sp, 232 # 8-byte Folded Reload + ld.d $a2, $sp, 240 # 8-byte Folded Reload stx.b $s5, $a2, $a1 .LBB3_706: # in Loop: Header=BB3_47 Depth=2 - ld.d $s3, $sp, 200 # 8-byte Folded Reload - st.d $s1, $sp, 280 # 8-byte Folded Spill - move $s1, $fp - st.d $s2, $sp, 240 # 8-byte Folded Spill + ld.d $fp, $sp, 200 # 8-byte Folded Reload move $s2, $s7 beqz $s6, .LBB3_710 # %bb.707: # in Loop: Header=BB3_47 Depth=2 @@ -4793,7 +4757,6 @@ cli_html_normalise: # @cli_html_normalise stx.b $a0, $a6, $s4 st.d $a1, $sp, 248 # 8-byte Folded Spill .LBB3_712: # in Loop: Header=BB3_47 Depth=2 - move $fp, $s3 addi.d $s8, $s8, 1 ori $s4, $zero, 5 ori $s7, $zero, 9 @@ -4842,7 +4805,7 @@ cli_html_normalise: # @cli_html_normalise blez $a2, .LBB3_723 # %bb.722: # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s0, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 stptr.w $zero, $s0, 8196 @@ -4864,7 +4827,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.726: # %html_output_flush.exit.i1504 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4874,7 +4837,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_727: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 13 stx.b $a2, $a1, $a0 .LBB3_728: # in Loop: Header=BB3_47 Depth=2 @@ -4934,7 +4897,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.738: # %html_output_flush.exit.i1528 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -4944,7 +4907,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_739: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 62 stx.b $a2, $a1, $a0 .LBB3_740: # in Loop: Header=BB3_47 Depth=2 @@ -5004,7 +4967,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.750: # %html_output_flush.exit.i1496 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -5014,7 +4977,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_751: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 60 stx.b $a2, $a1, $a0 .LBB3_752: # in Loop: Header=BB3_47 Depth=2 @@ -5074,7 +5037,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.762: # %html_output_flush.exit.i1512 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -5084,7 +5047,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_763: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload ori $a2, $zero, 64 stx.b $a2, $a1, $a0 .LBB3_764: # in Loop: Header=BB3_47 Depth=2 @@ -5145,7 +5108,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.774: # %html_output_flush.exit.i1520 # in Loop: Header=BB3_47 Depth=2 ld.w $a0, $s3, 0 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload move $a2, $a5 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 @@ -5155,7 +5118,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_775: # in Loop: Header=BB3_47 Depth=2 addi.d $a1, $a0, 1 stptr.w $a1, $s3, 8196 - ld.d $a1, $sp, 232 # 8-byte Folded Reload + ld.d $a1, $sp, 240 # 8-byte Folded Reload stx.b $s5, $a1, $a0 .LBB3_776: # in Loop: Header=BB3_47 Depth=2 ld.d $fp, $sp, 200 # 8-byte Folded Reload @@ -5299,7 +5262,6 @@ cli_html_normalise: # @cli_html_normalise # in Loop: Header=BB3_47 Depth=2 move $s1, $zero ld.d $fp, $sp, 200 # 8-byte Folded Reload - st.d $s5, $sp, 280 # 8-byte Folded Spill .LBB3_802: # Parent Loop BB3_28 Depth=1 # Parent Loop BB3_47 Depth=2 # => This Inner Loop Header: Depth=3 @@ -5443,7 +5405,7 @@ cli_html_normalise: # @cli_html_normalise .LBB3_823: # in Loop: Header=BB3_47 Depth=2 ld.d $s0, $sp, 264 # 8-byte Folded Reload .LBB3_824: # in Loop: Header=BB3_47 Depth=2 - ld.d $a0, $sp, 232 # 8-byte Folded Reload + ld.d $a0, $sp, 240 # 8-byte Folded Reload add.d $a0, $a0, $a2 addi.d $a1, $sp, 296 move $a2, $s4 @@ -5562,14 +5524,13 @@ cli_html_normalise: # @cli_html_normalise pcaddu18i $ra, %call36(html_tag_arg_add) jirl $ra, $ra, 0 ld.w $a0, $fp, 4 + ld.d $a2, $sp, 192 # 8-byte Folded Reload beqz $a0, .LBB3_845 # %bb.843: # in Loop: Header=BB3_47 Depth=2 - ld.d $a0, $sp, 192 # 8-byte Folded Reload - beqz $a0, .LBB3_845 + beqz $a2, .LBB3_845 # %bb.844: # in Loop: Header=BB3_47 Depth=2 ld.w $a1, $fp, 0 move $a0, $fp - ld.d $a2, $sp, 192 # 8-byte Folded Reload pcaddu18i $ra, %call36(html_tag_set_inahref) jirl $ra, $ra, 0 .LBB3_845: # in Loop: Header=BB3_47 Depth=2 @@ -5783,6 +5744,7 @@ cli_html_normalise: # @cli_html_normalise ld.d $fp, $sp, 200 # 8-byte Folded Reload lu12i.w $a5, 2 ori $s0, $zero, 10 + ld.d $s3, $sp, 280 # 8-byte Folded Reload beqz $a3, .LBB3_888 # %bb.878: # in Loop: Header=BB3_47 Depth=2 ldptr.w $a0, $a3, 8196 @@ -5992,6 +5954,7 @@ cli_html_normalise: # @cli_html_normalise ld.d $a1, $sp, 256 # 8-byte Folded Reload ori $s0, $zero, 10 move $s1, $s3 + ld.d $s3, $sp, 280 # 8-byte Folded Reload beqz $a0, .LBB3_892 # %bb.905: # in Loop: Header=BB3_893 Depth=3 ldptr.w $a2, $a3, 8196 @@ -6072,6 +6035,7 @@ cli_html_normalise: # @cli_html_normalise ldx.w $s1, $a3, $s0 ld.d $fp, $sp, 200 # 8-byte Folded Reload ori $s0, $zero, 10 + ld.d $s3, $sp, 280 # 8-byte Folded Reload beq $s1, $a5, .LBB3_890 b .LBB3_891 .LBB3_913: # in Loop: Header=BB3_893 Depth=3 @@ -6083,6 +6047,7 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_890 .LBB3_914: # %._crit_edge59.i # in Loop: Header=BB3_47 Depth=2 + st.d $s3, $sp, 280 # 8-byte Folded Spill beqz $a3, .LBB3_918 # %bb.915: # in Loop: Header=BB3_47 Depth=2 ldptr.w $a0, $a3, 8196 @@ -6135,15 +6100,16 @@ cli_html_normalise: # @cli_html_normalise # in Loop: Header=BB3_47 Depth=2 ld.d $s3, $sp, 160 # 8-byte Folded Reload ld.d $s7, $sp, 200 # 8-byte Folded Reload - ld.d $s0, $sp, 192 # 8-byte Folded Reload + ld.d $a0, $sp, 192 # 8-byte Folded Reload move $s2, $s5 - beqz $s0, .LBB3_928 + beqz $a0, .LBB3_928 # %bb.926: # %html_tag_arg_value.exit1390 # in Loop: Header=BB3_47 Depth=2 ld.d $a2, $sp, 280 # 8-byte Folded Reload beqz $a2, .LBB3_928 # %bb.927: # in Loop: Header=BB3_47 Depth=2 move $a0, $s7 + ld.d $s0, $sp, 192 # 8-byte Folded Reload move $a1, $s0 ld.d $a3, $sp, 112 # 8-byte Folded Reload pcaddu18i $ra, %call36(html_tag_contents_append) @@ -6152,9 +6118,8 @@ cli_html_normalise: # @cli_html_normalise move $a1, $s0 pcaddu18i $ra, %call36(html_tag_contents_done) jirl $ra, $ra, 0 - move $s0, $zero + st.d $zero, $sp, 192 # 8-byte Folded Spill .LBB3_928: # in Loop: Header=BB3_47 Depth=2 - st.d $s0, $sp, 192 # 8-byte Folded Spill beqz $s1, .LBB3_930 # %bb.929: # in Loop: Header=BB3_47 Depth=2 pcalau12i $a0, %pc_hi20(.L.str.36) @@ -6260,13 +6225,13 @@ cli_html_normalise: # @cli_html_normalise move $s7, $zero b .LBB3_1006 .LBB3_940: - st.d $zero, $sp, 240 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill st.d $zero, $sp, 56 # 8-byte Folded Spill st.d $zero, $sp, 192 # 8-byte Folded Spill .LBB3_941: # %._crit_edge1868 move $s4, $s3 move $s3, $fp - ld.d $fp, $sp, 240 # 8-byte Folded Reload + ld.d $fp, $sp, 232 # 8-byte Folded Reload ori $s7, $zero, 1 beqz $s1, .LBB3_965 # %bb.942: @@ -6418,18 +6383,17 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_956 .LBB3_965: ld.d $s6, $sp, 272 # 8-byte Folded Reload + ld.d $a0, $sp, 56 # 8-byte Folded Reload move $fp, $s3 move $s3, $s4 - ld.d $a0, $sp, 56 # 8-byte Folded Reload beqz $a0, .LBB3_967 .LBB3_966: pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 .LBB3_967: - ld.d $a0, $sp, 192 # 8-byte Folded Reload - beqz $a0, .LBB3_969 + ld.d $a1, $sp, 192 # 8-byte Folded Reload + beqz $a1, .LBB3_969 # %bb.968: - move $a1, $a0 ld.d $a0, $fp, 24 slli.d $a1, $a1, 3 addi.d $s0, $a1, -8 @@ -6504,6 +6468,7 @@ cli_html_normalise: # @cli_html_normalise # %bb.980: # %.lr.ph1873.split.us.split.preheader move $s2, $zero lu12i.w $s6, 2 + ld.d $s7, $sp, 272 # 8-byte Folded Reload b .LBB3_982 .p2align 4, , 16 .LBB3_981: # %html_output_c.exit1605.us @@ -6522,7 +6487,6 @@ cli_html_normalise: # @cli_html_normalise ldx.bu $a0, $s0, $s2 ld.d $a1, $s4, 0 slli.d $a2, $a0, 2 - ld.d $s7, $sp, 272 # 8-byte Folded Reload ldptr.w $a0, $s7, 8196 ldx.w $s1, $a1, $a2 bne $a0, $s6, .LBB3_981 @@ -6558,6 +6522,7 @@ cli_html_normalise: # @cli_html_normalise b .LBB3_967 .LBB3_986: # %.lr.ph1873.split.split.us.preheader lu12i.w $s5, 2 + ld.d $s3, $sp, 264 # 8-byte Folded Reload b .LBB3_988 .p2align 4, , 16 .LBB3_987: # %html_output_c.exit1605.us1876 @@ -6576,7 +6541,6 @@ cli_html_normalise: # @cli_html_normalise ldx.bu $a0, $s0, $s2 ld.d $a1, $s4, 0 slli.d $a2, $a0, 2 - ld.d $s3, $sp, 264 # 8-byte Folded Reload ldptr.w $a0, $s3, 8196 ldx.w $s1, $a1, $a2 bne $a0, $s5, .LBB3_987 @@ -6598,8 +6562,8 @@ cli_html_normalise: # @cli_html_normalise ld.d $s6, $sp, 272 # 8-byte Folded Reload ld.d $s5, $sp, 264 # 8-byte Folded Reload ld.d $fp, $sp, 200 # 8-byte Folded Reload - ori $s7, $zero, 1 ld.d $a0, $sp, 56 # 8-byte Folded Reload + ori $s7, $zero, 1 bnez $a0, .LBB3_966 b .LBB3_967 .LBB3_992: @@ -6714,10 +6678,10 @@ cli_html_normalise: # @cli_html_normalise move $s7, $zero .LBB3_1009: # %.loopexit ld.d $s8, $sp, 208 # 8-byte Folded Reload + ld.d $a0, $sp, 56 # 8-byte Folded Reload move $s1, $fp move $fp, $s3 ld.d $s3, $sp, 160 # 8-byte Folded Reload - ld.d $a0, $sp, 56 # 8-byte Folded Reload bnez $a0, .LBB3_966 b .LBB3_967 .LBB3_1010: diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mbox.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mbox.s index d11c3996..dcd7d310 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mbox.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mbox.s @@ -3389,7 +3389,6 @@ parseEmailBody: # @parseEmailBody addi.d $a0, $a0, %pc_lo12(.L.str.108) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - st.d $s8, $sp, 64 # 8-byte Folded Spill move $a0, $s8 ld.d $a1, $sp, 48 # 8-byte Folded Reload pcaddu18i $ra, %call36(getTextPart) diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s index 0eb87916..e4522cdb 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_mspack.s @@ -2661,13 +2661,13 @@ lzx_decompress: # @lzx_decompress st.d $s8, $sp, 200 # 8-byte Folded Spill move $fp, $a0 addi.w $a0, $zero, -111 - beqz $fp, .LBB7_625 + beqz $fp, .LBB7_627 # %bb.1: move $s0, $a1 - bltz $a1, .LBB7_625 + bltz $a1, .LBB7_627 # %bb.2: ld.w $a0, $fp, 96 - bnez $a0, .LBB7_625 + bnez $a0, .LBB7_627 # %bb.3: ld.d $a0, $fp, 136 ld.d $a1, $fp, 128 @@ -2686,7 +2686,7 @@ lzx_decompress: # @lzx_decompress move $a2, $s1 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 - bne $a0, $s1, .LBB7_623 + bne $a0, $s1, .LBB7_625 # %bb.6: # %._crit_edge3331 ld.d $a1, $fp, 128 .LBB7_7: @@ -2697,7 +2697,7 @@ lzx_decompress: # @lzx_decompress st.d $a0, $fp, 16 sub.d $s0, $s0, $s1 .LBB7_8: - beqz $s0, .LBB7_621 + beqz $s0, .LBB7_623 # %bb.9: # %.split3132 ld.d $a0, $fp, 16 add.d $a1, $a0, $s0 @@ -2707,13 +2707,13 @@ lzx_decompress: # @lzx_decompress add.d $a1, $a1, $a2 srli.d $a1, $a1, 15 addi.w $a1, $a1, 1 - bgeu $a0, $a1, .LBB7_620 + bgeu $a0, $a1, .LBB7_622 # %bb.10: # %.lr.ph3142 st.d $s0, $sp, 128 # 8-byte Folded Spill st.d $a1, $sp, 96 # 8-byte Folded Spill lu12i.w $a1, 13 ori $a1, $a1, 1632 - add.d $s6, $fp, $a1 + add.d $s0, $fp, $a1 lu12i.w $a1, 5 ori $a2, $a1, 1627 add.d $a2, $fp, $a2 @@ -2746,7 +2746,7 @@ lzx_decompress: # @lzx_decompress st.d $a1, $sp, 48 # 8-byte Folded Spill st.d $a3, $sp, 120 # 8-byte Folded Spill addi.d $a1, $a3, 16 - st.d $a1, $sp, 40 # 8-byte Folded Spill + st.d $a1, $sp, 32 # 8-byte Folded Spill ori $s3, $zero, 1 lu12i.w $a2, 8 lu12i.w $a1, -256 @@ -2755,48 +2755,48 @@ lzx_decompress: # @lzx_decompress lu12i.w $a1, -8192 lu32i.d $a1, 0 st.d $a1, $sp, 24 # 8-byte Folded Spill - st.d $s6, $sp, 168 # 8-byte Folded Spill + st.d $s0, $sp, 168 # 8-byte Folded Spill .LBB7_11: # =>This Loop Header: Depth=1 # Child Loop BB7_24 Depth 2 # Child Loop BB7_35 Depth 2 # Child Loop BB7_48 Depth 2 # Child Loop BB7_62 Depth 2 - # Child Loop BB7_285 Depth 3 - # Child Loop BB7_485 Depth 3 - # Child Loop BB7_504 Depth 3 - # Child Loop BB7_518 Depth 3 - # Child Loop BB7_523 Depth 4 - # Child Loop BB7_534 Depth 3 + # Child Loop BB7_286 Depth 3 + # Child Loop BB7_487 Depth 3 + # Child Loop BB7_506 Depth 3 + # Child Loop BB7_520 Depth 3 + # Child Loop BB7_525 Depth 4 + # Child Loop BB7_536 Depth 3 # Child Loop BB7_67 Depth 3 # Child Loop BB7_72 Depth 4 # Child Loop BB7_129 Depth 4 - # Child Loop BB7_217 Depth 4 - # Child Loop BB7_198 Depth 4 - # Child Loop BB7_221 Depth 4 - # Child Loop BB7_189 Depth 4 - # Child Loop BB7_208 Depth 4 - # Child Loop BB7_244 Depth 4 - # Child Loop BB7_248 Depth 4 - # Child Loop BB7_251 Depth 4 - # Child Loop BB7_235 Depth 4 - # Child Loop BB7_254 Depth 4 - # Child Loop BB7_263 Depth 4 - # Child Loop BB7_267 Depth 4 - # Child Loop BB7_270 Depth 4 - # Child Loop BB7_295 Depth 3 - # Child Loop BB7_307 Depth 3 - # Child Loop BB7_312 Depth 4 - # Child Loop BB7_368 Depth 4 - # Child Loop BB7_427 Depth 4 - # Child Loop BB7_448 Depth 4 - # Child Loop BB7_452 Depth 4 - # Child Loop BB7_455 Depth 4 - # Child Loop BB7_439 Depth 4 - # Child Loop BB7_458 Depth 4 - # Child Loop BB7_467 Depth 4 - # Child Loop BB7_471 Depth 4 - # Child Loop BB7_474 Depth 4 - # Child Loop BB7_602 Depth 2 + # Child Loop BB7_218 Depth 4 + # Child Loop BB7_199 Depth 4 + # Child Loop BB7_222 Depth 4 + # Child Loop BB7_190 Depth 4 + # Child Loop BB7_209 Depth 4 + # Child Loop BB7_245 Depth 4 + # Child Loop BB7_249 Depth 4 + # Child Loop BB7_252 Depth 4 + # Child Loop BB7_236 Depth 4 + # Child Loop BB7_255 Depth 4 + # Child Loop BB7_264 Depth 4 + # Child Loop BB7_268 Depth 4 + # Child Loop BB7_271 Depth 4 + # Child Loop BB7_296 Depth 3 + # Child Loop BB7_308 Depth 3 + # Child Loop BB7_313 Depth 4 + # Child Loop BB7_369 Depth 4 + # Child Loop BB7_429 Depth 4 + # Child Loop BB7_450 Depth 4 + # Child Loop BB7_454 Depth 4 + # Child Loop BB7_457 Depth 4 + # Child Loop BB7_441 Depth 4 + # Child Loop BB7_460 Depth 4 + # Child Loop BB7_469 Depth 4 + # Child Loop BB7_473 Depth 4 + # Child Loop BB7_476 Depth 4 + # Child Loop BB7_604 Depth 2 ld.w $a1, $fp, 56 beqz $a1, .LBB7_13 # %bb.12: # in Loop: Header=BB7_11 Depth=1 @@ -2808,7 +2808,7 @@ lzx_decompress: # @lzx_decompress b .LBB7_16 .LBB7_14: # in Loop: Header=BB7_11 Depth=1 ld.w $a1, $fp, 76 - bnez $a1, .LBB7_634 + bnez $a1, .LBB7_636 # %bb.15: # %.thread # in Loop: Header=BB7_11 Depth=1 ori $a0, $zero, 1 @@ -2876,26 +2876,26 @@ lzx_decompress: # @lzx_decompress addi.d $a0, $s8, 1 bltu $a0, $s5, .LBB7_23 # %bb.25: # in Loop: Header=BB7_24 Depth=2 - ld.d $a3, $s6, 8 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 beqz $a3, .LBB7_27 # %bb.26: # in Loop: Header=BB7_24 Depth=2 - ld.d $a0, $s6, 0 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 bgez $a0, .LBB7_28 - b .LBB7_623 + b .LBB7_625 .LBB7_27: # in Loop: Header=BB7_24 Depth=2 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 - bltz $a0, .LBB7_623 + bltz $a0, .LBB7_625 .LBB7_28: # in Loop: Header=BB7_24 Depth=2 bnez $a0, .LBB7_22 # %bb.29: # in Loop: Header=BB7_24 Depth=2 ld.bu $a0, $fp, 92 beqz $a0, .LBB7_21 - b .LBB7_622 + b .LBB7_624 .LBB7_30: # %.preheader1368 # in Loop: Header=BB7_11 Depth=1 addi.w $a1, $a0, 0 @@ -2933,12 +2933,12 @@ lzx_decompress: # @lzx_decompress addi.d $a0, $s8, 1 bltu $a0, $s5, .LBB7_34 # %bb.36: # in Loop: Header=BB7_35 Depth=2 - ld.d $a3, $s6, 8 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 beqz $a3, .LBB7_38 # %bb.37: # in Loop: Header=BB7_35 Depth=2 - ld.d $a0, $s6, 0 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 b .LBB7_39 .LBB7_38: # in Loop: Header=BB7_35 Depth=2 @@ -2946,13 +2946,13 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 .LBB7_39: # in Loop: Header=BB7_35 Depth=2 - bltz $a0, .LBB7_623 + bltz $a0, .LBB7_625 # %bb.40: # in Loop: Header=BB7_35 Depth=2 bnez $a0, .LBB7_33 # %bb.41: # in Loop: Header=BB7_35 Depth=2 ld.bu $a0, $fp, 92 beqz $a0, .LBB7_32 - b .LBB7_622 + b .LBB7_624 .LBB7_42: # %._crit_edge2844.loopexit # in Loop: Header=BB7_11 Depth=1 addi.w $s7, $s1, 16 @@ -3008,20 +3008,20 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 .LBB7_52: # in Loop: Header=BB7_48 Depth=2 - bltz $a0, .LBB7_623 + bltz $a0, .LBB7_625 # %bb.53: # in Loop: Header=BB7_48 Depth=2 bnez $a0, .LBB7_46 # %bb.54: # in Loop: Header=BB7_48 Depth=2 ld.bu $a0, $fp, 92 beqz $a0, .LBB7_45 - b .LBB7_622 + b .LBB7_624 .LBB7_55: # in Loop: Header=BB7_11 Depth=1 addi.d $a0, $s7, -16 b .LBB7_57 .LBB7_56: # %._crit_edge2855.loopexit # in Loop: Header=BB7_11 Depth=1 addi.d $a0, $s4, 16 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 .LBB7_57: # %._crit_edge2855 # in Loop: Header=BB7_11 Depth=1 @@ -3056,47 +3056,47 @@ lzx_decompress: # @lzx_decompress sub.d $a1, $a1, $s2 add.w $a1, $a1, $a0 st.d $a1, $sp, 160 # 8-byte Folded Spill - blez $a1, .LBB7_589 + blez $a1, .LBB7_591 .LBB7_62: # %.lr.ph3117 # Parent Loop BB7_11 Depth=1 # => This Loop Header: Depth=2 - # Child Loop BB7_285 Depth 3 - # Child Loop BB7_485 Depth 3 - # Child Loop BB7_504 Depth 3 - # Child Loop BB7_518 Depth 3 - # Child Loop BB7_523 Depth 4 - # Child Loop BB7_534 Depth 3 + # Child Loop BB7_286 Depth 3 + # Child Loop BB7_487 Depth 3 + # Child Loop BB7_506 Depth 3 + # Child Loop BB7_520 Depth 3 + # Child Loop BB7_525 Depth 4 + # Child Loop BB7_536 Depth 3 # Child Loop BB7_67 Depth 3 # Child Loop BB7_72 Depth 4 # Child Loop BB7_129 Depth 4 - # Child Loop BB7_217 Depth 4 - # Child Loop BB7_198 Depth 4 - # Child Loop BB7_221 Depth 4 - # Child Loop BB7_189 Depth 4 - # Child Loop BB7_208 Depth 4 - # Child Loop BB7_244 Depth 4 - # Child Loop BB7_248 Depth 4 - # Child Loop BB7_251 Depth 4 - # Child Loop BB7_235 Depth 4 - # Child Loop BB7_254 Depth 4 - # Child Loop BB7_263 Depth 4 - # Child Loop BB7_267 Depth 4 - # Child Loop BB7_270 Depth 4 - # Child Loop BB7_295 Depth 3 - # Child Loop BB7_307 Depth 3 - # Child Loop BB7_312 Depth 4 - # Child Loop BB7_368 Depth 4 - # Child Loop BB7_427 Depth 4 - # Child Loop BB7_448 Depth 4 - # Child Loop BB7_452 Depth 4 - # Child Loop BB7_455 Depth 4 - # Child Loop BB7_439 Depth 4 - # Child Loop BB7_458 Depth 4 - # Child Loop BB7_467 Depth 4 - # Child Loop BB7_471 Depth 4 - # Child Loop BB7_474 Depth 4 + # Child Loop BB7_218 Depth 4 + # Child Loop BB7_199 Depth 4 + # Child Loop BB7_222 Depth 4 + # Child Loop BB7_190 Depth 4 + # Child Loop BB7_209 Depth 4 + # Child Loop BB7_245 Depth 4 + # Child Loop BB7_249 Depth 4 + # Child Loop BB7_252 Depth 4 + # Child Loop BB7_236 Depth 4 + # Child Loop BB7_255 Depth 4 + # Child Loop BB7_264 Depth 4 + # Child Loop BB7_268 Depth 4 + # Child Loop BB7_271 Depth 4 + # Child Loop BB7_296 Depth 3 + # Child Loop BB7_308 Depth 3 + # Child Loop BB7_313 Depth 4 + # Child Loop BB7_369 Depth 4 + # Child Loop BB7_429 Depth 4 + # Child Loop BB7_450 Depth 4 + # Child Loop BB7_454 Depth 4 + # Child Loop BB7_457 Depth 4 + # Child Loop BB7_441 Depth 4 + # Child Loop BB7_460 Depth 4 + # Child Loop BB7_469 Depth 4 + # Child Loop BB7_473 Depth 4 + # Child Loop BB7_476 Depth 4 ld.w $a0, $fp, 76 - beqz $a0, .LBB7_275 + beqz $a0, .LBB7_276 .LBB7_63: # in Loop: Header=BB7_62 Depth=2 ld.w $a0, $fp, 76 ld.d $a1, $sp, 160 # 8-byte Folded Reload @@ -3108,42 +3108,42 @@ lzx_decompress: # @lzx_decompress st.d $a2, $sp, 176 # 8-byte Folded Spill sub.d $a2, $a0, $a2 st.w $a2, $fp, 76 - beq $a1, $s3, .LBB7_305 + beq $a1, $s3, .LBB7_306 # %bb.64: # in Loop: Header=BB7_62 Depth=2 ori $a2, $zero, 3 - beq $a1, $a2, .LBB7_292 + beq $a1, $a2, .LBB7_293 # %bb.65: # in Loop: Header=BB7_62 Depth=2 ori $a2, $zero, 2 - bne $a1, $a2, .LBB7_632 + bne $a1, $a2, .LBB7_634 # %bb.66: # %.preheader1356 # in Loop: Header=BB7_62 Depth=2 ld.d $a1, $sp, 144 # 8-byte Folded Reload st.d $a1, $sp, 56 # 8-byte Folded Spill ld.d $a1, $sp, 136 # 8-byte Folded Reload st.d $a1, $sp, 16 # 8-byte Folded Spill - st.d $s2, $sp, 32 # 8-byte Folded Spill + st.d $s2, $sp, 40 # 8-byte Folded Spill ld.d $a1, $sp, 176 # 8-byte Folded Reload st.d $a1, $sp, 192 # 8-byte Folded Spill - blez $a0, .LBB7_494 + blez $a0, .LBB7_496 .LBB7_67: # %.preheader1350 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Loop Header: Depth=3 # Child Loop BB7_72 Depth 4 # Child Loop BB7_129 Depth 4 - # Child Loop BB7_217 Depth 4 - # Child Loop BB7_198 Depth 4 - # Child Loop BB7_221 Depth 4 - # Child Loop BB7_189 Depth 4 - # Child Loop BB7_208 Depth 4 - # Child Loop BB7_244 Depth 4 - # Child Loop BB7_248 Depth 4 - # Child Loop BB7_251 Depth 4 - # Child Loop BB7_235 Depth 4 - # Child Loop BB7_254 Depth 4 - # Child Loop BB7_263 Depth 4 - # Child Loop BB7_267 Depth 4 - # Child Loop BB7_270 Depth 4 + # Child Loop BB7_218 Depth 4 + # Child Loop BB7_199 Depth 4 + # Child Loop BB7_222 Depth 4 + # Child Loop BB7_190 Depth 4 + # Child Loop BB7_209 Depth 4 + # Child Loop BB7_245 Depth 4 + # Child Loop BB7_249 Depth 4 + # Child Loop BB7_252 Depth 4 + # Child Loop BB7_236 Depth 4 + # Child Loop BB7_255 Depth 4 + # Child Loop BB7_264 Depth 4 + # Child Loop BB7_268 Depth 4 + # Child Loop BB7_271 Depth 4 ori $s2, $zero, 1 addi.w $a0, $s7, 0 ori $a1, $zero, 15 @@ -3183,26 +3183,26 @@ lzx_decompress: # @lzx_decompress addi.d $a0, $s8, 1 bltu $a0, $s5, .LBB7_71 # %bb.73: # in Loop: Header=BB7_72 Depth=4 - ld.d $a3, $s6, 8 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 beqz $a3, .LBB7_75 # %bb.74: # in Loop: Header=BB7_72 Depth=4 - ld.d $a0, $s6, 0 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 bgez $a0, .LBB7_76 - b .LBB7_623 + b .LBB7_625 .LBB7_75: # in Loop: Header=BB7_72 Depth=4 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 - bltz $a0, .LBB7_623 + bltz $a0, .LBB7_625 .LBB7_76: # in Loop: Header=BB7_72 Depth=4 bnez $a0, .LBB7_70 # %bb.77: # in Loop: Header=BB7_72 Depth=4 ld.bu $a0, $fp, 92 beqz $a0, .LBB7_69 - b .LBB7_622 + b .LBB7_624 .LBB7_78: # in Loop: Header=BB7_67 Depth=3 move $a0, $s7 .LBB7_79: # %._crit_edge2935 @@ -3218,7 +3218,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.81: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 19, 19 @@ -3233,7 +3233,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.83: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 18, 18 @@ -3248,7 +3248,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.85: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 17, 17 @@ -3263,7 +3263,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.87: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 16, 16 @@ -3278,7 +3278,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.89: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 15, 15 @@ -3293,7 +3293,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.91: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 14, 14 @@ -3308,7 +3308,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.93: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 13, 13 @@ -3323,9 +3323,8 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.95: # in Loop: Header=BB7_67 Depth=3 - ld.d $s0, $sp, 128 # 8-byte Folded Reload slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 12, 12 or $a1, $a1, $a2 @@ -3334,13 +3333,12 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - st.d $s0, $sp, 128 # 8-byte Folded Spill bltu $s3, $a1, .LBB7_120 # %bb.96: # %.preheader1348.8 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.97: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 11, 11 @@ -3355,7 +3353,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.99: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 10, 10 @@ -3370,7 +3368,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.101: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 9, 9 @@ -3385,7 +3383,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.103: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 8, 8 @@ -3400,7 +3398,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.105: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 7, 7 @@ -3415,7 +3413,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.107: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 6, 6 @@ -3430,7 +3428,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.109: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 5, 5 @@ -3445,7 +3443,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.111: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 4, 4 @@ -3460,7 +3458,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.113: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 3, 3 @@ -3475,7 +3473,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.115: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 2, 2 @@ -3490,7 +3488,7 @@ lzx_decompress: # @lzx_decompress # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.117: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 1, 1 @@ -3504,10 +3502,10 @@ lzx_decompress: # @lzx_decompress # %bb.118: # %.preheader1348.19 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $s3, 14, 4 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 + bltu $a2, $a1, .LBB7_628 # %bb.119: # in Loop: Header=BB7_67 Depth=3 slli.d $a1, $s3, 1 andi $a2, $s1, 1 @@ -3518,9 +3516,9 @@ lzx_decompress: # @lzx_decompress ldx.hu $s3, $a2, $a1 ori $a1, $zero, 655 bgeu $a1, $s3, .LBB7_121 - b .LBB7_638 + b .LBB7_640 .LBB7_120: # in Loop: Header=BB7_67 Depth=3 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 .LBB7_121: # %.loopexit1349 # in Loop: Header=BB7_67 Depth=3 @@ -3530,7 +3528,7 @@ lzx_decompress: # @lzx_decompress ori $a2, $zero, 255 bltu $a2, $s3, .LBB7_123 # %bb.122: # in Loop: Header=BB7_67 Depth=3 - ld.d $a0, $sp, 32 # 8-byte Folded Reload + ld.d $a0, $sp, 40 # 8-byte Folded Reload addi.w $s2, $a0, 1 bstrpick.d $a0, $a0, 31, 0 ld.d $a1, $sp, 120 # 8-byte Folded Reload @@ -3542,15 +3540,15 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 56 # 8-byte Folded Reload st.d $a1, $sp, 144 # 8-byte Folded Spill ori $s3, $zero, 1 - b .LBB7_272 + b .LBB7_273 .LBB7_123: # in Loop: Header=BB7_67 Depth=3 andi $a7, $s3, 7 ori $a2, $zero, 7 - bne $a7, $a2, .LBB7_179 + bne $a7, $a2, .LBB7_136 # %bb.124: # %.preheader1346 # in Loop: Header=BB7_67 Depth=3 ori $a2, $zero, 15 - blt $a2, $s7, .LBB7_136 + blt $a2, $s7, .LBB7_137 # %bb.125: # %.lr.ph2944.preheader # in Loop: Header=BB7_67 Depth=3 sub.d $a0, $a1, $a0 @@ -3575,7 +3573,7 @@ lzx_decompress: # @lzx_decompress addi.w $s7, $s6, 16 addi.d $s8, $s8, 2 addi.d $s4, $s4, -16 - bgez $s6, .LBB7_136 + bgez $s6, .LBB7_137 .LBB7_129: # %.lr.ph2944 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 @@ -3599,14 +3597,17 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 .LBB7_133: # in Loop: Header=BB7_129 Depth=4 - bltz $a0, .LBB7_623 + bltz $a0, .LBB7_625 # %bb.134: # in Loop: Header=BB7_129 Depth=4 bnez $a0, .LBB7_127 # %bb.135: # in Loop: Header=BB7_129 Depth=4 ld.bu $a0, $fp, 92 beqz $a0, .LBB7_126 - b .LBB7_622 -.LBB7_136: # %._crit_edge2945 + b .LBB7_624 +.LBB7_136: # in Loop: Header=BB7_67 Depth=3 + ld.d $s2, $sp, 40 # 8-byte Folded Reload + b .LBB7_180 +.LBB7_137: # %._crit_edge2945 # in Loop: Header=BB7_67 Depth=3 ld.d $a0, $sp, 112 # 8-byte Folded Reload and $a0, $s1, $a0 @@ -3614,15 +3615,16 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.137: # %.preheader1344.preheader + bltu $a0, $a1, .LBB7_178 +# %bb.138: # %.preheader1344.preheader # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.138: # in Loop: Header=BB7_67 Depth=3 + ld.d $s2, $sp, 40 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.139: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 19, 19 or $a0, $a0, $a1 @@ -3631,13 +3633,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_178 -# %bb.139: # %.preheader1344.1 + bltu $a0, $a1, .LBB7_179 +# %bb.140: # %.preheader1344.1 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.140: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.141: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 18, 18 or $a0, $a0, $a1 @@ -3646,13 +3648,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_178 -# %bb.141: # %.preheader1344.2 + bltu $a0, $a1, .LBB7_179 +# %bb.142: # %.preheader1344.2 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.142: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.143: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 17, 17 or $a0, $a0, $a1 @@ -3661,13 +3663,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_178 -# %bb.143: # %.preheader1344.3 + bltu $a0, $a1, .LBB7_179 +# %bb.144: # %.preheader1344.3 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.144: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.145: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 16, 16 or $a0, $a0, $a1 @@ -3676,13 +3678,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_178 -# %bb.145: # %.preheader1344.4 + bltu $a0, $a1, .LBB7_179 +# %bb.146: # %.preheader1344.4 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.146: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.147: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 15, 15 or $a0, $a0, $a1 @@ -3691,14 +3693,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_178 -# %bb.147: # %.preheader1344.5 + bltu $a0, $a1, .LBB7_179 +# %bb.148: # %.preheader1344.5 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.148: # in Loop: Header=BB7_67 Depth=3 - ld.d $s0, $sp, 128 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.149: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 14, 14 or $a0, $a0, $a1 @@ -3707,14 +3708,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - st.d $s0, $sp, 128 # 8-byte Folded Spill - bltu $a0, $a1, .LBB7_177 -# %bb.149: # %.preheader1344.6 + bltu $a0, $a1, .LBB7_178 +# %bb.150: # %.preheader1344.6 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.150: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.151: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 13, 13 or $a0, $a0, $a1 @@ -3723,13 +3723,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.151: # %.preheader1344.7 + bltu $a0, $a1, .LBB7_178 +# %bb.152: # %.preheader1344.7 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.152: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.153: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 12, 12 or $a0, $a0, $a1 @@ -3738,13 +3738,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.153: # %.preheader1344.8 + bltu $a0, $a1, .LBB7_178 +# %bb.154: # %.preheader1344.8 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.154: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.155: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 11, 11 or $a0, $a0, $a1 @@ -3753,13 +3753,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.155: # %.preheader1344.9 + bltu $a0, $a1, .LBB7_178 +# %bb.156: # %.preheader1344.9 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.156: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.157: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 10, 10 or $a0, $a0, $a1 @@ -3768,13 +3768,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.157: # %.preheader1344.10 + bltu $a0, $a1, .LBB7_178 +# %bb.158: # %.preheader1344.10 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.158: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.159: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 9, 9 or $a0, $a0, $a1 @@ -3783,13 +3783,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.159: # %.preheader1344.11 + bltu $a0, $a1, .LBB7_178 +# %bb.160: # %.preheader1344.11 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.160: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.161: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 8, 8 or $a0, $a0, $a1 @@ -3798,13 +3798,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.161: # %.preheader1344.12 + bltu $a0, $a1, .LBB7_178 +# %bb.162: # %.preheader1344.12 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.162: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.163: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 7, 7 or $a0, $a0, $a1 @@ -3813,13 +3813,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.163: # %.preheader1344.13 + bltu $a0, $a1, .LBB7_178 +# %bb.164: # %.preheader1344.13 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.164: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.165: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 6, 6 or $a0, $a0, $a1 @@ -3828,13 +3828,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.165: # %.preheader1344.14 + bltu $a0, $a1, .LBB7_178 +# %bb.166: # %.preheader1344.14 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.166: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.167: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 5, 5 or $a0, $a0, $a1 @@ -3843,13 +3843,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.167: # %.preheader1344.15 + bltu $a0, $a1, .LBB7_178 +# %bb.168: # %.preheader1344.15 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.168: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.169: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 4, 4 or $a0, $a0, $a1 @@ -3858,13 +3858,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.169: # %.preheader1344.16 + bltu $a0, $a1, .LBB7_178 +# %bb.170: # %.preheader1344.16 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.170: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.171: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 3, 3 or $a0, $a0, $a1 @@ -3873,13 +3873,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.171: # %.preheader1344.17 + bltu $a0, $a1, .LBB7_178 +# %bb.172: # %.preheader1344.17 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.172: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.173: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 2, 2 or $a0, $a0, $a1 @@ -3888,13 +3888,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.173: # %.preheader1344.18 + bltu $a0, $a1, .LBB7_178 +# %bb.174: # %.preheader1344.18 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.174: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.175: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 1, 1 or $a0, $a0, $a1 @@ -3903,15 +3903,16 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_177 -# %bb.175: # %.preheader1344.19 + bltu $a0, $a1, .LBB7_178 +# %bb.176: # %.preheader1344.19 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a1, $a0, 14, 1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.176: # in Loop: Header=BB7_67 Depth=3 + ld.d $s2, $sp, 40 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.177: # in Loop: Header=BB7_67 Depth=3 slli.d $a0, $a0, 1 andi $a1, $s1, 1 or $a0, $a0, $a1 @@ -3920,12 +3921,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 249 - bgeu $a1, $a0, .LBB7_178 - b .LBB7_638 -.LBB7_177: # in Loop: Header=BB7_67 Depth=3 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + bgeu $a1, $a0, .LBB7_179 + b .LBB7_640 +.LBB7_178: # in Loop: Header=BB7_67 Depth=3 + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 -.LBB7_178: # %.loopexit1345 + ld.d $s2, $sp, 40 # 8-byte Folded Reload +.LBB7_179: # %.loopexit1345 # in Loop: Header=BB7_67 Depth=3 addi.d $a1, $fp, 960 ldx.bu $a1, $a1, $a0 @@ -3933,40 +3935,39 @@ lzx_decompress: # @lzx_decompress sub.w $s7, $s7, $a1 addi.d $a0, $a0, 7 bstrpick.d $a7, $a0, 15, 0 -.LBB7_179: # in Loop: Header=BB7_67 Depth=3 - ld.d $s2, $sp, 32 # 8-byte Folded Reload +.LBB7_180: # in Loop: Header=BB7_67 Depth=3 addi.d $a0, $s3, -256 bstrpick.d $a0, $a0, 31, 3 - beqz $a0, .LBB7_184 -# %bb.180: # in Loop: Header=BB7_67 Depth=3 + beqz $a0, .LBB7_185 +# %bb.181: # in Loop: Header=BB7_67 Depth=3 ori $s3, $zero, 1 ori $a1, $zero, 2 - beq $a0, $a1, .LBB7_183 -# %bb.181: # in Loop: Header=BB7_67 Depth=3 - bne $a0, $s3, .LBB7_185 + beq $a0, $a1, .LBB7_184 # %bb.182: # in Loop: Header=BB7_67 Depth=3 + bne $a0, $s3, .LBB7_186 +# %bb.183: # in Loop: Header=BB7_67 Depth=3 ld.d $a1, $sp, 56 # 8-byte Folded Reload ld.d $a0, $sp, 16 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill ld.d $a0, $sp, 104 # 8-byte Folded Reload st.d $a0, $sp, 56 # 8-byte Folded Spill - b .LBB7_227 -.LBB7_183: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_228 +.LBB7_184: # in Loop: Header=BB7_67 Depth=3 ld.d $a1, $sp, 104 # 8-byte Folded Reload ld.d $a0, $sp, 56 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill ld.d $a0, $sp, 16 # 8-byte Folded Reload st.d $a0, $sp, 56 # 8-byte Folded Spill - b .LBB7_227 -.LBB7_184: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_228 +.LBB7_185: # in Loop: Header=BB7_67 Depth=3 ld.d $a1, $sp, 16 # 8-byte Folded Reload ld.d $a0, $sp, 56 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill ld.d $a0, $sp, 104 # 8-byte Folded Reload st.d $a0, $sp, 56 # 8-byte Folded Spill ori $s3, $zero, 1 - b .LBB7_227 -.LBB7_185: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_228 +.LBB7_186: # in Loop: Header=BB7_67 Depth=3 addi.w $a0, $a0, 0 ld.d $a1, $sp, 64 # 8-byte Folded Reload ldx.bu $s3, $a1, $a0 @@ -3977,102 +3978,102 @@ lzx_decompress: # @lzx_decompress st.d $a0, $sp, 136 # 8-byte Folded Spill ori $a0, $zero, 4 st.d $a7, $sp, 144 # 8-byte Folded Spill - bltu $s3, $a0, .LBB7_192 -# %bb.186: # in Loop: Header=BB7_67 Depth=3 + bltu $s3, $a0, .LBB7_193 +# %bb.187: # in Loop: Header=BB7_67 Depth=3 addi.d $s4, $s3, -3 - bge $s7, $s4, .LBB7_200 -# %bb.187: # %.lr.ph2975.preheader + bge $s7, $s4, .LBB7_201 +# %bb.188: # %.lr.ph2975.preheader # in Loop: Header=BB7_67 Depth=3 ori $a0, $zero, 16 sub.d $s2, $a0, $s7 - b .LBB7_189 -.LBB7_188: # in Loop: Header=BB7_189 Depth=4 + b .LBB7_190 +.LBB7_189: # in Loop: Header=BB7_190 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s2 or $s1, $a0, $s1 addi.w $s7, $s7, 16 addi.d $s8, $s8, 2 addi.d $s2, $s2, -16 - bge $s7, $s4, .LBB7_200 -.LBB7_189: # %.lr.ph2975 + bge $s7, $s4, .LBB7_201 +.LBB7_190: # %.lr.ph2975 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_188 -# %bb.190: # in Loop: Header=BB7_189 Depth=4 + bltu $a0, $s5, .LBB7_189 +# %bb.191: # in Loop: Header=BB7_190 Depth=4 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.191: # in Loop: Header=BB7_189 Depth=4 + bnez $a0, .LBB7_629 +# %bb.192: # in Loop: Header=BB7_190 Depth=4 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 ld.d $a7, $sp, 144 # 8-byte Folded Reload - b .LBB7_188 -.LBB7_192: # in Loop: Header=BB7_67 Depth=3 - beqz $s3, .LBB7_212 -# %bb.193: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_189 +.LBB7_193: # in Loop: Header=BB7_67 Depth=3 + beqz $s3, .LBB7_213 +# %bb.194: # in Loop: Header=BB7_67 Depth=3 ori $a0, $zero, 3 - bne $s3, $a0, .LBB7_213 -# %bb.194: # %.preheader1343 + bne $s3, $a0, .LBB7_214 +# %bb.195: # %.preheader1343 # in Loop: Header=BB7_67 Depth=3 ori $a0, $zero, 15 - blt $a0, $s7, .LBB7_219 -# %bb.195: # %.lr.ph2954.preheader + blt $a0, $s7, .LBB7_220 +# %bb.196: # %.lr.ph2954.preheader # in Loop: Header=BB7_67 Depth=3 ori $a0, $zero, 16 sub.d $s2, $a0, $s7 - b .LBB7_198 -.LBB7_196: # in Loop: Header=BB7_198 Depth=4 + b .LBB7_199 +.LBB7_197: # in Loop: Header=BB7_199 Depth=4 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 ld.d $a7, $sp, 144 # 8-byte Folded Reload -.LBB7_197: # in Loop: Header=BB7_198 Depth=4 +.LBB7_198: # in Loop: Header=BB7_199 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s2 or $s1, $a0, $s1 addi.w $s7, $s3, 16 addi.d $s8, $s8, 2 addi.d $s2, $s2, -16 - bgez $s3, .LBB7_219 -.LBB7_198: # %.lr.ph2954 + bgez $s3, .LBB7_220 +.LBB7_199: # %.lr.ph2954 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 move $s3, $s7 - bltu $a0, $s5, .LBB7_197 -# %bb.199: # in Loop: Header=BB7_198 Depth=4 + bltu $a0, $s5, .LBB7_198 +# %bb.200: # in Loop: Header=BB7_199 Depth=4 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - beqz $a0, .LBB7_196 - b .LBB7_627 -.LBB7_200: # %._crit_edge2976 + beqz $a0, .LBB7_197 + b .LBB7_629 +.LBB7_201: # %._crit_edge2976 # in Loop: Header=BB7_67 Depth=3 sub.w $s7, $s7, $s4 sll.w $s4, $s1, $s4 ori $a0, $zero, 15 - bltu $a0, $s7, .LBB7_205 -# %bb.201: # %.lr.ph2986 + bltu $a0, $s7, .LBB7_206 +# %bb.202: # %.lr.ph2986 # in Loop: Header=BB7_67 Depth=3 addi.d $a0, $s8, 1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload - ld.d $s2, $sp, 32 # 8-byte Folded Reload - bltu $a0, $s5, .LBB7_204 -# %bb.202: # in Loop: Header=BB7_67 Depth=3 + ld.d $s0, $sp, 168 # 8-byte Folded Reload + ld.d $s2, $sp, 40 # 8-byte Folded Reload + bltu $a0, $s5, .LBB7_205 +# %bb.203: # in Loop: Header=BB7_67 Depth=3 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.203: # in Loop: Header=BB7_67 Depth=3 + bnez $a0, .LBB7_629 +# %bb.204: # in Loop: Header=BB7_67 Depth=3 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 ld.d $a7, $sp, 144 # 8-byte Folded Reload -.LBB7_204: # %._crit_edge2987 +.LBB7_205: # %._crit_edge2987 # in Loop: Header=BB7_67 Depth=3 ld.hu $a0, $s8, 0 ori $a1, $zero, 16 @@ -4081,36 +4082,36 @@ lzx_decompress: # @lzx_decompress sll.w $a0, $a0, $a1 or $s4, $a0, $s4 addi.d $s8, $s8, 2 - b .LBB7_206 -.LBB7_205: # in Loop: Header=BB7_67 Depth=3 - ld.d $s6, $sp, 168 # 8-byte Folded Reload - ld.d $s2, $sp, 32 # 8-byte Folded Reload + b .LBB7_207 .LBB7_206: # in Loop: Header=BB7_67 Depth=3 + ld.d $s0, $sp, 168 # 8-byte Folded Reload + ld.d $s2, $sp, 40 # 8-byte Folded Reload +.LBB7_207: # in Loop: Header=BB7_67 Depth=3 ld.d $a0, $sp, 24 # 8-byte Folded Reload and $a0, $s4, $a0 srli.d $a0, $a0, 24 ld.d $a1, $sp, 80 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 8 - bltu $a0, $a1, .LBB7_211 -# %bb.207: # %.preheader1338.preheader + bltu $a0, $a1, .LBB7_212 +# %bb.208: # %.preheader1338.preheader # in Loop: Header=BB7_67 Depth=3 lu12i.w $a1, 8192 -.LBB7_208: # %.preheader1338 +.LBB7_209: # %.preheader1338 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 # => This Inner Loop Header: Depth=4 addi.w $a2, $a1, 0 ori $a3, $zero, 1 - bgeu $a3, $a2, .LBB7_638 -# %bb.209: # in Loop: Header=BB7_208 Depth=4 + bgeu $a3, $a2, .LBB7_640 +# %bb.210: # in Loop: Header=BB7_209 Depth=4 slli.d $a0, $a0, 1 bstrpick.d $a2, $a0, 15, 1 slli.d $a2, $a2, 1 ori $a3, $zero, 144 - bgeu $a2, $a3, .LBB7_626 -# %bb.210: # in Loop: Header=BB7_208 Depth=4 + bgeu $a2, $a3, .LBB7_628 +# %bb.211: # in Loop: Header=BB7_209 Depth=4 bstrpick.d $a1, $a1, 31, 1 and $a2, $a1, $s4 addi.w $a2, $a2, 0 @@ -4121,8 +4122,8 @@ lzx_decompress: # @lzx_decompress ld.d $a2, $sp, 80 # 8-byte Folded Reload ldx.hu $a0, $a2, $a0 ori $a2, $zero, 7 - bltu $a2, $a0, .LBB7_208 -.LBB7_211: # %.loopexit1339 + bltu $a2, $a0, .LBB7_209 +.LBB7_212: # %.loopexit1339 # in Loop: Header=BB7_67 Depth=3 addi.d $a1, $fp, 1274 ldx.bu $a1, $a1, $a0 @@ -4138,47 +4139,47 @@ lzx_decompress: # @lzx_decompress st.d $a0, $sp, 144 # 8-byte Folded Spill addi.d $s4, $fp, 240 ori $s3, $zero, 1 - b .LBB7_227 -.LBB7_212: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_228 +.LBB7_213: # in Loop: Header=BB7_67 Depth=3 ori $a1, $zero, 1 ld.d $a0, $sp, 16 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill ori $s3, $zero, 1 - b .LBB7_227 -.LBB7_213: # %.preheader1340 + b .LBB7_228 +.LBB7_214: # %.preheader1340 # in Loop: Header=BB7_67 Depth=3 - bge $s7, $s3, .LBB7_224 -# %bb.214: # %.lr.ph2964.preheader + bge $s7, $s3, .LBB7_225 +# %bb.215: # %.lr.ph2964.preheader # in Loop: Header=BB7_67 Depth=3 ori $a0, $zero, 16 sub.d $s2, $a0, $s7 - b .LBB7_217 -.LBB7_215: # in Loop: Header=BB7_217 Depth=4 + b .LBB7_218 +.LBB7_216: # in Loop: Header=BB7_218 Depth=4 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 ld.d $a7, $sp, 144 # 8-byte Folded Reload -.LBB7_216: # in Loop: Header=BB7_217 Depth=4 +.LBB7_217: # in Loop: Header=BB7_218 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s2 or $s1, $a0, $s1 addi.w $s7, $s7, 16 addi.d $s8, $s8, 2 addi.d $s2, $s2, -16 - bge $s7, $s3, .LBB7_224 -.LBB7_217: # %.lr.ph2964 + bge $s7, $s3, .LBB7_225 +.LBB7_218: # %.lr.ph2964 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_216 -# %bb.218: # in Loop: Header=BB7_217 Depth=4 + bltu $a0, $s5, .LBB7_217 +# %bb.219: # in Loop: Header=BB7_218 Depth=4 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - beqz $a0, .LBB7_215 - b .LBB7_627 -.LBB7_219: # %._crit_edge2955 + beqz $a0, .LBB7_216 + b .LBB7_629 +.LBB7_220: # %._crit_edge2955 # in Loop: Header=BB7_67 Depth=3 ld.d $a0, $sp, 24 # 8-byte Folded Reload and $a0, $s1, $a0 @@ -4186,27 +4187,27 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 80 # 8-byte Folded Reload ldx.hu $a1, $a1, $a0 ori $a0, $zero, 8 - bltu $a1, $a0, .LBB7_225 -# %bb.220: # %.preheader1341.preheader + bltu $a1, $a0, .LBB7_226 +# %bb.221: # %.preheader1341.preheader # in Loop: Header=BB7_67 Depth=3 lu12i.w $a0, 8192 addi.d $s4, $fp, 240 ori $s3, $zero, 1 - ld.d $s2, $sp, 32 # 8-byte Folded Reload -.LBB7_221: # %.preheader1341 + ld.d $s2, $sp, 40 # 8-byte Folded Reload +.LBB7_222: # %.preheader1341 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 # => This Inner Loop Header: Depth=4 addi.w $a2, $a0, 0 - bgeu $s3, $a2, .LBB7_638 -# %bb.222: # in Loop: Header=BB7_221 Depth=4 + bgeu $s3, $a2, .LBB7_640 +# %bb.223: # in Loop: Header=BB7_222 Depth=4 slli.d $a1, $a1, 1 bstrpick.d $a2, $a1, 15, 1 slli.d $a2, $a2, 1 ori $a3, $zero, 144 - bgeu $a2, $a3, .LBB7_626 -# %bb.223: # in Loop: Header=BB7_221 Depth=4 + bgeu $a2, $a3, .LBB7_628 +# %bb.224: # in Loop: Header=BB7_222 Depth=4 bstrpick.d $a0, $a0, 31, 1 and $a2, $a0, $s1 addi.w $a2, $a2, 0 @@ -4217,9 +4218,9 @@ lzx_decompress: # @lzx_decompress ld.d $a2, $sp, 80 # 8-byte Folded Reload ldx.hu $a1, $a2, $a1 ori $a2, $zero, 7 - bltu $a2, $a1, .LBB7_221 - b .LBB7_226 -.LBB7_224: # %._crit_edge2965 + bltu $a2, $a1, .LBB7_222 + b .LBB7_227 +.LBB7_225: # %._crit_edge2965 # in Loop: Header=BB7_67 Depth=3 sub.d $a0, $zero, $s3 srl.w $a0, $s1, $a0 @@ -4231,13 +4232,13 @@ lzx_decompress: # @lzx_decompress st.d $a0, $sp, 144 # 8-byte Folded Spill addi.d $s4, $fp, 240 ori $s3, $zero, 1 - ld.d $s2, $sp, 32 # 8-byte Folded Reload - b .LBB7_227 -.LBB7_225: # in Loop: Header=BB7_67 Depth=3 + ld.d $s2, $sp, 40 # 8-byte Folded Reload + b .LBB7_228 +.LBB7_226: # in Loop: Header=BB7_67 Depth=3 addi.d $s4, $fp, 240 ori $s3, $zero, 1 - ld.d $s2, $sp, 32 # 8-byte Folded Reload -.LBB7_226: # %.loopexit1342 + ld.d $s2, $sp, 40 # 8-byte Folded Reload +.LBB7_227: # %.loopexit1342 # in Loop: Header=BB7_67 Depth=3 addi.d $a0, $fp, 1274 ldx.bu $a0, $a0, $a1 @@ -4247,52 +4248,52 @@ lzx_decompress: # @lzx_decompress add.w $a1, $a0, $a1 ld.d $a0, $sp, 16 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill -.LBB7_227: # in Loop: Header=BB7_67 Depth=3 +.LBB7_228: # in Loop: Header=BB7_67 Depth=3 ld.w $a2, $fp, 40 addi.w $a0, $a7, 2 move $a6, $s2 add.w $s2, $a0, $s2 - bltu $a2, $s2, .LBB7_633 -# %bb.228: # in Loop: Header=BB7_67 Depth=3 + bltu $a2, $s2, .LBB7_635 +# %bb.229: # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a4, $a6, 31, 0 addi.w $a3, $a1, 0 move $a5, $a1 ld.d $a1, $sp, 120 # 8-byte Folded Reload add.d $a1, $a1, $a4 st.d $a5, $sp, 136 # 8-byte Folded Spill - bgeu $a6, $a3, .LBB7_237 -# %bb.229: # in Loop: Header=BB7_67 Depth=3 - sub.w $a5, $a5, $a6 - blt $a2, $a5, .LBB7_636 + bgeu $a6, $a3, .LBB7_238 # %bb.230: # in Loop: Header=BB7_67 Depth=3 + sub.w $a5, $a5, $a6 + blt $a2, $a5, .LBB7_638 +# %bb.231: # in Loop: Header=BB7_67 Depth=3 sub.d $a2, $a2, $a5 bstrpick.d $t0, $a2, 31, 0 ld.d $a2, $sp, 120 # 8-byte Folded Reload add.d $a3, $a2, $t0 - bge $a5, $a0, .LBB7_242 -# %bb.231: # in Loop: Header=BB7_67 Depth=3 + bge $a5, $a0, .LBB7_243 +# %bb.232: # in Loop: Header=BB7_67 Depth=3 sub.w $a2, $a0, $a5 - blez $a5, .LBB7_255 -# %bb.232: # %.lr.ph3017.preheader + blez $a5, .LBB7_256 +# %bb.233: # %.lr.ph3017.preheader # in Loop: Header=BB7_67 Depth=3 ori $a7, $zero, 32 - bltu $a5, $a7, .LBB7_252 -# %bb.233: # %.lr.ph3017.preheader + bltu $a5, $a7, .LBB7_253 +# %bb.234: # %.lr.ph3017.preheader # in Loop: Header=BB7_67 Depth=3 sub.d $a6, $a4, $t0 - bltu $a6, $a7, .LBB7_252 -# %bb.234: # %vector.ph4175 + bltu $a6, $a7, .LBB7_253 +# %bb.235: # %vector.ph4175 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a6, $a5, 30, 5 slli.d $a7, $a6, 5 add.d $a1, $a1, $a7 add.d $a3, $a3, $a7 sub.d $a6, $a5, $a7 - ld.d $t1, $sp, 40 # 8-byte Folded Reload + ld.d $t1, $sp, 32 # 8-byte Folded Reload add.d $t0, $t1, $t0 add.d $a4, $t1, $a4 move $t1, $a7 -.LBB7_235: # %vector.body4179 +.LBB7_236: # %vector.body4179 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4304,44 +4305,44 @@ lzx_decompress: # @lzx_decompress addi.d $t1, $t1, -32 addi.d $t0, $t0, 32 addi.d $a4, $a4, 32 - bnez $t1, .LBB7_235 -# %bb.236: # %middle.block4186 + bnez $t1, .LBB7_236 +# %bb.237: # %middle.block4186 # in Loop: Header=BB7_67 Depth=3 - bne $a7, $a5, .LBB7_253 - b .LBB7_255 -.LBB7_237: # %iter.check4196 + bne $a7, $a5, .LBB7_254 + b .LBB7_256 +.LBB7_238: # %iter.check4196 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a5, $a5, 31, 0 sub.d $a2, $a1, $a5 ori $a6, $zero, 6 - bltu $a7, $a6, .LBB7_241 -# %bb.238: # %iter.check4196 + bltu $a7, $a6, .LBB7_242 +# %bb.239: # %iter.check4196 # in Loop: Header=BB7_67 Depth=3 ori $a6, $zero, 32 - bltu $a3, $a6, .LBB7_241 -# %bb.239: # %vector.main.loop.iter.check4198 + bltu $a3, $a6, .LBB7_242 +# %bb.240: # %vector.main.loop.iter.check4198 # in Loop: Header=BB7_67 Depth=3 sub.d $a3, $zero, $a5 ori $a5, $zero, 30 - bgeu $a7, $a5, .LBB7_243 -# %bb.240: # in Loop: Header=BB7_67 Depth=3 + bgeu $a7, $a5, .LBB7_244 +# %bb.241: # in Loop: Header=BB7_67 Depth=3 move $a6, $zero - b .LBB7_247 -.LBB7_241: # in Loop: Header=BB7_67 Depth=3 - move $a5, $a0 - b .LBB7_250 + b .LBB7_248 .LBB7_242: # in Loop: Header=BB7_67 Depth=3 + move $a5, $a0 + b .LBB7_251 +.LBB7_243: # in Loop: Header=BB7_67 Depth=3 move $a2, $a0 - b .LBB7_256 -.LBB7_243: # %vector.ph4199 + b .LBB7_257 +.LBB7_244: # %vector.ph4199 # in Loop: Header=BB7_67 Depth=3 andi $a5, $a0, 24 bstrpick.d $a6, $a0, 15, 5 slli.d $a6, $a6, 5 - ld.d $a7, $sp, 40 # 8-byte Folded Reload + ld.d $a7, $sp, 32 # 8-byte Folded Reload add.d $a7, $a7, $a4 move $t0, $a6 -.LBB7_244: # %vector.body4202 +.LBB7_245: # %vector.body4202 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4353,14 +4354,14 @@ lzx_decompress: # @lzx_decompress vst $vr1, $a7, 0 addi.d $t0, $t0, -32 addi.d $a7, $a7, 32 - bnez $t0, .LBB7_244 -# %bb.245: # %middle.block4209 + bnez $t0, .LBB7_245 +# %bb.246: # %middle.block4209 # in Loop: Header=BB7_67 Depth=3 - beq $a6, $a0, .LBB7_271 -# %bb.246: # %vec.epilog.iter.check4213 + beq $a6, $a0, .LBB7_272 +# %bb.247: # %vec.epilog.iter.check4213 # in Loop: Header=BB7_67 Depth=3 - beqz $a5, .LBB7_273 -.LBB7_247: # %vec.epilog.ph4215 + beqz $a5, .LBB7_274 +.LBB7_248: # %vec.epilog.ph4215 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $t0, $a0, 15, 3 slli.d $a7, $t0, 3 @@ -4371,7 +4372,7 @@ lzx_decompress: # @lzx_decompress add.d $a4, $a6, $a4 ld.d $a6, $sp, 120 # 8-byte Folded Reload add.d $a4, $a6, $a4 -.LBB7_248: # %vec.epilog.vector.body4219 +.LBB7_249: # %vec.epilog.vector.body4219 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4380,14 +4381,14 @@ lzx_decompress: # @lzx_decompress st.d $a6, $a4, 0 addi.d $t0, $t0, 8 addi.d $a4, $a4, 8 - bnez $t0, .LBB7_248 -# %bb.249: # %vec.epilog.middle.block4225 + bnez $t0, .LBB7_249 +# %bb.250: # %vec.epilog.middle.block4225 # in Loop: Header=BB7_67 Depth=3 - beq $a7, $a0, .LBB7_271 -.LBB7_250: # %.lr.ph3012.preheader + beq $a7, $a0, .LBB7_272 +.LBB7_251: # %.lr.ph3012.preheader # in Loop: Header=BB7_67 Depth=3 addi.d $a3, $a5, 1 -.LBB7_251: # %.lr.ph3012 +.LBB7_252: # %.lr.ph3012 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4398,14 +4399,14 @@ lzx_decompress: # @lzx_decompress addi.w $a3, $a3, -1 st.b $a4, $a1, 0 move $a1, $a5 - blt $s3, $a3, .LBB7_251 - b .LBB7_271 -.LBB7_252: # in Loop: Header=BB7_67 Depth=3 + blt $s3, $a3, .LBB7_252 + b .LBB7_272 +.LBB7_253: # in Loop: Header=BB7_67 Depth=3 move $a6, $a5 -.LBB7_253: # %.lr.ph3017.preheader4244 +.LBB7_254: # %.lr.ph3017.preheader4244 # in Loop: Header=BB7_67 Depth=3 addi.d $a4, $a6, 1 -.LBB7_254: # %.lr.ph3017 +.LBB7_255: # %.lr.ph3017 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4415,33 +4416,33 @@ lzx_decompress: # @lzx_decompress st.b $a5, $a1, 0 addi.w $a4, $a4, -1 addi.d $a1, $a1, 1 - bltu $s3, $a4, .LBB7_254 -.LBB7_255: # in Loop: Header=BB7_67 Depth=3 + bltu $s3, $a4, .LBB7_255 +.LBB7_256: # in Loop: Header=BB7_67 Depth=3 ld.d $a3, $sp, 120 # 8-byte Folded Reload -.LBB7_256: # %.loopexit1336 +.LBB7_257: # %.loopexit1336 # in Loop: Header=BB7_67 Depth=3 - blez $a2, .LBB7_271 -# %bb.257: # %iter.check4133 + blez $a2, .LBB7_272 +# %bb.258: # %iter.check4133 # in Loop: Header=BB7_67 Depth=3 ori $a4, $zero, 8 - bltu $a2, $a4, .LBB7_261 -# %bb.258: # %iter.check4133 + bltu $a2, $a4, .LBB7_262 +# %bb.259: # %iter.check4133 # in Loop: Header=BB7_67 Depth=3 sub.d $a4, $a1, $a3 ori $a5, $zero, 32 - bltu $a4, $a5, .LBB7_261 -# %bb.259: # %vector.main.loop.iter.check4135 + bltu $a4, $a5, .LBB7_262 +# %bb.260: # %vector.main.loop.iter.check4135 # in Loop: Header=BB7_67 Depth=3 - bgeu $a2, $a5, .LBB7_262 -# %bb.260: # in Loop: Header=BB7_67 Depth=3 + bgeu $a2, $a5, .LBB7_263 +# %bb.261: # in Loop: Header=BB7_67 Depth=3 move $a7, $zero - b .LBB7_266 -.LBB7_261: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_267 +.LBB7_262: # in Loop: Header=BB7_67 Depth=3 move $a6, $a2 move $a4, $a1 move $a5, $a3 - b .LBB7_269 -.LBB7_262: # %vector.ph4136 + b .LBB7_270 +.LBB7_263: # %vector.ph4136 # in Loop: Header=BB7_67 Depth=3 andi $a4, $a2, 24 bstrpick.d $a5, $a2, 30, 5 @@ -4449,7 +4450,7 @@ lzx_decompress: # @lzx_decompress addi.d $a5, $a3, 16 addi.d $a6, $a1, 16 move $t0, $a7 -.LBB7_263: # %vector.body4139 +.LBB7_264: # %vector.body4139 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4461,14 +4462,14 @@ lzx_decompress: # @lzx_decompress addi.d $t0, $t0, -32 addi.d $a5, $a5, 32 addi.d $a6, $a6, 32 - bnez $t0, .LBB7_263 -# %bb.264: # %middle.block4146 + bnez $t0, .LBB7_264 +# %bb.265: # %middle.block4146 # in Loop: Header=BB7_67 Depth=3 - beq $a7, $a2, .LBB7_271 -# %bb.265: # %vec.epilog.iter.check4150 + beq $a7, $a2, .LBB7_272 +# %bb.266: # %vec.epilog.iter.check4150 # in Loop: Header=BB7_67 Depth=3 - beqz $a4, .LBB7_274 -.LBB7_266: # %vec.epilog.ph4152 + beqz $a4, .LBB7_275 +.LBB7_267: # %vec.epilog.ph4152 # in Loop: Header=BB7_67 Depth=3 bstrpick.d $a5, $a2, 30, 3 slli.d $t0, $a5, 3 @@ -4478,7 +4479,7 @@ lzx_decompress: # @lzx_decompress sub.d $t1, $a7, $t0 add.d $a3, $a3, $a7 add.d $a1, $a1, $a7 -.LBB7_267: # %vec.epilog.vector.body4156 +.LBB7_268: # %vec.epilog.vector.body4156 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4488,14 +4489,14 @@ lzx_decompress: # @lzx_decompress addi.d $t1, $t1, 8 addi.d $a3, $a3, 8 addi.d $a1, $a1, 8 - bnez $t1, .LBB7_267 -# %bb.268: # %vec.epilog.middle.block4162 + bnez $t1, .LBB7_268 +# %bb.269: # %vec.epilog.middle.block4162 # in Loop: Header=BB7_67 Depth=3 - beq $t0, $a2, .LBB7_271 -.LBB7_269: # %.lr.ph3023.preheader + beq $t0, $a2, .LBB7_272 +.LBB7_270: # %.lr.ph3023.preheader # in Loop: Header=BB7_67 Depth=3 addi.d $a1, $a6, 1 -.LBB7_270: # %.lr.ph3023 +.LBB7_271: # %.lr.ph3023 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # Parent Loop BB7_67 Depth=3 @@ -4506,8 +4507,8 @@ lzx_decompress: # @lzx_decompress addi.w $a1, $a1, -1 st.b $a2, $a4, 0 move $a4, $a3 - bltu $s3, $a1, .LBB7_270 -.LBB7_271: # %.loopexit1335 + bltu $s3, $a1, .LBB7_271 +.LBB7_272: # %.loopexit1335 # in Loop: Header=BB7_67 Depth=3 ld.d $a1, $sp, 192 # 8-byte Folded Reload sub.w $a0, $a1, $a0 @@ -4517,57 +4518,57 @@ lzx_decompress: # @lzx_decompress st.d $a1, $sp, 104 # 8-byte Folded Spill ld.d $a1, $sp, 144 # 8-byte Folded Reload st.d $a1, $sp, 56 # 8-byte Folded Spill -.LBB7_272: # in Loop: Header=BB7_67 Depth=3 - st.d $s2, $sp, 32 # 8-byte Folded Spill +.LBB7_273: # in Loop: Header=BB7_67 Depth=3 + st.d $s2, $sp, 40 # 8-byte Folded Spill ld.d $a1, $sp, 176 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill bgtz $a0, .LBB7_67 - b .LBB7_494 -.LBB7_273: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_496 +.LBB7_274: # in Loop: Header=BB7_67 Depth=3 sub.d $a5, $a0, $a6 add.d $a1, $a1, $a6 add.d $a2, $a2, $a6 - b .LBB7_250 -.LBB7_274: # in Loop: Header=BB7_67 Depth=3 + b .LBB7_251 +.LBB7_275: # in Loop: Header=BB7_67 Depth=3 sub.d $a6, $a2, $a7 add.d $a4, $a1, $a7 add.d $a5, $a3, $a7 - b .LBB7_269 -.LBB7_275: # in Loop: Header=BB7_62 Depth=2 + b .LBB7_270 +.LBB7_276: # in Loop: Header=BB7_62 Depth=2 ld.bu $a0, $fp, 89 ori $a1, $zero, 3 - bne $a0, $a1, .LBB7_281 -# %bb.276: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $a1, .LBB7_282 +# %bb.277: # in Loop: Header=BB7_62 Depth=2 ld.bu $a0, $fp, 72 andi $a0, $a0, 1 - beqz $a0, .LBB7_281 -# %bb.277: # in Loop: Header=BB7_62 Depth=2 - bne $s8, $s5, .LBB7_280 + beqz $a0, .LBB7_282 # %bb.278: # in Loop: Header=BB7_62 Depth=2 + bne $s8, $s5, .LBB7_281 +# %bb.279: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.279: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.280: # in Loop: Header=BB7_62 Depth=2 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_280: # in Loop: Header=BB7_62 Depth=2 - addi.d $s8, $s8, 1 .LBB7_281: # in Loop: Header=BB7_62 Depth=2 + addi.d $s8, $s8, 1 +.LBB7_282: # in Loop: Header=BB7_62 Depth=2 addi.w $a0, $s7, 0 ori $a1, $zero, 2 - blt $a1, $a0, .LBB7_479 -# %bb.282: # %.lr.ph2865.preheader + blt $a1, $a0, .LBB7_481 +# %bb.283: # %.lr.ph2865.preheader # in Loop: Header=BB7_62 Depth=2 ori $a0, $zero, 16 sub.d $s3, $a0, $s7 - b .LBB7_285 -.LBB7_283: # in Loop: Header=BB7_285 Depth=3 + b .LBB7_286 +.LBB7_284: # in Loop: Header=BB7_286 Depth=3 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_284: # in Loop: Header=BB7_285 Depth=3 +.LBB7_285: # in Loop: Header=BB7_286 Depth=3 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s3 or $s1, $a0, $s1 @@ -4577,34 +4578,34 @@ lzx_decompress: # @lzx_decompress addi.w $a2, $zero, -13 addi.d $s3, $s3, -16 move $s7, $a0 - bge $a1, $a2, .LBB7_480 -.LBB7_285: # %.lr.ph2865 + bge $a1, $a2, .LBB7_482 +.LBB7_286: # %.lr.ph2865 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Inner Loop Header: Depth=3 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_284 -# %bb.286: # in Loop: Header=BB7_285 Depth=3 - ld.d $a3, $s6, 8 + bltu $a0, $s5, .LBB7_285 +# %bb.287: # in Loop: Header=BB7_286 Depth=3 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_288 -# %bb.287: # in Loop: Header=BB7_285 Depth=3 - ld.d $a0, $s6, 0 + beqz $a3, .LBB7_289 +# %bb.288: # in Loop: Header=BB7_286 Depth=3 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 - bgez $a0, .LBB7_289 - b .LBB7_623 -.LBB7_288: # in Loop: Header=BB7_285 Depth=3 + bgez $a0, .LBB7_290 + b .LBB7_625 +.LBB7_289: # in Loop: Header=BB7_286 Depth=3 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 - bltz $a0, .LBB7_623 -.LBB7_289: # in Loop: Header=BB7_285 Depth=3 - bnez $a0, .LBB7_283 -# %bb.290: # in Loop: Header=BB7_285 Depth=3 + bltz $a0, .LBB7_625 +.LBB7_290: # in Loop: Header=BB7_286 Depth=3 + bnez $a0, .LBB7_284 +# %bb.291: # in Loop: Header=BB7_286 Depth=3 ld.bu $a0, $fp, 92 - bnez $a0, .LBB7_622 -# %bb.291: # in Loop: Header=BB7_285 Depth=3 + bnez $a0, .LBB7_624 +# %bb.292: # in Loop: Header=BB7_286 Depth=3 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 @@ -4612,12 +4613,12 @@ lzx_decompress: # @lzx_decompress ori $a0, $zero, 1 st.b $a0, $fp, 92 ori $a0, $zero, 2 - b .LBB7_283 -.LBB7_292: # in Loop: Header=BB7_62 Depth=2 + b .LBB7_284 +.LBB7_293: # in Loop: Header=BB7_62 Depth=2 ld.d $a1, $sp, 176 # 8-byte Folded Reload add.w $a2, $a1, $s2 - blez $a0, .LBB7_492 -# %bb.293: # %.lr.ph2926.preheader + blez $a0, .LBB7_494 +# %bb.294: # %.lr.ph2926.preheader # in Loop: Header=BB7_62 Depth=2 bstrpick.d $a0, $s2, 31, 0 ld.d $a1, $sp, 120 # 8-byte Folded Reload @@ -4625,9 +4626,8 @@ lzx_decompress: # @lzx_decompress ld.d $a0, $sp, 176 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill move $s2, $a2 - b .LBB7_295 -.LBB7_294: # in Loop: Header=BB7_295 Depth=3 - move $s0, $s6 + b .LBB7_296 +.LBB7_295: # in Loop: Header=BB7_296 Depth=3 move $s6, $s2 ld.d $s2, $sp, 192 # 8-byte Folded Reload slt $a1, $s2, $a0 @@ -4641,108 +4641,107 @@ lzx_decompress: # @lzx_decompress jirl $ra, $ra, 0 move $a0, $s2 move $s2, $s6 - move $s6, $s0 add.d $s4, $s4, $s3 add.d $s8, $s8, $s3 sub.w $a0, $a0, $s3 ori $s3, $zero, 1 ld.d $a1, $sp, 176 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill - blez $a0, .LBB7_304 -.LBB7_295: # %.lr.ph2926 + blez $a0, .LBB7_305 +.LBB7_296: # %.lr.ph2926 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Inner Loop Header: Depth=3 sub.w $a0, $s5, $s8 - bnez $a0, .LBB7_294 -# %bb.296: # in Loop: Header=BB7_295 Depth=3 - ld.d $a3, $s6, 8 + bnez $a0, .LBB7_295 +# %bb.297: # in Loop: Header=BB7_296 Depth=3 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_298 -# %bb.297: # in Loop: Header=BB7_295 Depth=3 - ld.d $a0, $s6, 0 + beqz $a3, .LBB7_299 +# %bb.298: # in Loop: Header=BB7_296 Depth=3 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 - b .LBB7_299 -.LBB7_298: # in Loop: Header=BB7_295 Depth=3 + b .LBB7_300 +.LBB7_299: # in Loop: Header=BB7_296 Depth=3 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 -.LBB7_299: # in Loop: Header=BB7_295 Depth=3 +.LBB7_300: # in Loop: Header=BB7_296 Depth=3 ld.d $a1, $sp, 176 # 8-byte Folded Reload - bltz $a0, .LBB7_623 -# %bb.300: # in Loop: Header=BB7_295 Depth=3 - bnez $a0, .LBB7_303 -# %bb.301: # in Loop: Header=BB7_295 Depth=3 + bltz $a0, .LBB7_625 +# %bb.301: # in Loop: Header=BB7_296 Depth=3 + bnez $a0, .LBB7_304 +# %bb.302: # in Loop: Header=BB7_296 Depth=3 ld.bu $a0, $fp, 92 - bnez $a0, .LBB7_622 -# %bb.302: # in Loop: Header=BB7_295 Depth=3 + bnez $a0, .LBB7_624 +# %bb.303: # in Loop: Header=BB7_296 Depth=3 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 st.b $zero, $a0, 0 st.b $s3, $fp, 92 ori $a0, $zero, 2 -.LBB7_303: # in Loop: Header=BB7_295 Depth=3 +.LBB7_304: # in Loop: Header=BB7_296 Depth=3 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 ld.d $a0, $sp, 192 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill - bgtz $a0, .LBB7_295 -.LBB7_304: # in Loop: Header=BB7_62 Depth=2 + bgtz $a0, .LBB7_296 +.LBB7_305: # in Loop: Header=BB7_62 Depth=2 addi.d $s4, $fp, 240 - b .LBB7_494 -.LBB7_305: # %.preheader1354 + b .LBB7_496 +.LBB7_306: # %.preheader1354 # in Loop: Header=BB7_62 Depth=2 - blez $a0, .LBB7_493 -# %bb.306: # %.preheader1333.preheader + blez $a0, .LBB7_495 +# %bb.307: # %.preheader1333.preheader # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $sp, 144 # 8-byte Folded Reload - st.d $a0, $sp, 32 # 8-byte Folded Spill + st.d $a0, $sp, 40 # 8-byte Folded Spill ld.d $a0, $sp, 136 # 8-byte Folded Reload st.d $a0, $sp, 16 # 8-byte Folded Spill st.d $s2, $sp, 56 # 8-byte Folded Spill ld.d $a0, $sp, 176 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill -.LBB7_307: # %.preheader1333 +.LBB7_308: # %.preheader1333 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Loop Header: Depth=3 - # Child Loop BB7_312 Depth 4 - # Child Loop BB7_368 Depth 4 - # Child Loop BB7_427 Depth 4 - # Child Loop BB7_448 Depth 4 - # Child Loop BB7_452 Depth 4 - # Child Loop BB7_455 Depth 4 - # Child Loop BB7_439 Depth 4 - # Child Loop BB7_458 Depth 4 - # Child Loop BB7_467 Depth 4 - # Child Loop BB7_471 Depth 4 - # Child Loop BB7_474 Depth 4 + # Child Loop BB7_313 Depth 4 + # Child Loop BB7_369 Depth 4 + # Child Loop BB7_429 Depth 4 + # Child Loop BB7_450 Depth 4 + # Child Loop BB7_454 Depth 4 + # Child Loop BB7_457 Depth 4 + # Child Loop BB7_441 Depth 4 + # Child Loop BB7_460 Depth 4 + # Child Loop BB7_469 Depth 4 + # Child Loop BB7_473 Depth 4 + # Child Loop BB7_476 Depth 4 ori $s2, $zero, 1 addi.w $a0, $s7, 0 ori $a1, $zero, 15 - blt $a1, $a0, .LBB7_318 -# %bb.308: # %.lr.ph3046.preheader - # in Loop: Header=BB7_307 Depth=3 + blt $a1, $a0, .LBB7_319 +# %bb.309: # %.lr.ph3046.preheader + # in Loop: Header=BB7_308 Depth=3 ori $a0, $zero, 16 sub.d $s3, $a0, $s7 - b .LBB7_312 -.LBB7_309: # in Loop: Header=BB7_312 Depth=4 + b .LBB7_313 +.LBB7_310: # in Loop: Header=BB7_313 Depth=4 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 st.b $zero, $a0, 0 st.b $s2, $fp, 92 ori $a0, $zero, 2 -.LBB7_310: # in Loop: Header=BB7_312 Depth=4 +.LBB7_311: # in Loop: Header=BB7_313 Depth=4 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_311: # in Loop: Header=BB7_312 Depth=4 +.LBB7_312: # in Loop: Header=BB7_313 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s3 or $s1, $a0, $s1 @@ -4751,52 +4750,52 @@ lzx_decompress: # @lzx_decompress addi.d $s8, $s8, 2 addi.d $s3, $s3, -16 move $s7, $a0 - bgez $a1, .LBB7_319 -.LBB7_312: # %.lr.ph3046 + bgez $a1, .LBB7_320 +.LBB7_313: # %.lr.ph3046 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_311 -# %bb.313: # in Loop: Header=BB7_312 Depth=4 - ld.d $a3, $s6, 8 + bltu $a0, $s5, .LBB7_312 +# %bb.314: # in Loop: Header=BB7_313 Depth=4 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_315 -# %bb.314: # in Loop: Header=BB7_312 Depth=4 - ld.d $a0, $s6, 0 + beqz $a3, .LBB7_316 +# %bb.315: # in Loop: Header=BB7_313 Depth=4 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 - bgez $a0, .LBB7_316 - b .LBB7_623 -.LBB7_315: # in Loop: Header=BB7_312 Depth=4 + bgez $a0, .LBB7_317 + b .LBB7_625 +.LBB7_316: # in Loop: Header=BB7_313 Depth=4 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 - bltz $a0, .LBB7_623 -.LBB7_316: # in Loop: Header=BB7_312 Depth=4 - bnez $a0, .LBB7_310 -# %bb.317: # in Loop: Header=BB7_312 Depth=4 + bltz $a0, .LBB7_625 +.LBB7_317: # in Loop: Header=BB7_313 Depth=4 + bnez $a0, .LBB7_311 +# %bb.318: # in Loop: Header=BB7_313 Depth=4 ld.bu $a0, $fp, 92 - beqz $a0, .LBB7_309 - b .LBB7_622 -.LBB7_318: # in Loop: Header=BB7_307 Depth=3 + beqz $a0, .LBB7_310 + b .LBB7_624 +.LBB7_319: # in Loop: Header=BB7_308 Depth=3 move $a0, $s7 -.LBB7_319: # %._crit_edge3047 - # in Loop: Header=BB7_307 Depth=3 +.LBB7_320: # %._crit_edge3047 + # in Loop: Header=BB7_308 Depth=3 ld.d $a1, $sp, 112 # 8-byte Folded Reload and $a1, $s1, $a1 srli.d $a1, $a1, 19 addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.320: # %.preheader1331.preheader - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.321: # %.preheader1331.preheader + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.321: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.322: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 19, 19 or $a1, $a1, $a2 @@ -4805,13 +4804,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.322: # %.preheader1331.1 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.323: # %.preheader1331.1 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.323: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.324: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 18, 18 or $a1, $a1, $a2 @@ -4820,13 +4819,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.324: # %.preheader1331.2 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.325: # %.preheader1331.2 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.325: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.326: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 17, 17 or $a1, $a1, $a2 @@ -4835,13 +4834,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.326: # %.preheader1331.3 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.327: # %.preheader1331.3 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.327: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.328: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 16, 16 or $a1, $a1, $a2 @@ -4850,13 +4849,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.328: # %.preheader1331.4 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.329: # %.preheader1331.4 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.329: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.330: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 15, 15 or $a1, $a1, $a2 @@ -4865,13 +4864,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.330: # %.preheader1331.5 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.331: # %.preheader1331.5 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.331: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.332: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 14, 14 or $a1, $a1, $a2 @@ -4880,13 +4879,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.332: # %.preheader1331.6 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.333: # %.preheader1331.6 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.333: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.334: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 13, 13 or $a1, $a1, $a2 @@ -4895,13 +4894,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.334: # %.preheader1331.7 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.335: # %.preheader1331.7 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.335: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.336: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 12, 12 or $a1, $a1, $a2 @@ -4910,14 +4909,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_361 -# %bb.336: # %.preheader1331.8 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_362 +# %bb.337: # %.preheader1331.8 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.337: # in Loop: Header=BB7_307 Depth=3 - ld.d $s0, $sp, 128 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.338: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 11, 11 or $a1, $a1, $a2 @@ -4926,14 +4924,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - st.d $s0, $sp, 128 # 8-byte Folded Spill - bltu $s3, $a1, .LBB7_360 -# %bb.338: # %.preheader1331.9 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.339: # %.preheader1331.9 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.339: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.340: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 10, 10 or $a1, $a1, $a2 @@ -4942,13 +4939,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.340: # %.preheader1331.10 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.341: # %.preheader1331.10 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.341: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.342: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 9, 9 or $a1, $a1, $a2 @@ -4957,13 +4954,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.342: # %.preheader1331.11 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.343: # %.preheader1331.11 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.343: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.344: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 8, 8 or $a1, $a1, $a2 @@ -4972,13 +4969,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.344: # %.preheader1331.12 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.345: # %.preheader1331.12 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.345: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.346: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 7, 7 or $a1, $a1, $a2 @@ -4987,13 +4984,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.346: # %.preheader1331.13 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.347: # %.preheader1331.13 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.347: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.348: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 6, 6 or $a1, $a1, $a2 @@ -5002,13 +4999,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.348: # %.preheader1331.14 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.349: # %.preheader1331.14 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.349: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.350: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 5, 5 or $a1, $a1, $a2 @@ -5017,13 +5014,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.350: # %.preheader1331.15 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.351: # %.preheader1331.15 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.351: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.352: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 4, 4 or $a1, $a1, $a2 @@ -5032,13 +5029,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.352: # %.preheader1331.16 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.353: # %.preheader1331.16 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.353: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.354: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 3, 3 or $a1, $a1, $a2 @@ -5047,13 +5044,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.354: # %.preheader1331.17 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.355: # %.preheader1331.17 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.355: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.356: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 2, 2 or $a1, $a1, $a2 @@ -5062,13 +5059,13 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.356: # %.preheader1331.18 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.357: # %.preheader1331.18 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.357: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.358: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 bstrpick.d $a2, $s1, 1, 1 or $a1, $a1, $a2 @@ -5077,15 +5074,15 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 656 - bltu $s3, $a1, .LBB7_360 -# %bb.358: # %.preheader1331.19 - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_361 +# %bb.359: # %.preheader1331.19 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $s3, 14, 4 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 ori $a2, $zero, 168 - bltu $a2, $a1, .LBB7_626 -# %bb.359: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.360: # in Loop: Header=BB7_308 Depth=3 slli.d $a1, $s3, 1 andi $a2, $s1, 1 or $a1, $a1, $a2 @@ -5094,19 +5091,19 @@ lzx_decompress: # @lzx_decompress addi.d $a2, $fp, 1554 ldx.hu $s3, $a2, $a1 ori $a1, $zero, 655 - bgeu $a1, $s3, .LBB7_361 - b .LBB7_638 -.LBB7_360: # in Loop: Header=BB7_307 Depth=3 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + bgeu $a1, $s3, .LBB7_362 + b .LBB7_640 +.LBB7_361: # in Loop: Header=BB7_308 Depth=3 + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 -.LBB7_361: # %.loopexit1332 - # in Loop: Header=BB7_307 Depth=3 +.LBB7_362: # %.loopexit1332 + # in Loop: Header=BB7_308 Depth=3 ldx.bu $a1, $s4, $s3 sll.w $s1, $s1, $a1 sub.w $s7, $a0, $a1 ori $a2, $zero, 255 - bltu $a2, $s3, .LBB7_363 -# %bb.362: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $s3, .LBB7_364 +# %bb.363: # in Loop: Header=BB7_308 Depth=3 ld.d $a0, $sp, 56 # 8-byte Folded Reload addi.w $s2, $a0, 1 bstrpick.d $a0, $a0, 31, 0 @@ -5116,89 +5113,93 @@ lzx_decompress: # @lzx_decompress addi.w $a0, $a0, -1 ld.d $a1, $sp, 16 # 8-byte Folded Reload st.d $a1, $sp, 136 # 8-byte Folded Spill - ld.d $a1, $sp, 32 # 8-byte Folded Reload + ld.d $a1, $sp, 40 # 8-byte Folded Reload st.d $a1, $sp, 144 # 8-byte Folded Spill ori $s3, $zero, 1 - b .LBB7_476 -.LBB7_363: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_478 +.LBB7_364: # in Loop: Header=BB7_308 Depth=3 andi $s4, $s3, 7 ori $a2, $zero, 7 - bne $s4, $a2, .LBB7_419 -# %bb.364: # %.preheader1329 - # in Loop: Header=BB7_307 Depth=3 + bne $s4, $a2, .LBB7_377 +# %bb.365: # %.preheader1329 + # in Loop: Header=BB7_308 Depth=3 ori $a2, $zero, 15 - blt $a2, $s7, .LBB7_376 -# %bb.365: # %.lr.ph3056.preheader - # in Loop: Header=BB7_307 Depth=3 + blt $a2, $s7, .LBB7_378 +# %bb.366: # %.lr.ph3056.preheader + # in Loop: Header=BB7_308 Depth=3 sub.d $a0, $a1, $a0 addi.d $s4, $a0, 16 - b .LBB7_368 -.LBB7_366: # in Loop: Header=BB7_368 Depth=4 + b .LBB7_369 +.LBB7_367: # in Loop: Header=BB7_369 Depth=4 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_367: # in Loop: Header=BB7_368 Depth=4 +.LBB7_368: # in Loop: Header=BB7_369 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s4 or $s1, $a0, $s1 addi.w $s7, $s6, 16 addi.d $s8, $s8, 2 addi.d $s4, $s4, -16 - bgez $s6, .LBB7_376 -.LBB7_368: # %.lr.ph3056 + bgez $s6, .LBB7_378 +.LBB7_369: # %.lr.ph3056 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 move $s6, $s7 - bltu $a0, $s5, .LBB7_367 -# %bb.369: # in Loop: Header=BB7_368 Depth=4 + bltu $a0, $s5, .LBB7_368 +# %bb.370: # in Loop: Header=BB7_369 Depth=4 ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a3, $a0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_371 -# %bb.370: # in Loop: Header=BB7_368 Depth=4 + beqz $a3, .LBB7_372 +# %bb.371: # in Loop: Header=BB7_369 Depth=4 ld.d $a0, $a0, 0 jirl $ra, $a3, 0 - b .LBB7_372 -.LBB7_371: # in Loop: Header=BB7_368 Depth=4 + b .LBB7_373 +.LBB7_372: # in Loop: Header=BB7_369 Depth=4 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 -.LBB7_372: # in Loop: Header=BB7_368 Depth=4 - bltz $a0, .LBB7_623 -# %bb.373: # in Loop: Header=BB7_368 Depth=4 - bnez $a0, .LBB7_366 -# %bb.374: # in Loop: Header=BB7_368 Depth=4 +.LBB7_373: # in Loop: Header=BB7_369 Depth=4 + bltz $a0, .LBB7_625 +# %bb.374: # in Loop: Header=BB7_369 Depth=4 + bnez $a0, .LBB7_367 +# %bb.375: # in Loop: Header=BB7_369 Depth=4 ld.bu $a0, $fp, 92 - bnez $a0, .LBB7_622 -# %bb.375: # in Loop: Header=BB7_368 Depth=4 + bnez $a0, .LBB7_624 +# %bb.376: # in Loop: Header=BB7_369 Depth=4 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 st.b $zero, $a0, 0 st.b $s2, $fp, 92 ori $a0, $zero, 2 - b .LBB7_366 -.LBB7_376: # %._crit_edge3057 - # in Loop: Header=BB7_307 Depth=3 + b .LBB7_367 +.LBB7_377: # in Loop: Header=BB7_308 Depth=3 + ld.d $a3, $sp, 56 # 8-byte Folded Reload + b .LBB7_421 +.LBB7_378: # %._crit_edge3057 + # in Loop: Header=BB7_308 Depth=3 ld.d $a0, $sp, 112 # 8-byte Folded Reload and $a0, $s1, $a0 srli.d $a0, $a0, 19 ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.377: # %.preheader.preheader - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.379: # %.preheader.preheader + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.378: # in Loop: Header=BB7_307 Depth=3 + ld.d $a3, $sp, 56 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.380: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 19, 19 or $a0, $a0, $a1 @@ -5207,13 +5208,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_418 -# %bb.379: # %.preheader.1 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_420 +# %bb.381: # %.preheader.1 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.380: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.382: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 18, 18 or $a0, $a0, $a1 @@ -5222,13 +5223,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_418 -# %bb.381: # %.preheader.2 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_420 +# %bb.383: # %.preheader.2 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.382: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.384: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 17, 17 or $a0, $a0, $a1 @@ -5237,13 +5238,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_418 -# %bb.383: # %.preheader.3 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_420 +# %bb.385: # %.preheader.3 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.384: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.386: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 16, 16 or $a0, $a0, $a1 @@ -5252,13 +5253,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_418 -# %bb.385: # %.preheader.4 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_420 +# %bb.387: # %.preheader.4 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.386: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.388: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 15, 15 or $a0, $a0, $a1 @@ -5267,14 +5268,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_418 -# %bb.387: # %.preheader.5 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_420 +# %bb.389: # %.preheader.5 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.388: # in Loop: Header=BB7_307 Depth=3 - ld.d $s0, $sp, 128 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.390: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 14, 14 or $a0, $a0, $a1 @@ -5283,14 +5283,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - st.d $s0, $sp, 128 # 8-byte Folded Spill - bltu $a0, $a1, .LBB7_417 -# %bb.389: # %.preheader.6 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.391: # %.preheader.6 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.390: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.392: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 13, 13 or $a0, $a0, $a1 @@ -5299,13 +5298,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.391: # %.preheader.7 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.393: # %.preheader.7 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.392: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.394: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 12, 12 or $a0, $a0, $a1 @@ -5314,13 +5313,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.393: # %.preheader.8 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.395: # %.preheader.8 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.394: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.396: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 11, 11 or $a0, $a0, $a1 @@ -5329,13 +5328,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.395: # %.preheader.9 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.397: # %.preheader.9 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.396: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.398: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 10, 10 or $a0, $a0, $a1 @@ -5344,13 +5343,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.397: # %.preheader.10 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.399: # %.preheader.10 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.398: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.400: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 9, 9 or $a0, $a0, $a1 @@ -5359,13 +5358,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.399: # %.preheader.11 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.401: # %.preheader.11 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.400: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.402: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 8, 8 or $a0, $a0, $a1 @@ -5374,13 +5373,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.401: # %.preheader.12 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.403: # %.preheader.12 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.402: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.404: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 7, 7 or $a0, $a0, $a1 @@ -5389,13 +5388,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.403: # %.preheader.13 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.405: # %.preheader.13 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.404: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.406: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 6, 6 or $a0, $a0, $a1 @@ -5404,13 +5403,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.405: # %.preheader.14 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.407: # %.preheader.14 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.406: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.408: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 5, 5 or $a0, $a0, $a1 @@ -5419,13 +5418,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.407: # %.preheader.15 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.409: # %.preheader.15 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.408: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.410: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 4, 4 or $a0, $a0, $a1 @@ -5434,13 +5433,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.409: # %.preheader.16 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.411: # %.preheader.16 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.410: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.412: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 3, 3 or $a0, $a0, $a1 @@ -5449,13 +5448,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.411: # %.preheader.17 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.413: # %.preheader.17 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.412: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.414: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 2, 2 or $a0, $a0, $a1 @@ -5464,13 +5463,13 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.413: # %.preheader.18 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.415: # %.preheader.18 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.414: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a1, .LBB7_628 +# %bb.416: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 bstrpick.d $a1, $s1, 1, 1 or $a0, $a0, $a1 @@ -5479,14 +5478,15 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 250 - bltu $a0, $a1, .LBB7_417 -# %bb.415: # %.preheader.19 - # in Loop: Header=BB7_307 Depth=3 + bltu $a0, $a1, .LBB7_419 +# %bb.417: # %.preheader.19 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a1, $a0, 14, 1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload ori $a2, $zero, 1148 - bltu $a2, $a1, .LBB7_626 -# %bb.416: # in Loop: Header=BB7_307 Depth=3 + ld.d $a3, $sp, 56 # 8-byte Folded Reload + bltu $a2, $a1, .LBB7_628 +# %bb.418: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 1 andi $a1, $s1, 1 or $a0, $a0, $a1 @@ -5495,25 +5495,25 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 88 # 8-byte Folded Reload ldx.hu $a0, $a1, $a0 ori $a1, $zero, 249 - bgeu $a1, $a0, .LBB7_418 - b .LBB7_638 -.LBB7_417: # in Loop: Header=BB7_307 Depth=3 - ld.d $s6, $sp, 168 # 8-byte Folded Reload -.LBB7_418: # %.loopexit1328 - # in Loop: Header=BB7_307 Depth=3 + bgeu $a1, $a0, .LBB7_420 + b .LBB7_640 +.LBB7_419: # in Loop: Header=BB7_308 Depth=3 + ld.d $s0, $sp, 168 # 8-byte Folded Reload + ld.d $a3, $sp, 56 # 8-byte Folded Reload +.LBB7_420: # %.loopexit1328 + # in Loop: Header=BB7_308 Depth=3 addi.d $a1, $fp, 960 ldx.bu $a1, $a1, $a0 sll.w $s1, $s1, $a1 sub.w $s7, $s7, $a1 addi.d $a0, $a0, 7 bstrpick.d $s4, $a0, 15, 0 -.LBB7_419: # in Loop: Header=BB7_307 Depth=3 - ld.d $a3, $sp, 56 # 8-byte Folded Reload +.LBB7_421: # in Loop: Header=BB7_308 Depth=3 addi.d $a0, $s3, -256 bstrpick.d $a0, $a0, 31, 3 ori $a1, $zero, 3 - bltu $a1, $a0, .LBB7_424 -# %bb.420: # in Loop: Header=BB7_307 Depth=3 + bltu $a1, $a0, .LBB7_426 +# %bb.422: # in Loop: Header=BB7_308 Depth=3 slli.d $a0, $a0, 2 pcalau12i $a1, %pc_hi20(.LJTI7_0) addi.d $a1, $a1, %pc_lo12(.LJTI7_0) @@ -5521,59 +5521,59 @@ lzx_decompress: # @lzx_decompress add.d $a0, $a1, $a0 ld.d $a4, $sp, 16 # 8-byte Folded Reload move $a1, $a4 - ld.d $a2, $sp, 32 # 8-byte Folded Reload + ld.d $a2, $sp, 40 # 8-byte Folded Reload st.d $a2, $sp, 144 # 8-byte Folded Spill jr $a0 -.LBB7_421: # in Loop: Header=BB7_307 Depth=3 +.LBB7_423: # in Loop: Header=BB7_308 Depth=3 move $a1, $a2 st.d $a4, $sp, 144 # 8-byte Folded Spill - b .LBB7_431 -.LBB7_422: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_433 +.LBB7_424: # in Loop: Header=BB7_308 Depth=3 ld.d $a1, $sp, 104 # 8-byte Folded Reload st.d $a2, $sp, 144 # 8-byte Folded Spill st.d $a4, $sp, 104 # 8-byte Folded Spill - b .LBB7_431 -.LBB7_423: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_433 +.LBB7_425: # in Loop: Header=BB7_308 Depth=3 ori $a1, $zero, 1 st.d $a4, $sp, 144 # 8-byte Folded Spill st.d $a2, $sp, 104 # 8-byte Folded Spill - b .LBB7_431 -.LBB7_424: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_433 +.LBB7_426: # in Loop: Header=BB7_308 Depth=3 addi.w $s6, $a0, 0 ld.d $a0, $sp, 64 # 8-byte Folded Reload ldx.bu $s3, $a0, $s6 - bge $s7, $s3, .LBB7_430 -# %bb.425: # %.lr.ph3067.preheader - # in Loop: Header=BB7_307 Depth=3 + bge $s7, $s3, .LBB7_432 +# %bb.427: # %.lr.ph3067.preheader + # in Loop: Header=BB7_308 Depth=3 ori $a0, $zero, 16 sub.d $s2, $a0, $s7 - b .LBB7_427 -.LBB7_426: # in Loop: Header=BB7_427 Depth=4 + b .LBB7_429 +.LBB7_428: # in Loop: Header=BB7_429 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s2 or $s1, $a0, $s1 addi.w $s7, $s7, 16 addi.d $s8, $s8, 2 addi.d $s2, $s2, -16 - bge $s7, $s3, .LBB7_430 -.LBB7_427: # %.lr.ph3067 + bge $s7, $s3, .LBB7_432 +.LBB7_429: # %.lr.ph3067 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_426 -# %bb.428: # in Loop: Header=BB7_427 Depth=4 + bltu $a0, $s5, .LBB7_428 +# %bb.430: # in Loop: Header=BB7_429 Depth=4 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.429: # in Loop: Header=BB7_427 Depth=4 + bnez $a0, .LBB7_629 +# %bb.431: # in Loop: Header=BB7_429 Depth=4 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 - b .LBB7_426 -.LBB7_430: # %._crit_edge3068 - # in Loop: Header=BB7_307 Depth=3 + b .LBB7_428 +.LBB7_432: # %._crit_edge3068 + # in Loop: Header=BB7_308 Depth=3 ori $a0, $zero, 32 sub.d $a0, $a0, $s3 slli.d $a1, $s6, 2 @@ -5586,17 +5586,17 @@ lzx_decompress: # @lzx_decompress addi.w $a1, $a0, -2 ld.d $a0, $sp, 16 # 8-byte Folded Reload st.d $a0, $sp, 144 # 8-byte Folded Spill - ld.d $a0, $sp, 32 # 8-byte Folded Reload + ld.d $a0, $sp, 40 # 8-byte Folded Reload st.d $a0, $sp, 104 # 8-byte Folded Spill - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload ld.d $a3, $sp, 56 # 8-byte Folded Reload -.LBB7_431: # in Loop: Header=BB7_307 Depth=3 +.LBB7_433: # in Loop: Header=BB7_308 Depth=3 ld.w $a2, $fp, 40 addi.w $a0, $s4, 2 add.w $s2, $a0, $a3 ori $s3, $zero, 1 - bltu $a2, $s2, .LBB7_633 -# %bb.432: # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $s2, .LBB7_635 +# %bb.434: # in Loop: Header=BB7_308 Depth=3 move $a6, $a3 bstrpick.d $a4, $a3, 31, 0 addi.w $a3, $a1, 0 @@ -5604,43 +5604,43 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 120 # 8-byte Folded Reload add.d $a1, $a1, $a4 st.d $a5, $sp, 136 # 8-byte Folded Spill - bgeu $a6, $a3, .LBB7_441 -# %bb.433: # in Loop: Header=BB7_307 Depth=3 + bgeu $a6, $a3, .LBB7_443 +# %bb.435: # in Loop: Header=BB7_308 Depth=3 sub.w $a5, $a5, $a6 - blt $a2, $a5, .LBB7_636 -# %bb.434: # in Loop: Header=BB7_307 Depth=3 + blt $a2, $a5, .LBB7_638 +# %bb.436: # in Loop: Header=BB7_308 Depth=3 sub.d $a2, $a2, $a5 bstrpick.d $t0, $a2, 31, 0 ld.d $a2, $sp, 120 # 8-byte Folded Reload add.d $a3, $a2, $t0 - bge $a5, $a0, .LBB7_446 -# %bb.435: # in Loop: Header=BB7_307 Depth=3 + bge $a5, $a0, .LBB7_448 +# %bb.437: # in Loop: Header=BB7_308 Depth=3 sub.w $a2, $a0, $a5 addi.d $s4, $fp, 240 - blez $a5, .LBB7_459 -# %bb.436: # %.lr.ph3082.preheader - # in Loop: Header=BB7_307 Depth=3 + blez $a5, .LBB7_461 +# %bb.438: # %.lr.ph3082.preheader + # in Loop: Header=BB7_308 Depth=3 ori $a7, $zero, 32 - bltu $a5, $a7, .LBB7_456 -# %bb.437: # %.lr.ph3082.preheader - # in Loop: Header=BB7_307 Depth=3 + bltu $a5, $a7, .LBB7_458 +# %bb.439: # %.lr.ph3082.preheader + # in Loop: Header=BB7_308 Depth=3 sub.d $a6, $a4, $t0 - bltu $a6, $a7, .LBB7_456 -# %bb.438: # %vector.ph4067 - # in Loop: Header=BB7_307 Depth=3 + bltu $a6, $a7, .LBB7_458 +# %bb.440: # %vector.ph4067 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a6, $a5, 30, 5 slli.d $a7, $a6, 5 add.d $a1, $a1, $a7 add.d $a3, $a3, $a7 sub.d $a6, $a5, $a7 - ld.d $t1, $sp, 40 # 8-byte Folded Reload + ld.d $t1, $sp, 32 # 8-byte Folded Reload add.d $t0, $t1, $t0 add.d $a4, $t1, $a4 move $t1, $a7 -.LBB7_439: # %vector.body4071 +.LBB7_441: # %vector.body4071 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 vld $vr0, $t0, -16 vld $vr1, $t0, 0 @@ -5649,51 +5649,51 @@ lzx_decompress: # @lzx_decompress addi.d $t1, $t1, -32 addi.d $t0, $t0, 32 addi.d $a4, $a4, 32 - bnez $t1, .LBB7_439 -# %bb.440: # %middle.block4078 - # in Loop: Header=BB7_307 Depth=3 - bne $a7, $a5, .LBB7_457 - b .LBB7_459 -.LBB7_441: # %iter.check4088 - # in Loop: Header=BB7_307 Depth=3 + bnez $t1, .LBB7_441 +# %bb.442: # %middle.block4078 + # in Loop: Header=BB7_308 Depth=3 + bne $a7, $a5, .LBB7_459 + b .LBB7_461 +.LBB7_443: # %iter.check4088 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a5, $a5, 31, 0 sub.d $a2, $a1, $a5 ori $a6, $zero, 6 - bltu $s4, $a6, .LBB7_445 -# %bb.442: # %iter.check4088 - # in Loop: Header=BB7_307 Depth=3 + bltu $s4, $a6, .LBB7_447 +# %bb.444: # %iter.check4088 + # in Loop: Header=BB7_308 Depth=3 ori $a6, $zero, 32 - bltu $a3, $a6, .LBB7_445 -# %bb.443: # %vector.main.loop.iter.check4090 - # in Loop: Header=BB7_307 Depth=3 + bltu $a3, $a6, .LBB7_447 +# %bb.445: # %vector.main.loop.iter.check4090 + # in Loop: Header=BB7_308 Depth=3 sub.d $a3, $zero, $a5 ori $a5, $zero, 30 - bgeu $s4, $a5, .LBB7_447 -# %bb.444: # in Loop: Header=BB7_307 Depth=3 + bgeu $s4, $a5, .LBB7_449 +# %bb.446: # in Loop: Header=BB7_308 Depth=3 move $a6, $zero addi.d $s4, $fp, 240 - b .LBB7_451 -.LBB7_445: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_453 +.LBB7_447: # in Loop: Header=BB7_308 Depth=3 move $a5, $a0 addi.d $s4, $fp, 240 - b .LBB7_454 -.LBB7_446: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_456 +.LBB7_448: # in Loop: Header=BB7_308 Depth=3 move $a2, $a0 addi.d $s4, $fp, 240 - b .LBB7_460 -.LBB7_447: # %vector.ph4091 - # in Loop: Header=BB7_307 Depth=3 + b .LBB7_462 +.LBB7_449: # %vector.ph4091 + # in Loop: Header=BB7_308 Depth=3 andi $a5, $a0, 24 bstrpick.d $a6, $a0, 15, 5 slli.d $a6, $a6, 5 - ld.d $a7, $sp, 40 # 8-byte Folded Reload + ld.d $a7, $sp, 32 # 8-byte Folded Reload add.d $a7, $a7, $a4 move $t0, $a6 addi.d $s4, $fp, 240 -.LBB7_448: # %vector.body4094 +.LBB7_450: # %vector.body4094 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 add.d $t1, $a7, $a3 vld $vr0, $t1, -16 @@ -5702,15 +5702,15 @@ lzx_decompress: # @lzx_decompress vst $vr1, $a7, 0 addi.d $t0, $t0, -32 addi.d $a7, $a7, 32 - bnez $t0, .LBB7_448 -# %bb.449: # %middle.block4101 - # in Loop: Header=BB7_307 Depth=3 - beq $a6, $a0, .LBB7_475 -# %bb.450: # %vec.epilog.iter.check4105 - # in Loop: Header=BB7_307 Depth=3 - beqz $a5, .LBB7_477 -.LBB7_451: # %vec.epilog.ph4107 - # in Loop: Header=BB7_307 Depth=3 + bnez $t0, .LBB7_450 +# %bb.451: # %middle.block4101 + # in Loop: Header=BB7_308 Depth=3 + beq $a6, $a0, .LBB7_477 +# %bb.452: # %vec.epilog.iter.check4105 + # in Loop: Header=BB7_308 Depth=3 + beqz $a5, .LBB7_479 +.LBB7_453: # %vec.epilog.ph4107 + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $t0, $a0, 15, 3 slli.d $a7, $t0, 3 sub.d $a5, $a0, $a7 @@ -5720,26 +5720,26 @@ lzx_decompress: # @lzx_decompress add.d $a4, $a6, $a4 ld.d $a6, $sp, 120 # 8-byte Folded Reload add.d $a4, $a6, $a4 -.LBB7_452: # %vec.epilog.vector.body4111 +.LBB7_454: # %vec.epilog.vector.body4111 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 ldx.d $a6, $a4, $a3 st.d $a6, $a4, 0 addi.d $t0, $t0, 8 addi.d $a4, $a4, 8 - bnez $t0, .LBB7_452 -# %bb.453: # %vec.epilog.middle.block4117 - # in Loop: Header=BB7_307 Depth=3 - beq $a7, $a0, .LBB7_475 -.LBB7_454: # %.lr.ph3077.preheader - # in Loop: Header=BB7_307 Depth=3 + bnez $t0, .LBB7_454 +# %bb.455: # %vec.epilog.middle.block4117 + # in Loop: Header=BB7_308 Depth=3 + beq $a7, $a0, .LBB7_477 +.LBB7_456: # %.lr.ph3077.preheader + # in Loop: Header=BB7_308 Depth=3 addi.d $a3, $a5, 1 -.LBB7_455: # %.lr.ph3077 +.LBB7_457: # %.lr.ph3077 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 ld.b $a4, $a2, 0 addi.d $a2, $a2, 1 @@ -5747,61 +5747,61 @@ lzx_decompress: # @lzx_decompress addi.w $a3, $a3, -1 st.b $a4, $a1, 0 move $a1, $a5 - blt $s3, $a3, .LBB7_455 - b .LBB7_475 -.LBB7_456: # in Loop: Header=BB7_307 Depth=3 + blt $s3, $a3, .LBB7_457 + b .LBB7_477 +.LBB7_458: # in Loop: Header=BB7_308 Depth=3 move $a6, $a5 -.LBB7_457: # %.lr.ph3082.preheader4242 - # in Loop: Header=BB7_307 Depth=3 +.LBB7_459: # %.lr.ph3082.preheader4242 + # in Loop: Header=BB7_308 Depth=3 addi.d $a4, $a6, 1 -.LBB7_458: # %.lr.ph3082 +.LBB7_460: # %.lr.ph3082 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 ld.b $a5, $a3, 0 addi.d $a3, $a3, 1 st.b $a5, $a1, 0 addi.w $a4, $a4, -1 addi.d $a1, $a1, 1 - bltu $s3, $a4, .LBB7_458 -.LBB7_459: # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a4, .LBB7_460 +.LBB7_461: # in Loop: Header=BB7_308 Depth=3 ld.d $a3, $sp, 120 # 8-byte Folded Reload -.LBB7_460: # %.loopexit1326 - # in Loop: Header=BB7_307 Depth=3 - blez $a2, .LBB7_475 -# %bb.461: # %iter.check - # in Loop: Header=BB7_307 Depth=3 +.LBB7_462: # %.loopexit1326 + # in Loop: Header=BB7_308 Depth=3 + blez $a2, .LBB7_477 +# %bb.463: # %iter.check + # in Loop: Header=BB7_308 Depth=3 ori $a4, $zero, 8 - bltu $a2, $a4, .LBB7_465 -# %bb.462: # %iter.check - # in Loop: Header=BB7_307 Depth=3 + bltu $a2, $a4, .LBB7_467 +# %bb.464: # %iter.check + # in Loop: Header=BB7_308 Depth=3 sub.d $a4, $a1, $a3 ori $a5, $zero, 32 - bltu $a4, $a5, .LBB7_465 -# %bb.463: # %vector.main.loop.iter.check - # in Loop: Header=BB7_307 Depth=3 - bgeu $a2, $a5, .LBB7_466 -# %bb.464: # in Loop: Header=BB7_307 Depth=3 + bltu $a4, $a5, .LBB7_467 +# %bb.465: # %vector.main.loop.iter.check + # in Loop: Header=BB7_308 Depth=3 + bgeu $a2, $a5, .LBB7_468 +# %bb.466: # in Loop: Header=BB7_308 Depth=3 move $a7, $zero - b .LBB7_470 -.LBB7_465: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_472 +.LBB7_467: # in Loop: Header=BB7_308 Depth=3 move $a6, $a2 move $a4, $a1 move $a5, $a3 - b .LBB7_473 -.LBB7_466: # %vector.ph - # in Loop: Header=BB7_307 Depth=3 + b .LBB7_475 +.LBB7_468: # %vector.ph + # in Loop: Header=BB7_308 Depth=3 andi $a4, $a2, 24 bstrpick.d $a5, $a2, 30, 5 slli.d $a7, $a5, 5 addi.d $a5, $a3, 16 addi.d $a6, $a1, 16 move $t0, $a7 -.LBB7_467: # %vector.body +.LBB7_469: # %vector.body # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 vld $vr0, $a5, -16 vld $vr1, $a5, 0 @@ -5810,15 +5810,15 @@ lzx_decompress: # @lzx_decompress addi.d $t0, $t0, -32 addi.d $a5, $a5, 32 addi.d $a6, $a6, 32 - bnez $t0, .LBB7_467 -# %bb.468: # %middle.block - # in Loop: Header=BB7_307 Depth=3 - beq $a7, $a2, .LBB7_475 -# %bb.469: # %vec.epilog.iter.check - # in Loop: Header=BB7_307 Depth=3 - beqz $a4, .LBB7_478 -.LBB7_470: # %vec.epilog.ph - # in Loop: Header=BB7_307 Depth=3 + bnez $t0, .LBB7_469 +# %bb.470: # %middle.block + # in Loop: Header=BB7_308 Depth=3 + beq $a7, $a2, .LBB7_477 +# %bb.471: # %vec.epilog.iter.check + # in Loop: Header=BB7_308 Depth=3 + beqz $a4, .LBB7_480 +.LBB7_472: # %vec.epilog.ph + # in Loop: Header=BB7_308 Depth=3 bstrpick.d $a5, $a2, 30, 3 slli.d $t0, $a5, 3 sub.d $a6, $a2, $t0 @@ -5827,27 +5827,27 @@ lzx_decompress: # @lzx_decompress sub.d $t1, $a7, $t0 add.d $a3, $a3, $a7 add.d $a1, $a1, $a7 -.LBB7_471: # %vec.epilog.vector.body +.LBB7_473: # %vec.epilog.vector.body # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 ld.d $a7, $a3, 0 st.d $a7, $a1, 0 addi.d $t1, $t1, 8 addi.d $a3, $a3, 8 addi.d $a1, $a1, 8 - bnez $t1, .LBB7_471 -# %bb.472: # %vec.epilog.middle.block - # in Loop: Header=BB7_307 Depth=3 - beq $t0, $a2, .LBB7_475 -.LBB7_473: # %.lr.ph3088.preheader - # in Loop: Header=BB7_307 Depth=3 + bnez $t1, .LBB7_473 +# %bb.474: # %vec.epilog.middle.block + # in Loop: Header=BB7_308 Depth=3 + beq $t0, $a2, .LBB7_477 +.LBB7_475: # %.lr.ph3088.preheader + # in Loop: Header=BB7_308 Depth=3 addi.d $a1, $a6, 1 -.LBB7_474: # %.lr.ph3088 +.LBB7_476: # %.lr.ph3088 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_307 Depth=3 + # Parent Loop BB7_308 Depth=3 # => This Inner Loop Header: Depth=4 ld.b $a2, $a5, 0 addi.d $a5, $a5, 1 @@ -5855,34 +5855,34 @@ lzx_decompress: # @lzx_decompress addi.w $a1, $a1, -1 st.b $a2, $a4, 0 move $a4, $a3 - bltu $s3, $a1, .LBB7_474 -.LBB7_475: # %.loopexit - # in Loop: Header=BB7_307 Depth=3 + bltu $s3, $a1, .LBB7_476 +.LBB7_477: # %.loopexit + # in Loop: Header=BB7_308 Depth=3 ld.d $a1, $sp, 192 # 8-byte Folded Reload sub.w $a0, $a1, $a0 ld.d $a1, $sp, 144 # 8-byte Folded Reload - st.d $a1, $sp, 32 # 8-byte Folded Spill + st.d $a1, $sp, 40 # 8-byte Folded Spill ld.d $a1, $sp, 136 # 8-byte Folded Reload st.d $a1, $sp, 16 # 8-byte Folded Spill -.LBB7_476: # in Loop: Header=BB7_307 Depth=3 +.LBB7_478: # in Loop: Header=BB7_308 Depth=3 st.d $s2, $sp, 56 # 8-byte Folded Spill ld.d $a1, $sp, 176 # 8-byte Folded Reload st.d $a0, $sp, 192 # 8-byte Folded Spill - bgtz $a0, .LBB7_307 - b .LBB7_494 -.LBB7_477: # in Loop: Header=BB7_307 Depth=3 + bgtz $a0, .LBB7_308 + b .LBB7_496 +.LBB7_479: # in Loop: Header=BB7_308 Depth=3 sub.d $a5, $a0, $a6 add.d $a1, $a1, $a6 add.d $a2, $a2, $a6 - b .LBB7_454 -.LBB7_478: # in Loop: Header=BB7_307 Depth=3 + b .LBB7_456 +.LBB7_480: # in Loop: Header=BB7_308 Depth=3 sub.d $a6, $a2, $a7 add.d $a4, $a1, $a7 add.d $a5, $a3, $a7 - b .LBB7_473 -.LBB7_479: # in Loop: Header=BB7_62 Depth=2 + b .LBB7_475 +.LBB7_481: # in Loop: Header=BB7_62 Depth=2 move $a0, $s7 -.LBB7_480: # %._crit_edge2866 +.LBB7_482: # %._crit_edge2866 # in Loop: Header=BB7_62 Depth=2 st.d $s2, $sp, 192 # 8-byte Folded Spill bstrpick.d $a1, $s1, 31, 29 @@ -5890,15 +5890,15 @@ lzx_decompress: # @lzx_decompress addi.w $a1, $a0, 0 slli.d $s1, $s1, 3 ori $a2, $zero, 18 - bltu $a2, $a1, .LBB7_491 -# %bb.481: # %.lr.ph2876.preheader + bltu $a2, $a1, .LBB7_493 +# %bb.483: # %.lr.ph2876.preheader # in Loop: Header=BB7_62 Depth=2 addi.d $s3, $a0, -19 ori $a1, $zero, 19 sub.d $s4, $a1, $a0 ori $s2, $zero, 32 - b .LBB7_485 -.LBB7_482: # in Loop: Header=BB7_485 Depth=3 + b .LBB7_487 +.LBB7_484: # in Loop: Header=BB7_487 Depth=3 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 @@ -5906,89 +5906,89 @@ lzx_decompress: # @lzx_decompress ori $a0, $zero, 1 st.b $a0, $fp, 92 ori $a0, $zero, 2 -.LBB7_483: # in Loop: Header=BB7_485 Depth=3 +.LBB7_485: # in Loop: Header=BB7_487 Depth=3 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_484: # in Loop: Header=BB7_485 Depth=3 +.LBB7_486: # in Loop: Header=BB7_487 Depth=3 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s4 or $s1, $a0, $s1 addi.d $s8, $s8, 2 addi.w $s3, $s3, 16 addi.d $s4, $s4, -16 - bgez $s3, .LBB7_498 -.LBB7_485: # %.lr.ph2876 + bgez $s3, .LBB7_500 +.LBB7_487: # %.lr.ph2876 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Inner Loop Header: Depth=3 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_484 -# %bb.486: # in Loop: Header=BB7_485 Depth=3 - ld.d $a3, $s6, 8 + bltu $a0, $s5, .LBB7_486 +# %bb.488: # in Loop: Header=BB7_487 Depth=3 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_488 -# %bb.487: # in Loop: Header=BB7_485 Depth=3 - ld.d $a0, $s6, 0 + beqz $a3, .LBB7_490 +# %bb.489: # in Loop: Header=BB7_487 Depth=3 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 - bgez $a0, .LBB7_489 - b .LBB7_623 -.LBB7_488: # in Loop: Header=BB7_485 Depth=3 + bgez $a0, .LBB7_491 + b .LBB7_625 +.LBB7_490: # in Loop: Header=BB7_487 Depth=3 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 - bltz $a0, .LBB7_623 -.LBB7_489: # in Loop: Header=BB7_485 Depth=3 - bnez $a0, .LBB7_483 -# %bb.490: # in Loop: Header=BB7_485 Depth=3 + bltz $a0, .LBB7_625 +.LBB7_491: # in Loop: Header=BB7_487 Depth=3 + bnez $a0, .LBB7_485 +# %bb.492: # in Loop: Header=BB7_487 Depth=3 ld.bu $a0, $fp, 92 - beqz $a0, .LBB7_482 - b .LBB7_622 -.LBB7_491: # in Loop: Header=BB7_62 Depth=2 + beqz $a0, .LBB7_484 + b .LBB7_624 +.LBB7_493: # in Loop: Header=BB7_62 Depth=2 addi.w $a0, $a0, -3 ori $s2, $zero, 32 - b .LBB7_499 -.LBB7_492: # in Loop: Header=BB7_62 Depth=2 + b .LBB7_501 +.LBB7_494: # in Loop: Header=BB7_62 Depth=2 st.d $a1, $sp, 192 # 8-byte Folded Spill move $s2, $a2 - b .LBB7_494 -.LBB7_493: # in Loop: Header=BB7_62 Depth=2 + b .LBB7_496 +.LBB7_495: # in Loop: Header=BB7_62 Depth=2 ld.d $a1, $sp, 176 # 8-byte Folded Reload st.d $a1, $sp, 192 # 8-byte Folded Spill -.LBB7_494: # %.loopexit1355 +.LBB7_496: # %.loopexit1355 # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $sp, 192 # 8-byte Folded Reload - bgez $a0, .LBB7_497 -# %bb.495: # in Loop: Header=BB7_62 Depth=2 + bgez $a0, .LBB7_499 +# %bb.497: # in Loop: Header=BB7_62 Depth=2 ld.w $a2, $fp, 76 sub.w $a1, $zero, $a0 - bltu $a2, $a1, .LBB7_635 -# %bb.496: # in Loop: Header=BB7_62 Depth=2 + bltu $a2, $a1, .LBB7_637 +# %bb.498: # in Loop: Header=BB7_62 Depth=2 add.d $a0, $a2, $a0 st.w $a0, $fp, 76 ld.d $a1, $sp, 176 # 8-byte Folded Reload -.LBB7_497: # in Loop: Header=BB7_62 Depth=2 +.LBB7_499: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $sp, 160 # 8-byte Folded Reload sub.w $a0, $a0, $a1 st.d $a0, $sp, 160 # 8-byte Folded Spill bgtz $a0, .LBB7_62 - b .LBB7_588 -.LBB7_498: # %._crit_edge2877.loopexit + b .LBB7_590 +.LBB7_500: # %._crit_edge2877.loopexit # in Loop: Header=BB7_62 Depth=2 addi.w $a0, $s3, 16 -.LBB7_499: # %._crit_edge2877 +.LBB7_501: # %._crit_edge2877 # in Loop: Header=BB7_62 Depth=2 slli.d $s3, $s1, 16 ori $a1, $zero, 23 - blt $a1, $a0, .LBB7_511 -# %bb.500: # %.lr.ph2887.preheader + blt $a1, $a0, .LBB7_513 +# %bb.502: # %.lr.ph2887.preheader # in Loop: Header=BB7_62 Depth=2 addi.d $s4, $a0, -32 sub.d $s6, $s2, $a0 - b .LBB7_504 -.LBB7_501: # in Loop: Header=BB7_504 Depth=3 + b .LBB7_506 +.LBB7_503: # in Loop: Header=BB7_506 Depth=3 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 @@ -5996,12 +5996,12 @@ lzx_decompress: # @lzx_decompress ori $a0, $zero, 1 st.b $a0, $fp, 92 ori $a0, $zero, 2 -.LBB7_502: # in Loop: Header=BB7_504 Depth=3 +.LBB7_504: # in Loop: Header=BB7_506 Depth=3 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_503: # in Loop: Header=BB7_504 Depth=3 +.LBB7_505: # in Loop: Header=BB7_506 Depth=3 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s6 or $s3, $a0, $s3 @@ -6009,43 +6009,43 @@ lzx_decompress: # @lzx_decompress addi.w $s4, $s4, 16 addi.w $a0, $zero, -8 addi.d $s6, $s6, -16 - bge $s4, $a0, .LBB7_512 -.LBB7_504: # %.lr.ph2887 + bge $s4, $a0, .LBB7_514 +.LBB7_506: # %.lr.ph2887 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Inner Loop Header: Depth=3 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_503 -# %bb.505: # in Loop: Header=BB7_504 Depth=3 + bltu $a0, $s5, .LBB7_505 +# %bb.507: # in Loop: Header=BB7_506 Depth=3 ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a3, $a0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_507 -# %bb.506: # in Loop: Header=BB7_504 Depth=3 + beqz $a3, .LBB7_509 +# %bb.508: # in Loop: Header=BB7_506 Depth=3 ld.d $a0, $a0, 0 jirl $ra, $a3, 0 - b .LBB7_508 -.LBB7_507: # in Loop: Header=BB7_504 Depth=3 + b .LBB7_510 +.LBB7_509: # in Loop: Header=BB7_506 Depth=3 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 -.LBB7_508: # in Loop: Header=BB7_504 Depth=3 - bltz $a0, .LBB7_623 -# %bb.509: # in Loop: Header=BB7_504 Depth=3 - bnez $a0, .LBB7_502 -# %bb.510: # in Loop: Header=BB7_504 Depth=3 +.LBB7_510: # in Loop: Header=BB7_506 Depth=3 + bltz $a0, .LBB7_625 +# %bb.511: # in Loop: Header=BB7_506 Depth=3 + bnez $a0, .LBB7_504 +# %bb.512: # in Loop: Header=BB7_506 Depth=3 ld.bu $a0, $fp, 92 - beqz $a0, .LBB7_501 - b .LBB7_622 -.LBB7_511: # in Loop: Header=BB7_62 Depth=2 + beqz $a0, .LBB7_503 + b .LBB7_624 +.LBB7_513: # in Loop: Header=BB7_62 Depth=2 addi.w $a0, $a0, -16 - b .LBB7_513 -.LBB7_512: # %._crit_edge2888.loopexit + b .LBB7_515 +.LBB7_514: # %._crit_edge2888.loopexit # in Loop: Header=BB7_62 Depth=2 addi.w $a0, $s4, 16 - ld.d $s6, $sp, 168 # 8-byte Folded Reload -.LBB7_513: # %._crit_edge2888 + ld.d $s0, $sp, 168 # 8-byte Folded Reload +.LBB7_515: # %._crit_edge2888 # in Loop: Header=BB7_62 Depth=2 bstrpick.d $a2, $s3, 31, 24 slli.d $s3, $s3, 8 @@ -6056,21 +6056,21 @@ lzx_decompress: # @lzx_decompress st.w $a2, $fp, 72 st.w $a2, $fp, 76 ori $a2, $zero, 1 - beq $a1, $a2, .LBB7_581 -# %bb.514: # %._crit_edge2888 + beq $a1, $a2, .LBB7_583 +# %bb.516: # %._crit_edge2888 # in Loop: Header=BB7_62 Depth=2 ori $a2, $zero, 3 - beq $a1, $a2, .LBB7_530 -# %bb.515: # %._crit_edge2888 + beq $a1, $a2, .LBB7_532 +# %bb.517: # %._crit_edge2888 # in Loop: Header=BB7_62 Depth=2 ori $a0, $zero, 2 - bne $a1, $a0, .LBB7_640 -# %bb.516: # %.preheader1352.preheader + bne $a1, $a0, .LBB7_642 +# %bb.518: # %.preheader1352.preheader # in Loop: Header=BB7_62 Depth=2 move $s1, $zero - b .LBB7_518 -.LBB7_517: # %._crit_edge2911 - # in Loop: Header=BB7_518 Depth=3 + b .LBB7_520 +.LBB7_519: # %._crit_edge2911 + # in Loop: Header=BB7_520 Depth=3 bstrpick.d $a0, $s3, 31, 29 slli.d $s3, $s3, 3 addi.d $a1, $fp, 1274 @@ -6078,20 +6078,20 @@ lzx_decompress: # @lzx_decompress addi.d $s1, $s1, 1 addi.w $s4, $s4, -3 ori $a0, $zero, 8 - beq $s1, $a0, .LBB7_580 -.LBB7_518: # %.preheader1352 + beq $s1, $a0, .LBB7_582 +.LBB7_520: # %.preheader1352 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Loop Header: Depth=3 - # Child Loop BB7_523 Depth 4 + # Child Loop BB7_525 Depth 4 ori $a0, $zero, 2 - blt $a0, $s4, .LBB7_517 -# %bb.519: # %.lr.ph2910.preheader - # in Loop: Header=BB7_518 Depth=3 + blt $a0, $s4, .LBB7_519 +# %bb.521: # %.lr.ph2910.preheader + # in Loop: Header=BB7_520 Depth=3 ori $a0, $zero, 16 sub.d $s6, $a0, $s4 - b .LBB7_523 -.LBB7_520: # in Loop: Header=BB7_523 Depth=4 + b .LBB7_525 +.LBB7_522: # in Loop: Header=BB7_525 Depth=4 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 @@ -6099,12 +6099,12 @@ lzx_decompress: # @lzx_decompress ori $a0, $zero, 1 st.b $a0, $fp, 92 ori $a0, $zero, 2 -.LBB7_521: # in Loop: Header=BB7_523 Depth=4 +.LBB7_523: # in Loop: Header=BB7_525 Depth=4 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_522: # in Loop: Header=BB7_523 Depth=4 +.LBB7_524: # in Loop: Header=BB7_525 Depth=4 ld.hu $a0, $s8, 0 sll.w $a0, $a0, $s6 or $s3, $a0, $s3 @@ -6112,93 +6112,93 @@ lzx_decompress: # @lzx_decompress addi.d $s8, $s8, 2 addi.w $a0, $zero, -13 addi.d $s6, $s6, -16 - bge $s7, $a0, .LBB7_517 -.LBB7_523: # %.lr.ph2910 + bge $s7, $a0, .LBB7_519 +.LBB7_525: # %.lr.ph2910 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 - # Parent Loop BB7_518 Depth=3 + # Parent Loop BB7_520 Depth=3 # => This Inner Loop Header: Depth=4 addi.d $a0, $s8, 1 move $s7, $s4 - bltu $a0, $s5, .LBB7_522 -# %bb.524: # in Loop: Header=BB7_523 Depth=4 + bltu $a0, $s5, .LBB7_524 +# %bb.526: # in Loop: Header=BB7_525 Depth=4 ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a3, $a0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_526 -# %bb.525: # in Loop: Header=BB7_523 Depth=4 + beqz $a3, .LBB7_528 +# %bb.527: # in Loop: Header=BB7_525 Depth=4 ld.d $a0, $a0, 0 jirl $ra, $a3, 0 - b .LBB7_527 -.LBB7_526: # in Loop: Header=BB7_523 Depth=4 + b .LBB7_529 +.LBB7_528: # in Loop: Header=BB7_525 Depth=4 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 -.LBB7_527: # in Loop: Header=BB7_523 Depth=4 - bltz $a0, .LBB7_623 -# %bb.528: # in Loop: Header=BB7_523 Depth=4 - bnez $a0, .LBB7_521 -# %bb.529: # in Loop: Header=BB7_523 Depth=4 +.LBB7_529: # in Loop: Header=BB7_525 Depth=4 + bltz $a0, .LBB7_625 +# %bb.530: # in Loop: Header=BB7_525 Depth=4 + bnez $a0, .LBB7_523 +# %bb.531: # in Loop: Header=BB7_525 Depth=4 ld.bu $a0, $fp, 92 - beqz $a0, .LBB7_520 - b .LBB7_622 -.LBB7_530: # in Loop: Header=BB7_62 Depth=2 + beqz $a0, .LBB7_522 + b .LBB7_624 +.LBB7_532: # in Loop: Header=BB7_62 Depth=2 ori $s2, $zero, 1 st.b $s2, $fp, 88 ori $a1, $zero, 23 - blt $a1, $a0, .LBB7_543 -# %bb.531: # %.lr.ph2897.preheader + blt $a1, $a0, .LBB7_545 +# %bb.533: # %.lr.ph2897.preheader # in Loop: Header=BB7_62 Depth=2 addi.d $s1, $a0, -24 - b .LBB7_534 -.LBB7_532: # in Loop: Header=BB7_534 Depth=3 + b .LBB7_536 +.LBB7_534: # in Loop: Header=BB7_536 Depth=3 ld.d $s8, $fp, 104 st.d $s8, $fp, 112 add.d $s5, $s8, $a0 st.d $s5, $fp, 120 -.LBB7_533: # in Loop: Header=BB7_534 Depth=3 +.LBB7_535: # in Loop: Header=BB7_536 Depth=3 addi.w $s1, $s1, 16 addi.d $s8, $s8, 2 - bgez $s1, .LBB7_542 -.LBB7_534: # %.lr.ph2897 + bgez $s1, .LBB7_544 +.LBB7_536: # %.lr.ph2897 # Parent Loop BB7_11 Depth=1 # Parent Loop BB7_62 Depth=2 # => This Inner Loop Header: Depth=3 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_533 -# %bb.535: # in Loop: Header=BB7_534 Depth=3 - ld.d $a3, $s6, 8 + bltu $a0, $s5, .LBB7_535 +# %bb.537: # in Loop: Header=BB7_536 Depth=3 + ld.d $a3, $s0, 8 ld.d $a1, $fp, 104 ld.w $a2, $fp, 152 - beqz $a3, .LBB7_537 -# %bb.536: # in Loop: Header=BB7_534 Depth=3 - ld.d $a0, $s6, 0 + beqz $a3, .LBB7_539 +# %bb.538: # in Loop: Header=BB7_536 Depth=3 + ld.d $a0, $s0, 0 jirl $ra, $a3, 0 - b .LBB7_538 -.LBB7_537: # in Loop: Header=BB7_534 Depth=3 + b .LBB7_540 +.LBB7_539: # in Loop: Header=BB7_536 Depth=3 ld.w $a0, $fp, 0 pcaddu18i $ra, %call36(cli_readn) jirl $ra, $ra, 0 -.LBB7_538: # in Loop: Header=BB7_534 Depth=3 - bltz $a0, .LBB7_623 -# %bb.539: # in Loop: Header=BB7_534 Depth=3 - bnez $a0, .LBB7_532 -# %bb.540: # in Loop: Header=BB7_534 Depth=3 +.LBB7_540: # in Loop: Header=BB7_536 Depth=3 + bltz $a0, .LBB7_625 +# %bb.541: # in Loop: Header=BB7_536 Depth=3 + bnez $a0, .LBB7_534 +# %bb.542: # in Loop: Header=BB7_536 Depth=3 ld.bu $a0, $fp, 92 - bnez $a0, .LBB7_622 -# %bb.541: # in Loop: Header=BB7_534 Depth=3 + bnez $a0, .LBB7_624 +# %bb.543: # in Loop: Header=BB7_536 Depth=3 ld.d $a0, $fp, 104 st.b $zero, $a0, 1 ld.d $a0, $fp, 104 st.b $zero, $a0, 0 st.b $s2, $fp, 92 ori $a0, $zero, 2 - b .LBB7_532 -.LBB7_542: # %._crit_edge2898.loopexit + b .LBB7_534 +.LBB7_544: # %._crit_edge2898.loopexit # in Loop: Header=BB7_62 Depth=2 addi.w $s4, $s1, 16 -.LBB7_543: # %._crit_edge2898 +.LBB7_545: # %._crit_edge2898 # in Loop: Header=BB7_62 Depth=2 addi.d $a0, $s4, -16 sltui $a0, $a0, 1 @@ -6206,153 +6206,153 @@ lzx_decompress: # @lzx_decompress masknez $a0, $a1, $a0 add.d $a0, $s8, $a0 ld.d $s2, $sp, 192 # 8-byte Folded Reload - bne $a0, $s5, .LBB7_546 -# %bb.544: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_548 +# %bb.546: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.545: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.547: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_546: # in Loop: Header=BB7_62 Depth=2 +.LBB7_548: # in Loop: Header=BB7_62 Depth=2 ld.bu $s1, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_549 -# %bb.547: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_551 +# %bb.549: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.548: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.550: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_549: # in Loop: Header=BB7_62 Depth=2 +.LBB7_551: # in Loop: Header=BB7_62 Depth=2 ld.bu $s7, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_552 -# %bb.550: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_554 +# %bb.552: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.551: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.553: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_552: # in Loop: Header=BB7_62 Depth=2 +.LBB7_554: # in Loop: Header=BB7_62 Depth=2 ld.bu $s8, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_555 -# %bb.553: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_557 +# %bb.555: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.554: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.556: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_555: # in Loop: Header=BB7_62 Depth=2 +.LBB7_557: # in Loop: Header=BB7_62 Depth=2 ld.bu $a1, $a0, 0 st.d $a1, $sp, 176 # 8-byte Folded Spill addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_558 -# %bb.556: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_560 +# %bb.558: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.557: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.559: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_558: # in Loop: Header=BB7_62 Depth=2 +.LBB7_560: # in Loop: Header=BB7_62 Depth=2 ld.bu $a1, $a0, 0 st.d $a1, $sp, 144 # 8-byte Folded Spill addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_561 -# %bb.559: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_563 +# %bb.561: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.560: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.562: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_561: # in Loop: Header=BB7_62 Depth=2 +.LBB7_563: # in Loop: Header=BB7_62 Depth=2 ld.bu $a1, $a0, 0 st.d $a1, $sp, 104 # 8-byte Folded Spill addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_564 -# %bb.562: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_566 +# %bb.564: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.563: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.565: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_564: # in Loop: Header=BB7_62 Depth=2 +.LBB7_566: # in Loop: Header=BB7_62 Depth=2 ld.bu $a1, $a0, 0 st.d $a1, $sp, 56 # 8-byte Folded Spill addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_567 -# %bb.565: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_569 +# %bb.567: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.566: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.568: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_567: # in Loop: Header=BB7_62 Depth=2 +.LBB7_569: # in Loop: Header=BB7_62 Depth=2 ld.bu $a1, $a0, 0 - st.d $a1, $sp, 32 # 8-byte Folded Spill + st.d $a1, $sp, 40 # 8-byte Folded Spill addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_570 -# %bb.568: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_572 +# %bb.570: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.569: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.571: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_570: # in Loop: Header=BB7_62 Depth=2 +.LBB7_572: # in Loop: Header=BB7_62 Depth=2 ld.bu $s6, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_573 -# %bb.571: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_575 +# %bb.573: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.572: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.574: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_573: # in Loop: Header=BB7_62 Depth=2 +.LBB7_575: # in Loop: Header=BB7_62 Depth=2 ld.bu $s3, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_576 -# %bb.574: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_578 +# %bb.576: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.575: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.577: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_576: # in Loop: Header=BB7_62 Depth=2 +.LBB7_578: # in Loop: Header=BB7_62 Depth=2 ld.bu $s4, $a0, 0 addi.d $a0, $a0, 1 - bne $a0, $s5, .LBB7_579 -# %bb.577: # in Loop: Header=BB7_62 Depth=2 + bne $a0, $s5, .LBB7_581 +# %bb.579: # in Loop: Header=BB7_62 Depth=2 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.578: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.580: # in Loop: Header=BB7_62 Depth=2 ld.d $a0, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_579: # in Loop: Header=BB7_62 Depth=2 +.LBB7_581: # in Loop: Header=BB7_62 Depth=2 move $a1, $s7 move $s7, $zero move $a2, $s1 @@ -6373,7 +6373,7 @@ lzx_decompress: # @lzx_decompress ld.d $a2, $sp, 56 # 8-byte Folded Reload slli.d $a2, $a2, 16 or $a1, $a1, $a2 - ld.d $a2, $sp, 32 # 8-byte Folded Reload + ld.d $a2, $sp, 40 # 8-byte Folded Reload slli.d $a2, $a2, 24 or $a1, $a1, $a2 st.d $a1, $sp, 144 # 8-byte Folded Spill @@ -6385,20 +6385,20 @@ lzx_decompress: # @lzx_decompress slli.d $a0, $a0, 24 or $a0, $a1, $a0 st.d $a0, $sp, 104 # 8-byte Folded Spill - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 ori $s3, $zero, 1 b .LBB7_63 -.LBB7_580: # in Loop: Header=BB7_62 Depth=2 +.LBB7_582: # in Loop: Header=BB7_62 Depth=2 ori $a0, $zero, 8 ori $a1, $zero, 7 addi.d $a2, $fp, 1274 ld.d $a3, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(lzx_make_decode_table) jirl $ra, $ra, 0 - ld.d $s6, $sp, 168 # 8-byte Folded Reload - bnez $a0, .LBB7_642 -.LBB7_581: # in Loop: Header=BB7_62 Depth=2 + ld.d $s0, $sp, 168 # 8-byte Folded Reload + bnez $a0, .LBB7_644 +.LBB7_583: # in Loop: Header=BB7_62 Depth=2 st.d $s8, $fp, 112 st.d $s5, $fp, 120 st.w $s3, $fp, 144 @@ -6410,8 +6410,8 @@ lzx_decompress: # @lzx_decompress move $a2, $zero pcaddu18i $ra, %call36(lzx_read_lens) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.582: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.584: # in Loop: Header=BB7_62 Depth=2 ld.bu $a0, $fp, 91 slli.d $a0, $a0, 3 addi.d $a3, $a0, 256 @@ -6420,8 +6420,8 @@ lzx_decompress: # @lzx_decompress move $a1, $s4 pcaddu18i $ra, %call36(lzx_read_lens) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.583: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.585: # in Loop: Header=BB7_62 Depth=2 vld $vr0, $fp, 112 vst $vr0, $sp, 176 # 16-byte Folded Spill ld.w $s1, $fp, 144 @@ -6432,14 +6432,14 @@ lzx_decompress: # @lzx_decompress addi.d $a3, $fp, 1554 pcaddu18i $ra, %call36(lzx_make_decode_table) jirl $ra, $ra, 0 - bnez $a0, .LBB7_639 -# %bb.584: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_641 +# %bb.586: # in Loop: Header=BB7_62 Depth=2 ld.bu $a0, $fp, 472 - beqz $a0, .LBB7_586 -# %bb.585: # in Loop: Header=BB7_62 Depth=2 + beqz $a0, .LBB7_588 +# %bb.587: # in Loop: Header=BB7_62 Depth=2 ori $a0, $zero, 1 st.b $a0, $fp, 88 -.LBB7_586: # in Loop: Header=BB7_62 Depth=2 +.LBB7_588: # in Loop: Header=BB7_62 Depth=2 vld $vr0, $sp, 176 # 16-byte Folded Reload vst $vr0, $fp, 112 st.w $s1, $fp, 144 @@ -6451,8 +6451,8 @@ lzx_decompress: # @lzx_decompress move $a2, $zero pcaddu18i $ra, %call36(lzx_read_lens) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.587: # in Loop: Header=BB7_62 Depth=2 + bnez $a0, .LBB7_629 +# %bb.589: # in Loop: Header=BB7_62 Depth=2 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 ld.w $s1, $fp, 144 @@ -6466,33 +6466,33 @@ lzx_decompress: # @lzx_decompress ori $s3, $zero, 1 ld.d $s2, $sp, 192 # 8-byte Folded Reload beqz $a0, .LBB7_63 - b .LBB7_641 -.LBB7_588: # %._crit_edge3118.loopexit + b .LBB7_643 +.LBB7_590: # %._crit_edge3118.loopexit # in Loop: Header=BB7_11 Depth=1 ld.w $a0, $fp, 48 -.LBB7_589: # %._crit_edge3118 +.LBB7_591: # %._crit_edge3118 # in Loop: Header=BB7_11 Depth=1 sub.w $a1, $s2, $a0 ld.d $a0, $sp, 152 # 8-byte Folded Reload addi.w $s3, $a0, 0 - bne $a1, $s3, .LBB7_628 -# %bb.590: # in Loop: Header=BB7_11 Depth=1 + bne $a1, $s3, .LBB7_630 +# %bb.592: # in Loop: Header=BB7_11 Depth=1 addi.w $a0, $s7, -1 ori $a1, $zero, 14 - bltu $a1, $a0, .LBB7_595 -# %bb.591: # %.preheader1365 + bltu $a1, $a0, .LBB7_597 +# %bb.593: # %.preheader1365 # in Loop: Header=BB7_11 Depth=1 addi.d $a0, $s8, 1 - bltu $a0, $s5, .LBB7_594 -# %bb.592: # in Loop: Header=BB7_11 Depth=1 + bltu $a0, $s5, .LBB7_596 +# %bb.594: # in Loop: Header=BB7_11 Depth=1 move $a0, $fp pcaddu18i $ra, %call36(lzx_read_input) jirl $ra, $ra, 0 - bnez $a0, .LBB7_627 -# %bb.593: # in Loop: Header=BB7_11 Depth=1 + bnez $a0, .LBB7_629 +# %bb.595: # in Loop: Header=BB7_11 Depth=1 ld.d $s8, $fp, 112 ld.d $s5, $fp, 120 -.LBB7_594: # %.loopexit1366.loopexit +.LBB7_596: # %.loopexit1366.loopexit # in Loop: Header=BB7_11 Depth=1 ld.hu $a0, $s8, 0 ori $a1, $zero, 16 @@ -6501,28 +6501,28 @@ lzx_decompress: # @lzx_decompress or $s1, $a0, $s1 ori $s7, $s7, 16 addi.d $s8, $s8, 2 -.LBB7_595: # %.loopexit1366 +.LBB7_597: # %.loopexit1366 # in Loop: Header=BB7_11 Depth=1 ld.d $a0, $fp, 128 ld.d $a1, $fp, 136 - bne $a0, $a1, .LBB7_629 -# %bb.596: # in Loop: Header=BB7_11 Depth=1 + bne $a0, $a1, .LBB7_631 +# %bb.598: # in Loop: Header=BB7_11 Depth=1 ld.bu $a0, $fp, 88 ld.w $s6, $fp, 80 ld.d $a1, $sp, 152 # 8-byte Folded Reload bstrpick.d $s4, $a1, 31, 0 - beqz $a0, .LBB7_608 -# %bb.597: # in Loop: Header=BB7_11 Depth=1 - beqz $s6, .LBB7_609 -# %bb.598: # in Loop: Header=BB7_11 Depth=1 - ori $a0, $zero, 11 - bltu $s3, $a0, .LBB7_610 + beqz $a0, .LBB7_610 # %bb.599: # in Loop: Header=BB7_11 Depth=1 + beqz $s6, .LBB7_611 +# %bb.600: # in Loop: Header=BB7_11 Depth=1 + ori $a0, $zero, 11 + bltu $s3, $a0, .LBB7_612 +# %bb.601: # in Loop: Header=BB7_11 Depth=1 ld.w $a0, $fp, 52 lu12i.w $a1, 8 ori $a1, $a1, 1 - bgeu $a0, $a1, .LBB7_610 -# %bb.600: # %.lr.ph3130.preheader + bgeu $a0, $a1, .LBB7_612 +# %bb.602: # %.lr.ph3130.preheader # in Loop: Header=BB7_11 Depth=1 st.d $s2, $sp, 192 # 8-byte Folded Spill ld.d $a0, $sp, 152 # 8-byte Folded Reload @@ -6531,8 +6531,6 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $fp, 32 ld.wu $a2, $fp, 48 ld.w $s3, $fp, 84 - ld.d $a3, $sp, 128 # 8-byte Folded Reload - st.d $a3, $sp, 128 # 8-byte Folded Spill ld.d $s0, $sp, 72 # 8-byte Folded Reload add.d $s2, $s0, $a0 st.d $s0, $fp, 128 @@ -6541,19 +6539,19 @@ lzx_decompress: # @lzx_decompress move $a2, $s4 pcaddu18i $ra, %call36(memcpy) jirl $ra, $ra, 0 - b .LBB7_602 -.LBB7_601: # in Loop: Header=BB7_602 Depth=2 + b .LBB7_604 +.LBB7_603: # in Loop: Header=BB7_604 Depth=2 addi.d $s0, $s0, 1 ori $a1, $zero, 1 add.d $s3, $s3, $a1 - bgeu $s0, $s2, .LBB7_607 -.LBB7_602: # %.lr.ph3130 + bgeu $s0, $s2, .LBB7_609 +.LBB7_604: # %.lr.ph3130 # Parent Loop BB7_11 Depth=1 # => This Inner Loop Header: Depth=2 ld.bu $a1, $s0, 0 ori $a2, $zero, 232 - bne $a1, $a2, .LBB7_601 -# %bb.603: # in Loop: Header=BB7_602 Depth=2 + bne $a1, $a2, .LBB7_603 +# %bb.605: # in Loop: Header=BB7_604 Depth=2 ld.bu $a1, $s0, 3 ld.hu $a2, $s0, 1 ld.b $a3, $s0, 4 @@ -6562,22 +6560,22 @@ lzx_decompress: # @lzx_decompress slli.w $a2, $a3, 24 or $a1, $a1, $a2 sub.w $a3, $zero, $s3 - blt $a1, $a3, .LBB7_606 -# %bb.604: # in Loop: Header=BB7_602 Depth=2 - bge $a1, $s6, .LBB7_606 -# %bb.605: # in Loop: Header=BB7_602 Depth=2 + blt $a1, $a3, .LBB7_608 +# %bb.606: # in Loop: Header=BB7_604 Depth=2 + bge $a1, $s6, .LBB7_608 +# %bb.607: # in Loop: Header=BB7_604 Depth=2 slti $a2, $a2, 0 masknez $a3, $a3, $a2 maskeqz $a2, $s6, $a2 or $a2, $a2, $a3 add.d $a1, $a2, $a1 st.w $a1, $s0, 1 -.LBB7_606: # in Loop: Header=BB7_602 Depth=2 +.LBB7_608: # in Loop: Header=BB7_604 Depth=2 addi.d $s0, $s0, 5 ori $a1, $zero, 5 add.d $s3, $s3, $a1 - bltu $s0, $s2, .LBB7_602 -.LBB7_607: # %._crit_edge3131 + bltu $s0, $s2, .LBB7_604 +.LBB7_609: # %._crit_edge3131 # in Loop: Header=BB7_11 Depth=1 ld.w $a0, $fp, 84 ld.d $a1, $fp, 128 @@ -6585,33 +6583,33 @@ lzx_decompress: # @lzx_decompress add.d $a0, $a0, $a2 st.w $a0, $fp, 84 ld.d $s2, $sp, 192 # 8-byte Folded Reload - b .LBB7_612 -.LBB7_608: # in Loop: Header=BB7_11 Depth=1 + b .LBB7_614 +.LBB7_610: # in Loop: Header=BB7_11 Depth=1 ld.d $a0, $fp, 32 ld.wu $a1, $fp, 48 add.d $a1, $a0, $a1 st.d $a1, $fp, 128 - bnez $s6, .LBB7_611 - b .LBB7_612 -.LBB7_609: # %.thread3693 + bnez $s6, .LBB7_613 + b .LBB7_614 +.LBB7_611: # %.thread3693 # in Loop: Header=BB7_11 Depth=1 ld.d $a0, $fp, 32 ld.wu $a1, $fp, 48 add.d $a1, $a0, $a1 st.d $a1, $fp, 128 - b .LBB7_612 -.LBB7_610: # %.thread3695 + b .LBB7_614 +.LBB7_612: # %.thread3695 # in Loop: Header=BB7_11 Depth=1 ld.d $a0, $fp, 32 ld.wu $a1, $fp, 48 add.d $a1, $a0, $a1 st.d $a1, $fp, 128 -.LBB7_611: # in Loop: Header=BB7_11 Depth=1 +.LBB7_613: # in Loop: Header=BB7_11 Depth=1 ld.w $a0, $fp, 84 ld.d $a2, $sp, 152 # 8-byte Folded Reload add.d $a0, $a0, $a2 st.w $a0, $fp, 84 -.LBB7_612: # in Loop: Header=BB7_11 Depth=1 +.LBB7_614: # in Loop: Header=BB7_11 Depth=1 add.d $a0, $a1, $s4 st.d $a0, $fp, 136 ld.d $a4, $sp, 128 # 8-byte Folded Reload @@ -6621,23 +6619,23 @@ lzx_decompress: # @lzx_decompress maskeqz $a0, $a4, $a0 or $a0, $a0, $a3 addi.w $s3, $a0, 0 - beqz $a2, .LBB7_615 -# %bb.613: # in Loop: Header=BB7_11 Depth=1 + beqz $a2, .LBB7_617 +# %bb.615: # in Loop: Header=BB7_11 Depth=1 ld.w $a0, $fp, 4 move $a2, $s3 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 - bne $a0, $s3, .LBB7_623 -# %bb.614: # %._crit_edge3343 + bne $a0, $s3, .LBB7_625 +# %bb.616: # %._crit_edge3343 # in Loop: Header=BB7_11 Depth=1 ld.d $a1, $fp, 128 - b .LBB7_616 -.LBB7_615: # in Loop: Header=BB7_11 Depth=1 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + b .LBB7_618 +.LBB7_617: # in Loop: Header=BB7_11 Depth=1 + ld.d $s0, $sp, 168 # 8-byte Folded Reload addi.d $s4, $fp, 240 -.LBB7_616: # in Loop: Header=BB7_11 Depth=1 +.LBB7_618: # in Loop: Header=BB7_11 Depth=1 ld.d $a0, $fp, 16 add.d $a1, $a1, $s3 st.d $a1, $fp, 128 @@ -6651,10 +6649,10 @@ lzx_decompress: # @lzx_decompress st.w $a2, $fp, 48 addi.w $a0, $a0, 1 st.w $a0, $fp, 52 - bne $a2, $a1, .LBB7_618 -# %bb.617: # in Loop: Header=BB7_11 Depth=1 + bne $a2, $a1, .LBB7_620 +# %bb.619: # in Loop: Header=BB7_11 Depth=1 st.w $zero, $fp, 48 -.LBB7_618: # in Loop: Header=BB7_11 Depth=1 +.LBB7_620: # in Loop: Header=BB7_11 Depth=1 andi $a2, $s7, 15 sll.w $s1, $s1, $a2 bstrins.d $s7, $zero, 3, 0 @@ -6668,31 +6666,31 @@ lzx_decompress: # @lzx_decompress ld.d $a1, $sp, 96 # 8-byte Folded Reload lu12i.w $a2, 8 bltu $a0, $a1, .LBB7_11 -# %bb.619: # %._crit_edge3143 +# %bb.621: # %._crit_edge3143 ld.d $a0, $sp, 128 # 8-byte Folded Reload - beqz $a0, .LBB7_637 -.LBB7_620: # %._crit_edge3143.thread + beqz $a0, .LBB7_639 +.LBB7_622: # %._crit_edge3143.thread pcalau12i $a0, %pc_hi20(.L.str.16) addi.d $a0, $a0, %pc_lo12(.L.str.16) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_621: + b .LBB7_626 +.LBB7_623: move $a0, $zero - b .LBB7_625 -.LBB7_622: + b .LBB7_627 +.LBB7_624: pcalau12i $a0, %pc_hi20(.L.str.24) addi.d $a0, $a0, %pc_lo12(.L.str.24) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 -.LBB7_623: +.LBB7_625: addi.w $a0, $zero, -123 -.LBB7_624: +.LBB7_626: move $a1, $a0 lu32i.d $a1, 0 st.w $a1, $fp, 96 -.LBB7_625: +.LBB7_627: ld.d $s8, $sp, 200 # 8-byte Folded Reload ld.d $s7, $sp, 208 # 8-byte Folded Reload ld.d $s6, $sp, 216 # 8-byte Folded Reload @@ -6706,58 +6704,58 @@ lzx_decompress: # @lzx_decompress ld.d $ra, $sp, 280 # 8-byte Folded Reload addi.d $sp, $sp, 288 ret -.LBB7_626: # %split3336 +.LBB7_628: # %split3336 pcalau12i $a0, %pc_hi20(.L.str.10) addi.d $a0, $a0, %pc_lo12(.L.str.10) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_627: + b .LBB7_626 +.LBB7_629: ld.w $a0, $fp, 96 - b .LBB7_625 -.LBB7_628: + b .LBB7_627 +.LBB7_630: pcalau12i $a0, %pc_hi20(.L.str.14) addi.d $a0, $a0, %pc_lo12(.L.str.14) - b .LBB7_630 -.LBB7_629: + b .LBB7_632 +.LBB7_631: sub.d $a1, $a1, $a0 pcalau12i $a0, %pc_hi20(.L.str.15) addi.d $a0, $a0, %pc_lo12(.L.str.15) -.LBB7_630: +.LBB7_632: move $a2, $s3 -.LBB7_631: +.LBB7_633: pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 -.LBB7_632: +.LBB7_634: addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_633: + b .LBB7_626 +.LBB7_635: pcalau12i $a0, %pc_hi20(.L.str.11) addi.d $a0, $a0, %pc_lo12(.L.str.11) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_634: + b .LBB7_626 +.LBB7_636: pcalau12i $a0, %pc_hi20(.L.str.3) addi.d $a0, $a0, %pc_lo12(.L.str.3) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_635: + b .LBB7_626 +.LBB7_637: pcalau12i $a0, %pc_hi20(.L.str.13) addi.d $a0, $a0, %pc_lo12(.L.str.13) - b .LBB7_631 -.LBB7_636: + b .LBB7_633 +.LBB7_638: pcalau12i $a0, %pc_hi20(.L.str.12) addi.d $a0, $a0, %pc_lo12(.L.str.12) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_637: + b .LBB7_626 +.LBB7_639: move $a0, $zero st.d $s8, $fp, 112 st.d $s5, $fp, 120 @@ -6770,15 +6768,15 @@ lzx_decompress: # @lzx_decompress st.w $a1, $fp, 64 ld.d $a1, $sp, 104 # 8-byte Folded Reload st.w $a1, $fp, 68 - b .LBB7_625 -.LBB7_638: + b .LBB7_627 +.LBB7_640: pcalau12i $a0, %pc_hi20(.L.str.9) addi.d $a0, $a0, %pc_lo12(.L.str.9) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_639: + b .LBB7_626 +.LBB7_641: pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a0, $a0, %pc_lo12(.L.str.4) pcalau12i $a1, %pc_hi20(.L.str.6) @@ -6786,15 +6784,15 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_640: + b .LBB7_626 +.LBB7_642: pcalau12i $a0, %pc_hi20(.L.str.8) addi.d $a0, $a0, %pc_lo12(.L.str.8) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_641: + b .LBB7_626 +.LBB7_643: pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a0, $a0, %pc_lo12(.L.str.4) pcalau12i $a1, %pc_hi20(.L.str.7) @@ -6802,8 +6800,8 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 -.LBB7_642: + b .LBB7_626 +.LBB7_644: pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a0, $a0, %pc_lo12(.L.str.4) pcalau12i $a1, %pc_hi20(.L.str.5) @@ -6811,16 +6809,16 @@ lzx_decompress: # @lzx_decompress pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB7_624 + b .LBB7_626 .Lfunc_end7: .size lzx_decompress, .Lfunc_end7-lzx_decompress .section .rodata,"a",@progbits .p2align 2, 0x0 .LJTI7_0: - .word .LBB7_431-.LJTI7_0 - .word .LBB7_421-.LJTI7_0 - .word .LBB7_422-.LJTI7_0 + .word .LBB7_433-.LJTI7_0 .word .LBB7_423-.LJTI7_0 + .word .LBB7_424-.LJTI7_0 + .word .LBB7_425-.LJTI7_0 # -- End function .text .p2align 5 # -- Begin function lzx_read_input diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s index 0d8a8ac4..48e97546 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_nsis_bzlib.s @@ -160,30 +160,30 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress addi.d $a3, $s1, 2047 addi.d $s8, $a3, 1149 addi.d $a4, $a3, 1421 - st.d $a4, $sp, 424 # 8-byte Folded Spill + st.d $a4, $sp, 432 # 8-byte Folded Spill lu12i.w $a4, 6 ori $a4, $a4, 1310 add.d $a4, $s1, $a4 - st.d $a4, $sp, 336 # 8-byte Folded Spill + st.d $a4, $sp, 344 # 8-byte Folded Spill ori $a4, $a0, 3788 add.d $a4, $s1, $a4 - st.d $a4, $sp, 344 # 8-byte Folded Spill + st.d $a4, $sp, 352 # 8-byte Folded Spill ori $a1, $a1, 2928 add.d $a1, $s1, $a1 st.d $a1, $sp, 200 # 8-byte Folded Spill lu12i.w $a1, 11 ori $a1, $a1, 380 add.d $a1, $s1, $a1 - st.d $a1, $sp, 384 # 8-byte Folded Spill + st.d $a1, $sp, 392 # 8-byte Folded Spill lu12i.w $a4, 12 ori $a1, $a4, 2476 add.d $ra, $s1, $a1 lu12i.w $a1, 14 ori $a1, $a1, 476 add.d $a1, $s1, $a1 - st.d $a1, $sp, 352 # 8-byte Folded Spill + st.d $a1, $sp, 360 # 8-byte Folded Spill addi.d $a1, $a2, -1524 - st.d $a1, $sp, 376 # 8-byte Folded Spill + st.d $a1, $sp, 384 # 8-byte Folded Spill addi.d $a1, $s1, 68 st.d $a1, $sp, 208 # 8-byte Folded Spill addi.d $a1, $a3, 1677 @@ -206,7 +206,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.d $a2, $sp, 144 # 8-byte Folded Spill lu12i.w $a2, 24 ori $a2, $a2, 1696 - st.d $a2, $sp, 392 # 8-byte Folded Spill + st.d $a2, $sp, 400 # 8-byte Folded Spill lu12i.w $a2, 12320 ori $a2, $a2, 256 lu32i.d $a2, 394500 @@ -215,7 +215,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress vst $vr0, $sp, 128 # 16-byte Folded Spill vrepli.b $vr3, 32 ori $a0, $a0, 2100 - st.d $a0, $sp, 360 # 8-byte Folded Spill + st.d $a0, $sp, 368 # 8-byte Folded Spill vrepli.b $vr6, 0 vrepli.w $vr0, 32 vst $vr0, $sp, 288 # 16-byte Folded Spill @@ -232,7 +232,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ori $t8, $zero, 10 st.d $ra, $sp, 496 # 8-byte Folded Spill vst $vr3, $sp, 320 # 16-byte Folded Spill - vst $vr6, $sp, 400 # 16-byte Folded Spill + vst $vr6, $sp, 416 # 16-byte Folded Spill .p2align 4, , 16 .LBB3_4: # =>This Loop Header: Depth=1 # Child Loop BB3_14 Depth 2 @@ -326,7 +326,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $a4, $fp, 56 ld.d $a3, $fp, 72 stptr.d $a0, $s1, 3160 - ld.d $a0, $sp, 392 # 8-byte Folded Reload + ld.d $a0, $sp, 400 # 8-byte Folded Reload mul.w $a0, $a1, $a0 srai.d $a1, $a0, 1 ori $a2, $zero, 1 @@ -344,16 +344,16 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $t4, $a2 move $t6, $a2 move $fp, $a2 - st.d $a2, $sp, 448 # 8-byte Folded Spill st.d $a2, $sp, 456 # 8-byte Folded Spill + st.d $a2, $sp, 464 # 8-byte Folded Spill st.d $a2, $sp, 472 # 8-byte Folded Spill move $t5, $a2 - st.d $a2, $sp, 440 # 8-byte Folded Spill + st.d $a2, $sp, 448 # 8-byte Folded Spill move $s2, $a2 - st.d $a2, $sp, 432 # 8-byte Folded Spill + st.d $a2, $sp, 440 # 8-byte Folded Spill move $t1, $a2 move $a7, $a2 - st.d $a2, $sp, 464 # 8-byte Folded Spill + st.d $a2, $sp, 408 # 8-byte Folded Spill st.d $a2, $sp, 504 # 8-byte Folded Spill move $a5, $a2 move $t7, $a2 @@ -365,7 +365,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $a3, $a2 ld.d $ra, $sp, 496 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ori $t8, $zero, 10 bnez $a1, .LBB3_85 b .LBB3_349 @@ -758,7 +758,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress beq $t5, $a7, .LBB3_135 # %bb.59: # in Loop: Header=BB3_44 Depth=2 ld.w $t1, $s1, 40 - ld.d $t2, $sp, 392 # 8-byte Folded Reload + ld.d $t2, $sp, 400 # 8-byte Folded Reload mul.w $t7, $t1, $t2 addi.w $t1, $a5, 0 bgeu $t1, $t7, .LBB3_480 @@ -882,20 +882,20 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.w $t6, $s6, 16 ld.w $fp, $s6, 20 ld.w $a0, $s6, 24 - st.d $a0, $sp, 448 # 8-byte Folded Spill - ld.w $a0, $s6, 28 st.d $a0, $sp, 456 # 8-byte Folded Spill + ld.w $a0, $s6, 28 + st.d $a0, $sp, 464 # 8-byte Folded Spill ld.w $a0, $s6, 32 st.d $a0, $sp, 472 # 8-byte Folded Spill ld.w $t5, $s6, 36 ld.w $a0, $s6, 40 - st.d $a0, $sp, 440 # 8-byte Folded Spill + st.d $a0, $sp, 448 # 8-byte Folded Spill ld.w $a0, $s6, 48 - st.d $a0, $sp, 432 # 8-byte Folded Spill + st.d $a0, $sp, 440 # 8-byte Folded Spill ld.w $t1, $s6, 52 ld.w $a7, $s6, 56 ld.w $a0, $s6, 60 - st.d $a0, $sp, 464 # 8-byte Folded Spill + st.d $a0, $sp, 408 # 8-byte Folded Spill ld.w $a0, $s6, 64 st.d $a0, $sp, 504 # 8-byte Folded Spill ld.w $a5, $s6, 68 @@ -919,7 +919,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress jr $a1 .LBB3_82: # %._crit_edge1847.i # in Loop: Header=BB3_4 Depth=1 - st.d $s2, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 376 # 8-byte Folded Spill ld.w $a0, $s1, 36 b .LBB3_90 .LBB3_83: # in Loop: Header=BB3_4 Depth=1 @@ -934,16 +934,16 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $t4, $zero move $t6, $zero move $fp, $zero - st.d $zero, $sp, 448 # 8-byte Folded Spill st.d $zero, $sp, 456 # 8-byte Folded Spill + st.d $zero, $sp, 464 # 8-byte Folded Spill st.d $zero, $sp, 472 # 8-byte Folded Spill move $t5, $zero - st.d $zero, $sp, 440 # 8-byte Folded Spill + st.d $zero, $sp, 448 # 8-byte Folded Spill move $s2, $zero - st.d $zero, $sp, 432 # 8-byte Folded Spill + st.d $zero, $sp, 440 # 8-byte Folded Spill move $t1, $zero move $a7, $zero - st.d $zero, $sp, 464 # 8-byte Folded Spill + st.d $zero, $sp, 408 # 8-byte Folded Spill st.d $zero, $sp, 504 # 8-byte Folded Spill move $a5, $zero move $t7, $zero @@ -954,10 +954,10 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $t0, $zero ld.d $ra, $sp, 496 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ori $t8, $zero, 10 .LBB3_85: # in Loop: Header=BB3_4 Depth=1 - st.d $s2, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 376 # 8-byte Folded Spill ld.w $a1, $s1, 36 ori $a0, $zero, 14 st.w $a0, $s1, 8 @@ -979,7 +979,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # %bb.88: # %._crit_edge.i # in Loop: Header=BB3_4 Depth=1 ori $a3, $zero, 49 - ld.d $s2, $sp, 368 # 8-byte Folded Reload + ld.d $s2, $sp, 376 # 8-byte Folded Reload bne $a1, $a3, .LBB3_145 # %bb.89: # in Loop: Header=BB3_4 Depth=1 st.w $zero, $s1, 56 @@ -1044,7 +1044,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ori $a0, $zero, 4 b .LBB3_148 .LBB3_99: # in Loop: Header=BB3_4 Depth=1 - st.d $a2, $sp, 464 # 8-byte Folded Spill + st.d $a2, $sp, 408 # 8-byte Folded Spill move $t7, $a2 move $s4, $a2 move $s3, $a2 @@ -1055,13 +1055,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.d $a2, $sp, 504 # 8-byte Folded Spill move $a7, $a2 move $t1, $a2 - st.d $a2, $sp, 432 # 8-byte Folded Spill - move $s2, $a2 st.d $a2, $sp, 440 # 8-byte Folded Spill + move $s2, $a2 + st.d $a2, $sp, 448 # 8-byte Folded Spill move $t5, $a2 st.d $a2, $sp, 472 # 8-byte Folded Spill + st.d $a2, $sp, 464 # 8-byte Folded Spill st.d $a2, $sp, 456 # 8-byte Folded Spill - st.d $a2, $sp, 448 # 8-byte Folded Spill move $fp, $a2 move $t6, $a2 move $t4, $a2 @@ -1106,7 +1106,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.w $a5, $a0, 16 b .LBB3_101 .LBB3_105: # in Loop: Header=BB3_4 Depth=1 - st.d $zero, $sp, 464 # 8-byte Folded Spill + st.d $zero, $sp, 408 # 8-byte Folded Spill move $t7, $zero move $s4, $zero move $s3, $zero @@ -1117,13 +1117,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.d $zero, $sp, 504 # 8-byte Folded Spill move $a7, $zero move $t1, $zero - st.d $zero, $sp, 432 # 8-byte Folded Spill - move $s2, $zero st.d $zero, $sp, 440 # 8-byte Folded Spill + move $s2, $zero + st.d $zero, $sp, 448 # 8-byte Folded Spill move $t5, $zero st.d $zero, $sp, 472 # 8-byte Folded Spill + st.d $zero, $sp, 464 # 8-byte Folded Spill st.d $zero, $sp, 456 # 8-byte Folded Spill - st.d $zero, $sp, 448 # 8-byte Folded Spill move $fp, $zero move $t6, $zero move $t4, $zero @@ -1136,7 +1136,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # in Loop: Header=BB3_4 Depth=1 ld.d $ra, $sp, 496 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ori $t8, $zero, 10 b .LBB3_349 .LBB3_107: # %._crit_edge1864.i @@ -1146,13 +1146,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress b .LBB3_172 .LBB3_108: # %._crit_edge1857.i # in Loop: Header=BB3_4 Depth=1 - st.d $s2, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 376 # 8-byte Folded Spill move $s2, $a5 ld.w $a0, $s1, 36 b .LBB3_113 .LBB3_109: # %._crit_edge1852.i # in Loop: Header=BB3_4 Depth=1 - st.d $s2, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 376 # 8-byte Folded Spill move $s2, $a5 ld.w $a1, $s1, 36 .LBB3_110: # in Loop: Header=BB3_4 Depth=1 @@ -1193,7 +1193,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # %bb.116: # in Loop: Header=BB3_4 Depth=1 ld.w $a3, $s1, 40 addi.w $a1, $a1, 0 - ld.d $a4, $sp, 392 # 8-byte Folded Reload + ld.d $a4, $sp, 400 # 8-byte Folded Reload mul.d $a3, $a3, $a4 addi.w $a3, $a3, 10 move $a5, $s2 @@ -1384,14 +1384,14 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $a5, $s2 .LBB3_148: # %BZ2_decompress.exit # in Loop: Header=BB3_4 Depth=1 - ld.d $s2, $sp, 368 # 8-byte Folded Reload + ld.d $s2, $sp, 376 # 8-byte Folded Reload b .LBB3_349 .LBB3_149: # in Loop: Header=BB3_4 Depth=1 bge $a2, $a0, .LBB3_154 # %bb.150: # in Loop: Header=BB3_4 Depth=1 - ld.d $s2, $sp, 368 # 8-byte Folded Reload + ld.d $s2, $sp, 376 # 8-byte Folded Reload .LBB3_151: # in Loop: Header=BB3_4 Depth=1 - st.d $s2, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 376 # 8-byte Folded Spill ld.w $a0, $s1, 36 ori $a1, $zero, 28 st.w $a1, $s1, 8 @@ -1448,11 +1448,11 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $s8, $sp, 64 # 8-byte Folded Reload ld.d $s4, $sp, 256 # 8-byte Folded Reload ori $t8, $zero, 10 - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload ld.d $ra, $sp, 496 # 8-byte Folded Reload move $a2, $zero - ld.d $s2, $sp, 368 # 8-byte Folded Reload + ld.d $s2, $sp, 376 # 8-byte Folded Reload b .LBB3_160 .LBB3_155: # %.lr.ph1670.i # in Loop: Header=BB3_4 Depth=1 @@ -1517,7 +1517,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ldx.bu $a3, $s8, $a1 beqz $a3, .LBB3_164 # %bb.166: # in Loop: Header=BB3_165 Depth=2 - ld.d $a3, $sp, 424 # 8-byte Folded Reload + ld.d $a3, $sp, 432 # 8-byte Folded Reload stx.b $a1, $a3, $a0 ori $a0, $zero, 3192 ldx.w $a0, $s1, $a0 @@ -1765,7 +1765,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress b .LBB3_209 .LBB3_208: # %._crit_edge1526.i # in Loop: Header=BB3_209 Depth=2 - ld.d $a2, $sp, 344 # 8-byte Folded Reload + ld.d $a2, $sp, 352 # 8-byte Folded Reload stx.b $a1, $a2, $a0 addi.d $a0, $a0, 1 st.b $a1, $sp, 514 @@ -1775,7 +1775,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # Child Loop BB3_222 Depth 3 # Child Loop BB3_219 Depth 3 # Child Loop BB3_215 Depth 3 - ld.d $a1, $sp, 336 # 8-byte Folded Reload + ld.d $a1, $sp, 344 # 8-byte Folded Reload ldx.bu $a2, $a1, $a0 ldx.bu $a1, $a2, $t2 beqz $a2, .LBB3_208 @@ -1923,7 +1923,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $a0, $zero b .LBB3_240 .LBB3_234: # in Loop: Header=BB3_4 Depth=1 - ld.d $a0, $sp, 336 # 8-byte Folded Reload + ld.d $a0, $sp, 344 # 8-byte Folded Reload stx.b $s0, $a0, $a2 addi.w $a2, $a2, 1 b .LBB3_176 @@ -2119,8 +2119,6 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress .LBB3_266: # %.preheader1392.i # in Loop: Header=BB3_4 Depth=1 st.d $a5, $sp, 112 # 8-byte Folded Spill - ld.d $a0, $sp, 464 # 8-byte Folded Reload - st.d $a0, $sp, 464 # 8-byte Folded Spill st.d $t4, $sp, 240 # 8-byte Folded Spill st.d $t5, $sp, 96 # 8-byte Folded Spill st.d $t6, $sp, 232 # 8-byte Folded Spill @@ -2144,16 +2142,16 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress slli.d $a0, $a0, 3 st.d $a0, $sp, 120 # 8-byte Folded Spill ld.d $s7, $sp, 176 # 8-byte Folded Reload - ld.d $s8, $sp, 384 # 8-byte Folded Reload - ld.d $a1, $sp, 184 # 8-byte Folded Reload + ld.d $s8, $sp, 392 # 8-byte Folded Reload ld.d $s3, $sp, 200 # 8-byte Folded Reload + ld.d $a1, $sp, 184 # 8-byte Folded Reload st.d $s4, $sp, 256 # 8-byte Folded Spill st.d $s5, $sp, 272 # 8-byte Folded Spill b .LBB3_269 .LBB3_268: # %CreateDecodeTables.exit.i # in Loop: Header=BB3_269 Depth=2 slli.d $a0, $s0, 2 - ld.d $a1, $sp, 376 # 8-byte Folded Reload + ld.d $a1, $sp, 384 # 8-byte Folded Reload stx.w $s1, $a1, $a0 addi.d $s0, $s0, 1 ld.d $a1, $sp, 480 # 8-byte Folded Reload @@ -2196,10 +2194,10 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress jirl $ra, $ra, 0 move $s2, $zero st.d $zero, $sp, 472 # 8-byte Folded Spill + st.d $zero, $sp, 464 # 8-byte Folded Spill st.d $zero, $sp, 456 # 8-byte Folded Spill st.d $zero, $sp, 448 # 8-byte Folded Spill - st.d $zero, $sp, 440 # 8-byte Folded Spill - st.d $zero, $sp, 368 # 8-byte Folded Spill + st.d $zero, $sp, 376 # 8-byte Folded Spill move $a6, $zero move $a7, $zero move $t0, $zero @@ -2290,7 +2288,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $a1, $zero st.d $fp, $sp, 280 # 8-byte Folded Spill alsl.d $a0, $s0, $fp, 3 - ld.d $a2, $sp, 352 # 8-byte Folded Reload + ld.d $a2, $sp, 360 # 8-byte Folded Reload add.d $a2, $a2, $a0 move $a6, $s1 b .LBB3_280 @@ -2365,13 +2363,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.w $a7, $s4, 64 ld.w $a6, $s4, 68 ld.w $a0, $s4, 72 - st.d $a0, $sp, 368 # 8-byte Folded Spill + st.d $a0, $sp, 376 # 8-byte Folded Spill ld.w $a0, $s4, 76 - st.d $a0, $sp, 440 # 8-byte Folded Spill - ld.w $a0, $s4, 80 st.d $a0, $sp, 448 # 8-byte Folded Spill - ld.w $a0, $s4, 84 + ld.w $a0, $s4, 80 st.d $a0, $sp, 456 # 8-byte Folded Spill + ld.w $a0, $s4, 84 + st.d $a0, $sp, 464 # 8-byte Folded Spill ld.w $a0, $s4, 88 st.d $a0, $sp, 472 # 8-byte Folded Spill ld.d $s4, $sp, 496 # 8-byte Folded Reload @@ -2380,7 +2378,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # in Loop: Header=BB3_269 Depth=2 alsl.d $a0, $s0, $fp, 3 add.d $s4, $s4, $a0 - ld.d $a4, $sp, 384 # 8-byte Folded Reload + ld.d $a4, $sp, 392 # 8-byte Folded Reload add.d $a0, $a4, $a0 st.w $a3, $s4, 4 add.d $a2, $a3, $a2 @@ -2415,16 +2413,16 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.w $a1, $s4, 64 add.d $a1, $a1, $a6 st.w $a1, $s4, 68 - ld.d $a2, $sp, 368 # 8-byte Folded Reload + ld.d $a2, $sp, 376 # 8-byte Folded Reload add.d $a1, $a1, $a2 st.w $a1, $s4, 72 - ld.d $a2, $sp, 440 # 8-byte Folded Reload + ld.d $a2, $sp, 448 # 8-byte Folded Reload add.d $a1, $a1, $a2 st.w $a1, $s4, 76 - ld.d $a2, $sp, 448 # 8-byte Folded Reload + ld.d $a2, $sp, 456 # 8-byte Folded Reload add.d $a1, $a1, $a2 st.w $a1, $s4, 80 - ld.d $a2, $sp, 456 # 8-byte Folded Reload + ld.d $a2, $sp, 464 # 8-byte Folded Reload add.d $a1, $a1, $a2 st.w $a1, $s4, 84 ld.d $a2, $sp, 472 # 8-byte Folded Reload @@ -2434,7 +2432,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress move $a1, $zero pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 - ld.d $a6, $sp, 360 # 8-byte Folded Reload + ld.d $a6, $sp, 368 # 8-byte Folded Reload ld.d $t4, $sp, 240 # 8-byte Folded Reload blez $t4, .LBB3_290 # %bb.288: # %.lr.ph82.preheader.i.i @@ -2464,7 +2462,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress .LBB3_290: # %.preheader.i.i # in Loop: Header=BB3_269 Depth=2 ld.d $ra, $sp, 496 # 8-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ld.d $s4, $sp, 256 # 8-byte Folded Reload ld.d $a5, $sp, 232 # 8-byte Folded Reload ld.d $s5, $sp, 272 # 8-byte Folded Reload @@ -2590,13 +2588,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress bne $a0, $a4, .LBB3_301 # %bb.302: # in Loop: Header=BB3_4 Depth=1 addi.w $a0, $fp, 1 - st.d $a0, $sp, 448 # 8-byte Folded Spill - ld.d $a0, $sp, 392 # 8-byte Folded Reload + st.d $a0, $sp, 456 # 8-byte Folded Spill + ld.d $a0, $sp, 400 # 8-byte Folded Reload mul.w $a0, $s0, $a0 - st.d $a0, $sp, 440 # 8-byte Folded Spill + st.d $a0, $sp, 448 # 8-byte Folded Spill ld.d $ra, $sp, 496 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ori $t8, $zero, 10 ld.d $t4, $sp, 240 # 8-byte Folded Reload ld.d $fp, $sp, 80 # 8-byte Folded Reload @@ -2606,19 +2604,19 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $t1, $sp, 72 # 8-byte Folded Reload blez $fp, .LBB3_312 # %bb.303: # in Loop: Header=BB3_4 Depth=1 - ld.d $a0, $sp, 344 # 8-byte Folded Reload + ld.d $a0, $sp, 352 # 8-byte Folded Reload ld.bu $s4, $a0, 0 move $s2, $zero - st.d $zero, $sp, 456 # 8-byte Folded Spill + st.d $zero, $sp, 464 # 8-byte Folded Spill slli.d $a0, $s4, 10 alsl.d $a0, $s4, $a0, 3 add.d $t2, $ra, $a0 slli.d $a1, $s4, 2 - ld.d $a2, $sp, 376 # 8-byte Folded Reload + ld.d $a2, $sp, 384 # 8-byte Folded Reload ldx.w $s3, $a2, $a1 - ld.d $a1, $sp, 352 # 8-byte Folded Reload + ld.d $a1, $sp, 360 # 8-byte Folded Reload add.d $t0, $a1, $a0 - ld.d $a1, $sp, 384 # 8-byte Folded Reload + ld.d $a1, $sp, 392 # 8-byte Folded Reload add.d $s5, $a1, $a0 ori $a2, $zero, 256 ori $a0, $zero, 49 @@ -2690,7 +2688,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress .LBB3_312: # in Loop: Header=BB3_4 Depth=1 move $s2, $zero st.d $zero, $sp, 472 # 8-byte Folded Spill - st.d $zero, $sp, 456 # 8-byte Folded Spill + st.d $zero, $sp, 464 # 8-byte Folded Spill move $a3, $zero addi.w $a0, $zero, -4 ori $a2, $zero, 256 @@ -2927,21 +2925,21 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.w $t4, $s6, 12 st.w $t6, $s6, 16 st.w $fp, $s6, 20 - ld.d $a1, $sp, 448 # 8-byte Folded Reload - st.w $a1, $s6, 24 ld.d $a1, $sp, 456 # 8-byte Folded Reload + st.w $a1, $s6, 24 + ld.d $a1, $sp, 464 # 8-byte Folded Reload st.w $a1, $s6, 28 ld.d $a1, $sp, 472 # 8-byte Folded Reload st.w $a1, $s6, 32 st.w $t5, $s6, 36 - ld.d $a1, $sp, 440 # 8-byte Folded Reload + ld.d $a1, $sp, 448 # 8-byte Folded Reload st.w $a1, $s6, 40 st.w $s2, $s6, 44 - ld.d $a1, $sp, 432 # 8-byte Folded Reload + ld.d $a1, $sp, 440 # 8-byte Folded Reload st.w $a1, $s6, 48 st.w $t1, $s6, 52 st.w $a7, $s6, 56 - ld.d $a1, $sp, 464 # 8-byte Folded Reload + ld.d $a1, $sp, 408 # 8-byte Folded Reload st.w $a1, $s6, 60 ld.d $a1, $sp, 504 # 8-byte Folded Reload st.w $a1, $s6, 64 @@ -2979,7 +2977,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress .LBB3_353: # %.loopexit1376.i # in Loop: Header=BB3_4 Depth=1 move $s2, $s0 - ld.d $a0, $sp, 448 # 8-byte Folded Reload + ld.d $a0, $sp, 456 # 8-byte Folded Reload bne $t5, $a0, .LBB3_368 # %bb.354: # in Loop: Header=BB3_4 Depth=1 ld.w $a1, $s1, 56 @@ -3407,24 +3405,24 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress maskeqz $a0, $a0, $a1 or $a0, $a0, $a3 add.w $a4, $a0, $a4 - st.d $a4, $sp, 432 # 8-byte Folded Spill + st.d $a4, $sp, 440 # 8-byte Folded Spill bnez $a6, .LBB3_373 # %bb.371: # in Loop: Header=BB3_4 Depth=1 - ld.d $a1, $sp, 456 # 8-byte Folded Reload + ld.d $a1, $sp, 464 # 8-byte Folded Reload addi.w $a1, $a1, 1 - st.d $a1, $sp, 456 # 8-byte Folded Spill + st.d $a1, $sp, 464 # 8-byte Folded Spill bge $a1, $fp, .LBB3_395 # %bb.372: # in Loop: Header=BB3_4 Depth=1 - ld.d $a0, $sp, 344 # 8-byte Folded Reload + ld.d $a0, $sp, 352 # 8-byte Folded Reload ldx.bu $s4, $a0, $a1 slli.d $a0, $s4, 2 - ld.d $a1, $sp, 376 # 8-byte Folded Reload + ld.d $a1, $sp, 384 # 8-byte Folded Reload ldx.w $s3, $a1, $a0 slli.d $a0, $s4, 10 alsl.d $a0, $s4, $a0, 3 - ld.d $a1, $sp, 384 # 8-byte Folded Reload + ld.d $a1, $sp, 392 # 8-byte Folded Reload add.d $s5, $a1, $a0 - ld.d $a1, $sp, 352 # 8-byte Folded Reload + ld.d $a1, $sp, 360 # 8-byte Folded Reload add.d $t0, $a1, $a0 add.d $t2, $ra, $a0 ori $a6, $zero, 50 @@ -3495,7 +3493,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress .LBB3_382: # in Loop: Header=BB3_4 Depth=1 addi.w $a0, $zero, -4 ld.d $a5, $sp, 112 # 8-byte Folded Reload - ld.d $a1, $sp, 440 # 8-byte Folded Reload + ld.d $a1, $sp, 448 # 8-byte Folded Reload bge $s2, $a1, .LBB3_397 # %bb.383: # in Loop: Header=BB3_4 Depth=1 move $t1, $t0 @@ -3573,14 +3571,14 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $t1, $sp, 72 # 8-byte Folded Reload b .LBB3_421 .LBB3_394: # in Loop: Header=BB3_4 Depth=1 - st.d $t5, $sp, 448 # 8-byte Folded Spill + st.d $t5, $sp, 456 # 8-byte Folded Spill b .LBB3_478 .LBB3_395: # in Loop: Header=BB3_4 Depth=1 st.d $zero, $sp, 472 # 8-byte Folded Spill b .LBB3_145 .LBB3_396: # in Loop: Header=BB3_4 Depth=1 move $a3, $zero - st.d $t5, $sp, 448 # 8-byte Folded Spill + st.d $t5, $sp, 456 # 8-byte Folded Spill ld.d $t1, $sp, 72 # 8-byte Folded Reload b .LBB3_349 .LBB3_397: # in Loop: Header=BB3_4 Depth=1 @@ -3668,7 +3666,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress bstrins.d $a5, $a1, 19, 16 st.w $a5, $s1, 60 st.w $t2, $s1, 1092 - st.d $t5, $sp, 448 # 8-byte Folded Spill + st.d $t5, $sp, 456 # 8-byte Folded Spill ld.d $a7, $sp, 56 # 8-byte Folded Reload b .LBB3_477 .LBB3_406: # in Loop: Header=BB3_4 Depth=1 @@ -3761,7 +3759,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress srli.d $a2, $a0, 8 st.w $a2, $s1, 60 st.w $zero, $s1, 1092 - ld.d $a0, $sp, 392 # 8-byte Folded Reload + ld.d $a0, $sp, 400 # 8-byte Folded Reload mul.w $a3, $a3, $a0 ori $a0, $zero, 1 ld.d $t1, $sp, 72 # 8-byte Folded Reload @@ -3777,7 +3775,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.w $a1, $s1, 60 ori $a1, $zero, 1 st.w $a1, $s1, 1092 - st.d $t5, $sp, 448 # 8-byte Folded Spill + st.d $t5, $sp, 456 # 8-byte Folded Spill move $a2, $s2 ld.d $a5, $sp, 112 # 8-byte Folded Reload b .LBB3_349 @@ -3869,7 +3867,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $s0, $sp, 472 # 8-byte Folded Reload .LBB3_421: # %.loopexit1387.i # in Loop: Header=BB3_4 Depth=1 - ld.d $a3, $sp, 424 # 8-byte Folded Reload + ld.d $a3, $sp, 432 # 8-byte Folded Reload ldx.bu $a1, $a3, $a1 slli.d $a3, $a1, 2 ld.d $a6, $sp, 208 # 8-byte Folded Reload @@ -3893,21 +3891,21 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $a5, $sp, 112 # 8-byte Folded Reload bnez $s0, .LBB3_427 # %bb.425: # in Loop: Header=BB3_4 Depth=1 - ld.d $a1, $sp, 456 # 8-byte Folded Reload + ld.d $a1, $sp, 464 # 8-byte Folded Reload addi.w $a1, $a1, 1 - st.d $a1, $sp, 456 # 8-byte Folded Spill + st.d $a1, $sp, 464 # 8-byte Folded Spill bge $a1, $fp, .LBB3_439 # %bb.426: # in Loop: Header=BB3_4 Depth=1 - ld.d $a0, $sp, 344 # 8-byte Folded Reload + ld.d $a0, $sp, 352 # 8-byte Folded Reload ldx.bu $s4, $a0, $a1 slli.d $a0, $s4, 2 - ld.d $a1, $sp, 376 # 8-byte Folded Reload + ld.d $a1, $sp, 384 # 8-byte Folded Reload ldx.w $s3, $a1, $a0 slli.d $a0, $s4, 10 alsl.d $a0, $s4, $a0, 3 - ld.d $a1, $sp, 384 # 8-byte Folded Reload + ld.d $a1, $sp, 392 # 8-byte Folded Reload add.d $s5, $a1, $a0 - ld.d $a1, $sp, 352 # 8-byte Folded Reload + ld.d $a1, $sp, 360 # 8-byte Folded Reload add.d $t0, $a1, $a0 add.d $t2, $ra, $a0 ori $s0, $zero, 50 @@ -4081,7 +4079,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress bgeu $t5, $t3, .LBB3_455 # %bb.454: # in Loop: Header=BB3_4 Depth=1 ld.d $a0, $sp, 72 # 8-byte Folded Reload - ld.d $a4, $sp, 432 # 8-byte Folded Reload + ld.d $a4, $sp, 440 # 8-byte Folded Reload move $s2, $s0 b .LBB3_370 .LBB3_455: # in Loop: Header=BB3_4 Depth=1 @@ -4091,13 +4089,13 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ldptr.w $a1, $s1, 7820 ld.d $a3, $sp, 312 # 8-byte Folded Reload ldx.bu $a1, $a3, $a1 - ld.d $a3, $sp, 424 # 8-byte Folded Reload + ld.d $a3, $sp, 432 # 8-byte Folded Reload ldx.bu $a3, $a3, $a1 slli.d $a4, $a3, 2 ld.d $a7, $sp, 208 # 8-byte Folded Reload ldx.w $a5, $a7, $a4 ld.bu $a6, $s1, 44 - ld.d $s2, $sp, 432 # 8-byte Folded Reload + ld.d $s2, $sp, 440 # 8-byte Folded Reload addi.w $a1, $s2, 1 add.d $a5, $a5, $a1 stx.w $a5, $a7, $a4 @@ -4110,7 +4108,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.d $t0, $sp, 40 # 8-byte Folded Spill st.d $s5, $sp, 272 # 8-byte Folded Spill st.d $s3, $sp, 104 # 8-byte Folded Spill - ld.d $a5, $sp, 440 # 8-byte Folded Reload + ld.d $a5, $sp, 448 # 8-byte Folded Reload slt $a4, $a5, $s0 masknez $a5, $a5, $a4 maskeqz $a4, $s0, $a4 @@ -4130,7 +4128,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress or $a5, $a5, $a6 bltu $t0, $a5, .LBB3_463 # %bb.458: # in Loop: Header=BB3_4 Depth=1 - ld.d $t2, $sp, 464 # 8-byte Folded Reload + ld.d $t2, $sp, 408 # 8-byte Folded Reload b .LBB3_466 .LBB3_459: # %.preheader1375.i # in Loop: Header=BB3_4 Depth=1 @@ -4140,7 +4138,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress st.d $t0, $sp, 40 # 8-byte Folded Spill st.d $s5, $sp, 272 # 8-byte Folded Spill st.d $s3, $sp, 104 # 8-byte Folded Spill - ld.d $a5, $sp, 440 # 8-byte Folded Reload + ld.d $a5, $sp, 448 # 8-byte Folded Reload slt $a4, $a5, $s0 masknez $a5, $a5, $a4 maskeqz $a4, $s0, $a4 @@ -4160,10 +4158,10 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress or $a5, $a5, $a6 bltu $t0, $a5, .LBB3_469 # %bb.461: # in Loop: Header=BB3_4 Depth=1 - ld.d $t2, $sp, 464 # 8-byte Folded Reload + ld.d $t2, $sp, 408 # 8-byte Folded Reload b .LBB3_472 .LBB3_462: # in Loop: Header=BB3_4 Depth=1 - st.d $a1, $sp, 432 # 8-byte Folded Spill + st.d $a1, $sp, 440 # 8-byte Folded Spill ld.d $a4, $sp, 160 # 8-byte Folded Reload ori $a5, $zero, 1024 ld.d $a7, $sp, 56 # 8-byte Folded Reload @@ -4171,7 +4169,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress b .LBB3_353 .LBB3_463: # %vector.ph501 # in Loop: Header=BB3_4 Depth=1 - ld.d $t2, $sp, 464 # 8-byte Folded Reload + ld.d $t2, $sp, 408 # 8-byte Folded Reload bstrpick.d $a5, $a5, 31, 1 ldptr.d $a7, $s1, 3160 slli.d $a6, $a5, 1 @@ -4193,7 +4191,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # in Loop: Header=BB3_4 Depth=1 slli.d $a5, $s0, 1 sub.d $a6, $a4, $s0 - st.d $t2, $sp, 464 # 8-byte Folded Spill + st.d $t2, $sp, 408 # 8-byte Folded Spill .LBB3_467: # %scalar.ph499 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4211,7 +4209,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress b .LBB3_475 .LBB3_469: # %vector.ph490 # in Loop: Header=BB3_4 Depth=1 - ld.d $t2, $sp, 464 # 8-byte Folded Reload + ld.d $t2, $sp, 408 # 8-byte Folded Reload bstrpick.d $a5, $a5, 31, 1 ldptr.d $a7, $s1, 3152 slli.d $a6, $a5, 1 @@ -4233,7 +4231,7 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress # in Loop: Header=BB3_4 Depth=1 slli.d $a5, $s0, 2 sub.d $a6, $a4, $s0 - st.d $t2, $sp, 464 # 8-byte Folded Spill + st.d $t2, $sp, 408 # 8-byte Folded Spill .LBB3_473: # %scalar.ph489 # Parent Loop BB3_4 Depth=1 # => This Inner Loop Header: Depth=2 @@ -4249,11 +4247,11 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ori $a7, $zero, 1 blt $a7, $t0, .LBB3_473 .LBB3_475: # in Loop: Header=BB3_4 Depth=1 - st.d $a1, $sp, 432 # 8-byte Folded Spill + st.d $a1, $sp, 440 # 8-byte Folded Spill ld.d $ra, $sp, 496 # 8-byte Folded Reload ld.d $t1, $sp, 168 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ld.d $a4, $sp, 160 # 8-byte Folded Reload ori $t3, $zero, 2 ori $a5, $zero, 1024 @@ -4265,12 +4263,12 @@ nsis_BZ2_bzDecompress: # @nsis_BZ2_bzDecompress ld.d $t0, $sp, 40 # 8-byte Folded Reload b .LBB3_353 .LBB3_476: # in Loop: Header=BB3_4 Depth=1 - st.d $t0, $sp, 432 # 8-byte Folded Spill + st.d $t0, $sp, 440 # 8-byte Folded Spill move $a3, $zero move $s2, $a4 ld.d $ra, $sp, 496 # 8-byte Folded Reload vld $vr3, $sp, 320 # 16-byte Folded Reload - vld $vr6, $sp, 400 # 16-byte Folded Reload + vld $vr6, $sp, 416 # 16-byte Folded Reload ori $t8, $zero, 10 ld.d $a7, $sp, 56 # 8-byte Folded Reload ld.d $s3, $sp, 104 # 8-byte Folded Reload diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_pe.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_pe.s index 46d3eb21..a8549d67 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_pe.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_pe.s @@ -5612,15 +5612,15 @@ cli_scanpe: # @cli_scanpe addi.w $a7, $zero, -12 lu32i.d $a7, 0 vrepli.b $vr0, -1 + ld.d $t1, $sp, 48 # 8-byte Folded Reload .LBB0_838: # %vector.body # =>This Inner Loop Header: Depth=1 addi.d $t0, $a4, 4 - lu12i.w $t1, 2 - ori $t1, $t1, 396 - add.d $t1, $sp, $t1 - vld $vr1, $t1, 0 + lu12i.w $t2, 2 + ori $t2, $t2, 396 + add.d $t2, $sp, $t2 + vld $vr1, $t2, 0 and $t0, $t0, $a7 - ld.d $t1, $sp, 48 # 8-byte Folded Reload vldx $vr2, $t1, $t0 vxor.v $vr1, $vr1, $vr0 vreplvei.w $vr1, $vr1, 0 @@ -5640,6 +5640,7 @@ cli_scanpe: # @cli_scanpe alsl.d $a3, $a1, $a3, 2 add.d $a3, $s4, $a3 sub.d $a0, $a0, $a1 + ld.d $a5, $sp, 48 # 8-byte Folded Reload .LBB0_841: # %.lr.ph3449 # =>This Inner Loop Header: Depth=1 bstrpick.d $a1, $a2, 31, 2 @@ -5648,7 +5649,6 @@ cli_scanpe: # @cli_scanpe ori $a4, $a4, 396 add.d $a4, $sp, $a4 ld.w $a4, $a4, 0 - ld.d $a5, $sp, 48 # 8-byte Folded Reload ldx.w $a1, $a5, $a1 nor $a4, $a4, $zero add.d $a1, $a1, $a4 @@ -5982,6 +5982,7 @@ cli_scanpe: # @cli_scanpe vreplgr2vr.w $vr4, $a2 ori $a2, $zero, 36 move $a3, $a1 + ld.d $t0, $sp, 136 # 8-byte Folded Reload .LBB0_885: # %vector.body3951 # =>This Inner Loop Header: Depth=1 vslli.w $vr5, $vr2, 1 @@ -5991,7 +5992,6 @@ cli_scanpe: # @cli_scanpe vpickve2gr.d $a5, $vr7, 1 vpickve2gr.d $a6, $vr6, 0 vpickve2gr.d $a7, $vr6, 1 - ld.d $t0, $sp, 136 # 8-byte Folded Reload ldx.b $a4, $t0, $a4 ldx.b $a5, $t0, $a5 ldx.b $a6, $t0, $a6 diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_sis.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_sis.s index b6e32a29..dc36e7bf 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_sis.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/libclamav_sis.s @@ -871,11 +871,11 @@ sis_extract_simple: # @sis_extract_simple add.d $a2, $a2, $a0 addi.d $a3, $a2, 2 addi.d $t3, $t2, 1 - bgeu $s5, $a3, .LBB1_115 + bgeu $s5, $a3, .LBB1_114 # %bb.12: # %vector.memcheck add.d $a3, $s2, $a0 add.d $a4, $s5, $t3 - bgeu $a3, $a4, .LBB1_115 + bgeu $a3, $a4, .LBB1_114 .LBB1_13: move $a4, $zero move $a3, $zero @@ -912,9 +912,8 @@ sis_extract_simple: # @sis_extract_simple move $a1, $s5 pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - st.d $s4, $sp, 120 # 8-byte Folded Spill beqz $s7, .LBB1_33 - b .LBB1_60 + b .LBB1_35 .LBB1_17: pcalau12i $a0, %pc_hi20(.L.str.149) addi.d $a0, $a0, %pc_lo12(.L.str.149) @@ -922,7 +921,7 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(cli_errmsg) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB1_109 + b .LBB1_84 .LBB1_19: pcalau12i $a0, %pc_hi20(.L.str.168) addi.d $a0, $a0, %pc_lo12(.L.str.168) @@ -932,7 +931,7 @@ sis_extract_simple: # @sis_extract_simple addi.d $a0, $a0, %pc_lo12(.L.str.164) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - b .LBB1_108 + b .LBB1_83 .LBB1_21: st.d $a5, $sp, 88 # 8-byte Folded Spill move $s4, $a4 @@ -955,18 +954,18 @@ sis_extract_simple: # @sis_extract_simple ld.w $fp, $s8, 4 andi $a0, $fp, 255 ori $a1, $zero, 2 - beq $a0, $a1, .LBB1_49 + beq $a0, $a1, .LBB1_100 # %bb.23: ori $a1, $zero, 1 - beq $a0, $a1, .LBB1_48 + beq $a0, $a1, .LBB1_99 # %bb.24: - bnez $a0, .LBB1_50 + bnez $a0, .LBB1_101 # %bb.25: pcalau12i $a0, %pc_hi20(.L.str.158) addi.d $a0, $a0, %pc_lo12(.L.str.158) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - b .LBB1_51 + b .LBB1_102 .LBB1_26: st.d $a5, $sp, 88 # 8-byte Folded Spill move $s4, $a4 @@ -990,15 +989,14 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(cli_warnmsg) jirl $ra, $ra, 0 move $s5, $zero - st.d $s4, $sp, 120 # 8-byte Folded Spill - bnez $s7, .LBB1_60 + bnez $s7, .LBB1_35 b .LBB1_33 .LBB1_29: pcalau12i $a0, %pc_hi20(.L.str.165) addi.d $a0, $a0, %pc_lo12(.L.str.165) pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - b .LBB1_108 + b .LBB1_83 .LBB1_30: st.d $a5, $sp, 88 # 8-byte Folded Spill move $s4, $a4 @@ -1026,188 +1024,47 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(cli_warnmsg) jirl $ra, $ra, 0 move $s5, $zero - st.d $s4, $sp, 120 # 8-byte Folded Spill - bnez $s7, .LBB1_60 + bnez $s7, .LBB1_35 .LBB1_33: ld.w $s7, $s8, 16 ori $a0, $zero, 513 - bltu $s7, $a0, .LBB1_35 + bltu $s7, $a0, .LBB1_85 # %bb.34: pcalau12i $a0, %pc_hi20(.L.str.171) addi.d $a0, $a0, %pc_lo12(.L.str.171) - b .LBB1_59 -.LBB1_35: - ld.w $s0, $s8, 20 - bgeu $s0, $s1, .LBB1_47 -# %bb.36: - add.w $a0, $s0, $s7 - bgeu $a0, $s1, .LBB1_47 -# %bb.37: - beqz $s7, .LBB1_57 -# %bb.38: - andi $a0, $s7, 1 - bnez $a0, .LBB1_57 -# %bb.39: - bstrpick.d $a0, $s7, 31, 1 - addi.w $a0, $a0, 1 - ori $a1, $zero, 1 - pcaddu18i $ra, %call36(cli_calloc) - jirl $ra, $ra, 0 - beqz $a0, .LBB1_58 -# %bb.40: # %iter.check32 - move $s6, $a0 - bstrpick.d $a0, $s0, 31, 0 - addi.w $a1, $s7, -1 - ori $a2, $zero, 7 - bstrpick.d $t2, $a1, 31, 1 - bltu $s7, $a2, .LBB1_43 -# %bb.41: # %vector.memcheck24 - alsl.d $a2, $t2, $s2, 1 - add.d $a2, $a2, $a0 - addi.d $a2, $a2, 2 - addi.d $t3, $t2, 1 - bgeu $s6, $a2, .LBB1_135 -# %bb.42: # %vector.memcheck24 - add.d $a2, $s2, $a0 - add.d $a4, $s6, $t3 - bgeu $a2, $a4, .LBB1_135 -.LBB1_43: - move $a4, $zero - move $a2, $zero - move $s4, $s1 -.LBB1_44: # %.preheader.i230.preheader - add.d $a0, $a4, $a0 - add.d $a0, $a0, $s2 - addi.d $a0, $a0, 1 - sub.d $a1, $t2, $a2 - addi.d $a1, $a1, 1 - add.d $a2, $s6, $a2 - ori $a3, $zero, 95 - .p2align 4, , 16 -.LBB1_45: # %.preheader.i230 - # =>This Inner Loop Header: Depth=1 - ld.b $a4, $a0, 0 - slli.d $a5, $a4, 4 - st.b $a5, $a2, 0 - ld.b $a5, $a0, -1 - alsl.d $a4, $a4, $a5, 4 - andi $a5, $a4, 255 - addi.d $a5, $a5, -37 - sltui $a5, $a5, 1 - masknez $a4, $a4, $a5 - maskeqz $a5, $a3, $a5 - or $a4, $a5, $a4 - st.b $a4, $a2, 0 - addi.d $a0, $a0, 2 - addi.d $a1, $a1, -1 - addi.d $a2, $a2, 1 - bnez $a1, .LBB1_45 -.LBB1_46: # %sis_utf16_decode.exit237 - pcalau12i $a0, %pc_hi20(.L.str.173) - addi.d $a0, $a0, %pc_lo12(.L.str.173) - move $a1, $s6 - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 - b .LBB1_61 -.LBB1_47: - pcalau12i $a0, %pc_hi20(.L.str.172) - addi.d $a0, $a0, %pc_lo12(.L.str.172) - pcaddu18i $ra, %call36(cli_errmsg) - jirl $ra, $ra, 0 - addi.w $a0, $zero, -124 - bnez $s5, .LBB1_123 - b .LBB1_109 -.LBB1_48: - pcalau12i $a0, %pc_hi20(.L.str.159) - addi.d $a0, $a0, %pc_lo12(.L.str.159) - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 - b .LBB1_51 -.LBB1_49: - pcalau12i $a0, %pc_hi20(.L.str.160) - addi.d $a0, $a0, %pc_lo12(.L.str.160) - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 - b .LBB1_51 -.LBB1_50: - pcalau12i $a0, %pc_hi20(.L.str.161) - addi.d $a0, $a0, %pc_lo12(.L.str.161) - move $a1, $fp - pcaddu18i $ra, %call36(cli_warnmsg) - jirl $ra, $ra, 0 -.LBB1_51: - bstrpick.d $a0, $fp, 15, 8 - slli.d $a0, $a0, 8 - pcalau12i $a1, %pc_hi20(.L.str.157) - addi.d $s5, $a1, %pc_lo12(.L.str.157) - beqz $a0, .LBB1_4 -# %bb.52: - ori $a1, $zero, 512 - beq $a0, $a1, .LBB1_55 -# %bb.53: - ori $a1, $zero, 256 - bne $a0, $a1, .LBB1_56 -# %bb.54: - pcalau12i $a0, %pc_hi20(.L.str.162) - addi.d $a0, $a0, %pc_lo12(.L.str.162) - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 - b .LBB1_4 -.LBB1_55: - pcalau12i $a0, %pc_hi20(.L.str.163) - addi.d $a0, $a0, %pc_lo12(.L.str.163) - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 - b .LBB1_4 -.LBB1_56: - ld.w $a1, $s8, 4 - pcalau12i $a0, %pc_hi20(.L.str.161) - addi.d $a0, $a0, %pc_lo12(.L.str.161) pcaddu18i $ra, %call36(cli_warnmsg) jirl $ra, $ra, 0 - b .LBB1_4 -.LBB1_57: - pcalau12i $a0, %pc_hi20(.L.str.193) - addi.d $a0, $a0, %pc_lo12(.L.str.193) - move $a1, $s7 - pcaddu18i $ra, %call36(cli_dbgmsg) - jirl $ra, $ra, 0 -.LBB1_58: - pcalau12i $a0, %pc_hi20(.L.str.174) - addi.d $a0, $a0, %pc_lo12(.L.str.174) -.LBB1_59: - pcaddu18i $ra, %call36(cli_warnmsg) - jirl $ra, $ra, 0 -.LBB1_60: +.LBB1_35: move $s6, $zero + st.d $s4, $sp, 120 # 8-byte Folded Spill +.LBB1_36: move $s4, $s1 -.LBB1_61: pcalau12i $a0, %got_pc_hi20(cli_leavetemps_flag) ld.d $a0, $a0, %got_pc_lo12(cli_leavetemps_flag) ld.bu $a0, $a0, 0 - bnez $a0, .LBB1_66 -# %bb.62: - beqz $s5, .LBB1_64 -# %bb.63: + bnez $a0, .LBB1_41 +.LBB1_37: + beqz $s5, .LBB1_39 +# %bb.38: move $a0, $s5 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 -.LBB1_64: - beqz $s6, .LBB1_66 -# %bb.65: +.LBB1_39: + beqz $s6, .LBB1_41 +# %bb.40: move $a0, $s6 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 -.LBB1_66: - beqz $fp, .LBB1_68 -# %bb.67: +.LBB1_41: + beqz $fp, .LBB1_43 +# %bb.42: move $a0, $s3 pcaddu18i $ra, %call36(cli_strdup) jirl $ra, $ra, 0 move $fp, $a0 - bnez $a0, .LBB1_70 - b .LBB1_106 -.LBB1_68: + bnez $a0, .LBB1_45 + b .LBB1_81 +.LBB1_43: move $a0, $s3 pcaddu18i $ra, %call36(strlen) jirl $ra, $ra, 0 @@ -1220,8 +1077,8 @@ sis_extract_simple: # @sis_extract_simple addi.d $a0, $a0, 2 pcaddu18i $ra, %call36(cli_malloc) jirl $ra, $ra, 0 - beqz $a0, .LBB1_106 -# %bb.69: + beqz $a0, .LBB1_81 +# %bb.44: move $fp, $a0 pcalau12i $a0, %pc_hi20(.L.str.175) addi.d $a1, $a0, %pc_lo12(.L.str.175) @@ -1230,27 +1087,27 @@ sis_extract_simple: # @sis_extract_simple move $a3, $s0 pcaddu18i $ra, %call36(sprintf) jirl $ra, $ra, 0 -.LBB1_70: +.LBB1_45: addi.d $a1, $sp, 136 move $a0, $fp pcaddu18i $ra, %call36(stat) jirl $ra, $ra, 0 addi.w $s0, $zero, -1 - bne $a0, $s0, .LBB1_72 -# %bb.71: + bne $a0, $s0, .LBB1_47 +# %bb.46: ori $a1, $zero, 448 move $a0, $fp pcaddu18i $ra, %call36(mkdir) jirl $ra, $ra, 0 - beq $a0, $s0, .LBB1_110 -.LBB1_72: + beq $a0, $s0, .LBB1_98 +.LBB1_47: st.d $s0, $sp, 80 # 8-byte Folded Spill st.d $fp, $sp, 104 # 8-byte Folded Spill st.d $s2, $sp, 64 # 8-byte Folded Spill ld.d $a0, $sp, 96 # 8-byte Folded Reload ld.d $s1, $sp, 88 # 8-byte Folded Reload - beqz $a0, .LBB1_107 -# %bb.73: # %.lr.ph + beqz $a0, .LBB1_82 +# %bb.48: # %.lr.ph slli.d $a1, $a0, 3 addi.d $a5, $s8, 24 slli.d $s2, $a0, 2 @@ -1287,56 +1144,56 @@ sis_extract_simple: # @sis_extract_simple addi.d $a0, $a0, %pc_lo12(.L.str.187) st.d $a0, $sp, 8 # 8-byte Folded Spill move $s6, $zero - b .LBB1_76 + b .LBB1_51 .p2align 4, , 16 -.LBB1_74: # in Loop: Header=BB1_76 Depth=1 +.LBB1_49: # in Loop: Header=BB1_51 Depth=1 move $a0, $s8 pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 st.b $fp, $s1, 0 -.LBB1_75: # in Loop: Header=BB1_76 Depth=1 +.LBB1_50: # in Loop: Header=BB1_51 Depth=1 addi.d $s6, $s6, 4 - beq $s2, $s6, .LBB1_107 -.LBB1_76: # =>This Inner Loop Header: Depth=1 + beq $s2, $s6, .LBB1_82 +.LBB1_51: # =>This Inner Loop Header: Depth=1 ldx.w $s5, $s7, $s6 - beq $s5, $s4, .LBB1_74 -# %bb.77: # in Loop: Header=BB1_76 Depth=1 - bgeu $s4, $s5, .LBB1_80 -# %bb.78: # in Loop: Header=BB1_76 Depth=1 + beq $s5, $s4, .LBB1_49 +# %bb.52: # in Loop: Header=BB1_51 Depth=1 + bgeu $s4, $s5, .LBB1_55 +# %bb.53: # in Loop: Header=BB1_51 Depth=1 ld.bu $a0, $s1, 0 - beqz $a0, .LBB1_111 -# %bb.79: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_110 +# %bb.54: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 96 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 - b .LBB1_75 + b .LBB1_50 .p2align 4, , 16 -.LBB1_80: # in Loop: Header=BB1_76 Depth=1 +.LBB1_55: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 72 # 8-byte Folded Reload ldx.wu $s3, $a0, $s6 addi.w $fp, $s3, 0 - bgeu $fp, $s4, .LBB1_112 -# %bb.81: # in Loop: Header=BB1_76 Depth=1 + bgeu $fp, $s4, .LBB1_111 +# %bb.56: # in Loop: Header=BB1_51 Depth=1 add.w $a0, $s5, $s3 - bltu $s4, $a0, .LBB1_112 -# %bb.82: # in Loop: Header=BB1_76 Depth=1 + bltu $s4, $a0, .LBB1_111 +# %bb.57: # in Loop: Header=BB1_51 Depth=1 move $s0, $s4 ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_gentemp) jirl $ra, $ra, 0 - beqz $a0, .LBB1_114 -# %bb.83: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_113 +# %bb.58: # in Loop: Header=BB1_51 Depth=1 move $s4, $a0 bstrpick.d $a1, $s5, 31, 0 ld.d $a0, $sp, 120 # 8-byte Folded Reload - beqz $a0, .LBB1_98 -# %bb.84: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_73 +# %bb.59: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 48 # 8-byte Folded Reload ldx.w $s5, $a0, $s6 bstrpick.d $a0, $s5, 31, 0 st.d $a0, $sp, 128 - beqz $s5, .LBB1_99 -# %bb.85: # in Loop: Header=BB1_76 Depth=1 + beqz $s5, .LBB1_74 +# %bb.60: # in Loop: Header=BB1_51 Depth=1 st.d $a1, $sp, 88 # 8-byte Folded Spill st.d $a0, $sp, 40 # 8-byte Folded Spill ld.d $a0, $sp, 32 # 8-byte Folded Reload @@ -1349,14 +1206,14 @@ sis_extract_simple: # @sis_extract_simple jirl $ra, $ra, 0 ld.d $a3, $sp, 112 # 8-byte Folded Reload ld.d $a0, $a3, 32 - beqz $a0, .LBB1_89 -# %bb.86: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_64 +# %bb.61: # in Loop: Header=BB1_51 Depth=1 ld.d $a2, $a0, 24 - beqz $a2, .LBB1_89 -# %bb.87: # in Loop: Header=BB1_76 Depth=1 + beqz $a2, .LBB1_64 +# %bb.62: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 128 - bgeu $a2, $a0, .LBB1_89 -# %bb.88: # in Loop: Header=BB1_76 Depth=1 + bgeu $a2, $a0, .LBB1_64 +# %bb.63: # in Loop: Header=BB1_51 Depth=1 addi.w $a1, $a0, 0 pcalau12i $a0, %pc_hi20(.L.str.183) addi.d $a0, $a0, %pc_lo12(.L.str.183) @@ -1366,28 +1223,28 @@ sis_extract_simple: # @sis_extract_simple move $a3, $fp ld.bu $a0, $fp, 41 andi $a0, $a0, 1 - bnez $a0, .LBB1_144 -.LBB1_89: # in Loop: Header=BB1_76 Depth=1 + bnez $a0, .LBB1_143 +.LBB1_64: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 128 alsl.d $a1, $s3, $s3, 1 - bgeu $a1, $a0, .LBB1_93 -# %bb.90: # in Loop: Header=BB1_76 Depth=1 + bgeu $a1, $a0, .LBB1_68 +# %bb.65: # in Loop: Header=BB1_51 Depth=1 ld.d $a2, $a3, 32 - beqz $a2, .LBB1_94 -# %bb.91: # in Loop: Header=BB1_76 Depth=1 + beqz $a2, .LBB1_69 +# %bb.66: # in Loop: Header=BB1_51 Depth=1 ld.d $a2, $a2, 24 - beqz $a2, .LBB1_94 -# %bb.92: # in Loop: Header=BB1_76 Depth=1 - bgeu $a2, $a0, .LBB1_94 -.LBB1_93: # in Loop: Header=BB1_76 Depth=1 + beqz $a2, .LBB1_69 +# %bb.67: # in Loop: Header=BB1_51 Depth=1 + bgeu $a2, $a0, .LBB1_69 +.LBB1_68: # in Loop: Header=BB1_51 Depth=1 st.d $a1, $sp, 128 move $a0, $a1 -.LBB1_94: # in Loop: Header=BB1_76 Depth=1 +.LBB1_69: # in Loop: Header=BB1_51 Depth=1 move $fp, $s5 pcaddu18i $ra, %call36(cli_malloc) jirl $ra, $ra, 0 - beqz $a0, .LBB1_131 -# %bb.95: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_130 +# %bb.70: # in Loop: Header=BB1_51 Depth=1 move $s5, $a0 ld.d $a0, $sp, 64 # 8-byte Folded Reload ld.d $a1, $sp, 88 # 8-byte Folded Reload @@ -1397,19 +1254,19 @@ sis_extract_simple: # @sis_extract_simple move $a3, $s3 pcaddu18i $ra, %call36(uncompress) jirl $ra, $ra, 0 - bnez $a0, .LBB1_132 -# %bb.96: # in Loop: Header=BB1_76 Depth=1 + bnez $a0, .LBB1_131 +# %bb.71: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 128 ld.d $a1, $sp, 40 # 8-byte Folded Reload - bne $a0, $a1, .LBB1_100 -# %bb.97: # in Loop: Header=BB1_76 Depth=1 + bne $a0, $a1, .LBB1_75 +# %bb.72: # in Loop: Header=BB1_51 Depth=1 move $s3, $fp - b .LBB1_101 -.LBB1_98: # in Loop: Header=BB1_76 Depth=1 + b .LBB1_76 +.LBB1_73: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 64 # 8-byte Folded Reload add.d $s5, $a0, $a1 - b .LBB1_101 -.LBB1_99: # in Loop: Header=BB1_76 Depth=1 + b .LBB1_76 +.LBB1_74: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 16 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 @@ -1418,14 +1275,14 @@ sis_extract_simple: # @sis_extract_simple jirl $ra, $ra, 0 move $s4, $s0 ori $fp, $zero, 1 - b .LBB1_75 -.LBB1_100: # in Loop: Header=BB1_76 Depth=1 + b .LBB1_50 +.LBB1_75: # in Loop: Header=BB1_51 Depth=1 addi.w $a1, $a0, 0 ld.d $a0, $sp, 8 # 8-byte Folded Reload pcaddu18i $ra, %call36(cli_dbgmsg) jirl $ra, $ra, 0 ld.d $s3, $sp, 128 -.LBB1_101: # in Loop: Header=BB1_76 Depth=1 +.LBB1_76: # in Loop: Header=BB1_51 Depth=1 ori $a1, $zero, 577 ori $a2, $zero, 384 move $a0, $s4 @@ -1433,16 +1290,16 @@ sis_extract_simple: # @sis_extract_simple jirl $ra, $ra, 0 move $fp, $a0 ld.d $a0, $sp, 80 # 8-byte Folded Reload - beq $fp, $a0, .LBB1_117 -# %bb.102: # in Loop: Header=BB1_76 Depth=1 + beq $fp, $a0, .LBB1_116 +# %bb.77: # in Loop: Header=BB1_51 Depth=1 addi.w $s3, $s3, 0 move $a0, $fp move $a1, $s5 move $a2, $s3 pcaddu18i $ra, %call36(cli_writen) jirl $ra, $ra, 0 - bne $a0, $s3, .LBB1_118 -# %bb.103: # in Loop: Header=BB1_76 Depth=1 + bne $a0, $s3, .LBB1_117 +# %bb.78: # in Loop: Header=BB1_51 Depth=1 ld.d $a0, $sp, 56 # 8-byte Folded Reload move $a1, $s4 pcaddu18i $ra, %call36(cli_dbgmsg) @@ -1451,30 +1308,30 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(close) jirl $ra, $ra, 0 ld.d $a1, $sp, 80 # 8-byte Folded Reload - beq $a0, $a1, .LBB1_121 -# %bb.104: # in Loop: Header=BB1_76 Depth=1 + beq $a0, $a1, .LBB1_120 +# %bb.79: # in Loop: Header=BB1_51 Depth=1 move $a0, $s4 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 move $s4, $s0 ld.d $a0, $sp, 120 # 8-byte Folded Reload ori $fp, $zero, 1 - beqz $a0, .LBB1_75 -# %bb.105: # in Loop: Header=BB1_76 Depth=1 + beqz $a0, .LBB1_50 +# %bb.80: # in Loop: Header=BB1_51 Depth=1 move $a0, $s5 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 - b .LBB1_75 -.LBB1_106: + b .LBB1_50 +.LBB1_81: addi.w $a0, $zero, -114 - b .LBB1_109 -.LBB1_107: # %._crit_edge + b .LBB1_84 +.LBB1_82: # %._crit_edge ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 -.LBB1_108: +.LBB1_83: move $a0, $zero -.LBB1_109: +.LBB1_84: ld.d $s8, $sp, 264 # 8-byte Folded Reload ld.d $s7, $sp, 272 # 8-byte Folded Reload ld.d $s6, $sp, 280 # 8-byte Folded Reload @@ -1488,43 +1345,191 @@ sis_extract_simple: # @sis_extract_simple ld.d $ra, $sp, 344 # 8-byte Folded Reload addi.d $sp, $sp, 352 ret -.LBB1_110: +.LBB1_85: + ld.w $s0, $s8, 20 + bgeu $s0, $s1, .LBB1_97 +# %bb.86: + add.w $a0, $s0, $s7 + bgeu $a0, $s1, .LBB1_97 +# %bb.87: + st.d $s4, $sp, 120 # 8-byte Folded Spill + beqz $s7, .LBB1_108 +# %bb.88: + andi $a0, $s7, 1 + bnez $a0, .LBB1_108 +# %bb.89: + bstrpick.d $a0, $s7, 31, 1 + addi.w $a0, $a0, 1 + ori $a1, $zero, 1 + pcaddu18i $ra, %call36(cli_calloc) + jirl $ra, $ra, 0 + beqz $a0, .LBB1_109 +# %bb.90: # %iter.check32 + move $s6, $a0 + bstrpick.d $a0, $s0, 31, 0 + addi.w $a1, $s7, -1 + ori $a2, $zero, 7 + bstrpick.d $t2, $a1, 31, 1 + bltu $s7, $a2, .LBB1_93 +# %bb.91: # %vector.memcheck24 + alsl.d $a2, $t2, $s2, 1 + add.d $a2, $a2, $a0 + addi.d $a2, $a2, 2 + addi.d $t3, $t2, 1 + bgeu $s6, $a2, .LBB1_134 +# %bb.92: # %vector.memcheck24 + add.d $a2, $s2, $a0 + add.d $a4, $s6, $t3 + bgeu $a2, $a4, .LBB1_134 +.LBB1_93: + move $a4, $zero + move $a2, $zero + move $s4, $s1 +.LBB1_94: # %.preheader.i230.preheader + add.d $a0, $a4, $a0 + add.d $a0, $a0, $s2 + addi.d $a0, $a0, 1 + sub.d $a1, $t2, $a2 + addi.d $a1, $a1, 1 + add.d $a2, $s6, $a2 + ori $a3, $zero, 95 + .p2align 4, , 16 +.LBB1_95: # %.preheader.i230 + # =>This Inner Loop Header: Depth=1 + ld.b $a4, $a0, 0 + slli.d $a5, $a4, 4 + st.b $a5, $a2, 0 + ld.b $a5, $a0, -1 + alsl.d $a4, $a4, $a5, 4 + andi $a5, $a4, 255 + addi.d $a5, $a5, -37 + sltui $a5, $a5, 1 + masknez $a4, $a4, $a5 + maskeqz $a5, $a3, $a5 + or $a4, $a5, $a4 + st.b $a4, $a2, 0 + addi.d $a0, $a0, 2 + addi.d $a1, $a1, -1 + addi.d $a2, $a2, 1 + bnez $a1, .LBB1_95 +.LBB1_96: # %sis_utf16_decode.exit237 + pcalau12i $a0, %pc_hi20(.L.str.173) + addi.d $a0, $a0, %pc_lo12(.L.str.173) + move $a1, $s6 + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 + pcalau12i $a0, %got_pc_hi20(cli_leavetemps_flag) + ld.d $a0, $a0, %got_pc_lo12(cli_leavetemps_flag) + ld.bu $a0, $a0, 0 + bnez $a0, .LBB1_41 + b .LBB1_37 +.LBB1_97: + pcalau12i $a0, %pc_hi20(.L.str.172) + addi.d $a0, $a0, %pc_lo12(.L.str.172) + pcaddu18i $ra, %call36(cli_errmsg) + jirl $ra, $ra, 0 + addi.w $a0, $zero, -124 + bnez $s5, .LBB1_122 + b .LBB1_84 +.LBB1_98: move $a0, $fp - b .LBB1_134 -.LBB1_111: + b .LBB1_133 +.LBB1_99: + pcalau12i $a0, %pc_hi20(.L.str.159) + addi.d $a0, $a0, %pc_lo12(.L.str.159) + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 + b .LBB1_102 +.LBB1_100: + pcalau12i $a0, %pc_hi20(.L.str.160) + addi.d $a0, $a0, %pc_lo12(.L.str.160) + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 + b .LBB1_102 +.LBB1_101: + pcalau12i $a0, %pc_hi20(.L.str.161) + addi.d $a0, $a0, %pc_lo12(.L.str.161) + move $a1, $fp + pcaddu18i $ra, %call36(cli_warnmsg) + jirl $ra, $ra, 0 +.LBB1_102: + bstrpick.d $a0, $fp, 15, 8 + slli.d $a0, $a0, 8 + pcalau12i $a1, %pc_hi20(.L.str.157) + addi.d $s5, $a1, %pc_lo12(.L.str.157) + beqz $a0, .LBB1_4 +# %bb.103: + ori $a1, $zero, 512 + beq $a0, $a1, .LBB1_106 +# %bb.104: + ori $a1, $zero, 256 + bne $a0, $a1, .LBB1_107 +# %bb.105: + pcalau12i $a0, %pc_hi20(.L.str.162) + addi.d $a0, $a0, %pc_lo12(.L.str.162) + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 + b .LBB1_4 +.LBB1_106: + pcalau12i $a0, %pc_hi20(.L.str.163) + addi.d $a0, $a0, %pc_lo12(.L.str.163) + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 + b .LBB1_4 +.LBB1_107: + ld.w $a1, $s8, 4 + pcalau12i $a0, %pc_hi20(.L.str.161) + addi.d $a0, $a0, %pc_lo12(.L.str.161) + pcaddu18i $ra, %call36(cli_warnmsg) + jirl $ra, $ra, 0 + b .LBB1_4 +.LBB1_108: + pcalau12i $a0, %pc_hi20(.L.str.193) + addi.d $a0, $a0, %pc_lo12(.L.str.193) + move $a1, $s7 + pcaddu18i $ra, %call36(cli_dbgmsg) + jirl $ra, $ra, 0 +.LBB1_109: + pcalau12i $a0, %pc_hi20(.L.str.174) + addi.d $a0, $a0, %pc_lo12(.L.str.174) + pcaddu18i $ra, %call36(cli_warnmsg) + jirl $ra, $ra, 0 + move $s6, $zero + b .LBB1_36 +.LBB1_110: pcalau12i $a0, %pc_hi20(.L.str.177) addi.d $a0, $a0, %pc_lo12(.L.str.177) - b .LBB1_113 -.LBB1_112: + b .LBB1_112 +.LBB1_111: pcalau12i $a0, %pc_hi20(.L.str.179) addi.d $a0, $a0, %pc_lo12(.L.str.179) -.LBB1_113: +.LBB1_112: pcaddu18i $ra, %call36(cli_errmsg) jirl $ra, $ra, 0 ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 addi.w $a0, $zero, -124 - b .LBB1_109 -.LBB1_114: + b .LBB1_84 +.LBB1_113: ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 addi.w $a0, $zero, -114 - b .LBB1_109 -.LBB1_115: # %vector.main.loop.iter.check + b .LBB1_84 +.LBB1_114: # %vector.main.loop.iter.check ori $a3, $zero, 31 vrepli.b $vr0, 37 - bgeu $s6, $a3, .LBB1_124 -# %bb.116: + bgeu $s6, $a3, .LBB1_123 +# %bb.115: move $a3, $zero - b .LBB1_128 -.LBB1_117: + b .LBB1_127 +.LBB1_116: pcalau12i $a0, %pc_hi20(.L.str.188) addi.d $a0, $a0, %pc_lo12(.L.str.188) move $a1, $s4 - b .LBB1_122 -.LBB1_118: + b .LBB1_121 +.LBB1_117: pcalau12i $a0, %pc_hi20(.L.str.189) addi.d $a0, $a0, %pc_lo12(.L.str.189) move $a1, $s3 @@ -1538,22 +1543,22 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 ld.d $a0, $sp, 120 # 8-byte Folded Reload - beqz $a0, .LBB1_120 -# %bb.119: + beqz $a0, .LBB1_119 +# %bb.118: move $a0, $s5 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 -.LBB1_120: +.LBB1_119: move $a0, $fp pcaddu18i $ra, %call36(close) jirl $ra, $ra, 0 addi.w $a0, $zero, -123 - b .LBB1_109 -.LBB1_121: + b .LBB1_84 +.LBB1_120: pcalau12i $a0, %pc_hi20(.L.str.192) addi.d $a0, $a0, %pc_lo12(.L.str.192) move $a1, $fp -.LBB1_122: +.LBB1_121: pcaddu18i $ra, %call36(cli_errmsg) jirl $ra, $ra, 0 ld.d $a0, $sp, 104 # 8-byte Folded Reload @@ -1564,15 +1569,15 @@ sis_extract_simple: # @sis_extract_simple jirl $ra, $ra, 0 addi.w $a0, $zero, -123 ld.d $a1, $sp, 120 # 8-byte Folded Reload - beqz $a1, .LBB1_109 -.LBB1_123: + beqz $a1, .LBB1_84 +.LBB1_122: move $fp, $a0 move $a0, $s5 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 move $a0, $fp - b .LBB1_109 -.LBB1_124: # %vector.ph + b .LBB1_84 +.LBB1_123: # %vector.ph st.d $t2, $sp, 80 # 8-byte Folded Spill andi $a1, $t3, 12 st.d $a1, $sp, 56 # 8-byte Folded Spill @@ -1584,7 +1589,7 @@ sis_extract_simple: # @sis_extract_simple addi.d $a5, $a5, 15 move $a6, $a3 move $a7, $s5 -.LBB1_125: # %vector.body +.LBB1_124: # %vector.body # =>This Inner Loop Header: Depth=1 ld.b $t0, $a5, -14 ld.b $t1, $a5, -12 @@ -1658,16 +1663,16 @@ sis_extract_simple: # @sis_extract_simple addi.d $a7, $a7, 16 addi.d $a6, $a6, -16 addi.d $a5, $a5, 32 - bnez $a6, .LBB1_125 -# %bb.126: # %middle.block + bnez $a6, .LBB1_124 +# %bb.125: # %middle.block ld.d $s2, $sp, 64 # 8-byte Folded Reload ld.d $t2, $sp, 80 # 8-byte Folded Reload ld.d $t3, $sp, 72 # 8-byte Folded Reload beq $a3, $t3, .LBB1_16 -# %bb.127: # %vec.epilog.iter.check +# %bb.126: # %vec.epilog.iter.check ld.d $a1, $sp, 56 # 8-byte Folded Reload - beqz $a1, .LBB1_145 -.LBB1_128: # %vec.epilog.ph + beqz $a1, .LBB1_144 +.LBB1_127: # %vec.epilog.ph move $a1, $a3 bstrpick.d $a2, $t3, 30, 2 slli.d $a3, $a2, 2 @@ -1677,7 +1682,7 @@ sis_extract_simple: # @sis_extract_simple alsl.d $a1, $a1, $a0, 1 add.d $a1, $a1, $s2 addi.d $a7, $a1, 3 -.LBB1_129: # %vec.epilog.vector.body +.LBB1_128: # %vec.epilog.vector.body # =>This Inner Loop Header: Depth=1 ld.b $a1, $a7, -2 ld.b $a2, $a7, 0 @@ -1703,17 +1708,17 @@ sis_extract_simple: # @sis_extract_simple addi.d $a5, $a5, 4 addi.d $a6, $a6, 4 addi.d $a7, $a7, 8 - bnez $a6, .LBB1_129 -# %bb.130: # %vec.epilog.middle.block + bnez $a6, .LBB1_128 +# %bb.129: # %vec.epilog.middle.block bne $a3, $t3, .LBB1_14 b .LBB1_16 -.LBB1_131: +.LBB1_130: pcalau12i $a0, %pc_hi20(.L.str.185) addi.d $a0, $a0, %pc_lo12(.L.str.185) pcaddu18i $ra, %call36(cli_errmsg) jirl $ra, $ra, 0 - b .LBB1_133 -.LBB1_132: + b .LBB1_132 +.LBB1_131: pcalau12i $a0, %pc_hi20(.L.str.186) addi.d $a0, $a0, %pc_lo12(.L.str.186) pcaddu18i $ra, %call36(cli_dbgmsg) @@ -1721,24 +1726,24 @@ sis_extract_simple: # @sis_extract_simple move $a0, $s5 pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 -.LBB1_133: +.LBB1_132: ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 move $a0, $s4 -.LBB1_134: +.LBB1_133: pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 addi.w $a0, $zero, -123 - b .LBB1_109 -.LBB1_135: # %vector.main.loop.iter.check34 + b .LBB1_84 +.LBB1_134: # %vector.main.loop.iter.check34 ori $a2, $zero, 31 - bgeu $s7, $a2, .LBB1_137 -# %bb.136: + bgeu $s7, $a2, .LBB1_136 +# %bb.135: move $a2, $zero move $s4, $s1 - b .LBB1_141 -.LBB1_137: # %vector.ph35 + b .LBB1_140 +.LBB1_136: # %vector.ph35 st.d $t2, $sp, 80 # 8-byte Folded Spill andi $a1, $t3, 12 st.d $a1, $sp, 56 # 8-byte Folded Spill @@ -1751,7 +1756,7 @@ sis_extract_simple: # @sis_extract_simple vrepli.b $vr0, 37 move $a6, $a2 move $a7, $s6 -.LBB1_138: # %vector.body38 +.LBB1_137: # %vector.body38 # =>This Inner Loop Header: Depth=1 ld.b $t0, $a5, -14 ld.b $t1, $a5, -12 @@ -1825,17 +1830,17 @@ sis_extract_simple: # @sis_extract_simple addi.d $a7, $a7, 16 addi.d $a6, $a6, -16 addi.d $a5, $a5, 32 - bnez $a6, .LBB1_138 -# %bb.139: # %middle.block41 + bnez $a6, .LBB1_137 +# %bb.138: # %middle.block41 move $s4, $s1 ld.d $s2, $sp, 64 # 8-byte Folded Reload ld.d $t2, $sp, 80 # 8-byte Folded Reload ld.d $t3, $sp, 72 # 8-byte Folded Reload - beq $a2, $t3, .LBB1_46 -# %bb.140: # %vec.epilog.iter.check45 + beq $a2, $t3, .LBB1_96 +# %bb.139: # %vec.epilog.iter.check45 ld.d $a1, $sp, 56 # 8-byte Folded Reload - beqz $a1, .LBB1_146 -.LBB1_141: # %vec.epilog.ph47 + beqz $a1, .LBB1_145 +.LBB1_140: # %vec.epilog.ph47 move $a1, $a2 bstrpick.d $a3, $t3, 30, 2 slli.d $a2, $a3, 2 @@ -1846,7 +1851,7 @@ sis_extract_simple: # @sis_extract_simple add.d $a1, $a1, $s2 addi.d $a7, $a1, 3 vrepli.b $vr0, 37 -.LBB1_142: # %vec.epilog.vector.body50 +.LBB1_141: # %vec.epilog.vector.body50 # =>This Inner Loop Header: Depth=1 ld.b $a1, $a7, -2 ld.b $a3, $a7, 0 @@ -1872,11 +1877,11 @@ sis_extract_simple: # @sis_extract_simple addi.d $a5, $a5, 4 addi.d $a6, $a6, 4 addi.d $a7, $a7, 8 - bnez $a6, .LBB1_142 -# %bb.143: # %vec.epilog.middle.block54 - bne $a2, $t3, .LBB1_44 - b .LBB1_46 -.LBB1_144: + bnez $a6, .LBB1_141 +# %bb.142: # %vec.epilog.middle.block54 + bne $a2, $t3, .LBB1_94 + b .LBB1_96 +.LBB1_143: ld.d $a0, $a3, 0 pcalau12i $a1, %pc_hi20(.L.str.184) addi.d $a1, $a1, %pc_lo12(.L.str.184) @@ -1888,13 +1893,13 @@ sis_extract_simple: # @sis_extract_simple pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 ori $a0, $zero, 1 - b .LBB1_109 -.LBB1_145: + b .LBB1_84 +.LBB1_144: slli.d $a4, $a3, 1 b .LBB1_14 -.LBB1_146: +.LBB1_145: slli.d $a4, $a2, 1 - b .LBB1_44 + b .LBB1_94 .Lfunc_end1: .size sis_extract_simple, .Lfunc_end1-sis_extract_simple .section .rodata,"a",@progbits diff --git a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/shared_sha256.s b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/shared_sha256.s index a7e3f88c..be589c77 100644 --- a/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/shared_sha256.s +++ b/results/MultiSource/Applications/ClamAV/CMakeFiles/clamscan.dir/shared_sha256.s @@ -651,12 +651,12 @@ sha256_transform: # @sha256_transform ld.w $t7, $a1, 8 ld.w $t0, $a1, 44 ld.w $a4, $a1, 12 - st.d $a4, $sp, 104 # 8-byte Folded Spill + st.d $a4, $sp, 112 # 8-byte Folded Spill ld.w $t2, $a1, 48 ld.w $a4, $a1, 16 st.d $a4, $sp, 88 # 8-byte Folded Spill ld.w $a4, $a1, 52 - st.d $a4, $sp, 112 # 8-byte Folded Spill + st.d $a4, $sp, 104 # 8-byte Folded Spill ld.w $a4, $a1, 20 st.d $a4, $sp, 72 # 8-byte Folded Spill ld.w $a4, $a1, 24 @@ -770,7 +770,7 @@ sha256_transform: # @sha256_transform st.d $t3, $sp, 16 # 8-byte Folded Spill bstrpick.d $t8, $t8, 53, 0 xor $t5, $t5, $t8 - ld.d $a5, $sp, 104 # 8-byte Folded Reload + ld.d $a5, $sp, 112 # 8-byte Folded Reload rotri.w $t8, $a5, 7 rotri.w $s1, $a5, 18 xor $t8, $t8, $s1 @@ -832,7 +832,7 @@ sha256_transform: # @sha256_transform ld.w $t5, $t6, 12 vpickve2gr.w $t8, $vr5, 1 add.w $a5, $t4, $t8 - st.d $a5, $sp, 104 # 8-byte Folded Spill + st.d $a5, $sp, 112 # 8-byte Folded Spill st.w $a5, $a1, 12 add.d $t5, $t5, $s4 add.d $t5, $t5, $a5 @@ -871,8 +871,7 @@ sha256_transform: # @sha256_transform vxor.v $vr6, $vr6, $vr7 vsrl.w $vr5, $vr5, $vr0 vxor.v $vr5, $vr6, $vr5 - ld.d $a5, $sp, 112 # 8-byte Folded Reload - st.d $a5, $sp, 112 # 8-byte Folded Spill + ld.d $a5, $sp, 104 # 8-byte Folded Reload add.d $t5, $a5, $s1 vpickve2gr.w $t8, $vr5, 0 add.d $t5, $t5, $t8 @@ -1132,7 +1131,7 @@ sha256_transform: # @sha256_transform st.w $a2, $a1, 36 ld.w $t8, $t6, 40 add.d $a6, $t5, $t0 - ld.d $a3, $sp, 104 # 8-byte Folded Reload + ld.d $a3, $sp, 112 # 8-byte Folded Reload add.d $a6, $a6, $a3 add.w $a6, $a6, $t1 add.d $t1, $a6, $t8 @@ -1206,7 +1205,7 @@ sha256_transform: # @sha256_transform xor $t5, $t5, $t8 bstrpick.d $t8, $a6, 31, 10 xor $t5, $t5, $t8 - ld.d $a3, $sp, 112 # 8-byte Folded Reload + ld.d $a3, $sp, 104 # 8-byte Folded Reload rotri.w $t8, $a3, 7 rotri.w $s6, $a3, 18 xor $t8, $t8, $s6 @@ -1275,7 +1274,7 @@ sha256_transform: # @sha256_transform xor $t5, $t5, $t8 bstrpick.d $t8, $t4, 31, 3 xor $t5, $t5, $t8 - st.d $a7, $sp, 112 # 8-byte Folded Spill + st.d $a7, $sp, 104 # 8-byte Folded Spill st.w $a7, $a1, 52 add.d $a7, $t5, $s7 ld.w $t5, $t6, 56 diff --git a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s index d7d6dcbe..641b7dd6 100644 --- a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s +++ b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/erc_do_p.s @@ -3776,6 +3776,8 @@ buildPredRegionYUV: # @buildPredRegionYUV addi.d $a0, $a4, 1 st.d $a0, $sp, 72 # 8-byte Folded Spill st.d $fp, $sp, 16 # 8-byte Folded Spill + ld.d $s8, $sp, 288 # 8-byte Folded Reload + ld.d $s4, $sp, 152 # 8-byte Folded Reload .p2align 4, , 16 .LBB23_7: # %.preheader174.us # =>This Loop Header: Depth=1 @@ -3835,7 +3837,6 @@ buildPredRegionYUV: # @buildPredRegionYUV ld.d $a6, $sp, 160 # 8-byte Folded Reload add.w $a3, $a6, $a5 div.w $a3, $a3, $a4 - ld.d $s8, $sp, 288 # 8-byte Folded Reload srai.d $t1, $a3, 63 andn $a3, $a3, $t1 slt $t1, $a3, $s2 @@ -3934,7 +3935,6 @@ buildPredRegionYUV: # @buildPredRegionYUV slli.d $s1, $s1, 1 slli.d $a2, $s5, 1 slli.d $ra, $s7, 1 - ld.d $s4, $sp, 152 # 8-byte Folded Reload ld.d $s3, $sp, 104 # 8-byte Folded Reload ld.d $s6, $sp, 176 # 8-byte Folded Reload .p2align 4, , 16 diff --git a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/image.s b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/image.s index 8f0b941e..3b0acdf5 100644 --- a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/image.s +++ b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/image.s @@ -5108,6 +5108,7 @@ get_block: # @get_block ori $s0, $zero, 20 move $s2, $t1 ld.d $a2, $sp, 16 # 8-byte Folded Reload + ld.d $ra, $sp, 56 # 8-byte Folded Reload .p2align 4, , 16 .LBB6_31: # =>This Inner Loop Header: Depth=1 addi.w $a4, $s2, 0 @@ -5165,7 +5166,6 @@ get_block: # @get_block maskeqz $a4, $a4, $a7 masknez $a7, $t0, $a7 or $a4, $a4, $a7 - ld.d $ra, $sp, 56 # 8-byte Folded Reload add.d $a7, $ra, $t3 slli.d $s4, $a5, 1 ldx.hu $a5, $t5, $s4 diff --git a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s index 280b3cc3..bdee2f5d 100644 --- a/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s +++ b/results/MultiSource/Applications/JM/ldecod/CMakeFiles/ldecod.dir/macroblock.s @@ -3725,6 +3725,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ori $s2, $zero, 4 ld.d $a4, $sp, 328 # 8-byte Folded Reload ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $s0, $sp, 496 # 8-byte Folded Reload b .LBB12_166 .p2align 4, , 16 .LBB12_165: # in Loop: Header=BB12_166 Depth=1 @@ -3756,7 +3757,6 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ld.d $a1, $sp, 280 # 8-byte Folded Reload ldx.bu $a1, $a1, $a0 andi $a1, $a1, 253 - ld.d $s0, $sp, 496 # 8-byte Folded Reload bnez $a1, .LBB12_167 # %bb.169: # in Loop: Header=BB12_168 Depth=2 ld.d $a1, $sp, 272 # 8-byte Folded Reload @@ -3997,6 +3997,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL lu12i.w $a0, 77 ori $s2, $a0, 1560 ori $s3, $zero, 4 + ld.d $fp, $sp, 496 # 8-byte Folded Reload b .LBB12_200 .p2align 4, , 16 .LBB12_199: # in Loop: Header=BB12_200 Depth=1 @@ -4028,7 +4029,6 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ld.d $a1, $sp, 280 # 8-byte Folded Reload ldx.bu $a1, $a1, $a0 addi.d $a1, $a1, -1 - ld.d $fp, $sp, 496 # 8-byte Folded Reload ori $a2, $zero, 1 bltu $a2, $a1, .LBB12_201 # %bb.203: # in Loop: Header=BB12_202 Depth=2 @@ -4083,6 +4083,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL move $a2, $zero ori $s7, $a5, 1560 ld.d $a0, $sp, 144 # 8-byte Folded Reload + ld.d $s3, $sp, 496 # 8-byte Folded Reload b .LBB12_210 .p2align 4, , 16 .LBB12_209: # in Loop: Header=BB12_210 Depth=1 @@ -4117,7 +4118,6 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ld.d $a1, $sp, 280 # 8-byte Folded Reload ldx.bu $a1, $a1, $a0 addi.d $a1, $a1, -1 - ld.d $s3, $sp, 496 # 8-byte Folded Reload bltu $s6, $a1, .LBB12_211 # %bb.213: # in Loop: Header=BB12_212 Depth=2 ld.d $a1, $sp, 272 # 8-byte Folded Reload @@ -4221,11 +4221,11 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ori $a1, $zero, 56 mul.d $a1, $a3, $a1 add.d $a1, $a2, $a1 - st.d $a1, $sp, 448 # 8-byte Folded Spill + st.d $a1, $sp, 464 # 8-byte Folded Spill ld.d $a5, $sp, 272 # 8-byte Folded Reload beqz $a0, .LBB12_226 # %bb.225: - ld.d $a0, $sp, 448 # 8-byte Folded Reload + ld.d $a0, $sp, 464 # 8-byte Folded Reload ld.d $a0, $a0, 0 ld.w $a0, $a0, 24 sltui $a1, $a0, 1 @@ -4279,7 +4279,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL lu12i.w $a0, 2 ori $a0, $a0, 1807 st.d $a0, $sp, 192 # 8-byte Folded Spill - st.d $ra, $sp, 416 # 8-byte Folded Spill + st.d $ra, $sp, 424 # 8-byte Folded Spill b .LBB12_229 .p2align 4, , 16 .LBB12_228: # in Loop: Header=BB12_229 Depth=1 @@ -4401,7 +4401,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL # in Loop: Header=BB12_232 Depth=2 pcalau12i $a2, %got_pc_hi20(dec_picture) ld.d $a2, $a2, %got_pc_lo12(dec_picture) - st.d $a2, $sp, 480 # 8-byte Folded Spill + st.d $a2, $sp, 472 # 8-byte Folded Spill ld.d $a2, $a2, 0 ldx.d $a2, $a2, $ra ld.d $a2, $a2, 0 @@ -4455,7 +4455,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL .LBB12_236: # %._crit_edge.split.us.split.us.us.us.us # in Loop: Header=BB12_237 Depth=3 ld.d $a0, $sp, 304 # 8-byte Folded Reload - ld.d $a6, $sp, 464 # 8-byte Folded Reload + ld.d $a6, $sp, 480 # 8-byte Folded Reload add.d $a6, $a6, $a0 ld.d $a0, $sp, 296 # 8-byte Folded Reload ld.d $a4, $sp, 336 # 8-byte Folded Reload @@ -4482,16 +4482,17 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL # Child Loop BB12_253 Depth 6 # Child Loop BB12_256 Depth 6 ld.w $a0, $s2, 76 - st.d $a6, $sp, 464 # 8-byte Folded Spill - add.d $a0, $a6, $a0 - st.d $a0, $sp, 456 # 8-byte Folded Spill + st.d $a6, $sp, 480 # 8-byte Folded Spill + add.d $s6, $a6, $a0 st.d $a1, $sp, 360 # 8-byte Folded Spill move $t6, $a1 st.d $a2, $sp, 352 # 8-byte Folded Spill move $t7, $a2 st.d $a3, $sp, 344 # 8-byte Folded Spill + move $s2, $a3 st.d $a4, $sp, 336 # 8-byte Folded Spill - move $s2, $a4 + move $s3, $a4 + st.d $s6, $sp, 416 # 8-byte Folded Spill b .LBB12_239 .p2align 4, , 16 .LBB12_238: # %._crit_edge1011.split.us.us.us.us.us.us.us.us.1 @@ -4499,9 +4500,9 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ld.d $a0, $sp, 408 # 8-byte Folded Reload add.d $s4, $s4, $a0 ld.d $a0, $sp, 368 # 8-byte Folded Reload + add.d $s3, $s3, $a0 + ld.d $s2, $sp, 440 # 8-byte Folded Reload add.d $s2, $s2, $a0 - ld.d $a3, $sp, 472 # 8-byte Folded Reload - add.d $a3, $a3, $a0 add.d $t7, $t7, $a0 add.d $t6, $t6, $a0 ld.d $a0, $sp, 392 # 8-byte Folded Reload @@ -4517,16 +4518,15 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL # Child Loop BB12_250 Depth 5 # Child Loop BB12_253 Depth 6 # Child Loop BB12_256 Depth 6 - st.d $a3, $sp, 472 # 8-byte Folded Spill - st.d $t7, $sp, 432 # 8-byte Folded Spill - st.d $t6, $sp, 440 # 8-byte Folded Spill - ld.d $a0, $sp, 480 # 8-byte Folded Reload - ld.d $a0, $a0, 0 - move $s1, $s4 - ld.d $s4, $sp, 448 # 8-byte Folded Reload + st.d $s3, $sp, 432 # 8-byte Folded Spill + st.d $t7, $sp, 448 # 8-byte Folded Spill + st.d $t6, $sp, 456 # 8-byte Folded Spill + ld.d $s1, $sp, 472 # 8-byte Folded Reload + ld.d $a0, $s1, 0 + ld.d $s3, $sp, 464 # 8-byte Folded Reload ld.d $s6, $sp, 496 # 8-byte Folded Reload ld.w $a1, $s6, 92 - st.d $a1, $sp, 424 # 8-byte Folded Spill + st.d $a1, $sp, 440 # 8-byte Folded Spill add.d $a1, $a0, $ra ldx.d $a4, $a0, $ra ld.d $a5, $a1, 24 @@ -4538,44 +4538,43 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL move $a0, $s6 ld.d $a2, $sp, 400 # 8-byte Folded Reload move $a3, $zero - move $a6, $s1 - ld.d $s5, $sp, 464 # 8-byte Folded Reload + move $a6, $s4 + ld.d $s5, $sp, 480 # 8-byte Folded Reload move $a7, $s5 pcaddu18i $ra, %call36(SetMotionVectorPredictor) jirl $ra, $ra, 0 - stptr.w $s1, $s6, 5608 + stptr.w $s4, $s6, 5608 stptr.w $s5, $s6, 5612 ori $s5, $zero, 254 st.w $zero, $sp, 592 - ld.d $a3, $s4, 48 + ld.d $a3, $s3, 48 addi.d $a0, $sp, 584 move $a1, $s6 - ld.d $s3, $sp, 488 # 8-byte Folded Reload - ld.d $s6, $sp, 456 # 8-byte Folded Reload - move $a2, $s4 - move $s4, $s1 + ld.d $s6, $sp, 416 # 8-byte Folded Reload + move $a2, $s3 + ld.d $s3, $sp, 432 # 8-byte Folded Reload jirl $ra, $a3, 0 - ld.d $a0, $sp, 480 # 8-byte Folded Reload - ld.d $a0, $a0, 0 - ldx.d $a1, $a0, $s3 + ld.d $a0, $s1, 0 + ld.d $a1, $sp, 488 # 8-byte Folded Reload + ldx.d $a1, $a0, $a1 ld.w $a0, $sp, 588 ld.h $a2, $sp, 560 ld.d $a3, $a1, 0 move $a1, $zero add.d $a2, $a2, $a0 alsl.d $a3, $s6, $a3, 3 - ld.d $a4, $sp, 424 # 8-byte Folded Reload - add.d $a4, $s1, $a4 + ld.d $a4, $sp, 440 # 8-byte Folded Reload + add.d $a4, $s4, $a4 slli.d $s1, $a4, 3 - ld.d $a4, $sp, 472 # 8-byte Folded Reload - move $a5, $s2 + st.d $s2, $sp, 440 # 8-byte Folded Spill + move $a5, $s3 b .LBB12_241 .p2align 4, , 16 .LBB12_240: # %._crit_edge.us.us.us.us.us.us.us.us # in Loop: Header=BB12_241 Depth=5 addi.d $a1, $a1, 1 addi.d $a5, $a5, 32 - addi.d $a4, $a4, 32 + addi.d $s2, $s2, 32 beq $a1, $s7, .LBB12_248 .LBB12_241: # %.preheader945.us.us.us.us.us.us.us.us # Parent Loop BB12_229 Depth=1 @@ -4628,7 +4627,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL beq $s0, $s8, .LBB12_240 .LBB12_246: # %scalar.ph1817.preheader # in Loop: Header=BB12_241 Depth=5 - alsl.d $a7, $t0, $a4, 3 + alsl.d $a7, $t0, $s2, 3 alsl.d $a6, $t0, $a6, 3 sub.d $t0, $s8, $t0 .p2align 4, , 16 @@ -4652,15 +4651,15 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL # in Loop: Header=BB12_239 Depth=4 ld.d $a1, $sp, 496 # 8-byte Folded Reload stptr.w $s4, $a1, 5608 - ld.d $a0, $sp, 464 # 8-byte Folded Reload + ld.d $a0, $sp, 480 # 8-byte Folded Reload stptr.w $a0, $a1, 5612 ori $a0, $zero, 2 st.w $a0, $sp, 592 - ld.d $a2, $sp, 448 # 8-byte Folded Reload + ld.d $a2, $sp, 464 # 8-byte Folded Reload ld.d $a3, $a2, 48 addi.d $a0, $sp, 584 jirl $ra, $a3, 0 - ld.d $a0, $sp, 480 # 8-byte Folded Reload + ld.d $a0, $sp, 472 # 8-byte Folded Reload ld.d $a0, $a0, 0 ld.d $t8, $sp, 488 # 8-byte Folded Reload ldx.d $a1, $a0, $t8 @@ -4669,13 +4668,12 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL ld.d $a3, $a1, 0 move $a1, $zero add.d $a2, $a2, $a0 - ld.d $a4, $sp, 456 # 8-byte Folded Reload - alsl.d $a3, $a4, $a3, 3 - ld.d $t6, $sp, 440 # 8-byte Folded Reload + alsl.d $a3, $s6, $a3, 3 + ld.d $t6, $sp, 456 # 8-byte Folded Reload move $a4, $t6 - ld.d $t7, $sp, 432 # 8-byte Folded Reload + ld.d $t7, $sp, 448 # 8-byte Folded Reload move $a5, $t7 - ld.d $ra, $sp, 416 # 8-byte Folded Reload + ld.d $ra, $sp, 424 # 8-byte Folded Reload b .LBB12_250 .p2align 4, , 16 .LBB12_249: # %._crit_edge.us.us.us.us.us.us.us.us.1 @@ -5112,7 +5110,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL pcaddu18i $ra, %call36(error) jirl $ra, $ra, 0 move $t8, $s3 - ld.d $ra, $sp, 416 # 8-byte Folded Reload + ld.d $ra, $sp, 424 # 8-byte Folded Reload ld.d $a0, $sp, 64 # 8-byte Folded Reload ld.d $a1, $sp, 184 # 8-byte Folded Reload bnez $a1, .LBB12_284 @@ -5314,7 +5312,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL st.d $a6, $sp, 312 # 8-byte Folded Spill slli.d $a1, $a6, 5 st.d $a1, $sp, 304 # 8-byte Folded Spill - st.d $a5, $sp, 424 # 8-byte Folded Spill + st.d $a5, $sp, 416 # 8-byte Folded Spill slli.d $a1, $a5, 3 st.d $a1, $sp, 376 # 8-byte Folded Spill andi $fp, $a0, 255 @@ -5371,7 +5369,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL .p2align 4, , 16 .LBB12_309: # %._crit_edge1080.split.us.us.us.us.us.us.us.us.us.1 # in Loop: Header=BB12_310 Depth=4 - ld.d $a0, $sp, 424 # 8-byte Folded Reload + ld.d $a0, $sp, 416 # 8-byte Folded Reload ld.d $a6, $sp, 480 # 8-byte Folded Reload add.d $a6, $a6, $a0 ld.d $a0, $sp, 376 # 8-byte Folded Reload @@ -5549,7 +5547,7 @@ readMotionInfoFromNAL: # @readMotionInfoFromNAL move $a4, $t6 ld.d $t7, $sp, 448 # 8-byte Folded Reload move $a5, $t7 - ld.d $ra, $sp, 416 # 8-byte Folded Reload + ld.d $ra, $sp, 424 # 8-byte Folded Reload b .LBB12_321 .p2align 4, , 16 .LBB12_320: # %._crit_edge1076.us.us.us.us.us.us.us.us.us.1 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/block.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/block.s index e9b3b130..5f2efbb6 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/block.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/block.s @@ -10607,7 +10607,8 @@ dct_chroma_sp: # @dct_chroma_sp addi.d $s1, $t3, 16 pcalau12i $a1, %pc_hi20(dequant_coef) addi.d $a1, $a1, %pc_lo12(dequant_coef) - add.d $a4, $a1, $a2 + add.d $a2, $a1, $a2 + st.d $a2, $sp, 408 # 8-byte Folded Spill ld.d $a2, $sp, 208 # 8-byte Folded Reload slli.d $a2, $a2, 2 st.d $a2, $sp, 304 # 8-byte Folded Spill @@ -10628,7 +10629,6 @@ dct_chroma_sp: # @dct_chroma_sp ld.d $a5, $sp, 176 # 8-byte Folded Reload ld.d $s0, $sp, 296 # 8-byte Folded Reload ld.d $t2, $sp, 288 # 8-byte Folded Reload - st.d $a4, $sp, 408 # 8-byte Folded Spill move $t5, $a1 st.d $a1, $sp, 280 # 8-byte Folded Spill st.d $t8, $sp, 416 # 8-byte Folded Spill diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/image.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/image.s index f86a42f4..47bbd6ef 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/image.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/image.s @@ -2152,7 +2152,7 @@ encode_one_frame: # @encode_one_frame b .LBB2_265 .LBB2_160: pcalau12i $s8, %pc_hi20(mb_adaptive) - st.d $s8, $sp, 160 # 8-byte Folded Spill + st.d $s8, $sp, 168 # 8-byte Folded Spill beqz $a1, .LBB2_168 # %bb.161: # %.thread361 pcalau12i $fp, %pc_hi20(generic_RC) @@ -2295,16 +2295,16 @@ encode_one_frame: # @encode_one_frame ld.w $a2, $a1, 36 st.d $a2, $sp, 192 # 8-byte Folded Spill pcalau12i $a2, %pc_hi20(intras) - st.d $a2, $sp, 152 # 8-byte Folded Spill + st.d $a2, $sp, 160 # 8-byte Folded Spill ld.w $a2, $a2, %pc_lo12(intras) - st.d $a2, $sp, 128 # 8-byte Folded Spill + st.d $a2, $sp, 136 # 8-byte Folded Spill ld.w $a3, $a1, 20 lu12i.w $a2, 3 ori $a4, $a2, 3320 ldptr.w $a2, $a0, 5116 st.d $a4, $sp, 112 # 8-byte Folded Spill ldx.w $a0, $a1, $a4 - st.d $a0, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill pcalau12i $s8, %pc_hi20(quadratic_RC_best) pcalau12i $s0, %pc_hi20(generic_RC_best) st.d $a3, $sp, 104 # 8-byte Folded Spill @@ -2325,11 +2325,11 @@ encode_one_frame: # @encode_one_frame ld.d $a1, $a0, 0 ld.w $a0, $a1, 20 .LBB2_182: - st.d $s8, $sp, 144 # 8-byte Folded Spill + st.d $s8, $sp, 152 # 8-byte Folded Spill ori $a2, $zero, 2 pcalau12i $a3, %pc_hi20(frame_pic) st.d $a3, $sp, 120 # 8-byte Folded Spill - st.d $s0, $sp, 136 # 8-byte Folded Spill + st.d $s0, $sp, 144 # 8-byte Folded Spill beq $a0, $a2, .LBB2_186 # %bb.183: ld.d $a2, $s6, 0 @@ -2420,20 +2420,20 @@ encode_one_frame: # @encode_one_frame # %bb.192: ld.d $s6, $sp, 304 # 8-byte Folded Reload ld.d $a0, $s6, 0 - ld.d $a2, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 160 # 8-byte Folded Reload ld.w $a2, $a2, %pc_lo12(intras) - st.d $a2, $sp, 128 # 8-byte Folded Spill + st.d $a2, $sp, 136 # 8-byte Folded Spill ld.d $a2, $s1, 0 ldptr.w $a0, $a0, 5116 ld.d $a3, $sp, 112 # 8-byte Folded Reload ldx.w $a3, $a1, $a3 - st.d $a3, $sp, 168 # 8-byte Folded Spill + st.d $a3, $sp, 128 # 8-byte Folded Spill ld.d $a3, $sp, 120 # 8-byte Folded Reload st.d $a2, $a3, %pc_lo12(frame_pic) - ld.d $s0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 144 # 8-byte Folded Reload beqz $a0, .LBB2_194 # %bb.193: - ld.d $a0, $sp, 144 # 8-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(quadratic_RC_best) pcalau12i $a1, %pc_hi20(quadratic_RC) ld.d $a1, $a1, %pc_lo12(quadratic_RC) @@ -2465,7 +2465,7 @@ encode_one_frame: # @encode_one_frame .LBB2_197: move $a0, $zero ld.d $s6, $sp, 304 # 8-byte Folded Reload - ld.d $s0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 144 # 8-byte Folded Reload .LBB2_198: ld.d $a2, $sp, 216 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(enc_frame_picture) @@ -2501,8 +2501,8 @@ encode_one_frame: # @encode_one_frame st.w $a2, $a1, 36 .LBB2_204: ld.d $a2, $s4, 0 - ld.d $a3, $sp, 152 # 8-byte Folded Reload - ld.d $a4, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 160 # 8-byte Folded Reload + ld.d $a4, $sp, 136 # 8-byte Folded Reload st.w $a4, $a3, %pc_lo12(intras) ld.d $a3, $sp, 120 # 8-byte Folded Reload st.d $a2, $a3, %pc_lo12(frame_pic) @@ -2530,7 +2530,7 @@ encode_one_frame: # @encode_one_frame ld.d $a0, $a0, %got_pc_lo12(PicParSet) b .LBB2_224 .LBB2_209: - ld.d $a0, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 160 # 8-byte Folded Reload ld.w $a0, $a0, %pc_lo12(intras) ldptr.w $a2, $a1, 15352 ori $a3, $zero, 100 @@ -2625,8 +2625,6 @@ encode_one_frame: # @encode_one_frame stptr.w $zero, $a1, 15408 .LBB2_227: st.d $fp, $sp, 120 # 8-byte Folded Spill - ld.d $a0, $sp, 168 # 8-byte Folded Reload - st.d $a0, $sp, 168 # 8-byte Folded Spill move $fp, $s5 move $s5, $s1 ld.d $a0, $s6, 0 @@ -2698,7 +2696,7 @@ encode_one_frame: # @encode_one_frame slli.w $a0, $a0, 1 .LBB2_232: stptr.w $a0, $a1, 14260 - ld.d $s0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 144 # 8-byte Folded Reload ld.d $a2, $s6, 0 ldptr.w $a2, $a2, 5116 beqz $a2, .LBB2_237 @@ -2707,7 +2705,7 @@ encode_one_frame: # @encode_one_frame move $s1, $s5 bne $a0, $a2, .LBB2_235 # %bb.234: - ld.d $a0, $sp, 144 # 8-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(quadratic_RC_best) pcalau12i $a1, %pc_hi20(quadratic_RC) ld.d $a1, $a1, %pc_lo12(quadratic_RC) @@ -2730,7 +2728,7 @@ encode_one_frame: # @encode_one_frame ldx.w $fp, $a1, $a0 ld.d $a0, $s6, 0 ldptr.w $a2, $a0, 5116 - ld.d $a3, $sp, 144 # 8-byte Folded Reload + ld.d $a3, $sp, 152 # 8-byte Folded Reload bnez $a2, .LBB2_242 b .LBB2_243 .LBB2_237: @@ -2754,14 +2752,14 @@ encode_one_frame: # @encode_one_frame st.d $a0, $s8, %pc_lo12(active_pps) st.w $fp, $a1, 36 .LBB2_240: - ld.d $a0, $sp, 152 # 8-byte Folded Reload - ld.d $a2, $sp, 128 # 8-byte Folded Reload + ld.d $a0, $sp, 160 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload st.w $a2, $a0, %pc_lo12(intras) .LBB2_241: - ld.d $fp, $sp, 168 # 8-byte Folded Reload + ld.d $fp, $sp, 128 # 8-byte Folded Reload ld.d $a0, $s6, 0 ldptr.w $a2, $a0, 5116 - ld.d $a3, $sp, 144 # 8-byte Folded Reload + ld.d $a3, $sp, 152 # 8-byte Folded Reload beqz $a2, .LBB2_243 .LBB2_242: pcalau12i $a0, %pc_hi20(quadratic_RC) @@ -2818,7 +2816,7 @@ encode_one_frame: # @encode_one_frame ldptr.w $a1, $a0, 4708 beqz $a1, .LBB2_253 # %bb.252: - ld.d $a1, $sp, 160 # 8-byte Folded Reload + ld.d $a1, $sp, 168 # 8-byte Folded Reload st.w $zero, $a1, %pc_lo12(mb_adaptive) .LBB2_253: ldptr.w $a1, $a0, 4704 @@ -4692,7 +4690,7 @@ encode_one_frame: # @encode_one_frame ld.d $a2, $a2, 0 ldptr.w $a3, $a1, 15260 st.d $a2, $s8, %pc_lo12(active_pps) - ld.d $s0, $sp, 136 # 8-byte Folded Reload + ld.d $s0, $sp, 144 # 8-byte Folded Reload bnez $a3, .LBB2_217 # %bb.470: ld.w $a2, $a1, 36 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s index 58579f21..731686f9 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/macroblock.s @@ -3754,23 +3754,23 @@ LumaPrediction4x4Bi: # @LumaPrediction4x4Bi .type LumaResidualCoding8x8,@function LumaResidualCoding8x8: # @LumaResidualCoding8x8 # %bb.0: - addi.d $sp, $sp, -320 - st.d $ra, $sp, 312 # 8-byte Folded Spill - st.d $fp, $sp, 304 # 8-byte Folded Spill - st.d $s0, $sp, 296 # 8-byte Folded Spill - st.d $s1, $sp, 288 # 8-byte Folded Spill - st.d $s2, $sp, 280 # 8-byte Folded Spill - st.d $s3, $sp, 272 # 8-byte Folded Spill - st.d $s4, $sp, 264 # 8-byte Folded Spill - st.d $s5, $sp, 256 # 8-byte Folded Spill - st.d $s6, $sp, 248 # 8-byte Folded Spill - st.d $s7, $sp, 240 # 8-byte Folded Spill - st.d $s8, $sp, 232 # 8-byte Folded Spill + addi.d $sp, $sp, -304 + st.d $ra, $sp, 296 # 8-byte Folded Spill + st.d $fp, $sp, 288 # 8-byte Folded Spill + st.d $s0, $sp, 280 # 8-byte Folded Spill + st.d $s1, $sp, 272 # 8-byte Folded Spill + st.d $s2, $sp, 264 # 8-byte Folded Spill + st.d $s3, $sp, 256 # 8-byte Folded Spill + st.d $s4, $sp, 248 # 8-byte Folded Spill + st.d $s5, $sp, 240 # 8-byte Folded Spill + st.d $s6, $sp, 232 # 8-byte Folded Spill + st.d $s7, $sp, 224 # 8-byte Folded Spill + st.d $s8, $sp, 216 # 8-byte Folded Spill move $t3, $a3 move $t4, $a2 st.d $a1, $sp, 80 # 8-byte Folded Spill st.d $a0, $sp, 72 # 8-byte Folded Spill - st.w $zero, $sp, 228 + st.w $zero, $sp, 212 slli.d $t2, $a2, 2 bstrpick.d $a0, $t2, 31, 3 slli.w $t0, $a0, 3 @@ -3780,13 +3780,13 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 pcalau12i $a1, %got_pc_hi20(img) ld.d $s2, $a1, %got_pc_lo12(img) ld.d $a1, $s2, 0 - st.d $zero, $sp, 120 # 8-byte Folded Spill + st.d $zero, $sp, 104 # 8-byte Folded Spill bnez $a2, .LBB8_2 # %bb.1: ld.w $a2, $a1, 20 addi.d $a2, $a2, -1 sltu $a2, $zero, $a2 - st.d $a2, $sp, 120 # 8-byte Folded Spill + st.d $a2, $sp, 104 # 8-byte Folded Spill .LBB8_2: ld.w $a2, $a1, 12 ldptr.d $a1, $a1, 14224 @@ -3817,9 +3817,9 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 st.d $t2, $sp, 32 # 8-byte Folded Spill ori $a0, $t2, 4 addi.w $a0, $a0, 0 - st.d $a0, $sp, 128 # 8-byte Folded Spill + st.d $a0, $sp, 112 # 8-byte Folded Spill addi.d $a0, $a4, 4 - st.d $a0, $sp, 152 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill slli.d $a0, $t0, 5 lu12i.w $a2, 3 pcalau12i $s7, %pc_hi20(imgY_org) @@ -3828,53 +3828,53 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 st.d $a3, $sp, 56 # 8-byte Folded Spill pcalau12i $a3, %pc_hi20(sp2_frame_indicator) st.d $a3, $sp, 48 # 8-byte Folded Spill - st.d $a4, $sp, 160 # 8-byte Folded Spill - vst $vr2, $sp, 208 # 16-byte Folded Spill + st.d $a4, $sp, 144 # 8-byte Folded Spill + vst $vr2, $sp, 192 # 16-byte Folded Spill st.d $t0, $sp, 40 # 8-byte Folded Spill st.d $a0, $sp, 16 # 8-byte Folded Spill - st.d $t1, $sp, 200 # 8-byte Folded Spill - st.d $t3, $sp, 192 # 8-byte Folded Spill - st.d $a5, $sp, 184 # 8-byte Folded Spill + st.d $t1, $sp, 184 # 8-byte Folded Spill + st.d $t3, $sp, 176 # 8-byte Folded Spill + st.d $a5, $sp, 168 # 8-byte Folded Spill beqz $a1, .LBB8_19 # %bb.3: # %.preheader160.preheader - st.d $t4, $sp, 96 # 8-byte Folded Spill + st.d $t4, $sp, 8 # 8-byte Folded Spill bstrins.d $a0, $t4, 4, 4 ori $a1, $a2, 440 add.d $fp, $a0, $a1 ori $s3, $a2, 1056 move $s1, $t0 move $a0, $t0 - st.d $s2, $sp, 112 # 8-byte Folded Spill - st.d $a7, $sp, 104 # 8-byte Folded Spill - st.d $a6, $sp, 176 # 8-byte Folded Spill - st.d $s7, $sp, 168 # 8-byte Folded Spill + st.d $s2, $sp, 96 # 8-byte Folded Spill + st.d $a7, $sp, 88 # 8-byte Folded Spill + st.d $a6, $sp, 160 # 8-byte Folded Spill + st.d $s7, $sp, 152 # 8-byte Folded Spill + ld.d $s2, $sp, 96 # 8-byte Folded Reload + ld.d $s4, $sp, 184 # 8-byte Folded Reload + ld.d $s8, $sp, 168 # 8-byte Folded Reload + ld.d $s0, $sp, 88 # 8-byte Folded Reload .p2align 4, , 16 .LBB8_4: # %.preheader160 # =>This Inner Loop Header: Depth=1 - ld.d $s2, $sp, 112 # 8-byte Folded Reload ld.d $a1, $s2, 0 ld.w $a2, $a1, 196 ld.w $a1, $a1, 192 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill add.d $s7, $a0, $a2 add.d $s6, $a4, $a1 move $a0, $a4 move $a1, $s1 - ld.d $s5, $sp, 192 # 8-byte Folded Reload + ld.d $s5, $sp, 176 # 8-byte Folded Reload move $a2, $s5 - ld.d $s4, $sp, 200 # 8-byte Folded Reload move $a3, $s4 - ld.d $s8, $sp, 184 # 8-byte Folded Reload move $a4, $s8 - ld.d $a5, $sp, 176 # 8-byte Folded Reload - ld.d $s0, $sp, 104 # 8-byte Folded Reload + ld.d $a5, $sp, 160 # 8-byte Folded Reload move $a6, $s0 pcaddu18i $ra, %call36(LumaPrediction4x4) jirl $ra, $ra, 0 - ld.d $a0, $sp, 168 # 8-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(imgY_org) slli.d $a1, $s7, 3 - st.d $a1, $sp, 136 # 8-byte Folded Spill + st.d $a1, $sp, 120 # 8-byte Folded Spill ldx.d $a1, $a0, $a1 ld.d $a2, $s2, 0 alsl.d $a0, $s7, $a0, 3 @@ -3884,11 +3884,11 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a5, $a0, 8 ld.d $a6, $a4, -104 vinsgr2vr.d $vr0, $a1, 0 - vld $vr1, $sp, 208 # 16-byte Folded Reload + vld $vr1, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr1, $vr0 ldx.d $a1, $a5, $a3 vinsgr2vr.d $vr1, $a6, 0 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr1, $vr2, $vr1 vsub.w $vr0, $vr0, $vr1 vinsgr2vr.d $vr1, $a1, 0 @@ -3898,50 +3898,50 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 vst $vr0, $a2, -208 vinsgr2vr.d $vr0, $a1, 0 ldx.d $a1, $a5, $a3 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr1, $vr2, $vr1 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr2, $vr0 vsub.w $vr0, $vr1, $vr0 vinsgr2vr.d $vr1, $a1, 0 ld.d $a1, $a4, -40 vst $vr0, $a2, -144 ld.d $a0, $a0, 24 - vld $vr0, $sp, 208 # 16-byte Folded Reload + vld $vr0, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr0, $vr1 vinsgr2vr.d $vr1, $a1, 0 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr1, $vr2, $vr1 ldx.d $a0, $a0, $a3 vsub.w $vr0, $vr0, $vr1 ld.d $a1, $a4, -8 vst $vr0, $a2, -80 vinsgr2vr.d $vr0, $a0, 0 - vld $vr1, $sp, 208 # 16-byte Folded Reload + vld $vr1, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr1, $vr0 vinsgr2vr.d $vr1, $a1, 0 ld.d $a0, $s2, 0 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr1, $vr2, $vr1 vsub.w $vr0, $vr0, $vr1 vst $vr0, $a2, -16 ld.w $a1, $a0, 192 - ld.d $a0, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload add.d $s6, $a0, $a1 move $a1, $s1 move $a2, $s5 move $a3, $s4 move $a4, $s8 - ld.d $a5, $sp, 176 # 8-byte Folded Reload + ld.d $a5, $sp, 160 # 8-byte Folded Reload move $a6, $s0 pcaddu18i $ra, %call36(LumaPrediction4x4) jirl $ra, $ra, 0 - vld $vr2, $sp, 208 # 16-byte Folded Reload - ld.d $a0, $sp, 168 # 8-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a1, $a0, %pc_lo12(imgY_org) - ld.d $a0, $sp, 136 # 8-byte Folded Reload + ld.d $a0, $sp, 120 # 8-byte Folded Reload ldx.d $a2, $a1, $a0 - ld.d $s5, $sp, 128 # 8-byte Folded Reload + ld.d $s5, $sp, 112 # 8-byte Folded Reload ld.d $a0, $s2, 0 alsl.d $a1, $s7, $a1, 3 slli.d $a3, $s6, 1 @@ -3971,7 +3971,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a1, $a1, 24 vilvl.h $vr0, $vr2, $vr0 vinsgr2vr.d $vr1, $a4, 0 - ld.d $a4, $sp, 160 # 8-byte Folded Reload + ld.d $a4, $sp, 144 # 8-byte Folded Reload vilvl.h $vr1, $vr2, $vr1 ldx.d $a1, $a1, $a3 vsub.w $vr0, $vr0, $vr1 @@ -3983,19 +3983,19 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 vilvl.h $vr1, $vr2, $vr1 vsub.w $vr0, $vr0, $vr1 vstx $vr0, $a0, $s3 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload addi.d $a0, $a1, 4 addi.d $s3, $s3, 256 addi.w $s1, $s1, 4 addi.d $fp, $fp, 128 blt $a1, $s5, .LBB8_4 # %bb.5: - ld.d $s2, $sp, 112 # 8-byte Folded Reload + ld.d $s2, $sp, 96 # 8-byte Folded Reload ld.d $a0, $s2, 0 ldptr.w $a1, $a0, 15256 addi.d $a1, $a1, -1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload or $a1, $a1, $a2 andi $a1, $a1, 1 bnez $a1, .LBB8_9 @@ -4004,8 +4004,8 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ori $a1, $zero, 3 beq $a0, $a1, .LBB8_9 # %bb.7: - addi.d $a1, $sp, 228 - ld.d $a0, $sp, 96 # 8-byte Folded Reload + addi.d $a1, $sp, 212 + ld.d $a0, $sp, 8 # 8-byte Folded Reload move $a2, $zero pcaddu18i $ra, %call36(dct_luma8x8) jirl $ra, $ra, 0 @@ -4031,12 +4031,12 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ldptr.w $a1, $a0, 15256 addi.d $a1, $a1, -1 sltui $a1, $a1, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload or $a1, $a1, $a2 andi $a1, $a1, 1 bnez $a1, .LBB8_40 # %bb.10: # %.critedge - ld.w $a1, $sp, 228 + ld.w $a1, $sp, 212 ori $a2, $zero, 4 blt $a2, $a1, .LBB8_40 # %bb.11: @@ -4063,7 +4063,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 sub.d $a1, $a1, $a4 ld.d $a4, $sp, 24 # 8-byte Folded Reload slli.d $fp, $a4, 3 - st.w $zero, $sp, 228 + st.w $zero, $sp, 212 and $a1, $a2, $a1 st.w $a1, $a3, 0 slli.d $a1, $a4, 1 @@ -4244,13 +4244,13 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ori $a1, $a2, 440 add.d $s3, $a0, $a1 ori $a0, $a2, 848 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill ori $a0, $a2, 912 - st.d $a0, $sp, 136 # 8-byte Folded Spill + st.d $a0, $sp, 152 # 8-byte Folded Spill ori $a0, $a2, 976 - st.d $a0, $sp, 112 # 8-byte Folded Spill + st.d $a0, $sp, 128 # 8-byte Folded Spill ori $a0, $a2, 1040 - st.d $a0, $sp, 104 # 8-byte Folded Spill + st.d $a0, $sp, 120 # 8-byte Folded Spill move $s1, $t0 move $a3, $t1 move $a2, $t3 @@ -4265,10 +4265,10 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 addi.w $s1, $s1, 4 move $a7, $s6 move $a6, $s0 - ld.d $a5, $sp, 184 # 8-byte Folded Reload - ld.d $a3, $sp, 200 # 8-byte Folded Reload - ld.d $a2, $sp, 192 # 8-byte Folded Reload - ld.d $a4, $sp, 160 # 8-byte Folded Reload + ld.d $a5, $sp, 168 # 8-byte Folded Reload + ld.d $a3, $sp, 184 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a4, $sp, 144 # 8-byte Folded Reload move $s7, $s8 bge $fp, $s5, .LBB8_9 .LBB8_22: # %.preheader159 @@ -4300,7 +4300,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a5, $a4, -104 vinsgr2vr.d $vr0, $a2, 0 ld.d $a2, $a1, 8 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr2, $vr0 vinsgr2vr.d $vr1, $a5, 0 vilvl.h $vr1, $vr2, $vr1 @@ -4309,7 +4309,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a5, $a4, -72 ld.d $a6, $a1, 16 vinsgr2vr.d $vr1, $a2, 0 - ld.d $a2, $sp, 144 # 8-byte Folded Reload + ld.d $a2, $sp, 160 # 8-byte Folded Reload vstx $vr0, $a0, $a2 vinsgr2vr.d $vr0, $a5, 0 ldx.d $a2, $a6, $a3 @@ -4318,7 +4318,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 vsub.w $vr0, $vr1, $vr0 vinsgr2vr.d $vr1, $a2, 0 ld.d $a2, $a4, -40 - ld.d $a5, $sp, 136 # 8-byte Folded Reload + ld.d $a5, $sp, 152 # 8-byte Folded Reload vstx $vr0, $a0, $a5 ld.d $a1, $a1, 24 vilvl.h $vr0, $vr2, $vr1 @@ -4327,7 +4327,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ldx.d $a1, $a1, $a3 vsub.w $vr0, $vr0, $vr1 ld.d $a2, $a4, -8 - ld.d $a3, $sp, 112 # 8-byte Folded Reload + ld.d $a3, $sp, 128 # 8-byte Folded Reload vstx $vr0, $a0, $a3 vinsgr2vr.d $vr0, $a1, 0 vilvl.h $vr0, $vr2, $vr0 @@ -4335,12 +4335,12 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a1, $s2, 0 vilvl.h $vr1, $vr2, $vr1 vsub.w $vr0, $vr0, $vr1 - ld.d $a2, $sp, 104 # 8-byte Folded Reload + ld.d $a2, $sp, 120 # 8-byte Folded Reload vstx $vr0, $a0, $a2 ldptr.w $a0, $a1, 15256 addi.d $a0, $a0, -1 sltui $a0, $a0, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload or $a0, $a0, $a2 andi $a0, $a0, 1 ld.d $a2, $sp, 88 # 8-byte Folded Reload @@ -4364,8 +4364,8 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a1, $sp, 48 # 8-byte Folded Reload ld.w $a1, $a1, %pc_lo12(sp2_frame_indicator) or $a1, $a0, $a1 - ld.d $a0, $sp, 160 # 8-byte Folded Reload - addi.d $a2, $sp, 228 + ld.d $a0, $sp, 144 # 8-byte Folded Reload + addi.d $a2, $sp, 212 beqz $a1, .LBB8_36 # %bb.27: # in Loop: Header=BB8_22 Depth=1 move $a1, $s1 @@ -4375,8 +4375,8 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 b .LBB8_30 .p2align 4, , 16 .LBB8_28: # in Loop: Header=BB8_22 Depth=1 - addi.d $a2, $sp, 228 - ld.d $a0, $sp, 160 # 8-byte Folded Reload + addi.d $a2, $sp, 212 + ld.d $a0, $sp, 144 # 8-byte Folded Reload move $a1, $s1 move $a3, $zero pcaddu18i $ra, %call36(dct_luma) @@ -4399,12 +4399,12 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 st.d $s5, $sp, 96 # 8-byte Folded Spill ld.d $a0, $s2, 0 ld.w $a1, $a0, 192 - ld.d $a0, $sp, 152 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload add.d $s5, $a0, $a1 move $a1, $s1 - ld.d $a2, $sp, 192 # 8-byte Folded Reload - ld.d $a3, $sp, 200 # 8-byte Folded Reload - ld.d $a4, $sp, 184 # 8-byte Folded Reload + ld.d $a2, $sp, 176 # 8-byte Folded Reload + ld.d $a3, $sp, 184 # 8-byte Folded Reload + ld.d $a4, $sp, 168 # 8-byte Folded Reload move $a5, $s0 move $a6, $s6 pcaddu18i $ra, %call36(LumaPrediction4x4) @@ -4419,14 +4419,14 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a5, $a4, -96 vinsgr2vr.d $vr0, $a2, 0 ld.d $a2, $a1, 8 - vld $vr2, $sp, 208 # 16-byte Folded Reload + vld $vr2, $sp, 192 # 16-byte Folded Reload vilvl.h $vr0, $vr2, $vr0 vinsgr2vr.d $vr1, $a5, 0 vilvl.h $vr1, $vr2, $vr1 ldx.d $a2, $a2, $a3 vsub.w $vr0, $vr0, $vr1 ld.d $a5, $a4, -64 - ld.d $a6, $sp, 144 # 8-byte Folded Reload + ld.d $a6, $sp, 160 # 8-byte Folded Reload vstx $vr0, $a0, $a6 vinsgr2vr.d $vr0, $a2, 0 ld.d $a2, $a1, 16 @@ -4435,7 +4435,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 vilvl.h $vr1, $vr2, $vr1 ldx.d $a2, $a2, $a3 vsub.w $vr0, $vr0, $vr1 - ld.d $a5, $sp, 136 # 8-byte Folded Reload + ld.d $a5, $sp, 152 # 8-byte Folded Reload vstx $vr0, $a0, $a5 ld.d $a4, $a4, -32 vinsgr2vr.d $vr0, $a2, 0 @@ -4446,7 +4446,7 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ldx.d $a1, $a1, $a3 vsub.w $vr0, $vr0, $vr1 ldx.d $a2, $a0, $s3 - ld.d $a3, $sp, 112 # 8-byte Folded Reload + ld.d $a3, $sp, 128 # 8-byte Folded Reload vstx $vr0, $a0, $a3 vinsgr2vr.d $vr0, $a1, 0 vilvl.h $vr0, $vr2, $vr0 @@ -4454,15 +4454,15 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a1, $s2, 0 vilvl.h $vr1, $vr2, $vr1 vsub.w $vr0, $vr0, $vr1 - ld.d $a2, $sp, 104 # 8-byte Folded Reload + ld.d $a2, $sp, 120 # 8-byte Folded Reload vstx $vr0, $a0, $a2 ldptr.w $a0, $a1, 15256 addi.d $a0, $a0, -1 sltui $a0, $a0, 1 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 104 # 8-byte Folded Reload or $a0, $a0, $a2 andi $a0, $a0, 1 - ld.d $s5, $sp, 128 # 8-byte Folded Reload + ld.d $s5, $sp, 112 # 8-byte Folded Reload bnez $a0, .LBB8_20 .LBB8_31: # in Loop: Header=BB8_22 Depth=1 ld.w $a0, $a1, 20 @@ -4474,8 +4474,8 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ld.d $a1, $sp, 48 # 8-byte Folded Reload ld.w $a1, $a1, %pc_lo12(sp2_frame_indicator) or $a1, $a0, $a1 - ld.d $a0, $sp, 152 # 8-byte Folded Reload - addi.d $a2, $sp, 228 + ld.d $a0, $sp, 136 # 8-byte Folded Reload + addi.d $a2, $sp, 212 beqz $a1, .LBB8_37 # %bb.33: # in Loop: Header=BB8_22 Depth=1 move $a1, $s1 @@ -4485,8 +4485,8 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 b .LBB8_21 .p2align 4, , 16 .LBB8_34: # in Loop: Header=BB8_22 Depth=1 - addi.d $a2, $sp, 228 - ld.d $a0, $sp, 152 # 8-byte Folded Reload + addi.d $a2, $sp, 212 + ld.d $a0, $sp, 136 # 8-byte Folded Reload move $a1, $s1 move $a3, $zero pcaddu18i $ra, %call36(dct_luma) @@ -4528,19 +4528,19 @@ LumaResidualCoding8x8: # @LumaResidualCoding8x8 ldptr.w $a1, $a0, 15540 beqz $a1, .LBB8_12 .LBB8_40: # %.loopexit - ld.w $a0, $sp, 228 - ld.d $s8, $sp, 232 # 8-byte Folded Reload - ld.d $s7, $sp, 240 # 8-byte Folded Reload - ld.d $s6, $sp, 248 # 8-byte Folded Reload - ld.d $s5, $sp, 256 # 8-byte Folded Reload - ld.d $s4, $sp, 264 # 8-byte Folded Reload - ld.d $s3, $sp, 272 # 8-byte Folded Reload - ld.d $s2, $sp, 280 # 8-byte Folded Reload - ld.d $s1, $sp, 288 # 8-byte Folded Reload - ld.d $s0, $sp, 296 # 8-byte Folded Reload - ld.d $fp, $sp, 304 # 8-byte Folded Reload - ld.d $ra, $sp, 312 # 8-byte Folded Reload - addi.d $sp, $sp, 320 + ld.w $a0, $sp, 212 + ld.d $s8, $sp, 216 # 8-byte Folded Reload + ld.d $s7, $sp, 224 # 8-byte Folded Reload + ld.d $s6, $sp, 232 # 8-byte Folded Reload + ld.d $s5, $sp, 240 # 8-byte Folded Reload + ld.d $s4, $sp, 248 # 8-byte Folded Reload + ld.d $s3, $sp, 256 # 8-byte Folded Reload + ld.d $s2, $sp, 264 # 8-byte Folded Reload + ld.d $s1, $sp, 272 # 8-byte Folded Reload + ld.d $s0, $sp, 280 # 8-byte Folded Reload + ld.d $fp, $sp, 288 # 8-byte Folded Reload + ld.d $ra, $sp, 296 # 8-byte Folded Reload + addi.d $sp, $sp, 304 ret .Lfunc_end8: .size LumaResidualCoding8x8, .Lfunc_end8-LumaResidualCoding8x8 @@ -11450,6 +11450,8 @@ writeMBLayer: # @writeMBLayer pcalau12i $a0, %got_pc_hi20(enc_picture) ld.d $fp, $a0, %got_pc_lo12(enc_picture) move $a1, $zero + ld.d $s1, $sp, 96 # 8-byte Folded Reload + ld.d $s5, $sp, 88 # 8-byte Folded Reload .p2align 4, , 16 .LBB25_61: # =>This Loop Header: Depth=1 # Child Loop BB25_62 Depth 2 @@ -11462,8 +11464,6 @@ writeMBLayer: # @writeMBLayer move $s6, $s0 ori $s0, $zero, 16 ld.d $s2, $sp, 40 # 8-byte Folded Reload - ld.d $s1, $sp, 96 # 8-byte Folded Reload - ld.d $s5, $sp, 88 # 8-byte Folded Reload .p2align 4, , 16 .LBB25_62: # Parent Loop BB25_61 Depth=1 # => This Inner Loop Header: Depth=2 @@ -12673,6 +12673,7 @@ writeMBLayer: # @writeMBLayer lu12i.w $a1, 3 ori $s0, $a1, 3160 ori $s4, $zero, 2 + ld.d $s8, $sp, 112 # 8-byte Folded Reload b .LBB25_194 .p2align 4, , 16 .LBB25_192: # in Loop: Header=BB25_194 Depth=1 @@ -12697,7 +12698,6 @@ writeMBLayer: # @writeMBLayer move $s6, $zero add.w $a1, $a1, $a2 slli.d $s7, $a1, 3 - ld.d $s8, $sp, 112 # 8-byte Folded Reload ld.d $s3, $sp, 40 # 8-byte Folded Reload .p2align 4, , 16 .LBB25_196: # Parent Loop BB25_194 Depth=1 @@ -14239,6 +14239,7 @@ writeMotionVector8x8: # @writeMotionVector8x8 st.d $zero, $sp, 224 # 8-byte Folded Spill st.d $a6, $sp, 104 # 8-byte Folded Spill st.d $t3, $sp, 96 # 8-byte Folded Spill + ld.d $s6, $sp, 208 # 8-byte Folded Reload b .LBB31_10 .p2align 4, , 16 .LBB31_9: # %._crit_edge.split.us.us.us @@ -14286,7 +14287,6 @@ writeMotionVector8x8: # @writeMotionVector8x8 # in Loop: Header=BB31_12 Depth=2 ld.d $s7, $sp, 176 # 8-byte Folded Reload ld.w $a2, $s7, 20 - ld.d $s6, $sp, 208 # 8-byte Folded Reload ld.d $a3, $s6, 24 ld.d $a4, $sp, 216 # 8-byte Folded Reload ld.d $a4, $a4, 0 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s index dc12ccb3..90dbd022 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_distortion.s @@ -5433,6 +5433,7 @@ computeSATDWP: # @computeSATDWP pcalau12i $a0, %pc_hi20(src_line) st.d $a0, $sp, 24 # 8-byte Folded Spill st.d $a4, $sp, 16 # 8-byte Folded Spill + ld.d $s2, $sp, 104 # 8-byte Folded Reload .LBB10_13: # %.preheader.us # =>This Loop Header: Depth=1 # Child Loop BB10_14 Depth 2 @@ -5440,7 +5441,6 @@ computeSATDWP: # @computeSATDWP move $fp, $a3 move $s1, $a3 ld.d $s6, $sp, 112 # 8-byte Folded Reload - ld.d $s2, $sp, 104 # 8-byte Folded Reload .p2align 4, , 16 .LBB10_14: # Parent Loop BB10_13 Depth=1 # => This Inner Loop Header: Depth=2 @@ -5806,6 +5806,7 @@ computeBiPredSATD1: # @computeBiPredSATD1 st.d $a6, $sp, 56 # 8-byte Folded Spill st.d $a5, $sp, 48 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill + ld.d $s3, $sp, 168 # 8-byte Folded Reload .LBB11_4: # %.lr.ph.us # =>This Loop Header: Depth=1 # Child Loop BB11_5 Depth 2 @@ -5829,7 +5830,6 @@ computeBiPredSATD1: # @computeBiPredSATD1 ldx.d $a3, $fp, $a0 ld.d $a0, $sp, 144 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(ref_pic2_sub) - ld.d $s3, $sp, 168 # 8-byte Folded Reload st.d $s5, $s3, %pc_lo12(src_line) ld.d $a1, $sp, 184 # 8-byte Folded Reload move $a2, $s0 @@ -6186,6 +6186,7 @@ computeBiPredSATD1: # @computeBiPredSATD1 st.d $a5, $sp, 48 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a3, $sp, 24 # 8-byte Folded Spill + ld.d $s0, $sp, 168 # 8-byte Folded Reload .LBB11_11: # %.preheader.us # =>This Loop Header: Depth=1 # Child Loop BB11_12 Depth 2 @@ -6209,7 +6210,6 @@ computeBiPredSATD1: # @computeBiPredSATD1 ldx.d $a3, $s2, $a0 ld.d $a0, $sp, 144 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(ref_pic2_sub) - ld.d $s0, $sp, 168 # 8-byte Folded Reload st.d $s5, $s0, %pc_lo12(src_line) ld.d $a1, $sp, 184 # 8-byte Folded Reload move $a2, $s7 @@ -6715,6 +6715,7 @@ computeBiPredSATD2: # @computeBiPredSATD2 st.d $a7, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill st.d $a2, $sp, 16 # 8-byte Folded Spill + ld.d $s5, $sp, 144 # 8-byte Folded Reload .LBB12_13: # %.preheader.us # =>This Loop Header: Depth=1 # Child Loop BB12_14 Depth 2 @@ -6738,7 +6739,6 @@ computeBiPredSATD2: # @computeBiPredSATD2 ldx.d $a3, $s3, $a0 ld.d $a0, $sp, 120 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(ref_pic2_sub) - ld.d $s5, $sp, 144 # 8-byte Folded Reload st.d $a2, $sp, 184 # 8-byte Folded Spill st.d $a2, $s5, %pc_lo12(src_line) ld.d $a1, $sp, 160 # 8-byte Folded Reload @@ -10317,13 +10317,13 @@ computeBiPredSSE2: # @computeBiPredSSE2 ld.d $s5, $sp, 72 # 8-byte Folded Reload move $a2, $s5 jirl $ra, $a3, 0 - ld.d $a2, $sp, 112 # 8-byte Folded Reload ld.d $s8, $sp, 56 # 8-byte Folded Reload ld.w $a1, $s8, %pc_lo12(bipred1_access_method) slli.d $a1, $a1, 3 ldx.d $a3, $fp, $a1 ld.d $s0, $sp, 48 # 8-byte Folded Reload ld.d $a1, $s0, 8 + ld.d $a2, $sp, 112 # 8-byte Folded Reload st.d $a0, $a2, %pc_lo12(ref2_line) move $a0, $a1 ld.d $s3, $sp, 80 # 8-byte Folded Reload diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_umhex.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_umhex.s index a8a463cb..0c7293cc 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_umhex.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/me_umhex.s @@ -8230,7 +8230,8 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc bstrpick.d $a0, $t1, 31, 1 add.w $a6, $a2, $t1 ld.d $a1, $sp, 328 # 8-byte Folded Reload - sub.w $t0, $a5, $a1 + sub.w $a1, $a5, $a1 + st.d $a1, $sp, 96 # 8-byte Folded Spill ori $a1, $zero, 80 alsl.w $a1, $t5, $a1, 2 st.d $a1, $sp, 72 # 8-byte Folded Spill @@ -8256,14 +8257,12 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc ori $fp, $zero, 1 ori $s1, $zero, 1 move $t7, $t6 - ld.d $a4, $sp, 16 # 8-byte Folded Reload + ld.d $t0, $sp, 16 # 8-byte Folded Reload st.d $a6, $sp, 80 # 8-byte Folded Spill - st.d $t0, $sp, 96 # 8-byte Folded Spill st.d $t5, $sp, 64 # 8-byte Folded Spill b .LBB9_235 .LBB9_233: # in Loop: Header=BB9_235 Depth=1 ld.d $a3, $sp, 136 # 8-byte Folded Reload - move $a4, $t0 .p2align 4, , 16 .LBB9_234: # in Loop: Header=BB9_235 Depth=1 addi.d $s1, $s1, 2 @@ -8303,8 +8302,7 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc ld.d $a3, $sp, 96 # 8-byte Folded Reload slli.d $a3, $a3, 2 ldx.w $a3, $a0, $a3 - move $t0, $a4 - add.w $a4, $a4, $t8 + add.w $a4, $t0, $t8 slli.d $a4, $a4, 2 ldx.w $a0, $a0, $a4 add.d $a1, $a2, $a1 @@ -8337,7 +8335,7 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc ld.d $t8, $sp, 104 # 8-byte Folded Reload ld.d $t5, $sp, 64 # 8-byte Folded Reload ld.d $a6, $sp, 80 # 8-byte Folded Reload - ld.d $a4, $sp, 16 # 8-byte Folded Reload + ld.d $t0, $sp, 16 # 8-byte Folded Reload ld.d $t7, $sp, 184 # 8-byte Folded Reload ld.d $t6, $sp, 304 # 8-byte Folded Reload ld.d $a2, $sp, 248 # 8-byte Folded Reload @@ -8364,7 +8362,6 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc .LBB9_240: # in Loop: Header=BB9_235 Depth=1 move $a3, $a5 ld.d $a5, $sp, 120 # 8-byte Folded Reload - move $a4, $t0 .p2align 4, , 16 .LBB9_241: # in Loop: Header=BB9_235 Depth=1 add.w $a0, $t6, $s8 @@ -8389,8 +8386,7 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc ld.d $a3, $sp, 96 # 8-byte Folded Reload slli.d $a3, $a3, 2 ldx.w $a3, $a0, $a3 - move $t0, $a4 - add.w $a4, $a4, $s0 + add.w $a4, $t0, $s0 slli.d $a4, $a4, 2 ldx.w $a0, $a0, $a4 add.d $a1, $a2, $a1 @@ -8424,7 +8420,7 @@ UMHEXBipredIntegerPelBlockMotionSearch: # @UMHEXBipredIntegerPelBlockMotionSearc ld.d $t8, $sp, 104 # 8-byte Folded Reload ld.d $t5, $sp, 64 # 8-byte Folded Reload ld.d $a6, $sp, 80 # 8-byte Folded Reload - ld.d $a4, $sp, 16 # 8-byte Folded Reload + ld.d $t0, $sp, 16 # 8-byte Folded Reload ld.d $t7, $sp, 184 # 8-byte Folded Reload ld.d $t6, $sp, 304 # 8-byte Folded Reload ld.d $a2, $sp, 248 # 8-byte Folded Reload diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mode_decision.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mode_decision.s index 86f3a319..0f1661ae 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mode_decision.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mode_decision.s @@ -2249,7 +2249,8 @@ submacroblock_mode_decision: # @submacroblock_mode_decision st.d $a1, $sp, 24 # 8-byte Folded Spill addi.d $a0, $a0, 2 st.d $a0, $sp, 48 # 8-byte Folded Spill - slli.d $s5, $fp, 3 + slli.d $a0, $fp, 3 + st.d $a0, $sp, 440 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(cs_cm) ld.d $a0, $a0, %got_pc_lo12(cs_cm) st.d $a0, $sp, 352 # 8-byte Folded Spill @@ -2358,14 +2359,11 @@ submacroblock_mode_decision: # @submacroblock_mode_decision ori $a0, $a1, 4095 st.d $a0, $sp, 360 # 8-byte Folded Spill st.d $s7, $sp, 328 # 8-byte Folded Spill - st.d $s5, $sp, 440 # 8-byte Folded Spill st.d $s4, $sp, 368 # 8-byte Folded Spill pcalau12i $s6, %pc_hi20(si_frame_indicator) b .LBB8_6 .p2align 4, , 16 .LBB8_3: # in Loop: Header=BB8_6 Depth=1 - ld.d $a0, $sp, 360 # 8-byte Folded Reload - st.d $a0, $sp, 360 # 8-byte Folded Spill fmov.d $fs1, $fs0 ld.d $s7, $sp, 328 # 8-byte Folded Reload ld.d $s1, $sp, 400 # 8-byte Folded Reload @@ -3534,6 +3532,7 @@ submacroblock_mode_decision: # @submacroblock_mode_decision add.d $a2, $a3, $a2 ld.d $a4, $sp, 240 # 8-byte Folded Reload ld.d $a5, $sp, 424 # 8-byte Folded Reload + ld.d $a6, $sp, 440 # 8-byte Folded Reload .p2align 4, , 16 .LBB8_107: # =>This Inner Loop Header: Depth=1 ld.d $a3, $a0, 0 @@ -3541,7 +3540,6 @@ submacroblock_mode_decision: # @submacroblock_mode_decision vld $vr0, $a2, 0 vstx $vr0, $a3, $a5 vld $vr0, $a2, 16 - ld.d $a6, $sp, 440 # 8-byte Folded Reload alsl.d $a3, $a6, $a3, 2 vst $vr0, $a3, 16 addi.d $a1, $a1, 1 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mv-search.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mv-search.s index fb60c744..3d1d109b 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mv-search.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/mv-search.s @@ -1531,6 +1531,7 @@ BPredPartitionCost: # @BPredPartitionCost ori $a0, $a0, 1004 st.d $a0, $sp, 80 # 8-byte Folded Spill ld.d $a1, $sp, 64 # 8-byte Folded Reload + ld.d $s6, $sp, 176 # 8-byte Folded Reload b .LBB3_8 .p2align 4, , 16 .LBB3_7: # %._crit_edge.us180 @@ -1573,7 +1574,6 @@ BPredPartitionCost: # @BPredPartitionCost .LBB3_11: # %.preheader154.us # Parent Loop BB3_8 Depth=1 # => This Inner Loop Header: Depth=2 - ld.d $s6, $sp, 176 # 8-byte Folded Reload ld.d $a0, $s6, 0 ld.w $a0, $a0, 192 add.w $s1, $s5, $a0 @@ -4219,6 +4219,7 @@ BIDPartitionCost: # @BIDPartitionCost st.d $a0, $sp, 80 # 8-byte Folded Spill ld.d $a1, $sp, 64 # 8-byte Folded Reload st.d $ra, $sp, 40 # 8-byte Folded Spill + ld.d $s0, $sp, 160 # 8-byte Folded Reload b .LBB7_8 .p2align 4, , 16 .LBB7_7: # %._crit_edge.us173 @@ -4262,7 +4263,6 @@ BIDPartitionCost: # @BIDPartitionCost .LBB7_11: # %.preheader149.us # Parent Loop BB7_8 Depth=1 # => This Inner Loop Header: Depth=2 - ld.d $s0, $sp, 160 # 8-byte Folded Reload ld.d $a0, $s0, 0 ld.w $a0, $a0, 192 add.w $s5, $s4, $a0 @@ -4519,6 +4519,7 @@ GetDirectCost8x8: # @GetDirectCost8x8 st.d $a7, $sp, 48 # 8-byte Folded Spill st.d $t0, $sp, 32 # 8-byte Folded Spill st.d $t2, $sp, 24 # 8-byte Folded Spill + ld.d $s7, $sp, 56 # 8-byte Folded Reload .p2align 4, , 16 .LBB8_1: # =>This Inner Loop Header: Depth=1 ld.d $a1, $sp, 128 # 8-byte Folded Reload @@ -4539,7 +4540,6 @@ GetDirectCost8x8: # @GetDirectCost8x8 # in Loop: Header=BB8_1 Depth=1 move $t3, $a0 st.d $fp, $sp, 72 # 8-byte Folded Spill - ld.d $s7, $sp, 56 # 8-byte Folded Reload ld.d $a0, $s7, %pc_lo12(direct_ref_idx) ld.d $a4, $a0, 0 ld.d $a0, $a0, 8 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s index 89498491..db228b52 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/rdopt.s @@ -4311,8 +4311,8 @@ RDCost_for_8x8blocks: # @RDCost_for_8x8blocks .LBB8_7: ld.d $a1, $sp, 112 # 8-byte Folded Reload ld.d $a1, $a1, 0 - ld.d $s7, $sp, 88 # 8-byte Folded Reload - st.w $a0, $s7, 0 + ld.d $a2, $sp, 88 # 8-byte Folded Reload + st.w $a0, $a2, 0 ldptr.w $a0, $a1, 4168 ld.d $a2, $s5, 0 ori $a3, $zero, 3 @@ -14098,6 +14098,7 @@ SetRefAndMotionVectors: # @SetRefAndMotionVectors addi.w $s5, $zero, -1 vrepli.b $vr0, -1 vst $vr0, $sp, 32 # 16-byte Folded Spill + ld.d $s6, $sp, 56 # 8-byte Folded Reload b .LBB22_28 .p2align 4, , 16 .LBB22_27: # %._crit_edge @@ -14106,7 +14107,6 @@ SetRefAndMotionVectors: # @SetRefAndMotionVectors ld.d $a1, $a1, 0 ld.d $a2, $s7, 0 ldx.d $a1, $a1, $s2 - ld.d $s6, $sp, 56 # 8-byte Folded Reload alsl.d $a2, $s6, $a2, 3 ld.w $a2, $a2, 136 add.d $a0, $a1, $a0 diff --git a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s index 6f1da2bd..41f8d573 100644 --- a/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s +++ b/results/MultiSource/Applications/JM/lencod/CMakeFiles/lencod.dir/transform8x8.s @@ -3727,6 +3727,7 @@ dct_luma8x8: # @dct_luma8x8 lu12i.w $a6, 244 ori $fp, $a6, 575 addi.d $s0, $sp, 128 + ld.d $a2, $sp, 96 # 8-byte Folded Reload b .LBB4_8 .p2align 4, , 16 .LBB4_5: # in Loop: Header=BB4_8 Depth=1 @@ -3768,7 +3769,6 @@ dct_luma8x8: # @dct_luma8x8 beqz $s6, .LBB4_10 # %bb.9: # in Loop: Header=BB4_8 Depth=1 ldptr.d $a6, $a4, 14184 - ld.d $a2, $sp, 96 # 8-byte Folded Reload slli.d $s6, $a2, 3 ldx.d $a6, $a6, $s6 ld.d $s6, $sp, 104 # 8-byte Folded Reload diff --git a/results/MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s b/results/MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s index a037d463..09266228 100644 --- a/results/MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s +++ b/results/MultiSource/Applications/SIBsim4/CMakeFiles/SIBsim4.dir/sim4b1.s @@ -8295,6 +8295,10 @@ compute_max_score: # @compute_max_score st.d $a0, $sp, 40 # 8-byte Folded Spill st.d $a2, $sp, 32 # 8-byte Folded Spill st.d $s7, $sp, 64 # 8-byte Folded Spill + ld.d $s4, $sp, 48 # 8-byte Folded Reload + ld.d $s1, $sp, 80 # 8-byte Folded Reload + ld.d $s2, $sp, 72 # 8-byte Folded Reload + ld.d $s3, $sp, 56 # 8-byte Folded Reload .p2align 4, , 16 .LBB17_8: # %.thread.us.us # =>This Inner Loop Header: Depth=1 @@ -8308,15 +8312,11 @@ compute_max_score: # @compute_max_score move $s5, $fp ld.d $fp, $sp, 40 # 8-byte Folded Reload move $a0, $fp - ld.d $s4, $sp, 48 # 8-byte Folded Reload move $a1, $s4 move $a2, $s5 move $a3, $s6 - ld.d $s1, $sp, 80 # 8-byte Folded Reload move $a4, $s1 - ld.d $s2, $sp, 72 # 8-byte Folded Reload move $a5, $s2 - ld.d $s3, $sp, 56 # 8-byte Folded Reload move $a6, $s3 move $a7, $s7 pcaddu18i $ra, %call36(compute_max_score_1) diff --git a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/defs.s b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/defs.s index c5a063f9..97a21404 100644 --- a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/defs.s +++ b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/defs.s @@ -3431,30 +3431,30 @@ def_FindProofForGuard: # @def_FindProofForGuard .type def_ApplyDefinitionToTermList,@function def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList # %bb.0: - addi.d $sp, $sp, -224 - st.d $ra, $sp, 216 # 8-byte Folded Spill - st.d $fp, $sp, 208 # 8-byte Folded Spill - st.d $s0, $sp, 200 # 8-byte Folded Spill - st.d $s1, $sp, 192 # 8-byte Folded Spill - st.d $s2, $sp, 184 # 8-byte Folded Spill - st.d $s3, $sp, 176 # 8-byte Folded Spill - st.d $s4, $sp, 168 # 8-byte Folded Spill - st.d $s5, $sp, 160 # 8-byte Folded Spill - st.d $s6, $sp, 152 # 8-byte Folded Spill - st.d $s7, $sp, 144 # 8-byte Folded Spill - st.d $s8, $sp, 136 # 8-byte Folded Spill - st.d $a2, $sp, 56 # 8-byte Folded Spill + addi.d $sp, $sp, -240 + st.d $ra, $sp, 232 # 8-byte Folded Spill + st.d $fp, $sp, 224 # 8-byte Folded Spill + st.d $s0, $sp, 216 # 8-byte Folded Spill + st.d $s1, $sp, 208 # 8-byte Folded Spill + st.d $s2, $sp, 200 # 8-byte Folded Spill + st.d $s3, $sp, 192 # 8-byte Folded Spill + st.d $s4, $sp, 184 # 8-byte Folded Spill + st.d $s5, $sp, 176 # 8-byte Folded Spill + st.d $s6, $sp, 168 # 8-byte Folded Spill + st.d $s7, $sp, 160 # 8-byte Folded Spill + st.d $s8, $sp, 152 # 8-byte Folded Spill + st.d $a2, $sp, 64 # 8-byte Folded Spill ld.w $a2, $a2, 204 - st.d $a3, $sp, 32 # 8-byte Folded Spill - st.d $a1, $sp, 8 # 8-byte Folded Spill - st.d $a0, $sp, 16 # 8-byte Folded Spill - st.d $a2, $sp, 112 # 8-byte Folded Spill + st.d $a3, $sp, 40 # 8-byte Folded Spill + st.d $a1, $sp, 16 # 8-byte Folded Spill + st.d $a0, $sp, 24 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill beqz $a2, .LBB20_47 # %bb.1: # %.preheader.lr.ph - ld.d $a0, $sp, 16 # 8-byte Folded Reload + ld.d $a0, $sp, 24 # 8-byte Folded Reload beqz $a0, .LBB20_47 # %bb.2: # %.preheader.lr.ph.split.us - ld.d $a0, $sp, 8 # 8-byte Folded Reload + ld.d $a0, $sp, 16 # 8-byte Folded Reload beqz $a0, .LBB20_46 # %bb.3: # %.lr.ph126.us.us.us.preheader pcalau12i $a0, %got_pc_hi20(cont_BINDINGS) @@ -3463,20 +3463,20 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList ld.d $s2, $a0, %got_pc_lo12(cont_STACKPOINTER) pcalau12i $a0, %got_pc_hi20(cont_STACK) ld.d $a0, $a0, %got_pc_lo12(cont_STACK) - st.d $a0, $sp, 128 # 8-byte Folded Spill + st.d $a0, $sp, 144 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(cont_LEFTCONTEXT) ld.d $a0, $a0, %got_pc_lo12(cont_LEFTCONTEXT) - st.d $a0, $sp, 120 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(cont_LASTBINDING) ld.d $s5, $a0, %got_pc_lo12(cont_LASTBINDING) pcalau12i $a0, %got_pc_hi20(cont_CURRENTBINDING) ld.d $s3, $a0, %got_pc_lo12(cont_CURRENTBINDING) - st.d $zero, $sp, 48 # 8-byte Folded Spill + st.d $zero, $sp, 56 # 8-byte Folded Spill vrepli.b $vr0, 0 - vst $vr0, $sp, 96 # 16-byte Folded Spill + vst $vr0, $sp, 112 # 16-byte Folded Spill ori $s1, $zero, 1 - ld.d $s8, $sp, 16 # 8-byte Folded Reload - st.d $s2, $sp, 64 # 8-byte Folded Spill + ld.d $s8, $sp, 24 # 8-byte Folded Reload + st.d $s2, $sp, 72 # 8-byte Folded Spill .p2align 4, , 16 .LBB20_4: # %.lr.ph126.us.us.us # =>This Loop Header: Depth=1 @@ -3490,9 +3490,9 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList ld.d $a0, $a0, 8 pcaddu18i $ra, %call36(term_Copy) jirl $ra, $ra, 0 - st.d $a0, $sp, 88 # 8-byte Folded Spill - ld.d $s4, $sp, 8 # 8-byte Folded Reload - st.d $s8, $sp, 40 # 8-byte Folded Spill + st.d $a0, $sp, 104 # 8-byte Folded Spill + ld.d $s4, $sp, 16 # 8-byte Folded Reload + st.d $s8, $sp, 48 # 8-byte Folded Spill .p2align 4, , 16 .LBB20_5: # Parent Loop BB20_4 Depth=1 # => This Loop Header: Depth=2 @@ -3503,20 +3503,20 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList # Child Loop BB20_38 Depth 3 ld.d $a0, $s4, 8 ld.d $s6, $a0, 0 - ld.d $a0, $sp, 88 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload ld.w $a1, $a0, 0 move $a0, $s6 pcaddu18i $ra, %call36(term_FindAllAtoms) jirl $ra, $ra, 0 move $fp, $a0 - st.d $s6, $sp, 80 # 8-byte Folded Spill + st.d $s6, $sp, 88 # 8-byte Folded Spill move $a0, $s6 pcaddu18i $ra, %call36(term_AddFatherLinks) jirl $ra, $ra, 0 beqz $fp, .LBB20_40 # %bb.6: # %.lr.ph.us.us.us.preheader # in Loop: Header=BB20_5 Depth=2 - st.d $s4, $sp, 24 # 8-byte Folded Spill + st.d $s4, $sp, 32 # 8-byte Folded Spill ld.w $a1, $s0, 0 ld.w $a2, $s2, 0 move $s4, $fp @@ -3528,7 +3528,7 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList beqz $s4, .LBB20_38 .LBB20_8: # %cont_BackTrack.exit114.us.us.us # in Loop: Header=BB20_9 Depth=3 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 96 # 8-byte Folded Reload beqz $a0, .LBB20_38 .LBB20_9: # %.lr.ph.us.us.us # Parent Loop BB20_4 Depth=1 @@ -3540,20 +3540,20 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList ld.d $s7, $s4, 8 addi.d $a0, $a2, 1 st.w $a0, $s2, 0 - ld.d $a0, $sp, 120 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload ld.d $a0, $a0, 0 slli.d $a2, $a2, 2 - ld.d $a3, $sp, 128 # 8-byte Folded Reload + ld.d $a3, $sp, 144 # 8-byte Folded Reload stx.w $a1, $a3, $a2 st.w $zero, $s0, 0 - ld.d $a1, $sp, 88 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload move $a2, $s7 pcaddu18i $ra, %call36(unify_Match) jirl $ra, $ra, 0 beqz $a0, .LBB20_32 # %bb.10: # in Loop: Header=BB20_9 Depth=3 ld.w $a0, $s0, 0 - vld $vr0, $sp, 96 # 16-byte Folded Reload + vld $vr0, $sp, 112 # 16-byte Folded Reload blez $a0, .LBB20_13 # %bb.11: # %.lr.ph.i.us.us.us.preheader # in Loop: Header=BB20_9 Depth=3 @@ -3583,7 +3583,7 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList # %bb.14: # in Loop: Header=BB20_9 Depth=3 addi.w $a0, $a0, -1 slli.d $a1, $a0, 2 - ld.d $a2, $sp, 128 # 8-byte Folded Reload + ld.d $a2, $sp, 144 # 8-byte Folded Reload ldx.w $a1, $a2, $a1 st.w $a0, $s2, 0 st.w $a1, $s0, 0 @@ -3597,13 +3597,13 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList pcaddu18i $ra, %call36(term_MaxVar) jirl $ra, $ra, 0 move $a1, $a0 - ld.d $a0, $sp, 80 # 8-byte Folded Reload + ld.d $a0, $sp, 88 # 8-byte Folded Reload pcaddu18i $ra, %call36(fol_NormalizeVarsStartingAt) jirl $ra, $ra, 0 move $s2, $s8 - ld.d $s8, $sp, 120 # 8-byte Folded Reload + ld.d $s8, $sp, 136 # 8-byte Folded Reload ld.d $a0, $s8, 0 - ld.d $a1, $sp, 88 # 8-byte Folded Reload + ld.d $a1, $sp, 104 # 8-byte Folded Reload move $a2, $s7 pcaddu18i $ra, %call36(unify_Match) jirl $ra, $ra, 0 @@ -3620,21 +3620,19 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList # %bb.17: # in Loop: Header=BB20_9 Depth=3 pcaddu18i $ra, %call36(term_Copy) jirl $ra, $ra, 0 - ld.d $a1, $sp, 120 # 8-byte Folded Reload + ld.d $a1, $sp, 136 # 8-byte Folded Reload ld.d $a1, $a1, 0 move $a2, $a0 move $a0, $a1 - st.d $a2, $sp, 72 # 8-byte Folded Spill + st.d $a2, $sp, 80 # 8-byte Folded Spill move $a1, $a2 pcaddu18i $ra, %call36(fol_ApplyContextToTerm) jirl $ra, $ra, 0 - ld.d $s2, $sp, 64 # 8-byte Folded Reload + ld.d $s2, $sp, 72 # 8-byte Folded Reload beqz $a0, .LBB20_30 # %bb.18: # in Loop: Header=BB20_9 Depth=3 - ld.d $a0, $sp, 112 # 8-byte Folded Reload - st.d $a0, $sp, 112 # 8-byte Folded Spill ld.w $a0, $s0, 0 - vld $vr0, $sp, 96 # 16-byte Folded Reload + vld $vr0, $sp, 112 # 16-byte Folded Reload blez $a0, .LBB20_21 # %bb.19: # %.lr.ph.i106.us.us.us.preheader # in Loop: Header=BB20_9 Depth=3 @@ -3660,31 +3658,31 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList .LBB20_21: # %._crit_edge.i104.us.us.us # in Loop: Header=BB20_9 Depth=3 ld.w $a1, $s2, 0 - ld.d $s8, $sp, 56 # 8-byte Folded Reload - ld.d $a0, $sp, 80 # 8-byte Folded Reload + ld.d $s8, $sp, 64 # 8-byte Folded Reload + ld.d $a0, $sp, 88 # 8-byte Folded Reload beqz $a1, .LBB20_23 # %bb.22: # in Loop: Header=BB20_9 Depth=3 addi.w $a3, $a1, -1 slli.d $a1, $a3, 2 - ld.d $a2, $sp, 128 # 8-byte Folded Reload + ld.d $a2, $sp, 144 # 8-byte Folded Reload ldx.w $a1, $a2, $a1 st.w $a3, $s2, 0 st.w $a1, $s0, 0 .LBB20_23: # %cont_BackTrack.exit108.us.us.us # in Loop: Header=BB20_9 Depth=3 move $a1, $s7 - ld.d $a2, $sp, 72 # 8-byte Folded Reload + ld.d $a2, $sp, 80 # 8-byte Folded Reload move $a3, $s8 - ld.d $a4, $sp, 32 # 8-byte Folded Reload + ld.d $a4, $sp, 40 # 8-byte Folded Reload pcaddu18i $ra, %call36(def_FindProofForGuard) jirl $ra, $ra, 0 beqz $a0, .LBB20_29 # %bb.24: # in Loop: Header=BB20_9 Depth=3 ld.w $a1, $s6, 0 ld.d $a0, $s7, 16 - ld.d $a2, $sp, 112 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.w $a2, $a2, -1 - st.d $a2, $sp, 112 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill st.w $a1, $s7, 0 pcalau12i $a1, %got_pc_hi20(term_Delete) ld.d $a1, $a1, %got_pc_lo12(term_Delete) @@ -3693,20 +3691,20 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList ld.d $a0, $s6, 16 st.d $a0, $s7, 16 st.d $zero, $s6, 16 - ld.d $s7, $sp, 80 # 8-byte Folded Reload + ld.d $s7, $sp, 88 # 8-byte Folded Reload move $a0, $s7 pcaddu18i $ra, %call36(term_AddFatherLinks) jirl $ra, $ra, 0 ld.w $a0, $s8, 148 ori $a1, $zero, 1 - st.d $a1, $sp, 48 # 8-byte Folded Spill + st.d $a1, $sp, 56 # 8-byte Folded Spill beqz $a0, .LBB20_29 # %bb.25: # in Loop: Header=BB20_9 Depth=3 pcalau12i $a0, %pc_hi20(.L.str.19) addi.d $a0, $a0, %pc_lo12(.L.str.19) pcaddu18i $ra, %call36(puts) jirl $ra, $ra, 0 - ld.d $s8, $sp, 40 # 8-byte Folded Reload + ld.d $s8, $sp, 48 # 8-byte Folded Reload ld.d $a0, $s8, 8 ld.d $a0, $a0, 8 pcaddu18i $ra, %call36(fol_PrettyPrintDFG) @@ -3722,14 +3720,14 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList .p2align 4, , 16 .LBB20_26: # in Loop: Header=BB20_9 Depth=3 move $s8, $s2 - ld.d $s2, $sp, 64 # 8-byte Folded Reload + ld.d $s2, $sp, 72 # 8-byte Folded Reload b .LBB20_31 .LBB20_27: # in Loop: Header=BB20_9 Depth=3 ld.w $a1, $s6, 0 ld.d $a0, $s7, 16 - ld.d $a2, $sp, 112 # 8-byte Folded Reload + ld.d $a2, $sp, 96 # 8-byte Folded Reload addi.w $a2, $a2, -1 - st.d $a2, $sp, 112 # 8-byte Folded Spill + st.d $a2, $sp, 96 # 8-byte Folded Spill st.w $a1, $s7, 0 pcalau12i $a1, %got_pc_hi20(term_Delete) ld.d $a1, $a1, %got_pc_lo12(term_Delete) @@ -3738,15 +3736,15 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList ld.d $a0, $s6, 16 st.d $a0, $s7, 16 st.d $zero, $s6, 16 - ld.d $s7, $sp, 80 # 8-byte Folded Reload + ld.d $s7, $sp, 88 # 8-byte Folded Reload move $a0, $s7 pcaddu18i $ra, %call36(term_AddFatherLinks) jirl $ra, $ra, 0 - ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $a0, $sp, 64 # 8-byte Folded Reload ld.w $a0, $a0, 148 ori $a1, $zero, 1 - st.d $a1, $sp, 48 # 8-byte Folded Spill - ld.d $s2, $sp, 64 # 8-byte Folded Reload + st.d $a1, $sp, 56 # 8-byte Folded Spill + ld.d $s2, $sp, 72 # 8-byte Folded Reload beqz $a0, .LBB20_31 # %bb.28: # in Loop: Header=BB20_9 Depth=3 pcalau12i $a0, %pc_hi20(.L.str.19) @@ -3766,9 +3764,9 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList jirl $ra, $ra, 0 b .LBB20_31 .LBB20_29: # in Loop: Header=BB20_9 Depth=3 - ld.d $s8, $sp, 40 # 8-byte Folded Reload + ld.d $s8, $sp, 48 # 8-byte Folded Reload .LBB20_30: # in Loop: Header=BB20_9 Depth=3 - ld.d $a0, $sp, 72 # 8-byte Folded Reload + ld.d $a0, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(term_Delete) jirl $ra, $ra, 0 .LBB20_31: # in Loop: Header=BB20_9 Depth=3 @@ -3776,7 +3774,7 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList pcaddu18i $ra, %call36(term_Delete) jirl $ra, $ra, 0 .LBB20_32: # in Loop: Header=BB20_9 Depth=3 - vld $vr0, $sp, 96 # 16-byte Folded Reload + vld $vr0, $sp, 112 # 16-byte Folded Reload ld.w $a1, $s0, 0 blez $a1, .LBB20_36 # %bb.33: # %.lr.ph.i112.us.us.us.preheader @@ -3809,7 +3807,7 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList # %bb.37: # in Loop: Header=BB20_9 Depth=3 addi.w $a2, $a0, -1 slli.d $a0, $a2, 2 - ld.d $a1, $sp, 128 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload ldx.w $a1, $a1, $a0 st.w $a2, $s2, 0 st.w $a1, $s0, 0 @@ -3837,41 +3835,41 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList move $fp, $a0 bnez $a0, .LBB20_38 # %bb.39: # in Loop: Header=BB20_5 Depth=2 - ld.d $s4, $sp, 24 # 8-byte Folded Reload + ld.d $s4, $sp, 32 # 8-byte Folded Reload .LBB20_40: # %list_Delete.exit.us.us.us # in Loop: Header=BB20_5 Depth=2 ld.d $s4, $s4, 0 beqz $s4, .LBB20_42 # %bb.41: # %list_Delete.exit.us.us.us # in Loop: Header=BB20_5 Depth=2 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 96 # 8-byte Folded Reload bnez $a0, .LBB20_5 .LBB20_42: # %._crit_edge127.us.us.us # in Loop: Header=BB20_4 Depth=1 - ld.d $a0, $sp, 88 # 8-byte Folded Reload + ld.d $a0, $sp, 104 # 8-byte Folded Reload pcaddu18i $ra, %call36(term_Delete) jirl $ra, $ra, 0 ld.d $s8, $s8, 0 beqz $s8, .LBB20_44 # %bb.43: # %._crit_edge127.us.us.us # in Loop: Header=BB20_4 Depth=1 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 96 # 8-byte Folded Reload bnez $a0, .LBB20_4 .LBB20_44: # %..loopexit_crit_edge.split.us.us.us # in Loop: Header=BB20_4 Depth=1 - ld.d $a0, $sp, 48 # 8-byte Folded Reload + ld.d $a0, $sp, 56 # 8-byte Folded Reload beqz $a0, .LBB20_47 # %bb.45: # %..loopexit_crit_edge.split.us.us.us # in Loop: Header=BB20_4 Depth=1 - st.d $zero, $sp, 48 # 8-byte Folded Spill - ld.d $s8, $sp, 16 # 8-byte Folded Reload - ld.d $a0, $sp, 112 # 8-byte Folded Reload + st.d $zero, $sp, 56 # 8-byte Folded Spill + ld.d $s8, $sp, 24 # 8-byte Folded Reload + ld.d $a0, $sp, 96 # 8-byte Folded Reload bnez $a0, .LBB20_4 b .LBB20_47 .p2align 4, , 16 .LBB20_46: # %.preheader.us # =>This Inner Loop Header: Depth=1 - ld.d $fp, $sp, 16 # 8-byte Folded Reload + ld.d $fp, $sp, 24 # 8-byte Folded Reload ld.d $a0, $fp, 8 ld.d $a0, $a0, 8 pcaddu18i $ra, %call36(term_Copy) @@ -3879,22 +3877,22 @@ def_ApplyDefinitionToTermList: # @def_ApplyDefinitionToTermList pcaddu18i $ra, %call36(term_Delete) jirl $ra, $ra, 0 ld.d $fp, $fp, 0 - st.d $fp, $sp, 16 # 8-byte Folded Spill + st.d $fp, $sp, 24 # 8-byte Folded Spill bnez $fp, .LBB20_46 .LBB20_47: # %._crit_edge - ld.d $a0, $sp, 8 # 8-byte Folded Reload - ld.d $s8, $sp, 136 # 8-byte Folded Reload - ld.d $s7, $sp, 144 # 8-byte Folded Reload - ld.d $s6, $sp, 152 # 8-byte Folded Reload - ld.d $s5, $sp, 160 # 8-byte Folded Reload - ld.d $s4, $sp, 168 # 8-byte Folded Reload - ld.d $s3, $sp, 176 # 8-byte Folded Reload - ld.d $s2, $sp, 184 # 8-byte Folded Reload - ld.d $s1, $sp, 192 # 8-byte Folded Reload - ld.d $s0, $sp, 200 # 8-byte Folded Reload - ld.d $fp, $sp, 208 # 8-byte Folded Reload - ld.d $ra, $sp, 216 # 8-byte Folded Reload - addi.d $sp, $sp, 224 + ld.d $a0, $sp, 16 # 8-byte Folded Reload + ld.d $s8, $sp, 152 # 8-byte Folded Reload + ld.d $s7, $sp, 160 # 8-byte Folded Reload + ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s5, $sp, 176 # 8-byte Folded Reload + ld.d $s4, $sp, 184 # 8-byte Folded Reload + ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s2, $sp, 200 # 8-byte Folded Reload + ld.d $s1, $sp, 208 # 8-byte Folded Reload + ld.d $s0, $sp, 216 # 8-byte Folded Reload + ld.d $fp, $sp, 224 # 8-byte Folded Reload + ld.d $ra, $sp, 232 # 8-byte Folded Reload + addi.d $sp, $sp, 240 ret .Lfunc_end20: .size def_ApplyDefinitionToTermList, .Lfunc_end20-def_ApplyDefinitionToTermList diff --git a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/iaparser.s b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/iaparser.s index f5d6219a..37936af3 100644 --- a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/iaparser.s +++ b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/iaparser.s @@ -119,8 +119,8 @@ ia_parse: # @ia_parse # Child Loop BB0_53 Depth 3 # Child Loop BB0_58 Depth 3 # Child Loop BB0_90 Depth 2 - # Child Loop BB0_113 Depth 2 - # Child Loop BB0_106 Depth 2 + # Child Loop BB0_111 Depth 2 + # Child Loop BB0_104 Depth 2 # Child Loop BB0_95 Depth 2 # Child Loop BB0_98 Depth 2 # Child Loop BB0_66 Depth 2 @@ -131,7 +131,7 @@ ia_parse: # @ia_parse # %bb.4: # in Loop: Header=BB0_3 Depth=1 srli.d $a0, $s7, 4 ori $a1, $zero, 624 - bltu $a1, $a0, .LBB0_133 + bltu $a1, $a0, .LBB0_131 # %bb.5: # in Loop: Header=BB0_3 Depth=1 sub.d $a0, $s0, $s6 srai.d $a0, $a0, 1 @@ -170,7 +170,7 @@ ia_parse: # @ia_parse ld.d $a1, $a1, 0 # 8-byte Folded Reload pcaddu18i $ra, %call36(memcpy) jirl $ra, $ra, 0 - bgeu $s4, $s7, .LBB0_121 + bgeu $s4, $s7, .LBB0_119 # %bb.6: # in Loop: Header=BB0_3 Depth=1 alsl.d $a0, $s4, $s2, 1 addi.d $s0, $a0, -2 @@ -242,10 +242,10 @@ ia_parse: # @ia_parse # %bb.16: # in Loop: Header=BB0_3 Depth=1 addi.d $a2, $a1, -80 ori $a3, $zero, 3 - bltu $a2, $a3, .LBB0_125 + bltu $a2, $a3, .LBB0_123 # %bb.17: # in Loop: Header=BB0_3 Depth=1 ori $a2, $zero, 35 - beq $a1, $a2, .LBB0_123 + beq $a1, $a2, .LBB0_121 # %bb.18: # in Loop: Header=BB0_3 Depth=1 blez $a0, .LBB0_20 # %bb.19: # in Loop: Header=BB0_3 Depth=1 @@ -275,7 +275,7 @@ ia_parse: # @ia_parse add.d $a0, $fp, $a0 ld.d $a0, $a0, 0 # 8-byte Folded Reload ldx.bu $s4, $a0, $s3 - beqz $s4, .LBB0_125 + beqz $s4, .LBB0_123 # %bb.22: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1960 @@ -288,7 +288,7 @@ ia_parse: # @ia_parse ldx.d $a0, $s2, $a0 addi.d $a2, $s4, -2 ori $a3, $zero, 34 - bltu $a3, $a2, .LBB0_118 + bltu $a3, $a2, .LBB0_116 # %bb.23: # in Loop: Header=BB0_3 Depth=1 slli.d $a2, $a2, 2 pcalau12i $a3, %pc_hi20(.LJTI0_0) @@ -303,11 +303,11 @@ ia_parse: # @ia_parse jirl $ra, $ra, 0 st.d $s1, $a0, 8 st.d $zero, $a0, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_25: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a1, %pc_hi20(ia_VARDECL) st.b $zero, $a1, %pc_lo12(ia_VARDECL) - b .LBB0_118 + b .LBB0_116 .LBB0_26: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a1, -1 ori $a1, $a1, 1904 @@ -337,22 +337,22 @@ ia_parse: # @ia_parse pcalau12i $a1, %pc_hi20(ia_VARDECL) ori $a2, $zero, 1 st.b $a2, $a1, %pc_lo12(ia_VARDECL) - b .LBB0_118 + b .LBB0_116 .LBB0_27: # in Loop: Header=BB0_3 Depth=1 ld.w $a0, $s2, 0 pcaddu18i $ra, %call36(string_IntToString) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_28: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $s2, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_29: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $s2, 0 move $a1, $zero pcaddu18i $ra, %call36(ia_Symbol) jirl $ra, $ra, 0 bgtz $a0, .LBB0_68 - b .LBB0_148 + b .LBB0_146 .LBB0_30: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a1, %got_pc_hi20(fol_IMPLIED) ld.d $a1, $a1, %got_pc_lo12(fol_IMPLIED) @@ -384,14 +384,14 @@ ia_parse: # @ia_parse ld.d $s3, $a2, 0 # 8-byte Folded Reload pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_33: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a1, %got_pc_hi20(fol_EXIST) ld.d $a1, $a1, %got_pc_lo12(fol_EXIST) b .LBB0_74 .LBB0_34: # in Loop: Header=BB0_3 Depth=1 move $a0, $zero - b .LBB0_118 + b .LBB0_116 .LBB0_35: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1904 @@ -429,7 +429,7 @@ ia_parse: # @ia_parse ld.d $s4, $a2, 0 # 8-byte Folded Reload pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_36: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a1, %got_pc_hi20(fol_EQUIV) ld.d $a1, $a1, %got_pc_lo12(fol_EQUIV) @@ -452,13 +452,13 @@ ia_parse: # @ia_parse move $s3, $s8 pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_38: # in Loop: Header=BB0_3 Depth=1 ld.w $a0, $s2, -24 ld.d $a1, $s2, -8 pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_39: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_TRUE) ld.d $a0, $a0, %got_pc_lo12(fol_TRUE) @@ -693,7 +693,7 @@ ia_parse: # @ia_parse move $a1, $zero pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 - b .LBB0_118 + b .LBB0_116 .LBB0_69: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1912 @@ -735,7 +735,7 @@ ia_parse: # @ia_parse srli.d $a0, $a0, 32 bstrins.d $a1, $a0, 63, 32 move $a0, $a1 - b .LBB0_118 + b .LBB0_116 .LBB0_75: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1912 @@ -747,7 +747,7 @@ ia_parse: # @ia_parse pcaddu18i $ra, %call36(ia_Symbol) jirl $ra, $ra, 0 sub.w $s3, $zero, $a0 - bgez $a0, .LBB0_150 + bgez $a0, .LBB0_148 # %bb.76: # in Loop: Header=BB0_3 Depth=1 move $s2, $a0 lu12i.w $a0, -1 @@ -756,13 +756,13 @@ ia_parse: # @ia_parse ld.d $a0, $a0, 0 # 8-byte Folded Reload and $a0, $a0, $s3 ori $a1, $zero, 2 - bne $a0, $a1, .LBB0_150 + bne $a0, $a1, .LBB0_148 # %bb.77: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $s1, -8 move $a1, $zero pcaddu18i $ra, %call36(ia_Symbol) jirl $ra, $ra, 0 - blez $a0, .LBB0_148 + blez $a0, .LBB0_146 # %bb.78: # in Loop: Header=BB0_3 Depth=1 move $a1, $zero pcaddu18i $ra, %call36(term_Create) @@ -819,10 +819,10 @@ ia_parse: # @ia_parse ori $a1, $a1, 1912 add.d $a1, $fp, $a1 ld.d $s3, $a1, 0 # 8-byte Folded Reload - b .LBB0_118 + b .LBB0_116 .LBB0_86: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $s2, -8 - b .LBB0_118 + b .LBB0_116 .LBB0_87: # in Loop: Header=BB0_3 Depth=1 move $s5, $zero lu12i.w $a0, -1 @@ -868,7 +868,7 @@ ia_parse: # @ia_parse ori $a0, $a0, 1920 add.d $a0, $fp, $a0 ld.d $a3, $a0, 0 # 8-byte Folded Reload - beqz $a3, .LBB0_101 + beqz $a3, .LBB0_99 # %bb.92: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_ALL) ld.d $a0, $a0, %got_pc_lo12(fol_ALL) @@ -877,7 +877,7 @@ ia_parse: # @ia_parse ori $a1, $a1, 1872 add.d $a1, $fp, $a1 ld.d $s2, $a1, 0 # 8-byte Folded Reload - bne $a0, $s8, .LBB0_102 + bne $a0, $s8, .LBB0_100 # %bb.93: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_OR) ld.d $a0, $a0, %got_pc_lo12(fol_OR) @@ -887,7 +887,7 @@ ia_parse: # @ia_parse add.d $a1, $fp, $a1 ld.d $a1, $a1, 0 # 8-byte Folded Reload ld.w $a1, $a1, 0 - bne $a0, $a1, .LBB0_110 + bne $a0, $a1, .LBB0_108 # %bb.94: # %.preheader.i303.preheader # in Loop: Header=BB0_3 Depth=1 move $s3, $s6 @@ -916,8 +916,8 @@ ia_parse: # @ia_parse lu12i.w $a0, -1 ori $a0, $a0, 1880 add.d $a0, $fp, $a0 - ld.d $a0, $a0, 0 # 8-byte Folded Reload - ld.d $a0, $a0, 16 + ld.d $s1, $a0, 0 # 8-byte Folded Reload + ld.d $a0, $s1, 16 lu12i.w $a1, -1 ori $a1, $a1, 1872 add.d $a1, $fp, $a1 @@ -931,7 +931,7 @@ ia_parse: # @ia_parse ori $a1, $a1, 1920 add.d $a1, $fp, $a1 ld.d $a3, $a1, 0 # 8-byte Folded Reload - beqz $a0, .LBB0_100 + beqz $a0, .LBB0_106 # %bb.97: # %.preheader.i91.i.preheader # in Loop: Header=BB0_3 Depth=1 move $a2, $a3 @@ -942,28 +942,19 @@ ia_parse: # @ia_parse move $a1, $a2 ld.d $a2, $a2, 0 bnez $a2, .LBB0_98 -# %bb.99: # in Loop: Header=BB0_3 Depth=1 - st.d $a0, $a1, 0 -.LBB0_100: # %list_Nconc.exit96.i - # in Loop: Header=BB0_3 Depth=1 - lu12i.w $a0, -1 - ori $a0, $a0, 1880 - add.d $a0, $fp, $a0 - ld.d $s1, $a0, 0 # 8-byte Folded Reload - st.d $a3, $s1, 16 - b .LBB0_117 -.LBB0_101: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_105 +.LBB0_99: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1872 add.d $a0, $fp, $a0 ld.d $s2, $a0, 0 # 8-byte Folded Reload - b .LBB0_109 -.LBB0_102: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_107 +.LBB0_100: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_EXIST) ld.d $a0, $a0, %got_pc_lo12(fol_EXIST) ld.w $a0, $a0, 0 - bne $a0, $s8, .LBB0_109 -# %bb.103: # in Loop: Header=BB0_3 Depth=1 + bne $a0, $s8, .LBB0_107 +# %bb.101: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_AND) ld.d $s2, $a0, %got_pc_lo12(fol_AND) ld.w $a0, $s2, 0 @@ -972,44 +963,44 @@ ia_parse: # @ia_parse add.d $a1, $fp, $a1 ld.d $s1, $a1, 0 # 8-byte Folded Reload ld.w $a1, $s1, 0 - bne $a0, $a1, .LBB0_112 -# %bb.104: # in Loop: Header=BB0_3 Depth=1 + bne $a0, $a1, .LBB0_110 +# %bb.102: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $s1, 16 lu12i.w $a1, -1 ori $a1, $a1, 1872 add.d $a1, $fp, $a1 ld.d $s2, $a1, 0 # 8-byte Folded Reload - beqz $a0, .LBB0_108 -# %bb.105: # %.preheader.i99.i.preheader + beqz $a0, .LBB0_106 +# %bb.103: # %.preheader.i99.i.preheader # in Loop: Header=BB0_3 Depth=1 move $a2, $a3 .p2align 4, , 16 -.LBB0_106: # %.preheader.i99.i +.LBB0_104: # %.preheader.i99.i # Parent Loop BB0_3 Depth=1 # => This Inner Loop Header: Depth=2 move $a1, $a2 ld.d $a2, $a2, 0 - bnez $a2, .LBB0_106 -# %bb.107: # in Loop: Header=BB0_3 Depth=1 + bnez $a2, .LBB0_104 +.LBB0_105: # in Loop: Header=BB0_3 Depth=1 st.d $a0, $a1, 0 lu12i.w $a0, -1 ori $a0, $a0, 1880 add.d $a0, $fp, $a0 ld.d $s1, $a0, 0 # 8-byte Folded Reload -.LBB0_108: # %list_Nconc.exit104.i +.LBB0_106: # %list_Nconc.exit96.i # in Loop: Header=BB0_3 Depth=1 st.d $a3, $s1, 16 - b .LBB0_117 -.LBB0_109: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_115 +.LBB0_107: # in Loop: Header=BB0_3 Depth=1 lu12i.w $a0, -1 ori $a0, $a0, 1880 add.d $a0, $fp, $a0 ld.d $s1, $a0, 0 # 8-byte Folded Reload - b .LBB0_117 -.LBB0_110: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_115 +.LBB0_108: # in Loop: Header=BB0_3 Depth=1 ld.d $a0, $a3, 0 - beqz $a0, .LBB0_115 -# %bb.111: # in Loop: Header=BB0_3 Depth=1 + beqz $a0, .LBB0_113 +# %bb.109: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %got_pc_hi20(fol_AND) ld.d $a0, $a0, %got_pc_lo12(fol_AND) ld.w $a0, $a0, 0 @@ -1050,8 +1041,8 @@ ia_parse: # @ia_parse ld.d $s2, $a0, 0 # 8-byte Folded Reload move $a0, $s6 move $s6, $s1 - b .LBB0_116 -.LBB0_112: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_114 +.LBB0_110: # in Loop: Header=BB0_3 Depth=1 ori $a0, $zero, 16 pcaddu18i $ra, %call36(memory_Malloc) jirl $ra, $ra, 0 @@ -1063,13 +1054,13 @@ ia_parse: # @ia_parse st.d $zero, $a0, 0 move $a2, $a1 .p2align 4, , 16 -.LBB0_113: # %.preheader.i107.i +.LBB0_111: # %.preheader.i107.i # Parent Loop BB0_3 Depth=1 # => This Inner Loop Header: Depth=2 move $a3, $a2 ld.d $a2, $a2, 0 - bnez $a2, .LBB0_113 -# %bb.114: # %list_Nconc.exit112.i + bnez $a2, .LBB0_111 +# %bb.112: # %list_Nconc.exit112.i # in Loop: Header=BB0_3 Depth=1 st.d $a0, $a3, 0 ld.w $a0, $s2, 0 @@ -1080,8 +1071,8 @@ ia_parse: # @ia_parse ori $a0, $a0, 1872 add.d $a0, $fp, $a0 ld.d $s2, $a0, 0 # 8-byte Folded Reload - b .LBB0_117 -.LBB0_115: # in Loop: Header=BB0_3 Depth=1 + b .LBB0_115 +.LBB0_113: # in Loop: Header=BB0_3 Depth=1 ori $a0, $zero, 16 move $s1, $a3 pcaddu18i $ra, %call36(memory_Malloc) @@ -1097,12 +1088,12 @@ ia_parse: # @ia_parse ld.d $a0, $a0, %got_pc_lo12(fol_IMPLIES) ld.w $a0, $a0, 0 move $a1, $s1 -.LBB0_116: # %ia_CreateQuantifier.exit +.LBB0_114: # %ia_CreateQuantifier.exit # in Loop: Header=BB0_3 Depth=1 pcaddu18i $ra, %call36(term_Create) jirl $ra, $ra, 0 move $s1, $a0 -.LBB0_117: # %ia_CreateQuantifier.exit +.LBB0_115: # %ia_CreateQuantifier.exit # in Loop: Header=BB0_3 Depth=1 ori $a0, $zero, 16 pcaddu18i $ra, %call36(memory_Malloc) @@ -1119,7 +1110,7 @@ ia_parse: # @ia_parse add.d $a1, $fp, $a1 ld.d $s5, $a1, 0 # 8-byte Folded Reload .p2align 4, , 16 -.LBB0_118: # %list_Nconc.exit +.LBB0_116: # %list_Nconc.exit # in Loop: Header=BB0_3 Depth=1 slli.d $a1, $s3, 3 sub.d $a3, $s2, $a1 @@ -1142,7 +1133,7 @@ ia_parse: # @ia_parse addi.d $s2, $a3, 8 ori $a3, $zero, 83 bltu $a3, $a1, .LBB0_1 -# %bb.119: # in Loop: Header=BB0_3 Depth=1 +# %bb.117: # in Loop: Header=BB0_3 Depth=1 bstrpick.d $a2, $a2, 15, 0 pcalau12i $a3, %pc_hi20(yycheck) addi.d $a3, $a3, %pc_lo12(yycheck) @@ -1150,14 +1141,14 @@ ia_parse: # @ia_parse bstrpick.d $a3, $a3, 15, 0 bstrpick.d $a2, $a2, 15, 0 bne $a2, $a3, .LBB0_1 -# %bb.120: # in Loop: Header=BB0_3 Depth=1 +# %bb.118: # in Loop: Header=BB0_3 Depth=1 pcalau12i $a0, %pc_hi20(yytable) addi.d $a0, $a0, %pc_lo12(yytable) ldx.bu $s3, $a0, $a1 b .LBB0_2 -.LBB0_121: +.LBB0_119: ori $a1, $zero, 1 -.LBB0_122: # %.thread +.LBB0_120: # %.thread move $a0, $a1 addi.d $sp, $fp, -2048 addi.d $sp, $sp, -208 @@ -1175,10 +1166,10 @@ ia_parse: # @ia_parse ld.d $ra, $sp, 2024 # 8-byte Folded Reload addi.d $sp, $sp, 2032 ret -.LBB0_123: +.LBB0_121: move $a1, $zero - b .LBB0_122 -.LBB0_124: + b .LBB0_120 +.LBB0_122: pcaddu18i $ra, %call36(ia_VarCheck) jirl $ra, $ra, 0 ld.d $s0, $s2, -48 @@ -1197,8 +1188,8 @@ ia_parse: # @ia_parse pcaddu18i $ra, %call36(flag_SetFlagValue) jirl $ra, $ra, 0 move $a1, $zero - b .LBB0_122 -.LBB0_125: + b .LBB0_120 +.LBB0_123: lu12i.w $a0, -1 ori $a0, $a0, 1848 add.d $a0, $fp, $a0 @@ -1207,8 +1198,8 @@ ia_parse: # @ia_parse addi.d $a0, $a0, 1 addi.w $a1, $zero, -28 st.w $a0, $a2, %pc_lo12(ia_nerrs) - blt $s1, $a1, .LBB0_134 -# %bb.126: + blt $s1, $a1, .LBB0_132 +# %bb.124: lu12i.w $a0, -1 ori $a0, $a0, 1992 add.d $a0, $fp, $a0 @@ -1220,8 +1211,8 @@ ia_parse: # @ia_parse ori $a3, $a3, 1992 add.d $a3, $fp, $a3 st.d $a2, $a3, 0 # 8-byte Folded Spill - bltu $a1, $a0, .LBB0_128 -# %bb.127: + bltu $a1, $a0, .LBB0_126 +# %bb.125: pcalau12i $a1, %pc_hi20(yytranslate) addi.d $a1, $a1, %pc_lo12(yytranslate) ldx.bu $a0, $a1, $a0 @@ -1229,7 +1220,7 @@ ia_parse: # @ia_parse ori $a1, $a1, 1992 add.d $a1, $fp, $a1 st.d $a0, $a1, 0 # 8-byte Folded Spill -.LBB0_128: # %.lr.ph.preheader +.LBB0_126: # %.lr.ph.preheader sub.d $a0, $zero, $s1 srai.d $a1, $s1, 63 and $s3, $a1, $a0 @@ -1244,38 +1235,38 @@ ia_parse: # @ia_parse ori $s7, $zero, 1 ori $s8, $zero, 39 move $a0, $s3 - b .LBB0_130 + b .LBB0_128 .p2align 4, , 16 -.LBB0_129: # in Loop: Header=BB0_130 Depth=1 +.LBB0_127: # in Loop: Header=BB0_128 Depth=1 addi.d $a0, $s0, 1 addi.d $s6, $s6, 8 - bge $s0, $s8, .LBB0_135 -.LBB0_130: # %.lr.ph + bge $s0, $s8, .LBB0_133 +.LBB0_128: # %.lr.ph # =>This Inner Loop Header: Depth=1 move $s0, $a0 - beq $a0, $s7, .LBB0_129 -# %bb.131: # %.lr.ph - # in Loop: Header=BB0_130 Depth=1 + beq $a0, $s7, .LBB0_127 +# %bb.129: # %.lr.ph + # in Loop: Header=BB0_128 Depth=1 ldx.b $a0, $s1, $s0 - bne $s0, $a0, .LBB0_129 -# %bb.132: # in Loop: Header=BB0_130 Depth=1 + bne $s0, $a0, .LBB0_127 +# %bb.130: # in Loop: Header=BB0_128 Depth=1 ld.d $a0, $s6, 0 pcaddu18i $ra, %call36(strlen) jirl $ra, $ra, 0 add.d $a0, $s5, $a0 addi.d $s5, $a0, 15 addi.w $s4, $s4, 1 - b .LBB0_129 -.LBB0_133: + b .LBB0_127 +.LBB0_131: pcalau12i $a0, %pc_hi20(.L.str.9) addi.d $a0, $a0, %pc_lo12(.L.str.9) pcaddu18i $ra, %call36(ia_error) jirl $ra, $ra, 0 -.LBB0_134: # %.thread349 +.LBB0_132: # %.thread349 pcalau12i $a0, %pc_hi20(.L.str.8) addi.d $a0, $a0, %pc_lo12(.L.str.8) - b .LBB0_147 -.LBB0_135: # %._crit_edge.loopexit + b .LBB0_145 +.LBB0_133: # %._crit_edge.loopexit lu12i.w $a0, -1 ori $a0, $a0, 1992 add.d $a0, $fp, $a0 @@ -1300,17 +1291,17 @@ ia_parse: # @ia_parse st.d $a3, $a0, 16 vst $vr0, $a0, 0 .p2align 4, , 16 -.LBB0_136: # %yystpcpy.exit +.LBB0_134: # %yystpcpy.exit # =>This Inner Loop Header: Depth=1 ldx.bu $a2, $s0, $a1 add.d $a3, $a0, $a1 st.b $a2, $a3, 24 addi.d $a1, $a1, 1 - bnez $a2, .LBB0_136 -# %bb.137: # %yystpcpy.exit326 + bnez $a2, .LBB0_134 +# %bb.135: # %yystpcpy.exit326 ori $a2, $zero, 4 - blt $a2, $s4, .LBB0_147 -# %bb.138: # %.lr.ph398.preheader + blt $a2, $s4, .LBB0_145 +# %bb.136: # %.lr.ph398.preheader add.d $a1, $a0, $a1 addi.d $a5, $a1, 23 ori $a1, $zero, 1 @@ -1320,56 +1311,56 @@ ia_parse: # @ia_parse addi.d $a3, $a3, %pc_lo12(.L.str.5) move $a4, $zero ori $a6, $zero, 39 - b .LBB0_140 + b .LBB0_138 .p2align 4, , 16 -.LBB0_139: # in Loop: Header=BB0_140 Depth=1 +.LBB0_137: # in Loop: Header=BB0_138 Depth=1 addi.d $s3, $a7, 1 - bge $a7, $a6, .LBB0_147 -.LBB0_140: # %.lr.ph398 + bge $a7, $a6, .LBB0_145 +.LBB0_138: # %.lr.ph398 # =>This Loop Header: Depth=1 + # Child Loop BB0_141 Depth 2 # Child Loop BB0_143 Depth 2 - # Child Loop BB0_145 Depth 2 move $a7, $s3 - beq $s3, $a1, .LBB0_139 -# %bb.141: # %.lr.ph398 - # in Loop: Header=BB0_140 Depth=1 + beq $s3, $a1, .LBB0_137 +# %bb.139: # %.lr.ph398 + # in Loop: Header=BB0_138 Depth=1 ldx.b $t0, $s1, $a7 - bne $a7, $t0, .LBB0_139 -# %bb.142: # in Loop: Header=BB0_140 Depth=1 + bne $a7, $t0, .LBB0_137 +# %bb.140: # in Loop: Header=BB0_138 Depth=1 sltui $t0, $a4, 1 masknez $t1, $a2, $t0 maskeqz $t0, $a3, $t0 or $t1, $t0, $t1 addi.d $t0, $a5, -1 .p2align 4, , 16 -.LBB0_143: # Parent Loop BB0_140 Depth=1 +.LBB0_141: # Parent Loop BB0_138 Depth=1 # => This Inner Loop Header: Depth=2 ld.bu $t2, $t1, 0 move $a5, $t0 addi.d $t0, $t0, 1 addi.d $t1, $t1, 1 st.b $t2, $a5, 1 - bnez $t2, .LBB0_143 -# %bb.144: # %yystpcpy.exit330 - # in Loop: Header=BB0_140 Depth=1 + bnez $t2, .LBB0_141 +# %bb.142: # %yystpcpy.exit330 + # in Loop: Header=BB0_138 Depth=1 slli.d $t0, $a7, 3 ldx.d $t0, $s2, $t0 .p2align 4, , 16 -.LBB0_145: # Parent Loop BB0_140 Depth=1 +.LBB0_143: # Parent Loop BB0_138 Depth=1 # => This Inner Loop Header: Depth=2 ld.bu $t1, $t0, 0 addi.d $t0, $t0, 1 st.b $t1, $a5, 1 addi.d $a5, $a5, 1 - bnez $t1, .LBB0_145 -# %bb.146: # %yystpcpy.exit334 - # in Loop: Header=BB0_140 Depth=1 + bnez $t1, .LBB0_143 +# %bb.144: # %yystpcpy.exit334 + # in Loop: Header=BB0_138 Depth=1 addi.w $a4, $a4, 1 - b .LBB0_139 -.LBB0_147: # %.loopexit + b .LBB0_137 +.LBB0_145: # %.loopexit pcaddu18i $ra, %call36(ia_error) jirl $ra, $ra, 0 -.LBB0_148: +.LBB0_146: pcalau12i $a1, %got_pc_hi20(stdout) ld.d $a1, $a1, %got_pc_lo12(stdout) ld.d $a1, $a1, 0 @@ -1401,7 +1392,7 @@ ia_parse: # @ia_parse jirl $ra, $ra, 0 pcaddu18i $ra, %call36(misc_Error) jirl $ra, $ra, 0 -.LBB0_149: +.LBB0_147: pcalau12i $a0, %got_pc_hi20(stdout) ld.d $a0, $a0, %got_pc_lo12(stdout) ld.d $a0, $a0, 0 @@ -1417,7 +1408,7 @@ ia_parse: # @ia_parse jirl $ra, $ra, 0 pcaddu18i $ra, %call36(misc_Error) jirl $ra, $ra, 0 -.LBB0_150: # %symbol_IsPredicate.exit.thread +.LBB0_148: # %symbol_IsPredicate.exit.thread pcalau12i $a0, %got_pc_hi20(stdout) ld.d $a0, $a0, %got_pc_lo12(stdout) ld.d $a0, $a0, 0 @@ -1451,8 +1442,8 @@ ia_parse: # @ia_parse .section .rodata,"a",@progbits .p2align 2, 0x0 .LJTI0_0: + .word .LBB0_120-.LJTI0_0 .word .LBB0_122-.LJTI0_0 - .word .LBB0_124-.LJTI0_0 .word .LBB0_24-.LJTI0_0 .word .LBB0_64-.LJTI0_0 .word .LBB0_67-.LJTI0_0 @@ -1467,7 +1458,7 @@ ia_parse: # @ia_parse .word .LBB0_40-.LJTI0_0 .word .LBB0_26-.LJTI0_0 .word .LBB0_25-.LJTI0_0 - .word .LBB0_149-.LJTI0_0 + .word .LBB0_147-.LJTI0_0 .word .LBB0_72-.LJTI0_0 .word .LBB0_36-.LJTI0_0 .word .LBB0_30-.LJTI0_0 diff --git a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s index 0dc8d7cd..32e80c9e 100644 --- a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s +++ b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-inf.s @@ -2599,10 +2599,10 @@ inf_GenLitSPRight: # @inf_GenLitSPRight # %bb.34: # in Loop: Header=BB7_13 Depth=2 ori $a0, $zero, 1 st.d $a0, $sp, 216 # 8-byte Folded Spill - ld.d $a1, $sp, 256 # 8-byte Folded Reload - ld.d $a0, $a1, 56 - ld.d $a2, $sp, 96 # 8-byte Folded Reload - ldx.d $a0, $a0, $a2 + ld.d $a0, $sp, 256 # 8-byte Folded Reload + ld.d $a0, $a0, 56 + ld.d $a1, $sp, 96 # 8-byte Folded Reload + ldx.d $a0, $a0, $a1 ld.w $a0, $a0, 8 beqz $a0, .LBB7_38 # %bb.35: # in Loop: Header=BB7_13 Depth=2 @@ -4102,7 +4102,6 @@ inf_GeneralResolution: # @inf_GeneralResolution .LBB11_15: # in Loop: Header=BB11_11 Depth=1 ld.wu $a0, $s8, 0 andi $a1, $a0, 4 - st.d $a2, $sp, 56 # 8-byte Folded Spill bnez $a1, .LBB11_19 # %bb.16: # in Loop: Header=BB11_11 Depth=1 ld.bu $a1, $s3, 48 @@ -4121,6 +4120,7 @@ inf_GeneralResolution: # @inf_GeneralResolution beqz $a1, .LBB11_24 .LBB11_20: # %.thread172 # in Loop: Header=BB11_11 Depth=1 + st.d $a2, $sp, 56 # 8-byte Folded Spill ld.d $a2, $s8, 16 ld.d $a6, $a2, 56 addi.d $a1, $zero, -1 @@ -4149,6 +4149,7 @@ inf_GeneralResolution: # @inf_GeneralResolution b .LBB11_25 .p2align 4, , 16 .LBB11_24: # in Loop: Header=BB11_11 Depth=1 + st.d $a2, $sp, 56 # 8-byte Folded Spill ori $s5, $zero, 1 .LBB11_25: # %.thread # in Loop: Header=BB11_11 Depth=1 diff --git a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s index 109d9e6f..7eeb96f6 100644 --- a/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s +++ b/results/MultiSource/Applications/SPASS/CMakeFiles/SPASS.dir/rules-sort.s @@ -1122,6 +1122,7 @@ inf_ConstraintHyperResolvents: # @inf_ConstraintHyperResolvents move $s0, $zero vrepli.b $vr0, 0 vst $vr0, $sp, 16 # 16-byte Folded Spill + ld.d $s4, $sp, 96 # 8-byte Folded Reload b .LBB2_41 .p2align 4, , 16 .LBB2_39: # in Loop: Header=BB2_41 Depth=1 @@ -1211,7 +1212,6 @@ inf_ConstraintHyperResolvents: # @inf_ConstraintHyperResolvents ld.d $s7, $sp, 136 # 8-byte Folded Reload ld.d $s8, $sp, 104 # 8-byte Folded Reload ld.d $a0, $s8, 0 - ld.d $s4, $sp, 96 # 8-byte Folded Reload ld.d $a2, $s4, 0 ld.d $a1, $sp, 152 # 8-byte Folded Reload pcaddu18i $ra, %call36(unify_UnifyNoOC) @@ -1435,8 +1435,6 @@ inf_ConstraintHyperResolvents: # @inf_ConstraintHyperResolvents ld.w $a1, $a0, 0 addi.d $a1, $a1, -1 st.w $a1, $a0, 0 - ld.d $a0, $sp, 112 # 8-byte Folded Reload - st.d $a0, $sp, 112 # 8-byte Folded Spill ld.d $fp, $sp, 104 # 8-byte Folded Reload ld.d $a0, $sp, 136 # 8-byte Folded Reload st.d $a0, $sp, 152 # 8-byte Folded Spill diff --git a/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/gram.s b/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/gram.s index 6e1c24ef..0632ea7d 100644 --- a/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/gram.s +++ b/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/gram.s @@ -5835,6 +5835,7 @@ build_grammar: # @build_grammar move $s4, $zero ori $s5, $zero, 5 ori $s6, $zero, 3 + ld.d $fp, $sp, 32 # 8-byte Folded Reload b .LBB33_168 .p2align 4, , 16 .LBB33_166: # in Loop: Header=BB33_168 Depth=1 @@ -5848,7 +5849,6 @@ build_grammar: # @build_grammar ori $a1, $zero, 32 pcaddu18i $ra, %call36(calloc) jirl $ra, $ra, 0 - ld.d $fp, $sp, 32 # 8-byte Folded Reload ld.w $a1, $fp, 576 st.d $a0, $s0, 72 st.w $s6, $a0, 0 diff --git a/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/write_ctables.s b/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/write_ctables.s index 98f1f202..223d38a2 100644 --- a/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/write_ctables.s +++ b/results/MultiSource/Applications/d/CMakeFiles/make_dparser.dir/write_ctables.s @@ -2814,8 +2814,8 @@ write_parser_tables_as_C: # @write_parser_tables_as_C pcalau12i $a0, %pc_hi20(.L.str.114) addi.d $a0, $a0, %pc_lo12(.L.str.114) st.d $a0, $sp, 96 # 8-byte Folded Spill - move $s6, $zero st.d $s2, $sp, 120 # 8-byte Folded Spill + move $s6, $zero b .LBB8_285 .p2align 4, , 16 .LBB8_283: # %._crit_edge187.i @@ -3354,6 +3354,8 @@ write_parser_tables_as_C: # @write_parser_tables_as_C addi.d $s5, $a0, %pc_lo12(.L.str.121) move $s6, $zero st.d $s1, $sp, 160 # 8-byte Folded Spill + ld.d $s4, $sp, 168 # 8-byte Folded Reload + ld.d $s2, $sp, 72 # 8-byte Folded Reload b .LBB8_338 .p2align 4, , 16 .LBB8_336: # %._crit_edge.i113 @@ -3388,7 +3390,6 @@ write_parser_tables_as_C: # @write_parser_tables_as_C ld.w $a0, $s7, 256 ori $a1, $zero, 1 sltu $a0, $a1, $a0 - ld.d $s4, $sp, 168 # 8-byte Folded Reload masknez $a1, $s4, $a0 ld.d $a2, $sp, 80 # 8-byte Folded Reload maskeqz $a0, $a2, $a0 @@ -3400,7 +3401,6 @@ write_parser_tables_as_C: # @write_parser_tables_as_C pcaddu18i $ra, %call36(fprintf) jirl $ra, $ra, 0 ld.w $a0, $s7, 256 - ld.d $s2, $sp, 72 # 8-byte Folded Reload beqz $a0, .LBB8_336 # %bb.341: # %.lr.ph.i110 # in Loop: Header=BB8_338 Depth=1 diff --git a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/kimwy.s b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/kimwy.s index e9bc25fd..c39d8854 100644 --- a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/kimwy.s +++ b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/kimwy.s @@ -3871,9 +3871,9 @@ _Z7yyparsev: # @_Z7yyparsev addi.d $s2, $a0, %pc_lo12(.L.str.7) pcalau12i $a0, %pc_hi20(.L.str.21) addi.d $s3, $a0, %pc_lo12(.L.str.21) + ld.d $s5, $sp, 128 # 8-byte Folded Reload b .LBB4_471 .LBB4_470: # in Loop: Header=BB4_471 Depth=1 - ld.d $s5, $sp, 128 # 8-byte Folded Reload ld.d $a0, $s5, 0 move $a1, $s2 move $a2, $s3 diff --git a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/main.s b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/main.s index c6c58633..63fc9e81 100644 --- a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/main.s +++ b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/main.s @@ -2459,6 +2459,7 @@ main: # @main pcalau12i $a0, %pc_hi20(.L.str.98) addi.d $s0, $a0, %pc_lo12(.L.str.98) move $a0, $s0 + st.d $s0, $sp, 208 # 8-byte Folded Spill move $a1, $fp pcaddu18i $ra, %call36(_ZN2kc12mkcasestringEPKci) jirl $ra, $ra, 0 @@ -2610,7 +2611,6 @@ main: # @main jirl $ra, $ra, 0 st.d $a0, $sp, 96 # 8-byte Folded Spill move $a0, $s0 - st.d $s0, $sp, 208 # 8-byte Folded Spill move $a1, $fp pcaddu18i $ra, %call36(_ZN2kc12mkcasestringEPKci) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/unpk.s b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/unpk.s index f10ac547..32ea9d25 100644 --- a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/unpk.s +++ b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/unpk.s @@ -48354,7 +48354,6 @@ _ZN2kc38impl_ac_direct_declarator_AcMemberDecl10do_unparseERNS_21printer_functor jirl $ra, $a3, 0 .LBB280_5: # %.sink.split vld $vr0, $sp, 0 # 16-byte Folded Reload - vst $vr0, $sp, 0 # 16-byte Folded Spill vpickve2gr.d $a0, $vr0, 0 ld.d $a1, $a0, 0 ld.d $a3, $a1, 72 diff --git a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/util.s b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/util.s index c804fab7..a12fe943 100644 --- a/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/util.s +++ b/results/MultiSource/Applications/kimwitu++/CMakeFiles/kc.dir/util.s @@ -4277,6 +4277,8 @@ _ZN2kc25unparse_string_collectionEv: # @_ZN2kc25unparse_string_collectionEv addi.d $a0, $a0, %pc_lo12(.L.str.37) st.d $a0, $sp, 16 # 8-byte Folded Spill st.d $s4, $sp, 80 # 8-byte Folded Spill + ld.d $s2, $sp, 48 # 8-byte Folded Reload + ld.d $s6, $sp, 40 # 8-byte Folded Reload .p2align 4, , 16 .LBB44_3: # %.lr.ph # =>This Loop Header: Depth=1 @@ -4295,8 +4297,6 @@ _ZN2kc25unparse_string_collectionEv: # @_ZN2kc25unparse_string_collectionEv st.d $fp, $sp, 64 # 8-byte Folded Spill slli.d $a0, $fp, 3 st.d $a0, $sp, 72 # 8-byte Folded Spill - ld.d $s2, $sp, 48 # 8-byte Folded Reload - ld.d $s6, $sp, 40 # 8-byte Folded Reload ld.d $s4, $sp, 32 # 8-byte Folded Reload ld.d $fp, $sp, 24 # 8-byte Folded Reload .p2align 4, , 16 diff --git a/results/MultiSource/Applications/minisat/CMakeFiles/minisat.dir/Main.s b/results/MultiSource/Applications/minisat/CMakeFiles/minisat.dir/Main.s index a6a7cd82..6b9b576f 100644 --- a/results/MultiSource/Applications/minisat/CMakeFiles/minisat.dir/Main.s +++ b/results/MultiSource/Applications/minisat/CMakeFiles/minisat.dir/Main.s @@ -1064,9 +1064,9 @@ main: # @main jirl $ra, $ra, 0 .Ltmp28: # EH_LABEL # %bb.101: # in Loop: Header=BB3_44 Depth=1 - ld.d $a1, $sp, 32 # 8-byte Folded Reload st.d $a0, $sp, 24 # 8-byte Folded Spill - ld.d $a0, $a1, 0 + ld.d $a0, $sp, 32 # 8-byte Folded Reload + ld.d $a0, $a0, 0 pcaddu18i $ra, %call36(fflush) jirl $ra, $ra, 0 ld.d $s6, $sp, 16 # 8-byte Folded Reload diff --git a/results/MultiSource/Applications/obsequi/CMakeFiles/Obsequi.dir/negamax.s b/results/MultiSource/Applications/obsequi/CMakeFiles/Obsequi.dir/negamax.s index 40b48377..10653b39 100644 --- a/results/MultiSource/Applications/obsequi/CMakeFiles/Obsequi.dir/negamax.s +++ b/results/MultiSource/Applications/obsequi/CMakeFiles/Obsequi.dir/negamax.s @@ -652,7 +652,6 @@ search_for_move: # @search_for_move pcaddu18i $ra, %call36(check_hash_code_sanity) jirl $ra, $ra, 0 ld.d $a0, $sp, 272 # 8-byte Folded Reload - st.d $a0, $sp, 272 # 8-byte Folded Spill sub.w $a3, $zero, $a0 ld.d $a0, $sp, 200 # 8-byte Folded Reload ld.d $a1, $sp, 184 # 8-byte Folded Reload @@ -1271,6 +1270,8 @@ negamax: # @negamax # implicit-def: $r30 # implicit-def: $r31 st.d $s3, $sp, 144 # 8-byte Folded Spill + ld.d $s2, $sp, 112 # 8-byte Folded Reload + ld.d $s6, $sp, 152 # 8-byte Folded Reload b .LBB1_22 .LBB1_21: # %..loopexit_crit_edge # in Loop: Header=BB1_22 Depth=1 @@ -1345,7 +1346,6 @@ negamax: # @negamax ld.w $a0, $a0, %pc_lo12(starting_depth) sub.w $a0, $a0, $s3 slli.d $a0, $a0, 2 - ld.d $s2, $sp, 112 # 8-byte Folded Reload ld.w $a1, $s2, %pc_lo12(g_empty_squares) srli.d $a2, $s7, 32 ld.wu $s7, $s1, 8 @@ -1357,7 +1357,6 @@ negamax: # @negamax st.w $a1, $s2, %pc_lo12(g_empty_squares) bstrins.d $s7, $a2, 63, 32 move $a1, $s7 - ld.d $s6, $sp, 152 # 8-byte Folded Reload move $a2, $s6 pcaddu18i $ra, %call36(toggle_move) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s b/results/MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s index 721b3087..b182082f 100644 --- a/results/MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s +++ b/results/MultiSource/Applications/oggenc/CMakeFiles/oggenc.dir/oggenc.s @@ -39051,6 +39051,7 @@ mdct_butterflies: # @mdct_butterflies vst $vr0, $sp, 16 # 16-byte Folded Spill slli.d $t0, $a0, 2 slli.d $a0, $a0, 7 + vld $vr9, $sp, 16 # 16-byte Folded Reload .p2align 4, , 16 .LBB216_8: # %vector.body # =>This Inner Loop Header: Depth=1 @@ -39355,7 +39356,6 @@ mdct_butterflies: # @mdct_butterflies vfadd.s $vr23, $vr24, $vr3 vfadd.s $vr3, $vr1, $vr4 vfsub.s $vr1, $vr1, $vr4 - vld $vr9, $sp, 16 # 16-byte Folded Reload vfmul.s $vr4, $vr11, $vr9 vfmul.s $vr5, $vr5, $vr9 vfsub.s $vr16, $vr4, $vr5 @@ -79488,7 +79488,6 @@ dradb3: # @dradb3 st.d $t3, $sp, 232 # 8-byte Folded Spill move $t3, $s4 alsl.d $s4, $s4, $t5, 2 - st.d $t3, $sp, 448 # 8-byte Folded Spill alsl.d $t0, $t3, $t0, 2 st.d $t0, $sp, 240 # 8-byte Folded Spill sltu $t5, $t7, $t1 diff --git a/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/exact.s b/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/exact.s index 2848c37d..c8ac5fb1 100644 --- a/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/exact.s +++ b/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/exact.s @@ -122,8 +122,8 @@ Q_do_exact: # @Q_do_exact # in Loop: Header=BB0_3 Depth=1 st.d $s2, $sp, 16 # 8-byte Folded Spill slli.d $s1, $s7, 32 - ld.d $a1, $sp, 24 # 8-byte Folded Reload move $s2, $s8 + ld.d $a1, $sp, 24 # 8-byte Folded Reload alsl.d $s8, $s7, $a1, 3 addi.w $a0, $s7, 1 move $s7, $a2 diff --git a/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/parse.s b/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/parse.s index 6a0aaceb..13c3b12d 100644 --- a/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/parse.s +++ b/results/MultiSource/Applications/spiff/CMakeFiles/spiff.dir/parse.s @@ -130,7 +130,7 @@ P_file_parse: # @P_file_parse st.d $a0, $sp, 88 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(_L_ai) ld.d $a0, $a0, %got_pc_lo12(_L_ai) - st.d $a0, $sp, 8 # 8-byte Folded Spill + st.d $a0, $sp, 16 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(_L_btlindex) ld.d $a0, $a0, %got_pc_lo12(_L_btlindex) st.d $a0, $sp, 104 # 8-byte Folded Spill @@ -524,7 +524,7 @@ P_file_parse: # @P_file_parse ld.w $a3, $a3, 0 ld.d $a4, $sp, 96 # 8-byte Folded Reload stx.w $a2, $a4, $a1 - ld.d $a2, $sp, 8 # 8-byte Folded Reload + ld.d $a2, $sp, 16 # 8-byte Folded Reload stx.w $a3, $a2, $a1 .LBB1_51: # in Loop: Header=BB1_3 Depth=1 ld.w $a1, $s6, 0 @@ -773,18 +773,18 @@ P_file_parse: # @P_file_parse add.d $a1, $a1, $a2 bge $s0, $a5, .LBB1_79 # %bb.75: # in Loop: Header=BB1_3 Depth=1 - st.d $s6, $sp, 24 # 8-byte Folded Spill - st.d $a5, $sp, 16 # 8-byte Folded Spill + st.d $s6, $sp, 8 # 8-byte Folded Spill + st.d $a5, $sp, 24 # 8-byte Folded Spill pcaddu18i $ra, %call36(strcpy) jirl $ra, $ra, 0 addi.w $a0, $s0, 1 move $s6, $s5 - ld.d $a1, $sp, 16 # 8-byte Folded Reload + ld.d $a1, $sp, 24 # 8-byte Folded Reload bge $a0, $a1, .LBB1_78 # %bb.76: # %.lr.ph.preheader.i # in Loop: Header=BB1_3 Depth=1 nor $a1, $s0, $zero - ld.d $a2, $sp, 16 # 8-byte Folded Reload + ld.d $a2, $sp, 24 # 8-byte Folded Reload add.d $s0, $a1, $a2 slli.d $s5, $a0, 2 .p2align 4, , 16 @@ -816,7 +816,7 @@ P_file_parse: # @P_file_parse masknez $a1, $s3, $a0 maskeqz $a2, $s1, $a0 or $a1, $a2, $a1 - ld.d $a2, $sp, 16 # 8-byte Folded Reload + ld.d $a2, $sp, 24 # 8-byte Folded Reload slli.d $a2, $a2, 2 ldx.w $a1, $a1, $a2 masknez $a2, $s2, $a0 @@ -834,7 +834,7 @@ P_file_parse: # @P_file_parse pcaddu18i $ra, %call36(strncat) jirl $ra, $ra, 0 move $s5, $s6 - ld.d $s6, $sp, 24 # 8-byte Folded Reload + ld.d $s6, $sp, 8 # 8-byte Folded Reload b .LBB1_80 .LBB1_79: # in Loop: Header=BB1_3 Depth=1 ld.w $a2, $fp, %pc_lo12(_P_stringsize) diff --git a/results/MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s b/results/MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s index 90fe466c..a30eb32d 100644 --- a/results/MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s +++ b/results/MultiSource/Applications/sqlite3/CMakeFiles/sqlite3.dir/sqlite3.s @@ -69896,13 +69896,13 @@ sqlite3Parser: # @sqlite3Parser move $s3, $s2 beqz $a0, .LBB399_1279 .LBB399_1436: # in Loop: Header=BB399_3 Depth=1 - move $a2, $a0 + move $a1, $a0 ld.d $a0, $sp, 56 # 8-byte Folded Reload addi.d $a0, $a0, -41 sltui $a0, $a0, 1 st.d $a0, $sp, 72 # 8-byte Folded Spill - move $s8, $a2 - addi.d $a0, $a2, 8 + move $s8, $a1 + addi.d $a0, $a1, 8 ori $a2, $zero, 80 move $a1, $zero pcaddu18i $ra, %call36(memset) @@ -78289,6 +78289,7 @@ sqlite3Update: # @sqlite3Update move $s8, $zero addi.d $s0, $s3, 1 ld.d $s1, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 184 # 8-byte Folded Reload b .LBB415_189 .LBB415_187: # in Loop: Header=BB415_189 Depth=1 ori $a1, $zero, 112 @@ -78323,7 +78324,6 @@ sqlite3Update: # @sqlite3Update b .LBB415_188 .LBB415_192: # in Loop: Header=BB415_189 Depth=1 ori $a1, $zero, 2 - ld.d $s5, $sp, 184 # 8-byte Folded Reload move $a0, $s5 ld.d $a2, $sp, 152 # 8-byte Folded Reload move $a3, $s8 @@ -78413,6 +78413,7 @@ sqlite3Update: # @sqlite3Update move $s0, $zero move $s3, $zero ld.d $s1, $sp, 200 # 8-byte Folded Reload + ld.d $s5, $sp, 184 # 8-byte Folded Reload b .LBB415_208 .LBB415_206: # in Loop: Header=BB415_208 Depth=1 add.w $a3, $s8, $s3 @@ -78451,7 +78452,6 @@ sqlite3Update: # @sqlite3Update .LBB415_212: # in Loop: Header=BB415_208 Depth=1 add.w $a4, $s8, $s3 ori $a1, $zero, 2 - ld.d $s5, $sp, 184 # 8-byte Folded Reload move $a0, $s5 ld.d $a2, $sp, 152 # 8-byte Folded Reload move $a3, $s3 @@ -79498,7 +79498,6 @@ sqlite3Insert: # @sqlite3Insert ld.d $a2, $sp, 48 # 8-byte Folded Reload ld.d $a3, $sp, 160 # 8-byte Folded Reload ld.d $a4, $sp, 152 # 8-byte Folded Reload - st.d $a4, $sp, 152 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqlite3VdbeAddOp3) jirl $ra, $ra, 0 ori $a1, $zero, 24 @@ -83387,6 +83386,7 @@ sqlite3Pragma: # @sqlite3Pragma move $s0, $zero move $s3, $zero move $s4, $zero + ld.d $s2, $sp, 96 # 8-byte Folded Reload b .LBB420_305 .LBB420_304: # in Loop: Header=BB420_305 Depth=1 addi.d $s4, $s4, 1 @@ -83407,7 +83407,6 @@ sqlite3Pragma: # @sqlite3Pragma move $a2, $s3 pcaddu18i $ra, %call36(sqlite3VdbeAddOp2) jirl $ra, $ra, 0 - ld.d $s2, $sp, 96 # 8-byte Folded Reload ld.d $a0, $s2, 16 ldx.d $a5, $a0, $s0 ori $a1, $zero, 88 @@ -84777,8 +84776,8 @@ sqlite3Reindex: # @sqlite3Reindex # %bb.34: # in Loop: Header=BB422_18 Depth=3 pcalau12i $a0, %pc_hi20(mem.2) ld.d $a0, $a0, %pc_lo12(mem.2) - ld.d $a5, $sp, 104 # 8-byte Folded Reload ori $a2, $zero, 1 + ld.d $a5, $sp, 104 # 8-byte Folded Reload st.b $a2, $a5, %pc_lo12(mem.3) ld.d $a2, $sp, 48 # 8-byte Folded Reload move $s5, $a4 @@ -85943,8 +85942,8 @@ sqlite3Reindex: # @sqlite3Reindex # %bb.216: # in Loop: Header=BB422_18 Depth=3 pcalau12i $a0, %pc_hi20(mem.2) ld.d $a0, $a0, %pc_lo12(mem.2) - ld.d $a4, $sp, 104 # 8-byte Folded Reload ori $a2, $zero, 1 + ld.d $a4, $sp, 104 # 8-byte Folded Reload st.b $a2, $a4, %pc_lo12(mem.3) move $a2, $s1 jirl $ra, $a3, 0 @@ -85970,8 +85969,8 @@ sqlite3Reindex: # @sqlite3Reindex ld.d $a1, $a0, %pc_lo12(mem.5) pcalau12i $a0, %pc_hi20(mem.2) ld.d $a0, $a0, %pc_lo12(mem.2) - ld.d $a4, $sp, 104 # 8-byte Folded Reload ori $a2, $zero, 1 + ld.d $a4, $sp, 104 # 8-byte Folded Reload st.b $a2, $a4, %pc_lo12(mem.3) move $a2, $s1 jirl $ra, $a3, 0 @@ -138398,6 +138397,8 @@ xferOptimization: # @xferOptimization beqz $s7, .LBB548_87 # %bb.76: # %.lr.ph280 addi.w $s6, $zero, -9 + ld.d $s5, $sp, 56 # 8-byte Folded Reload + ld.d $s3, $sp, 48 # 8-byte Folded Reload b .LBB548_78 .LBB548_77: # %sqlite3VdbeJumpHere.exit239 # in Loop: Header=BB548_78 Depth=1 @@ -138430,7 +138431,6 @@ xferOptimization: # @xferOptimization jirl $ra, $ra, 0 ori $a1, $zero, 31 move $a0, $s2 - ld.d $s5, $sp, 56 # 8-byte Folded Reload move $a2, $s5 move $a3, $zero pcaddu18i $ra, %call36(sqlite3VdbeAddOp2) @@ -138471,7 +138471,6 @@ xferOptimization: # @xferOptimization ori $a1, $zero, 6 move $a0, $s2 move $a2, $s4 - ld.d $s3, $sp, 48 # 8-byte Folded Reload move $a3, $s3 pcaddu18i $ra, %call36(sqlite3VdbeAddOp2) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s index 3b49840c..39d7b0bd 100644 --- a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s +++ b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/7z/7zEncode.s @@ -1635,6 +1635,7 @@ _ZN8NArchive3N7z8CEncoder6EncodeEP19ISequentialInStreamPKyS5_RNS0_7CFolderEP20IS # %bb.115: # %.lr.ph359 move $s1, $zero ori $s3, $zero, 1 + ld.d $s4, $sp, 64 # 8-byte Folded Reload .p2align 4, , 16 .LBB2_116: # =>This Inner Loop Header: Depth=1 ld.d $a0, $sp, 1448 @@ -1650,7 +1651,6 @@ _ZN8NArchive3N7z8CEncoder6EncodeEP19ISequentialInStreamPKyS5_RNS0_7CFolderEP20IS # %bb.118: # in Loop: Header=BB2_116 Depth=1 ld.d $s2, $s2, 1152 .Ltmp212: # EH_LABEL - ld.d $s4, $sp, 64 # 8-byte Folded Reload move $a0, $s4 pcaddu18i $ra, %call36(_ZN17CBaseRecordVector18ReserveOnePositionEv) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s index f6f98cb6..367a12e7 100644 --- a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s +++ b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Archive/Tar/TarUpdate.s @@ -233,8 +233,8 @@ _ZN8NArchive4NTar13UpdateArchiveEP9IInStreamP20ISequentialOutStreamRK13CObjectVe st.d $a0, $sp, 128 st.b $zero, $a0, 0 st.w $fp, $sp, 140 - vld $vr0, $sp, 96 # 16-byte Folded Reload addi.d $a0, $sp, 176 + vld $vr0, $sp, 96 # 16-byte Folded Reload vst $vr0, $a0, 0 .Ltmp40: # EH_LABEL ori $a0, $zero, 4 diff --git a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/ZDecoder.s b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/ZDecoder.s index 6f0f36c7..6ed05584 100644 --- a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/ZDecoder.s +++ b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/Compress/ZDecoder.s @@ -491,7 +491,6 @@ _ZN9NCompress2NZ8CDecoder8CodeRealEP19ISequentialInStreamP20ISequentialOutStream ori $a2, $zero, 1 sll.w $a2, $a2, $s2 st.d $a2, $sp, 80 # 8-byte Folded Spill - st.d $fp, $sp, 56 # 8-byte Folded Spill bne $a1, $s2, .LBB6_57 # %bb.10: beqz $a0, .LBB6_57 @@ -503,6 +502,7 @@ _ZN9NCompress2NZ8CDecoder8CodeRealEP19ISequentialInStreamP20ISequentialOutStream beqz $a1, .LBB6_57 # %bb.13: st.d $s2, $sp, 8 # 8-byte Folded Spill + st.d $fp, $sp, 56 # 8-byte Folded Spill .LBB6_14: st.d $zero, $sp, 48 # 8-byte Folded Spill move $s3, $zero @@ -838,6 +838,7 @@ _ZN9NCompress2NZ8CDecoder8CodeRealEP19ISequentialInStreamP20ISequentialOutStream move $s3, $s4 beqz $a0, .LBB6_68 # %bb.66: + st.d $fp, $sp, 56 # 8-byte Folded Spill ld.d $a0, $s0, 24 ld.d $a2, $s0, 32 st.d $s2, $sp, 8 # 8-byte Folded Spill diff --git a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s index 3c854bb4..4ab64f8a 100644 --- a/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s +++ b/results/MultiSource/Benchmarks/7zip/CMakeFiles/7zip-benchmark.dir/CPP/7zip/UI/Common/Update.s @@ -5416,7 +5416,6 @@ _Z13UpdateArchiveP7CCodecsRKN9NWildcard7CCensorER14CUpdateOptionsR16CUpdateError ori $a0, $zero, 1112 pcaddu18i $ra, %call36(_Znwm) jirl $ra, $ra, 0 - move $a1, $a0 .Ltmp395: # EH_LABEL ld.d $s4, $sp, 208 # 8-byte Folded Reload # %bb.303: # in Loop: Header=BB12_151 Depth=1 diff --git a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/coarsen.s b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/coarsen.s index 0feae739..0b223bb6 100644 --- a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/coarsen.s +++ b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/coarsen.s @@ -275,6 +275,7 @@ hypre_StructCoarsen: # @hypre_StructCoarsen st.d $a0, $sp, 112 # 8-byte Folded Spill st.d $s1, $sp, 200 # 8-byte Folded Spill st.d $s7, $sp, 168 # 8-byte Folded Spill + ld.d $fp, $sp, 200 # 8-byte Folded Reload b .LBB2_20 .p2align 4, , 16 .LBB2_19: # %.loopexit567 @@ -341,7 +342,6 @@ hypre_StructCoarsen: # @hypre_StructCoarsen st.w $a0, $s3, 20 move $a0, $s3 move $a1, $s6 - ld.d $fp, $sp, 200 # 8-byte Folded Reload move $a2, $fp pcaddu18i $ra, %call36(hypre_ProjectBox) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/pcg.s b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/pcg.s index f10bd34f..5fb91018 100644 --- a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/pcg.s +++ b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/pcg.s @@ -381,6 +381,7 @@ hypre_PCGSolve: # @hypre_PCGSolve movcf2gr $a0, $fcc0 st.d $a0, $sp, 64 fmov.d $fs1, $fs0 + ld.d $fp, $sp, 120 # 8-byte Folded Reload b .LBB4_11 .p2align 4, , 16 .LBB4_10: # in Loop: Header=BB4_11 Depth=1 @@ -404,7 +405,6 @@ hypre_PCGSolve: # @hypre_PCGSolve ld.d $a4, $s8, 40 vldi $vr0, -912 ld.d $a0, $sp, 88 # 8-byte Folded Reload - ld.d $fp, $sp, 120 # 8-byte Folded Reload move $a1, $fp move $a2, $s0 fmov.d $fa1, $fs0 diff --git a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s index 076fd80f..702de632 100644 --- a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s +++ b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg3_setup_rap.s @@ -3272,7 +3272,8 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a1, $s5, 8 move $s6, $zero move $a4, $zero - ld.w $a2, $a0, 8 + ld.w $a0, $a0, 8 + st.d $a0, $sp, 136 # 8-byte Folded Spill ld.d $a0, $a1, 16 st.d $a0, $sp, 24 # 8-byte Folded Spill ld.d $a0, $a3, 16 @@ -3325,7 +3326,6 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $s4, $sp, 48 # 8-byte Folded Spill st.d $a7, $sp, 40 # 8-byte Folded Spill st.d $s5, $sp, 32 # 8-byte Folded Spill - st.d $a2, $sp, 136 # 8-byte Folded Spill b .LBB2_3 .p2align 4, , 16 .LBB2_2: # %.loopexit2326 @@ -3410,7 +3410,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 632 # 8-byte Folded Spill + st.d $a0, $sp, 664 # 8-byte Folded Spill addi.w $a1, $zero, -1 st.d $zero, $sp, 1180 st.d $a1, $sp, 1136 # 8-byte Folded Spill @@ -3422,7 +3422,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 656 # 8-byte Folded Spill + st.d $a0, $sp, 688 # 8-byte Folded Spill st.d $zero, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3430,7 +3430,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 624 # 8-byte Folded Spill + st.d $a0, $sp, 656 # 8-byte Folded Spill st.d $zero, $sp, 1180 st.w $s0, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3438,7 +3438,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 616 # 8-byte Folded Spill + st.d $a0, $sp, 648 # 8-byte Folded Spill st.d $zero, $sp, 1180 st.w $zero, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3446,7 +3446,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 608 # 8-byte Folded Spill + st.d $a0, $sp, 640 # 8-byte Folded Spill st.d $s0, $sp, 1180 st.w $zero, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3454,7 +3454,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 600 # 8-byte Folded Spill + st.d $a0, $sp, 632 # 8-byte Folded Spill st.d $s2, $sp, 1180 st.w $zero, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3472,7 +3472,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 592 # 8-byte Folded Spill + st.d $a0, $sp, 624 # 8-byte Folded Spill ori $s7, $zero, 0 lu32i.d $s7, 1 st.d $s7, $sp, 1180 @@ -3490,7 +3490,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 696 # 8-byte Folded Spill + st.d $a0, $sp, 704 # 8-byte Folded Spill ori $a0, $zero, 8 ld.d $a1, $sp, 136 # 8-byte Folded Reload st.d $fp, $sp, 1080 # 8-byte Folded Spill @@ -3503,7 +3503,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 520 # 8-byte Folded Spill + st.d $a0, $sp, 528 # 8-byte Folded Spill st.d $s2, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3511,7 +3511,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 688 # 8-byte Folded Spill + st.d $a0, $sp, 560 # 8-byte Folded Spill st.d $fp, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3519,7 +3519,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 512 # 8-byte Folded Spill + st.d $a0, $sp, 520 # 8-byte Folded Spill st.d $s7, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3527,7 +3527,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 680 # 8-byte Folded Spill + st.d $a0, $sp, 552 # 8-byte Folded Spill st.d $s2, $sp, 1180 st.w $s0, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3535,7 +3535,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 672 # 8-byte Folded Spill + st.d $a0, $sp, 544 # 8-byte Folded Spill st.d $s7, $sp, 1180 st.w $s0, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3543,14 +3543,12 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 504 # 8-byte Folded Spill + st.d $a0, $sp, 512 # 8-byte Folded Spill ori $a0, $zero, 16 ld.d $a1, $sp, 136 # 8-byte Folded Reload bltu $a1, $a0, .LBB2_9 # %bb.7: # in Loop: Header=BB2_3 Depth=1 - st.d $s0, $sp, 1064 # 8-byte Folded Spill st.d $s8, $sp, 1072 # 8-byte Folded Spill - ld.d $s0, $sp, 136 # 8-byte Folded Reload ld.d $s8, $sp, 1136 # 8-byte Folded Reload st.d $s8, $sp, 1180 st.w $zero, $sp, 1188 @@ -3559,7 +3557,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 424 # 8-byte Folded Spill + st.d $a0, $sp, 432 # 8-byte Folded Spill ori $a0, $zero, 1 lu32i.d $a0, -1 st.d $a0, $sp, 1180 @@ -3569,7 +3567,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 416 # 8-byte Folded Spill + st.d $a0, $sp, 424 # 8-byte Folded Spill move $fp, $s8 lu32i.d $fp, 1 st.d $fp, $sp, 1180 @@ -3579,7 +3577,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 704 # 8-byte Folded Spill + st.d $a0, $sp, 536 # 8-byte Folded Spill ori $a0, $zero, 1 lu32i.d $a0, 1 st.d $a0, $sp, 1180 @@ -3589,13 +3587,14 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 528 # 8-byte Folded Spill + st.d $a0, $sp, 504 # 8-byte Folded Spill ori $a0, $zero, 20 - bltu $s0, $a0, .LBB2_56 + ld.d $a1, $sp, 136 # 8-byte Folded Reload + bltu $a1, $a0, .LBB2_56 # %bb.8: # in Loop: Header=BB2_3 Depth=1 st.d $s8, $sp, 1180 - ori $s0, $zero, 1 - st.w $s0, $sp, 1188 + ori $s8, $zero, 1 + st.w $s8, $sp, 1188 addi.d $a2, $sp, 1180 move $a0, $s5 move $a1, $s1 @@ -3605,7 +3604,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ori $a0, $zero, 1 lu32i.d $a0, -1 st.d $a0, $sp, 1180 - st.w $s0, $sp, 1188 + st.w $s8, $sp, 1188 addi.d $a2, $sp, 1180 move $a0, $s5 move $a1, $s1 @@ -3613,7 +3612,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym jirl $ra, $ra, 0 st.d $a0, $sp, 336 # 8-byte Folded Spill st.d $fp, $sp, 1180 - st.w $s0, $sp, 1188 + st.w $s8, $sp, 1188 addi.d $a2, $sp, 1180 move $a0, $s5 move $a1, $s1 @@ -3623,7 +3622,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ori $s2, $zero, 1 lu32i.d $s2, 1 st.d $s2, $sp, 1180 - st.w $s0, $sp, 1188 + st.w $s8, $sp, 1188 addi.d $a2, $sp, 1180 move $a0, $s5 move $a1, $s1 @@ -3631,14 +3630,13 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym jirl $ra, $ra, 0 st.d $a0, $sp, 352 # 8-byte Folded Spill st.d $fp, $sp, 1180 - ld.d $s0, $sp, 1064 # 8-byte Folded Reload st.w $s0, $sp, 1188 addi.d $a2, $sp, 1180 move $a0, $s5 move $a1, $s1 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 496 # 8-byte Folded Spill + st.d $a0, $sp, 416 # 8-byte Folded Spill st.d $s2, $sp, 1180 ori $s2, $zero, 1 st.w $s0, $sp, 1188 @@ -3670,7 +3668,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 584 # 8-byte Folded Spill + st.d $a0, $sp, 616 # 8-byte Folded Spill st.d $s7, $sp, 1180 st.w $zero, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3678,7 +3676,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 576 # 8-byte Folded Spill + st.d $a0, $sp, 608 # 8-byte Folded Spill st.d $zero, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3686,7 +3684,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 568 # 8-byte Folded Spill + st.d $a0, $sp, 600 # 8-byte Folded Spill st.d $s0, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3694,7 +3692,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 560 # 8-byte Folded Spill + st.d $a0, $sp, 592 # 8-byte Folded Spill st.d $s2, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3702,7 +3700,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 552 # 8-byte Folded Spill + st.d $a0, $sp, 584 # 8-byte Folded Spill ld.d $a0, $sp, 1080 # 8-byte Folded Reload st.d $a0, $sp, 1180 st.w $s2, $sp, 1188 @@ -3711,7 +3709,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 544 # 8-byte Folded Spill + st.d $a0, $sp, 576 # 8-byte Folded Spill st.d $s7, $sp, 1180 st.w $s2, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3719,7 +3717,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 536 # 8-byte Folded Spill + st.d $a0, $sp, 568 # 8-byte Folded Spill ld.d $s7, $sp, 1136 # 8-byte Folded Reload beqz $s5, .LBB2_13 # %bb.12: # in Loop: Header=BB2_3 Depth=1 @@ -3732,7 +3730,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 472 # 8-byte Folded Spill + st.d $a0, $sp, 480 # 8-byte Folded Spill ori $s5, $zero, 1 ori $s2, $zero, 1 lu32i.d $s2, 1 @@ -3743,7 +3741,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 464 # 8-byte Folded Spill + st.d $a0, $sp, 472 # 8-byte Folded Spill st.d $s7, $sp, 1180 st.w $s5, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3751,7 +3749,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 456 # 8-byte Folded Spill + st.d $a0, $sp, 464 # 8-byte Folded Spill ori $a0, $zero, 1 lu32i.d $a0, -1 st.d $a0, $sp, 1180 @@ -3761,7 +3759,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 448 # 8-byte Folded Spill + st.d $a0, $sp, 456 # 8-byte Folded Spill st.d $s0, $sp, 1180 st.w $s5, $sp, 1188 addi.d $a2, $sp, 1180 @@ -3769,7 +3767,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 440 # 8-byte Folded Spill + st.d $a0, $sp, 448 # 8-byte Folded Spill st.d $s2, $sp, 1180 ori $s2, $zero, 1 st.w $s2, $sp, 1188 @@ -3778,7 +3776,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a1, $s6 pcaddu18i $ra, %call36(hypre_StructMatrixExtractPointerByIndex) jirl $ra, $ra, 0 - st.d $a0, $sp, 432 # 8-byte Folded Spill + st.d $a0, $sp, 440 # 8-byte Folded Spill .LBB2_13: # in Loop: Header=BB2_3 Depth=1 st.d $zero, $sp, 1180 st.w $s2, $sp, 1188 @@ -3829,9 +3827,9 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym maskeqz $a0, $a0, $a1 masknez $a1, $s7, $a1 or $a0, $a0, $a1 - st.d $a0, $sp, 480 # 8-byte Folded Spill + st.d $a0, $sp, 488 # 8-byte Folded Spill addi.w $a0, $a0, 1 - st.d $a0, $sp, 648 # 8-byte Folded Spill + st.d $a0, $sp, 680 # 8-byte Folded Spill st.d $s2, $sp, 1180 st.w $zero, $sp, 1188 addi.d $a1, $sp, 1156 @@ -3942,16 +3940,16 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym addi.d $a1, $s7, 1 mul.d $a2, $a2, $a1 ld.w $a3, $sp, 1156 - st.d $a3, $sp, 488 # 8-byte Folded Spill + st.d $a3, $sp, 496 # 8-byte Folded Spill ld.w $t3, $sp, 1160 add.w $a7, $t5, $a2 ld.d $a2, $sp, 96 # 8-byte Folded Reload ld.w $a2, $a2, 0 - st.d $a2, $sp, 640 # 8-byte Folded Spill + st.d $a2, $sp, 672 # 8-byte Folded Spill ld.w $t4, $sp, 1164 slt $a2, $a3, $t3 masknez $a3, $a3, $a2 - st.d $t3, $sp, 664 # 8-byte Folded Spill + st.d $t3, $sp, 696 # 8-byte Folded Spill maskeqz $a2, $t3, $a2 or $a2, $a2, $a3 slt $a3, $a2, $t4 @@ -3980,11 +3978,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym blez $a2, .LBB2_2 # %bb.18: # %.preheader2320.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 664 # 8-byte Folded Reload + ld.d $a2, $sp, 696 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.19: # %.preheader2320.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 488 # 8-byte Folded Reload + ld.d $a2, $sp, 496 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.20: # %.preheader2316.us.us.us.us.us.preheader # in Loop: Header=BB2_3 Depth=1 @@ -3994,11 +3992,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym mul.d $t4, $a2, $s0 st.d $t4, $sp, 1016 # 8-byte Folded Spill ld.w $a3, $a3, 8 - ld.d $t5, $sp, 640 # 8-byte Folded Reload - ld.d $t8, $sp, 488 # 8-byte Folded Reload + ld.d $t5, $sp, 672 # 8-byte Folded Reload + ld.d $t8, $sp, 496 # 8-byte Folded Reload mul.d $t4, $t8, $t5 st.d $t4, $sp, 1008 # 8-byte Folded Spill - ld.d $t4, $sp, 664 # 8-byte Folded Reload + ld.d $t4, $sp, 696 # 8-byte Folded Reload sub.d $t1, $t1, $t4 mul.d $t1, $t1, $t2 sub.d $t2, $t6, $t4 @@ -4015,8 +4013,8 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 984 # 8-byte Folded Spill nor $a1, $t0, $zero st.d $a1, $sp, 976 # 8-byte Folded Spill - ld.d $a1, $sp, 656 # 8-byte Folded Reload - ld.d $t0, $sp, 648 # 8-byte Folded Reload + ld.d $a1, $sp, 688 # 8-byte Folded Reload + ld.d $t0, $sp, 680 # 8-byte Folded Reload alsl.d $t2, $t0, $a1, 3 st.d $t2, $sp, 968 # 8-byte Folded Spill sub.d $t0, $t7, $t0 @@ -4068,9 +4066,9 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $ra, $zero move $a2, $zero move $s0, $a6 - ld.d $a0, $sp, 624 # 8-byte Folded Reload + ld.d $a0, $sp, 656 # 8-byte Folded Reload alsl.d $a6, $a5, $a0, 3 - ld.d $a0, $sp, 616 # 8-byte Folded Reload + ld.d $a0, $sp, 648 # 8-byte Folded Reload alsl.d $t3, $a5, $a0, 3 ld.d $a0, $sp, 984 # 8-byte Folded Reload sub.d $s7, $a0, $a5 @@ -4079,9 +4077,9 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a3, $sp, 968 # 8-byte Folded Reload alsl.d $a0, $a4, $a3, 3 st.d $a0, $sp, 1144 # 8-byte Folded Spill - ld.d $a0, $sp, 648 # 8-byte Folded Reload + ld.d $a0, $sp, 680 # 8-byte Folded Reload add.d $a0, $a0, $a4 - ld.d $a1, $sp, 632 # 8-byte Folded Reload + ld.d $a1, $sp, 664 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 st.d $a0, $sp, 1136 # 8-byte Folded Spill ld.d $a0, $sp, 992 # 8-byte Folded Reload @@ -4090,7 +4088,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 1128 # 8-byte Folded Spill ld.d $a0, $sp, 960 # 8-byte Folded Reload add.d $a0, $a0, $a4 - ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $a3, $sp, 688 # 8-byte Folded Reload alsl.d $a0, $a0, $a3, 3 st.d $a0, $sp, 1120 # 8-byte Folded Spill ld.d $a0, $sp, 952 # 8-byte Folded Reload @@ -4103,25 +4101,25 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 1112 # 8-byte Folded Spill alsl.d $a0, $a4, $a1, 3 st.d $a0, $sp, 1104 # 8-byte Folded Spill - ld.d $a0, $sp, 536 # 8-byte Folded Reload + ld.d $a0, $sp, 568 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1096 # 8-byte Folded Spill - ld.d $a0, $sp, 552 # 8-byte Folded Reload + ld.d $a0, $sp, 584 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1088 # 8-byte Folded Spill - ld.d $a0, $sp, 568 # 8-byte Folded Reload + ld.d $a0, $sp, 600 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1080 # 8-byte Folded Spill - ld.d $a0, $sp, 560 # 8-byte Folded Reload + ld.d $a0, $sp, 592 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1072 # 8-byte Folded Spill - ld.d $a0, $sp, 544 # 8-byte Folded Reload + ld.d $a0, $sp, 576 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1064 # 8-byte Folded Spill - ld.d $a0, $sp, 576 # 8-byte Folded Reload + ld.d $a0, $sp, 608 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1056 # 8-byte Folded Spill - ld.d $a0, $sp, 584 # 8-byte Folded Reload + ld.d $a0, $sp, 616 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1048 # 8-byte Folded Spill ld.d $a0, $sp, 928 # 8-byte Folded Reload @@ -4134,14 +4132,14 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym alsl.d $s1, $a4, $fp, 3 ld.d $t8, $sp, 720 # 8-byte Folded Reload alsl.d $t1, $a4, $t8, 3 - ld.d $a0, $sp, 608 # 8-byte Folded Reload + ld.d $a0, $sp, 640 # 8-byte Folded Reload alsl.d $a0, $a4, $a0, 3 st.d $a0, $sp, 1040 # 8-byte Folded Spill - ld.d $t7, $sp, 696 # 8-byte Folded Reload + ld.d $t7, $sp, 704 # 8-byte Folded Reload alsl.d $a1, $a4, $t7, 3 - ld.d $t0, $sp, 600 # 8-byte Folded Reload + ld.d $t0, $sp, 632 # 8-byte Folded Reload alsl.d $t2, $a4, $t0, 3 - ld.d $t0, $sp, 592 # 8-byte Folded Reload + ld.d $t0, $sp, 624 # 8-byte Folded Reload alsl.d $t0, $a4, $t0, 3 alsl.d $t7, $s0, $t7, 3 alsl.d $a4, $s0, $fp, 3 @@ -4152,7 +4150,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $s0, $sp, 1024 # 8-byte Folded Spill alsl.d $s3, $s0, $t4, 3 ld.d $s0, $sp, 1008 # 8-byte Folded Reload - ld.d $t4, $sp, 640 # 8-byte Folded Reload + ld.d $t4, $sp, 672 # 8-byte Folded Reload .p2align 4, , 16 .LBB2_23: # Parent Loop BB2_3 Depth=1 # Parent Loop BB2_21 Depth=2 @@ -4259,7 +4257,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a1, $sp, 1032 # 8-byte Folded Reload addi.w $a1, $a1, 1 sub.w $a7, $s4, $a7 - ld.d $a0, $sp, 664 # 8-byte Folded Reload + ld.d $a0, $sp, 696 # 8-byte Folded Reload bne $a1, $a0, .LBB2_22 # %bb.25: # %._crit_edge2463.split.us.us.us.us.us.us # in Loop: Header=BB2_21 Depth=2 @@ -4284,11 +4282,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym blez $a2, .LBB2_2 # %bb.28: # %.preheader2322.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 664 # 8-byte Folded Reload + ld.d $a2, $sp, 696 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.29: # %.preheader2322.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 488 # 8-byte Folded Reload + ld.d $a2, $sp, 496 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.30: # %.preheader2317.us.us.us.us.us.preheader # in Loop: Header=BB2_3 Depth=1 @@ -4298,11 +4296,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym mul.d $t4, $a2, $s0 st.d $t4, $sp, 904 # 8-byte Folded Spill ld.w $a3, $a3, 8 - ld.d $t5, $sp, 640 # 8-byte Folded Reload - ld.d $t8, $sp, 488 # 8-byte Folded Reload + ld.d $t5, $sp, 672 # 8-byte Folded Reload + ld.d $t8, $sp, 496 # 8-byte Folded Reload mul.d $t4, $t8, $t5 st.d $t4, $sp, 896 # 8-byte Folded Spill - ld.d $t4, $sp, 664 # 8-byte Folded Reload + ld.d $t4, $sp, 696 # 8-byte Folded Reload sub.d $t1, $t1, $t4 mul.d $t1, $t1, $t2 sub.d $t2, $t6, $t4 @@ -4319,8 +4317,8 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 872 # 8-byte Folded Spill nor $a1, $t0, $zero st.d $a1, $sp, 864 # 8-byte Folded Spill - ld.d $a1, $sp, 656 # 8-byte Folded Reload - ld.d $t0, $sp, 648 # 8-byte Folded Reload + ld.d $a1, $sp, 688 # 8-byte Folded Reload + ld.d $t0, $sp, 680 # 8-byte Folded Reload alsl.d $t2, $t0, $a1, 3 st.d $t2, $sp, 856 # 8-byte Folded Spill sub.d $t0, $t7, $t0 @@ -4349,7 +4347,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym sub.d $a3, $a3, $a0 st.d $a3, $sp, 792 # 8-byte Folded Spill add.d $a1, $a1, $a2 - ld.d $a2, $sp, 680 # 8-byte Folded Reload + ld.d $a2, $sp, 552 # 8-byte Folded Reload sub.d $a2, $a2, $a0 st.d $a2, $sp, 784 # 8-byte Folded Spill mul.d $a1, $a1, $s0 @@ -4357,7 +4355,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a1, $sp, 720 # 8-byte Folded Reload sub.d $a1, $a1, $a0 st.d $a1, $sp, 776 # 8-byte Folded Spill - ld.d $a1, $sp, 688 # 8-byte Folded Reload + ld.d $a1, $sp, 560 # 8-byte Folded Reload sub.d $a0, $a1, $a0 st.d $a0, $sp, 768 # 8-byte Folded Spill .p2align 4, , 16 @@ -4379,9 +4377,9 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $s6, $zero move $t5, $zero move $s0, $a6 - ld.d $a0, $sp, 624 # 8-byte Folded Reload + ld.d $a0, $sp, 656 # 8-byte Folded Reload alsl.d $a6, $a5, $a0, 3 - ld.d $a0, $sp, 616 # 8-byte Folded Reload + ld.d $a0, $sp, 648 # 8-byte Folded Reload alsl.d $t2, $a5, $a0, 3 ld.d $a0, $sp, 872 # 8-byte Folded Reload sub.d $s4, $a0, $a5 @@ -4390,9 +4388,9 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a2, $sp, 856 # 8-byte Folded Reload alsl.d $a0, $a4, $a2, 3 st.d $a0, $sp, 1144 # 8-byte Folded Spill - ld.d $a0, $sp, 648 # 8-byte Folded Reload + ld.d $a0, $sp, 680 # 8-byte Folded Reload add.d $a0, $a0, $a4 - ld.d $a1, $sp, 632 # 8-byte Folded Reload + ld.d $a1, $sp, 664 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 3 st.d $a0, $sp, 1136 # 8-byte Folded Spill ld.d $a0, $sp, 880 # 8-byte Folded Reload @@ -4401,7 +4399,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 1128 # 8-byte Folded Spill ld.d $a0, $sp, 848 # 8-byte Folded Reload add.d $a0, $a0, $a4 - ld.d $a2, $sp, 656 # 8-byte Folded Reload + ld.d $a2, $sp, 688 # 8-byte Folded Reload alsl.d $a0, $a0, $a2, 3 st.d $a0, $sp, 1120 # 8-byte Folded Spill ld.d $a0, $sp, 840 # 8-byte Folded Reload @@ -4414,25 +4412,25 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 1112 # 8-byte Folded Spill alsl.d $a0, $a4, $a1, 3 st.d $a0, $sp, 1104 # 8-byte Folded Spill - ld.d $a0, $sp, 536 # 8-byte Folded Reload + ld.d $a0, $sp, 568 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1096 # 8-byte Folded Spill - ld.d $a0, $sp, 552 # 8-byte Folded Reload + ld.d $a0, $sp, 584 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1088 # 8-byte Folded Spill - ld.d $a0, $sp, 568 # 8-byte Folded Reload + ld.d $a0, $sp, 600 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1080 # 8-byte Folded Spill - ld.d $a0, $sp, 560 # 8-byte Folded Reload + ld.d $a0, $sp, 592 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1072 # 8-byte Folded Spill - ld.d $a0, $sp, 544 # 8-byte Folded Reload + ld.d $a0, $sp, 576 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1064 # 8-byte Folded Spill - ld.d $a0, $sp, 576 # 8-byte Folded Reload + ld.d $a0, $sp, 608 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1056 # 8-byte Folded Spill - ld.d $a0, $sp, 584 # 8-byte Folded Reload + ld.d $a0, $sp, 616 # 8-byte Folded Reload alsl.d $a0, $a7, $a0, 3 st.d $a0, $sp, 1048 # 8-byte Folded Spill ld.d $a0, $sp, 816 # 8-byte Folded Reload @@ -4443,37 +4441,37 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym add.d $a0, $a0, $s0 ld.d $s1, $sp, 712 # 8-byte Folded Reload alsl.d $fp, $a0, $s1, 3 - ld.d $t0, $sp, 680 # 8-byte Folded Reload + ld.d $t0, $sp, 552 # 8-byte Folded Reload alsl.d $a1, $a0, $t0, 3 st.d $a1, $sp, 1040 # 8-byte Folded Spill ld.d $ra, $sp, 720 # 8-byte Folded Reload alsl.d $a3, $a0, $ra, 3 - ld.d $a2, $sp, 688 # 8-byte Folded Reload + ld.d $a2, $sp, 560 # 8-byte Folded Reload alsl.d $a1, $a0, $a2, 3 st.d $a1, $sp, 1032 # 8-byte Folded Spill - ld.d $a1, $sp, 608 # 8-byte Folded Reload + ld.d $a1, $sp, 640 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1024 # 8-byte Folded Spill - ld.d $s7, $sp, 696 # 8-byte Folded Reload + ld.d $s7, $sp, 704 # 8-byte Folded Reload alsl.d $a1, $a0, $s7, 3 st.d $a1, $sp, 1016 # 8-byte Folded Spill - ld.d $a1, $sp, 600 # 8-byte Folded Reload + ld.d $a1, $sp, 632 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1008 # 8-byte Folded Spill - ld.d $a1, $sp, 520 # 8-byte Folded Reload + ld.d $a1, $sp, 528 # 8-byte Folded Reload alsl.d $a4, $a0, $a1, 3 st.d $a4, $sp, 1000 # 8-byte Folded Spill - ld.d $a4, $sp, 592 # 8-byte Folded Reload + ld.d $a4, $sp, 624 # 8-byte Folded Reload alsl.d $a4, $a0, $a4, 3 st.d $a4, $sp, 992 # 8-byte Folded Spill - ld.d $a4, $sp, 512 # 8-byte Folded Reload + ld.d $a4, $sp, 520 # 8-byte Folded Reload alsl.d $t3, $a0, $a4, 3 st.d $t3, $sp, 984 # 8-byte Folded Spill move $t6, $t8 - ld.d $t8, $sp, 504 # 8-byte Folded Reload + ld.d $t8, $sp, 512 # 8-byte Folded Reload alsl.d $t3, $a0, $t8, 3 st.d $t3, $sp, 976 # 8-byte Folded Spill - ld.d $t3, $sp, 672 # 8-byte Folded Reload + ld.d $t3, $sp, 544 # 8-byte Folded Reload alsl.d $a0, $a0, $t3, 3 st.d $a0, $sp, 968 # 8-byte Folded Spill alsl.d $t4, $s0, $t0, 3 @@ -4500,7 +4498,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $s0, $sp, 912 # 8-byte Folded Spill alsl.d $s0, $s0, $a1, 3 ld.d $s1, $sp, 896 # 8-byte Folded Reload - ld.d $a2, $sp, 640 # 8-byte Folded Reload + ld.d $a2, $sp, 672 # 8-byte Folded Reload ld.d $t0, $sp, 800 # 8-byte Folded Reload .p2align 4, , 16 .LBB2_33: # Parent Loop BB2_3 Depth=1 @@ -4650,7 +4648,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a1, $sp, 920 # 8-byte Folded Reload addi.w $a1, $a1, 1 sub.w $a7, $t6, $a7 - ld.d $a0, $sp, 664 # 8-byte Folded Reload + ld.d $a0, $sp, 696 # 8-byte Folded Reload move $t8, $t6 bne $a1, $a0, .LBB2_32 # %bb.35: # %._crit_edge2402.split.us.us.us.us.us.us @@ -4676,11 +4674,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym blez $a2, .LBB2_2 # %bb.38: # %.preheader2324.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 664 # 8-byte Folded Reload + ld.d $a2, $sp, 696 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.39: # %.preheader2324.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 488 # 8-byte Folded Reload + ld.d $a2, $sp, 496 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.40: # %.preheader2318.us.us.us.us.us.preheader # in Loop: Header=BB2_3 Depth=1 @@ -4690,11 +4688,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym mul.d $t4, $a2, $s0 st.d $t4, $sp, 784 # 8-byte Folded Spill ld.w $a3, $a3, 8 - ld.d $t5, $sp, 640 # 8-byte Folded Reload - ld.d $t8, $sp, 488 # 8-byte Folded Reload + ld.d $t5, $sp, 672 # 8-byte Folded Reload + ld.d $t8, $sp, 496 # 8-byte Folded Reload mul.d $t4, $t8, $t5 st.d $t4, $sp, 776 # 8-byte Folded Spill - ld.d $t4, $sp, 664 # 8-byte Folded Reload + ld.d $t4, $sp, 696 # 8-byte Folded Reload sub.d $t1, $t1, $t4 mul.d $t1, $t1, $t2 sub.d $t2, $t6, $t4 @@ -4711,13 +4709,13 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 272 # 8-byte Folded Spill sub.d $a1, $t0, $t8 st.d $a1, $sp, 752 # 8-byte Folded Spill - ld.d $t0, $sp, 656 # 8-byte Folded Reload + ld.d $t0, $sp, 688 # 8-byte Folded Reload addi.d $a1, $t0, 8 - ld.d $t2, $sp, 648 # 8-byte Folded Reload + ld.d $t2, $sp, 680 # 8-byte Folded Reload st.d $a1, $sp, 744 # 8-byte Folded Spill alsl.d $a1, $t2, $a1, 3 st.d $a1, $sp, 736 # 8-byte Folded Spill - ld.d $a1, $sp, 632 # 8-byte Folded Reload + ld.d $a1, $sp, 664 # 8-byte Folded Reload addi.d $a1, $a1, 8 st.d $a1, $sp, 728 # 8-byte Folded Spill mul.d $a1, $a3, $s3 @@ -4728,7 +4726,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 264 # 8-byte Folded Spill st.d $t6, $sp, 768 # 8-byte Folded Spill slli.d $a1, $t6, 3 - ld.d $a2, $sp, 688 # 8-byte Folded Reload + ld.d $a2, $sp, 560 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 408 # 8-byte Folded Spill slli.d $a2, $t5, 3 @@ -4738,10 +4736,10 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a2, $sp, 392 # 8-byte Folded Spill sub.d $a2, $t7, $t2 st.d $a2, $sp, 384 # 8-byte Folded Spill - ld.d $a2, $sp, 704 # 8-byte Folded Reload + ld.d $a2, $sp, 536 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 376 # 8-byte Folded Spill - ld.d $a2, $sp, 680 # 8-byte Folded Reload + ld.d $a2, $sp, 552 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 368 # 8-byte Folded Spill st.d $t7, $sp, 760 # 8-byte Folded Spill @@ -4759,7 +4757,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 248 # 8-byte Folded Spill sub.d $a0, $s7, $t8 st.d $a0, $sp, 304 # 8-byte Folded Spill - ld.d $a0, $sp, 528 # 8-byte Folded Reload + ld.d $a0, $sp, 504 # 8-byte Folded Reload sub.d $a0, $a0, $a1 st.d $a0, $sp, 296 # 8-byte Folded Spill ld.d $a0, $sp, 712 # 8-byte Folded Reload @@ -4785,12 +4783,12 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a3, $zero move $t1, $a4 move $t0, $a7 - ld.d $a0, $sp, 624 # 8-byte Folded Reload + ld.d $a0, $sp, 656 # 8-byte Folded Reload alsl.d $a4, $a5, $a0, 3 - ld.d $a0, $sp, 616 # 8-byte Folded Reload + ld.d $a0, $sp, 648 # 8-byte Folded Reload st.d $a5, $sp, 816 # 8-byte Folded Spill alsl.d $a5, $a5, $a0, 3 - ld.d $a0, $sp, 648 # 8-byte Folded Reload + ld.d $a0, $sp, 680 # 8-byte Folded Reload add.d $a0, $a0, $t1 ld.d $s7, $sp, 728 # 8-byte Folded Reload alsl.d $t5, $a0, $s7, 3 @@ -4804,52 +4802,51 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym alsl.d $s8, $a0, $s4, 3 ld.d $a0, $sp, 768 # 8-byte Folded Reload add.d $a0, $a0, $a6 - ld.d $s0, $sp, 528 # 8-byte Folded Reload + ld.d $s0, $sp, 504 # 8-byte Folded Reload alsl.d $t6, $a0, $s0, 3 ld.d $a1, $sp, 712 # 8-byte Folded Reload alsl.d $t7, $a0, $a1, 3 - ld.d $t3, $sp, 680 # 8-byte Folded Reload + ld.d $t3, $sp, 552 # 8-byte Folded Reload alsl.d $a1, $a0, $t3, 3 st.d $a1, $sp, 792 # 8-byte Folded Spill - ld.d $a1, $sp, 704 # 8-byte Folded Reload - st.d $a1, $sp, 704 # 8-byte Folded Spill + ld.d $a1, $sp, 536 # 8-byte Folded Reload alsl.d $a2, $a0, $a1, 3 ld.d $a1, $sp, 720 # 8-byte Folded Reload alsl.d $ra, $a0, $a1, 3 - ld.d $fp, $sp, 688 # 8-byte Folded Reload + ld.d $fp, $sp, 560 # 8-byte Folded Reload alsl.d $a1, $a0, $fp, 3 st.d $a1, $sp, 1144 # 8-byte Folded Spill - ld.d $a1, $sp, 608 # 8-byte Folded Reload + ld.d $a1, $sp, 640 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1136 # 8-byte Folded Spill - ld.d $s2, $sp, 696 # 8-byte Folded Reload + ld.d $s2, $sp, 704 # 8-byte Folded Reload alsl.d $a1, $a0, $s2, 3 st.d $a1, $sp, 1128 # 8-byte Folded Spill - ld.d $a1, $sp, 600 # 8-byte Folded Reload + ld.d $a1, $sp, 632 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1120 # 8-byte Folded Spill - ld.d $t4, $sp, 520 # 8-byte Folded Reload + ld.d $t4, $sp, 528 # 8-byte Folded Reload alsl.d $a1, $a0, $t4, 3 st.d $a1, $sp, 1112 # 8-byte Folded Spill - ld.d $a1, $sp, 416 # 8-byte Folded Reload + ld.d $a1, $sp, 424 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1104 # 8-byte Folded Spill - ld.d $a1, $sp, 592 # 8-byte Folded Reload + ld.d $a1, $sp, 624 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1096 # 8-byte Folded Spill - ld.d $t2, $sp, 512 # 8-byte Folded Reload + ld.d $t2, $sp, 520 # 8-byte Folded Reload alsl.d $a1, $a0, $t2, 3 st.d $a1, $sp, 1088 # 8-byte Folded Spill - ld.d $a1, $sp, 424 # 8-byte Folded Reload + ld.d $a1, $sp, 432 # 8-byte Folded Reload alsl.d $a1, $a0, $a1, 3 st.d $a1, $sp, 1080 # 8-byte Folded Spill - ld.d $s3, $sp, 504 # 8-byte Folded Reload + ld.d $s3, $sp, 512 # 8-byte Folded Reload alsl.d $a1, $a0, $s3, 3 st.d $a1, $sp, 1072 # 8-byte Folded Spill - ld.d $t8, $sp, 672 # 8-byte Folded Reload + ld.d $t8, $sp, 544 # 8-byte Folded Reload alsl.d $a0, $a0, $t8, 3 st.d $a0, $sp, 1064 # 8-byte Folded Spill - ld.d $a0, $sp, 480 # 8-byte Folded Reload + ld.d $a0, $sp, 488 # 8-byte Folded Reload add.d $a0, $a0, $t1 st.d $a0, $sp, 1056 # 8-byte Folded Spill alsl.d $a1, $t1, $s1, 3 @@ -4872,43 +4869,43 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $t1, $sp, 800 # 8-byte Folded Spill alsl.d $a0, $t1, $s7, 3 st.d $a0, $sp, 1008 # 8-byte Folded Spill - ld.d $a0, $sp, 432 # 8-byte Folded Reload + ld.d $a0, $sp, 440 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 1000 # 8-byte Folded Spill - ld.d $a0, $sp, 536 # 8-byte Folded Reload + ld.d $a0, $sp, 568 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 992 # 8-byte Folded Spill - ld.d $a0, $sp, 440 # 8-byte Folded Reload + ld.d $a0, $sp, 448 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 984 # 8-byte Folded Spill - ld.d $a0, $sp, 552 # 8-byte Folded Reload + ld.d $a0, $sp, 584 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 976 # 8-byte Folded Spill - ld.d $a0, $sp, 568 # 8-byte Folded Reload + ld.d $a0, $sp, 600 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 968 # 8-byte Folded Spill - ld.d $a0, $sp, 560 # 8-byte Folded Reload + ld.d $a0, $sp, 592 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 960 # 8-byte Folded Spill - ld.d $a0, $sp, 448 # 8-byte Folded Reload + ld.d $a0, $sp, 456 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 952 # 8-byte Folded Spill - ld.d $a0, $sp, 544 # 8-byte Folded Reload + ld.d $a0, $sp, 576 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 944 # 8-byte Folded Spill - ld.d $a0, $sp, 456 # 8-byte Folded Reload + ld.d $a0, $sp, 464 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 936 # 8-byte Folded Spill - ld.d $a0, $sp, 464 # 8-byte Folded Reload + ld.d $a0, $sp, 472 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 928 # 8-byte Folded Spill - ld.d $a0, $sp, 576 # 8-byte Folded Reload + ld.d $a0, $sp, 608 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 920 # 8-byte Folded Spill - ld.d $a0, $sp, 472 # 8-byte Folded Reload + ld.d $a0, $sp, 480 # 8-byte Folded Reload alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 912 # 8-byte Folded Spill - ld.d $a0, $sp, 584 # 8-byte Folded Reload + ld.d $a0, $sp, 616 # 8-byte Folded Reload st.d $t0, $sp, 824 # 8-byte Folded Spill alsl.d $a0, $t0, $a0, 3 st.d $a0, $sp, 904 # 8-byte Folded Spill @@ -4927,7 +4924,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 864 # 8-byte Folded Spill alsl.d $a0, $a6, $s3, 3 st.d $a0, $sp, 856 # 8-byte Folded Spill - ld.d $a0, $sp, 704 # 8-byte Folded Reload + ld.d $a0, $sp, 536 # 8-byte Folded Reload alsl.d $a0, $a6, $a0, 3 st.d $a0, $sp, 848 # 8-byte Folded Spill ld.d $a0, $sp, 720 # 8-byte Folded Reload @@ -4941,10 +4938,10 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym alsl.d $t2, $a6, $a0, 3 ld.d $a6, $sp, 792 # 8-byte Folded Reload ld.d $a0, $sp, 776 # 8-byte Folded Reload - ld.d $t8, $sp, 632 # 8-byte Folded Reload - ld.d $fp, $sp, 656 # 8-byte Folded Reload - ld.d $s2, $sp, 640 # 8-byte Folded Reload - ld.d $s4, $sp, 488 # 8-byte Folded Reload + ld.d $t8, $sp, 664 # 8-byte Folded Reload + ld.d $fp, $sp, 688 # 8-byte Folded Reload + ld.d $s2, $sp, 672 # 8-byte Folded Reload + ld.d $s4, $sp, 496 # 8-byte Folded Reload ld.d $s0, $sp, 400 # 8-byte Folded Reload .p2align 4, , 16 .LBB2_43: # Parent Loop BB2_3 Depth=1 @@ -5163,7 +5160,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a2, $sp, 832 # 8-byte Folded Reload addi.w $a2, $a2, 1 addi.w $a7, $a1, 1 - ld.d $a1, $sp, 664 # 8-byte Folded Reload + ld.d $a1, $sp, 696 # 8-byte Folded Reload bne $a2, $a1, .LBB2_42 # %bb.45: # %._crit_edge2345.split.us.us.us.us.us.us # in Loop: Header=BB2_41 Depth=2 @@ -5193,11 +5190,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym blez $a2, .LBB2_2 # %bb.48: # %.preheader2319.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 664 # 8-byte Folded Reload + ld.d $a2, $sp, 696 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.49: # %.preheader2319.lr.ph # in Loop: Header=BB2_3 Depth=1 - ld.d $a2, $sp, 488 # 8-byte Folded Reload + ld.d $a2, $sp, 496 # 8-byte Folded Reload blez $a2, .LBB2_2 # %bb.50: # %.preheader2315.us.us.us.us.us.preheader # in Loop: Header=BB2_3 Depth=1 @@ -5207,11 +5204,11 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym mul.d $t4, $a2, $s0 st.d $t4, $sp, 320 # 8-byte Folded Spill ld.w $a3, $a3, 8 - ld.d $t5, $sp, 640 # 8-byte Folded Reload - ld.d $t8, $sp, 488 # 8-byte Folded Reload + ld.d $t5, $sp, 672 # 8-byte Folded Reload + ld.d $t8, $sp, 496 # 8-byte Folded Reload mul.d $t4, $t8, $t5 st.d $t4, $sp, 312 # 8-byte Folded Spill - ld.d $t4, $sp, 664 # 8-byte Folded Reload + ld.d $t4, $sp, 696 # 8-byte Folded Reload sub.d $t1, $t1, $t4 mul.d $t1, $t1, $t2 sub.d $t2, $t6, $t4 @@ -5228,13 +5225,13 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 128 # 8-byte Folded Spill sub.d $a1, $t0, $t8 st.d $a1, $sp, 288 # 8-byte Folded Spill - ld.d $t0, $sp, 656 # 8-byte Folded Reload + ld.d $t0, $sp, 688 # 8-byte Folded Reload addi.d $a1, $t0, 8 - ld.d $t2, $sp, 648 # 8-byte Folded Reload + ld.d $t2, $sp, 680 # 8-byte Folded Reload st.d $a1, $sp, 280 # 8-byte Folded Spill alsl.d $a1, $t2, $a1, 3 st.d $a1, $sp, 272 # 8-byte Folded Spill - ld.d $a1, $sp, 632 # 8-byte Folded Reload + ld.d $a1, $sp, 664 # 8-byte Folded Reload addi.d $a1, $a1, 8 st.d $a1, $sp, 264 # 8-byte Folded Spill mul.d $a1, $a3, $s3 @@ -5245,7 +5242,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 120 # 8-byte Folded Spill st.d $t6, $sp, 304 # 8-byte Folded Spill slli.d $a1, $t6, 3 - ld.d $a2, $sp, 688 # 8-byte Folded Reload + ld.d $a2, $sp, 560 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 256 # 8-byte Folded Spill slli.d $a2, $t5, 3 @@ -5258,7 +5255,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a2, $sp, 360 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 224 # 8-byte Folded Spill - ld.d $a2, $sp, 704 # 8-byte Folded Reload + ld.d $a2, $sp, 536 # 8-byte Folded Reload sub.d $a2, $a2, $a1 st.d $a2, $sp, 216 # 8-byte Folded Spill st.d $t7, $sp, 296 # 8-byte Folded Spill @@ -5276,7 +5273,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a0, $sp, 104 # 8-byte Folded Spill sub.d $a0, $s7, $t8 st.d $a0, $sp, 192 # 8-byte Folded Spill - ld.d $a0, $sp, 528 # 8-byte Folded Reload + ld.d $a0, $sp, 504 # 8-byte Folded Reload sub.d $a0, $a0, $a1 st.d $a0, $sp, 184 # 8-byte Folded Spill ld.d $a0, $sp, 352 # 8-byte Folded Reload @@ -5285,7 +5282,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a0, $sp, 712 # 8-byte Folded Reload sub.d $a0, $a0, $a1 st.d $a0, $sp, 168 # 8-byte Folded Spill - ld.d $a0, $sp, 680 # 8-byte Folded Reload + ld.d $a0, $sp, 552 # 8-byte Folded Reload sub.d $a0, $a0, $a1 st.d $a0, $sp, 160 # 8-byte Folded Spill .p2align 4, , 16 @@ -5308,7 +5305,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym move $a0, $zero move $t6, $a5 move $a3, $a4 - ld.d $a1, $sp, 648 # 8-byte Folded Reload + ld.d $a1, $sp, 680 # 8-byte Folded Reload add.d $a1, $a1, $a4 ld.d $t1, $sp, 264 # 8-byte Folded Reload alsl.d $a4, $a1, $t1, 3 @@ -5322,55 +5319,51 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym alsl.d $t8, $a1, $t0, 3 ld.d $a1, $sp, 304 # 8-byte Folded Reload add.d $a1, $a1, $a6 - ld.d $a2, $sp, 528 # 8-byte Folded Reload - st.d $a2, $sp, 528 # 8-byte Folded Spill + ld.d $a2, $sp, 504 # 8-byte Folded Reload alsl.d $s6, $a1, $a2, 3 ld.d $s8, $sp, 352 # 8-byte Folded Reload alsl.d $a2, $a1, $s8, 3 st.d $a2, $sp, 368 # 8-byte Folded Spill ld.d $a2, $sp, 712 # 8-byte Folded Reload alsl.d $t4, $a1, $a2, 3 - ld.d $a2, $sp, 680 # 8-byte Folded Reload - st.d $a2, $sp, 680 # 8-byte Folded Spill + ld.d $a2, $sp, 552 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1144 # 8-byte Folded Spill - ld.d $a2, $sp, 704 # 8-byte Folded Reload - st.d $a2, $sp, 704 # 8-byte Folded Spill + ld.d $a2, $sp, 536 # 8-byte Folded Reload alsl.d $t7, $a1, $a2, 3 ld.d $s1, $sp, 360 # 8-byte Folded Reload alsl.d $a2, $a1, $s1, 3 st.d $a2, $sp, 1136 # 8-byte Folded Spill ld.d $a2, $sp, 720 # 8-byte Folded Reload alsl.d $t5, $a1, $a2, 3 - ld.d $a2, $sp, 688 # 8-byte Folded Reload - st.d $a2, $sp, 688 # 8-byte Folded Spill + ld.d $a2, $sp, 560 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1128 # 8-byte Folded Spill - ld.d $a2, $sp, 608 # 8-byte Folded Reload + ld.d $a2, $sp, 640 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1120 # 8-byte Folded Spill - ld.d $a2, $sp, 696 # 8-byte Folded Reload + ld.d $a2, $sp, 704 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1112 # 8-byte Folded Spill - ld.d $a2, $sp, 600 # 8-byte Folded Reload + ld.d $a2, $sp, 632 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1104 # 8-byte Folded Spill - ld.d $s5, $sp, 520 # 8-byte Folded Reload + ld.d $s5, $sp, 528 # 8-byte Folded Reload alsl.d $a2, $a1, $s5, 3 st.d $a2, $sp, 1096 # 8-byte Folded Spill - ld.d $a2, $sp, 416 # 8-byte Folded Reload + ld.d $a2, $sp, 424 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1088 # 8-byte Folded Spill ld.d $s4, $sp, 336 # 8-byte Folded Reload alsl.d $a2, $a1, $s4, 3 st.d $a2, $sp, 1080 # 8-byte Folded Spill - ld.d $a2, $sp, 592 # 8-byte Folded Reload + ld.d $a2, $sp, 624 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1072 # 8-byte Folded Spill - ld.d $s3, $sp, 512 # 8-byte Folded Reload + ld.d $s3, $sp, 520 # 8-byte Folded Reload alsl.d $a2, $a1, $s3, 3 st.d $a2, $sp, 1064 # 8-byte Folded Spill - ld.d $a2, $sp, 424 # 8-byte Folded Reload + ld.d $a2, $sp, 432 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1056 # 8-byte Folded Spill ld.d $fp, $sp, 344 # 8-byte Folded Reload @@ -5379,23 +5372,21 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $s7, $sp, 328 # 8-byte Folded Reload alsl.d $a2, $a1, $s7, 3 st.d $a2, $sp, 1040 # 8-byte Folded Spill - ld.d $ra, $sp, 504 # 8-byte Folded Reload + ld.d $ra, $sp, 512 # 8-byte Folded Reload alsl.d $a2, $a1, $ra, 3 st.d $a2, $sp, 1032 # 8-byte Folded Spill - ld.d $a2, $sp, 496 # 8-byte Folded Reload - st.d $a2, $sp, 496 # 8-byte Folded Spill + ld.d $a2, $sp, 416 # 8-byte Folded Reload alsl.d $a2, $a1, $a2, 3 st.d $a2, $sp, 1024 # 8-byte Folded Spill - ld.d $a2, $sp, 672 # 8-byte Folded Reload - st.d $a2, $sp, 672 # 8-byte Folded Spill + ld.d $a2, $sp, 544 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 3 st.d $a1, $sp, 1016 # 8-byte Folded Spill - ld.d $a1, $sp, 624 # 8-byte Folded Reload + ld.d $a1, $sp, 656 # 8-byte Folded Reload alsl.d $s0, $t6, $a1, 3 - ld.d $a1, $sp, 616 # 8-byte Folded Reload + ld.d $a1, $sp, 648 # 8-byte Folded Reload st.d $t6, $sp, 392 # 8-byte Folded Spill alsl.d $t6, $t6, $a1, 3 - ld.d $a1, $sp, 480 # 8-byte Folded Reload + ld.d $a1, $sp, 488 # 8-byte Folded Reload add.d $a1, $a1, $a3 st.d $a1, $sp, 1008 # 8-byte Folded Spill alsl.d $a2, $a3, $s2, 3 @@ -5418,53 +5409,53 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a3, $sp, 376 # 8-byte Folded Spill alsl.d $a1, $a3, $t1, 3 st.d $a1, $sp, 960 # 8-byte Folded Spill - ld.d $a1, $sp, 432 # 8-byte Folded Reload + ld.d $a1, $sp, 440 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 952 # 8-byte Folded Spill - ld.d $a1, $sp, 536 # 8-byte Folded Reload + ld.d $a1, $sp, 568 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 944 # 8-byte Folded Spill - ld.d $a1, $sp, 440 # 8-byte Folded Reload + ld.d $a1, $sp, 448 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 936 # 8-byte Folded Spill - ld.d $a1, $sp, 552 # 8-byte Folded Reload + ld.d $a1, $sp, 584 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 928 # 8-byte Folded Spill - ld.d $a1, $sp, 568 # 8-byte Folded Reload + ld.d $a1, $sp, 600 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 920 # 8-byte Folded Spill - ld.d $a1, $sp, 560 # 8-byte Folded Reload + ld.d $a1, $sp, 592 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 912 # 8-byte Folded Spill - ld.d $a1, $sp, 448 # 8-byte Folded Reload + ld.d $a1, $sp, 456 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 904 # 8-byte Folded Spill - ld.d $a1, $sp, 544 # 8-byte Folded Reload + ld.d $a1, $sp, 576 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 896 # 8-byte Folded Spill - ld.d $a1, $sp, 456 # 8-byte Folded Reload + ld.d $a1, $sp, 464 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 888 # 8-byte Folded Spill - ld.d $a1, $sp, 464 # 8-byte Folded Reload + ld.d $a1, $sp, 472 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 880 # 8-byte Folded Spill - ld.d $a1, $sp, 576 # 8-byte Folded Reload + ld.d $a1, $sp, 608 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 872 # 8-byte Folded Spill - ld.d $a1, $sp, 472 # 8-byte Folded Reload + ld.d $a1, $sp, 480 # 8-byte Folded Reload alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 864 # 8-byte Folded Spill - ld.d $a1, $sp, 584 # 8-byte Folded Reload + ld.d $a1, $sp, 616 # 8-byte Folded Reload st.d $a7, $sp, 400 # 8-byte Folded Spill alsl.d $a1, $a7, $a1, 3 st.d $a1, $sp, 856 # 8-byte Folded Spill alsl.d $s8, $a6, $s8, 3 - ld.d $a1, $sp, 680 # 8-byte Folded Reload + ld.d $a1, $sp, 552 # 8-byte Folded Reload alsl.d $t1, $a6, $a1, 3 alsl.d $s1, $a6, $s1, 3 - ld.d $a1, $sp, 688 # 8-byte Folded Reload + ld.d $a1, $sp, 560 # 8-byte Folded Reload alsl.d $a3, $a6, $a1, 3 - ld.d $a1, $sp, 696 # 8-byte Folded Reload + ld.d $a1, $sp, 704 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 848 # 8-byte Folded Spill alsl.d $a1, $a6, $s5, 3 @@ -5475,7 +5466,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 824 # 8-byte Folded Spill alsl.d $a1, $a6, $fp, 3 st.d $a1, $sp, 816 # 8-byte Folded Spill - ld.d $a1, $sp, 528 # 8-byte Folded Reload + ld.d $a1, $sp, 504 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 808 # 8-byte Folded Spill alsl.d $a1, $a6, $s7, 3 @@ -5485,16 +5476,16 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym st.d $a1, $sp, 792 # 8-byte Folded Spill alsl.d $a1, $a6, $ra, 3 st.d $a1, $sp, 784 # 8-byte Folded Spill - ld.d $a1, $sp, 704 # 8-byte Folded Reload + ld.d $a1, $sp, 536 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 776 # 8-byte Folded Spill - ld.d $a1, $sp, 496 # 8-byte Folded Reload + ld.d $a1, $sp, 416 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 768 # 8-byte Folded Spill ld.d $a1, $sp, 720 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 760 # 8-byte Folded Spill - ld.d $a1, $sp, 672 # 8-byte Folded Reload + ld.d $a1, $sp, 544 # 8-byte Folded Reload alsl.d $a1, $a6, $a1, 3 st.d $a1, $sp, 752 # 8-byte Folded Spill ld.d $a1, $sp, 184 # 8-byte Folded Reload @@ -5511,10 +5502,10 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym alsl.d $t0, $a6, $a1, 3 ld.d $a6, $sp, 368 # 8-byte Folded Reload ld.d $s3, $sp, 312 # 8-byte Folded Reload - ld.d $ra, $sp, 632 # 8-byte Folded Reload - ld.d $a1, $sp, 656 # 8-byte Folded Reload - ld.d $s7, $sp, 640 # 8-byte Folded Reload - ld.d $s5, $sp, 488 # 8-byte Folded Reload + ld.d $ra, $sp, 664 # 8-byte Folded Reload + ld.d $a1, $sp, 688 # 8-byte Folded Reload + ld.d $s7, $sp, 672 # 8-byte Folded Reload + ld.d $s5, $sp, 496 # 8-byte Folded Reload ld.d $fp, $sp, 248 # 8-byte Folded Reload .p2align 4, , 16 .LBB2_53: # Parent Loop BB2_3 Depth=1 @@ -5779,7 +5770,7 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym ld.d $a2, $sp, 408 # 8-byte Folded Reload addi.w $a2, $a2, 1 addi.w $a7, $a1, 1 - ld.d $a1, $sp, 664 # 8-byte Folded Reload + ld.d $a1, $sp, 696 # 8-byte Folded Reload bne $a2, $a1, .LBB2_52 # %bb.55: # %._crit_edge2524.split.us.us.us.us.us.us # in Loop: Header=BB2_51 Depth=2 @@ -5803,7 +5794,6 @@ hypre_SMG3BuildRAPNoSym: # @hypre_SMG3BuildRAPNoSym .LBB2_56: # in Loop: Header=BB2_3 Depth=1 ld.d $s8, $sp, 1072 # 8-byte Folded Reload ld.d $a0, $sp, 1096 # 8-byte Folded Reload - ld.d $s0, $sp, 1064 # 8-byte Folded Reload ori $s5, $zero, 1 b .LBB2_11 .LBB2_57: # %._crit_edge diff --git a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_setup.s b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_setup.s index fd92670f..5d43d230 100644 --- a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_setup.s +++ b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/smg_setup.s @@ -26,15 +26,15 @@ hypre_SMGSetup: # @hypre_SMGSetup st.d $s7, $sp, 368 # 8-byte Folded Spill st.d $s8, $sp, 360 # 8-byte Folded Spill fst.d $fs0, $sp, 352 # 8-byte Folded Spill - st.d $a3, $sp, 176 # 8-byte Folded Spill - st.d $a2, $sp, 152 # 8-byte Folded Spill + st.d $a3, $sp, 184 # 8-byte Folded Spill + st.d $a2, $sp, 160 # 8-byte Folded Spill move $s3, $a0 ld.w $a0, $a0, 0 st.d $a0, $sp, 232 # 8-byte Folded Spill ld.w $a0, $s3, 36 - st.d $a0, $sp, 136 # 8-byte Folded Spill - ld.w $a0, $s3, 40 st.d $a0, $sp, 144 # 8-byte Folded Spill + ld.w $a0, $s3, 40 + st.d $a0, $sp, 152 # 8-byte Folded Spill st.d $zero, $sp, 280 ld.d $a0, $a1, 24 vrepli.b $vr0, 0 @@ -104,7 +104,7 @@ hypre_SMGSetup: # @hypre_SMGSetup stx.w $a1, $fp, $a0 ldx.w $a1, $s5, $fp ldx.w $a2, $s6, $fp - st.d $zero, $sp, 184 # 8-byte Folded Spill + st.d $zero, $sp, 136 # 8-byte Folded Spill st.d $s4, $sp, 224 # 8-byte Folded Spill alsl.d $a0, $s4, $a0, 2 st.d $a0, $sp, 200 # 8-byte Folded Spill @@ -159,7 +159,7 @@ hypre_SMGSetup: # @hypre_SMGSetup lu32i.d $a0, 1 st.d $a0, $sp, 292 ori $a0, $zero, 1 - st.d $a0, $sp, 184 # 8-byte Folded Spill + st.d $a0, $sp, 136 # 8-byte Folded Spill st.w $s2, $sp, 300 ld.d $a1, $sp, 200 # 8-byte Folded Reload ld.w $a0, $a1, 0 @@ -182,7 +182,7 @@ hypre_SMGSetup: # @hypre_SMGSetup ori $s8, $zero, 1 lu32i.d $s8, 1 ori $a1, $zero, 1 - st.d $a1, $sp, 184 # 8-byte Folded Spill + st.d $a1, $sp, 136 # 8-byte Folded Spill .p2align 4, , 16 .LBB0_5: # %.lr.ph560 # =>This Inner Loop Header: Depth=1 @@ -228,9 +228,9 @@ hypre_SMGSetup: # @hypre_SMGSetup st.w $a0, $a1, 0 ld.w $a0, $s0, 0 ld.w $a1, $fp, 0 - ld.d $a2, $sp, 184 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload addi.w $a2, $a2, 1 - st.d $a2, $sp, 184 # 8-byte Folded Spill + st.d $a2, $sp, 136 # 8-byte Folded Spill beq $a0, $a1, .LBB0_7 # %bb.6: # %.lr.ph560 # in Loop: Header=BB0_5 Depth=1 @@ -239,7 +239,7 @@ hypre_SMGSetup: # @hypre_SMGSetup addi.d $s7, $s7, 8 bnez $s4, .LBB0_5 .LBB0_7: # %.loopexit - ld.d $s2, $sp, 184 # 8-byte Folded Reload + ld.d $s2, $sp, 136 # 8-byte Folded Reload addi.d $fp, $s2, 1 move $a0, $s5 pcaddu18i $ra, %call36(hypre_BoxDestroy) @@ -258,11 +258,11 @@ hypre_SMGSetup: # @hypre_SMGSetup move $a0, $s3 pcaddu18i $ra, %call36(hypre_MAlloc) jirl $ra, $ra, 0 - st.d $a0, $sp, 168 # 8-byte Folded Spill + st.d $a0, $sp, 176 # 8-byte Folded Spill move $a0, $s3 pcaddu18i $ra, %call36(hypre_MAlloc) jirl $ra, $ra, 0 - st.d $a0, $sp, 160 # 8-byte Folded Spill + st.d $a0, $sp, 168 # 8-byte Folded Spill move $a0, $s0 pcaddu18i $ra, %call36(hypre_MAlloc) jirl $ra, $ra, 0 @@ -284,12 +284,12 @@ hypre_SMGSetup: # @hypre_SMGSetup pcaddu18i $ra, %call36(hypre_StructMatrixRef) jirl $ra, $ra, 0 st.d $a0, $s4, 0 - ld.d $s8, $sp, 152 # 8-byte Folded Reload + ld.d $s8, $sp, 160 # 8-byte Folded Reload move $a0, $s8 pcaddu18i $ra, %call36(hypre_StructVectorRef) jirl $ra, $ra, 0 st.d $a0, $s3, 0 - ld.d $s5, $sp, 176 # 8-byte Folded Reload + ld.d $s5, $sp, 184 # 8-byte Folded Reload move $a0, $s5 pcaddu18i $ra, %call36(hypre_StructVectorRef) jirl $ra, $ra, 0 @@ -387,8 +387,8 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.w $a0, $a0, 36 add.w $s5, $a0, $fp st.d $s3, $sp, 64 # 8-byte Folded Spill - st.d $s6, $sp, 152 # 8-byte Folded Spill - st.d $s7, $sp, 176 # 8-byte Folded Spill + st.d $s6, $sp, 160 # 8-byte Folded Spill + st.d $s7, $sp, 184 # 8-byte Folded Spill beqz $s2, .LBB0_18 # %bb.16: # %.lr.ph501 bstrpick.d $a2, $s2, 31, 0 @@ -400,11 +400,12 @@ hypre_SMGSetup: # @hypre_SMGSetup addi.d $s4, $a0, 8 addi.d $s3, $s6, 8 addi.d $s7, $s7, 8 - ld.d $s6, $sp, 168 # 8-byte Folded Reload + ld.d $s6, $sp, 176 # 8-byte Folded Reload st.d $s0, $sp, 120 # 8-byte Folded Spill - ld.d $s0, $sp, 160 # 8-byte Folded Reload + ld.d $s0, $sp, 168 # 8-byte Folded Reload ld.d $a1, $sp, 216 # 8-byte Folded Reload ld.d $s1, $sp, 104 # 8-byte Folded Reload + ld.d $s8, $sp, 232 # 8-byte Folded Reload .p2align 4, , 16 .LBB0_17: # =>This Inner Loop Header: Depth=1 st.d $a2, $sp, 208 # 8-byte Folded Spill @@ -433,7 +434,6 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.w $a0, $a0, 60 ld.d $a1, $s1, 0 add.d $s5, $s5, $a0 - ld.d $s8, $sp, 232 # 8-byte Folded Reload move $a0, $s8 pcaddu18i $ra, %call36(hypre_StructVectorCreate) jirl $ra, $ra, 0 @@ -501,7 +501,7 @@ hypre_SMGSetup: # @hypre_SMGSetup move $a0, $s5 pcaddu18i $ra, %call36(hypre_CAlloc) jirl $ra, $ra, 0 - ld.d $s6, $sp, 176 # 8-byte Folded Reload + ld.d $s6, $sp, 184 # 8-byte Folded Reload ld.d $a1, $s6, 0 move $s0, $a0 ld.d $a0, $sp, 192 # 8-byte Folded Reload @@ -515,7 +515,7 @@ hypre_SMGSetup: # @hypre_SMGSetup jirl $ra, $ra, 0 ld.d $a0, $s6, 0 ld.w $a1, $a0, 36 - ld.d $s8, $sp, 152 # 8-byte Folded Reload + ld.d $s8, $sp, 160 # 8-byte Folded Reload ld.d $a0, $s8, 0 alsl.d $s0, $a1, $s0, 3 move $a1, $s0 @@ -524,16 +524,15 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $a0, $s8, 0 pcaddu18i $ra, %call36(hypre_StructVectorAssemble) jirl $ra, $ra, 0 - ld.d $a1, $sp, 184 # 8-byte Folded Reload - ld.d $s7, $sp, 168 # 8-byte Folded Reload - st.d $a1, $sp, 184 # 8-byte Folded Spill - beqz $a1, .LBB0_21 + ld.d $s7, $sp, 176 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload + beqz $a0, .LBB0_21 # %bb.19: # %.lr.ph506.preheader ld.d $a0, $s8, 0 ld.w $a0, $a0, 36 move $fp, $zero alsl.d $s0, $a0, $s0, 3 - ld.d $a0, $sp, 184 # 8-byte Folded Reload + ld.d $a0, $sp, 136 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 0 slli.d $s1, $a0, 3 ld.d $a0, $sp, 56 # 8-byte Folded Reload @@ -604,7 +603,7 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $s0, $sp, 72 # 8-byte Folded Reload st.d $s0, $s1, 96 st.d $s7, $s1, 104 - ld.d $a0, $sp, 160 # 8-byte Folded Reload + ld.d $a0, $sp, 168 # 8-byte Folded Reload st.d $a0, $s1, 112 ld.d $s2, $sp, 64 # 8-byte Folded Reload st.d $s2, $s1, 120 @@ -657,7 +656,7 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $a0, $s5, 0 pcaddu18i $ra, %call36(hypre_StructVectorAssemble) jirl $ra, $ra, 0 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 136 # 8-byte Folded Reload beqz $s6, .LBB0_28 # %bb.22: # %.lr.ph510 move $s3, $zero @@ -678,6 +677,9 @@ hypre_SMGSetup: # @hypre_SMGSetup slli.d $a0, $a0, 3 st.d $a0, $sp, 80 # 8-byte Folded Spill movgr2fr.d $fs0, $zero + ld.d $s1, $sp, 96 # 8-byte Folded Reload + ld.d $s8, $sp, 176 # 8-byte Folded Reload + ld.d $s7, $sp, 216 # 8-byte Folded Reload b .LBB0_25 .p2align 4, , 16 .LBB0_23: # in Loop: Header=BB0_25 Depth=1 @@ -745,20 +747,19 @@ hypre_SMGSetup: # @hypre_SMGSetup pcaddu18i $ra, %call36(hypre_SMGRelaxSetSpace) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s3 - ld.d $a1, $sp, 176 # 8-byte Folded Reload + ld.d $a1, $sp, 184 # 8-byte Folded Reload ldx.d $a1, $a1, $s3 pcaddu18i $ra, %call36(hypre_SMGRelaxSetTempVec) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s3 - ld.d $a1, $sp, 136 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload pcaddu18i $ra, %call36(hypre_SMGRelaxSetNumPreRelax) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s3 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 152 # 8-byte Folded Reload pcaddu18i $ra, %call36(hypre_SMGRelaxSetNumPostRelax) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s3 - ld.d $s1, $sp, 96 # 8-byte Folded Reload add.d $fp, $s1, $s3 ld.d $a1, $fp, -8 ld.d $s0, $sp, 104 # 8-byte Folded Reload @@ -773,7 +774,6 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $a1, $fp, -8 ld.d $a2, $s2, -8 ld.d $a3, $s6, -8 - ld.d $s8, $sp, 168 # 8-byte Folded Reload ldx.d $a4, $s8, $s3 addi.d $a6, $sp, 316 addi.d $a7, $sp, 304 @@ -798,7 +798,6 @@ hypre_SMGSetup: # @hypre_SMGSetup jirl $ra, $ra, 0 pcaddu18i $ra, %call36(hypre_SMGResidualCreate) jirl $ra, $ra, 0 - ld.d $s7, $sp, 216 # 8-byte Folded Reload stx.d $a0, $s7, $s3 addi.d $a1, $sp, 340 addi.d $a2, $sp, 328 @@ -808,7 +807,7 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $a1, $fp, -8 ld.d $a2, $s6, -8 ld.d $a3, $s2, -8 - ld.d $s2, $sp, 152 # 8-byte Folded Reload + ld.d $s2, $sp, 160 # 8-byte Folded Reload ldx.d $a4, $s2, $s3 pcaddu18i $ra, %call36(hypre_SMGResidualSetup) jirl $ra, $ra, 0 @@ -829,7 +828,7 @@ hypre_SMGSetup: # @hypre_SMGSetup jirl $ra, $ra, 0 ld.d $a1, $sp, 208 # 8-byte Folded Reload stx.d $a0, $a1, $s3 - ld.d $s5, $sp, 160 # 8-byte Folded Reload + ld.d $s5, $sp, 168 # 8-byte Folded Reload ldx.d $a1, $s5, $s3 ldx.d $a3, $s2, $s3 ldx.d $a4, $s0, $s3 @@ -871,7 +870,7 @@ hypre_SMGSetup: # @hypre_SMGSetup move $a1, $zero move $a2, $zero ori $a3, $zero, 1 - ld.d $s6, $sp, 184 # 8-byte Folded Reload + ld.d $s6, $sp, 136 # 8-byte Folded Reload move $fp, $s6 ori $a4, $zero, 1 ori $a5, $zero, 1 @@ -913,16 +912,16 @@ hypre_SMGSetup: # @hypre_SMGSetup pcaddu18i $ra, %call36(hypre_SMGRelaxSetMaxIter) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s1 - ld.d $a1, $sp, 176 # 8-byte Folded Reload + ld.d $a1, $sp, 184 # 8-byte Folded Reload ldx.d $a1, $a1, $s1 pcaddu18i $ra, %call36(hypre_SMGRelaxSetTempVec) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s1 - ld.d $a1, $sp, 136 # 8-byte Folded Reload + ld.d $a1, $sp, 144 # 8-byte Folded Reload pcaddu18i $ra, %call36(hypre_SMGRelaxSetNumPreRelax) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s1 - ld.d $a1, $sp, 144 # 8-byte Folded Reload + ld.d $a1, $sp, 152 # 8-byte Folded Reload pcaddu18i $ra, %call36(hypre_SMGRelaxSetNumPostRelax) jirl $ra, $ra, 0 ldx.d $a0, $s4, $s1 @@ -951,7 +950,7 @@ hypre_SMGSetup: # @hypre_SMGSetup ld.d $a2, $fp, 0 ld.d $a3, $s3, 0 ld.d $s2, $sp, 64 # 8-byte Folded Reload - ld.d $a4, $sp, 152 # 8-byte Folded Reload + ld.d $a4, $sp, 160 # 8-byte Folded Reload ldx.d $a4, $a4, $s1 pcaddu18i $ra, %call36(hypre_SMGResidualSetup) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matrix.s b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matrix.s index 0820d43c..4ec28797 100644 --- a/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matrix.s +++ b/results/MultiSource/Benchmarks/ASCI_Purple/SMG2000/CMakeFiles/smg2000.dir/struct_matrix.s @@ -372,6 +372,7 @@ hypre_StructMatrixInitializeShell: # @hypre_StructMatrixInitializeShell st.d $a0, $sp, 24 # 8-byte Folded Spill addi.w $s8, $zero, -1 st.d $s1, $sp, 32 # 8-byte Folded Spill + ld.d $s5, $sp, 48 # 8-byte Folded Reload b .LBB4_22 .p2align 4, , 16 .LBB4_20: # in Loop: Header=BB4_22 Depth=1 @@ -396,7 +397,6 @@ hypre_StructMatrixInitializeShell: # @hypre_StructMatrixInitializeShell st.d $a0, $sp, 64 # 8-byte Folded Spill ld.w $s4, $s3, 8 ori $a1, $zero, 4 - ld.d $s5, $sp, 48 # 8-byte Folded Reload move $a0, $s5 pcaddu18i $ra, %call36(hypre_CAlloc) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/CMakeFiles/IRSmk.dir/rmatmult3.s b/results/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/CMakeFiles/IRSmk.dir/rmatmult3.s index b6fbaf87..a40573da 100644 --- a/results/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/CMakeFiles/IRSmk.dir/rmatmult3.s +++ b/results/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/CMakeFiles/IRSmk.dir/rmatmult3.s @@ -290,6 +290,24 @@ rmatmult3: # @rmatmult3 st.d $a1, $sp, 8 # 8-byte Folded Spill move $a2, $a1 st.d $s4, $sp, 16 # 8-byte Folded Spill + ld.d $s7, $sp, 656 # 8-byte Folded Reload + ld.d $s8, $sp, 600 # 8-byte Folded Reload + ld.d $a7, $sp, 592 # 8-byte Folded Reload + ld.d $t1, $sp, 584 # 8-byte Folded Reload + ld.d $t3, $sp, 576 # 8-byte Folded Reload + ld.d $t0, $sp, 568 # 8-byte Folded Reload + ld.d $t4, $sp, 560 # 8-byte Folded Reload + ld.d $a3, $sp, 544 # 8-byte Folded Reload + ld.d $ra, $sp, 536 # 8-byte Folded Reload + ld.d $t5, $sp, 528 # 8-byte Folded Reload + ld.d $a5, $sp, 520 # 8-byte Folded Reload + ld.d $t6, $sp, 512 # 8-byte Folded Reload + ld.d $a6, $sp, 504 # 8-byte Folded Reload + ld.d $t7, $sp, 496 # 8-byte Folded Reload + ld.d $t8, $sp, 480 # 8-byte Folded Reload + ld.d $a4, $sp, 472 # 8-byte Folded Reload + ld.d $fp, $sp, 464 # 8-byte Folded Reload + ld.d $s0, $sp, 456 # 8-byte Folded Reload b .LBB0_5 .p2align 4, , 16 .LBB0_4: # %._crit_edge229.split.us.us.us @@ -331,30 +349,12 @@ rmatmult3: # @rmatmult3 st.d $a1, $sp, 672 # 8-byte Folded Spill ld.d $s1, $sp, 728 # 8-byte Folded Reload ld.d $s5, $sp, 624 # 8-byte Folded Reload - ld.d $s7, $sp, 656 # 8-byte Folded Reload - ld.d $s4, $sp, 648 # 8-byte Folded Reload - ld.d $s8, $sp, 600 # 8-byte Folded Reload ld.d $s2, $sp, 632 # 8-byte Folded Reload - ld.d $a7, $sp, 592 # 8-byte Folded Reload - ld.d $t1, $sp, 584 # 8-byte Folded Reload - ld.d $t3, $sp, 576 # 8-byte Folded Reload - ld.d $t0, $sp, 568 # 8-byte Folded Reload - ld.d $t4, $sp, 560 # 8-byte Folded Reload ld.d $a2, $sp, 552 # 8-byte Folded Reload - ld.d $a3, $sp, 544 # 8-byte Folded Reload - ld.d $ra, $sp, 536 # 8-byte Folded Reload - ld.d $t5, $sp, 528 # 8-byte Folded Reload - ld.d $a5, $sp, 520 # 8-byte Folded Reload - ld.d $t6, $sp, 512 # 8-byte Folded Reload - ld.d $a6, $sp, 504 # 8-byte Folded Reload - ld.d $t7, $sp, 496 # 8-byte Folded Reload ld.d $a0, $sp, 488 # 8-byte Folded Reload - ld.d $t8, $sp, 480 # 8-byte Folded Reload - ld.d $a4, $sp, 472 # 8-byte Folded Reload - ld.d $fp, $sp, 464 # 8-byte Folded Reload - ld.d $s0, $sp, 456 # 8-byte Folded Reload ori $s3, $zero, 10 move $t2, $s5 + ld.d $s4, $sp, 648 # 8-byte Folded Reload bgeu $s2, $s3, .LBB0_10 .LBB0_7: # %scalar.ph.preheader # in Loop: Header=BB0_6 Depth=2 @@ -551,8 +551,8 @@ rmatmult3: # @rmatmult3 add.d $s2, $s2, $s6 ld.d $s3, $sp, 608 # 8-byte Folded Reload alsl.d $s2, $s2, $s3, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 @@ -633,8 +633,8 @@ rmatmult3: # @rmatmult3 alsl.d $s1, $s6, $s1, 3 ld.d $s3, $sp, 424 # 8-byte Folded Reload alsl.d $s2, $s2, $s3, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 @@ -646,8 +646,8 @@ rmatmult3: # @rmatmult3 ld.d $s2, $sp, 424 # 8-byte Folded Reload ld.d $a1, $sp, 704 # 8-byte Folded Reload alsl.d $s2, $a1, $s2, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 @@ -660,8 +660,8 @@ rmatmult3: # @rmatmult3 ld.d $s2, $sp, 272 # 8-byte Folded Reload ld.d $a1, $sp, 704 # 8-byte Folded Reload alsl.d $s2, $a1, $s2, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 @@ -674,8 +674,8 @@ rmatmult3: # @rmatmult3 ld.d $s2, $sp, 392 # 8-byte Folded Reload ld.d $a1, $sp, 704 # 8-byte Folded Reload alsl.d $s2, $a1, $s2, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 @@ -688,8 +688,8 @@ rmatmult3: # @rmatmult3 ld.d $s2, $sp, 256 # 8-byte Folded Reload ld.d $a1, $sp, 704 # 8-byte Folded Reload alsl.d $s2, $a1, $s2, 3 - ld.d $s3, $sp, 720 # 8-byte Folded Reload - sltu $s2, $s3, $s2 + ld.d $a1, $sp, 720 # 8-byte Folded Reload + sltu $s2, $a1, $s2 ld.d $a1, $sp, 712 # 8-byte Folded Reload sltu $s1, $s1, $a1 and $s2, $s2, $s1 diff --git a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s index d32a4852..86e4be10 100644 --- a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s +++ b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/BenchmarkDemo.s @@ -885,8 +885,6 @@ _ZN13BenchmarkDemo11createTest1Ev: # @_ZN13BenchmarkDemo11createTest1Ev pcaddu18i $ra, %call36(_ZN11btRigidBodyC1EfP13btMotionStateP16btCollisionShapeRK9btVector3) jirl $ra, $ra, 0 .Ltmp51: # EH_LABEL - vld $vr0, $sp, 32 # 16-byte Folded Reload - vst $vr0, $sp, 32 # 16-byte Folded Spill # %bb.7: # %_ZN15DemoApplication20localCreateRigidBodyEfRK11btTransformP16btCollisionShape.exit # in Loop: Header=BB5_6 Depth=2 bstrpick.d $a0, $s6, 31, 0 diff --git a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s index b87ba85c..2cc2d4c5 100644 --- a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s +++ b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btDiscreteDynamicsWorld.s @@ -9319,8 +9319,8 @@ _ZN12btIDebugDraw15drawSpherePatchERK9btVector3S2_S2_fffffS2_f: # @_ZN12btIDebug .LBB47_10: # in Loop: Header=BB47_6 Depth=1 st.d $s7, $sp, 72 # 8-byte Folded Spill or $a0, $s4, $s5 - ld.d $a1, $sp, 64 # 8-byte Folded Reload st.d $a0, $sp, 56 # 8-byte Folded Spill + ld.d $a1, $sp, 64 # 8-byte Folded Reload orn $a0, $a1, $a0 andi $a0, $a0, 1 bnez $a0, .LBB47_12 diff --git a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btMultiSphereShape.s b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btMultiSphereShape.s index 5468c347..5e3c5bca 100644 --- a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btMultiSphereShape.s +++ b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btMultiSphereShape.s @@ -471,7 +471,6 @@ _ZNK18btMultiSphereShape37localGetSupportingVertexWithoutMarginERK9btVector3: # fld.s $fa2, $fp, 32 fld.s $fa3, $s2, 0 vld $vr4, $sp, 16 # 16-byte Folded Reload - vst $vr4, $sp, 16 # 16-byte Folded Spill fmul.s $fa0, $fa4, $fa0 fmul.s $fa1, $fs0, $fa1 fmul.s $fa2, $fs1, $fa2 diff --git a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBodyHelpers.s b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBodyHelpers.s index 805be8d1..0721d5ad 100644 --- a/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBodyHelpers.s +++ b/results/MultiSource/Benchmarks/Bullet/CMakeFiles/bullet.dir/btSoftBodyHelpers.s @@ -1690,20 +1690,18 @@ _ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi: # @_ZN17btSoftBodyHel pcaddu18i $ra, %call36(__cxa_guard_release) jirl $ra, $ra, 0 ld.d $s0, $sp, 128 # 8-byte Folded Reload - fld.s $fs6, $sp, 24 # 4-byte Folded Reload - fld.s $fs0, $sp, 20 # 4-byte Folded Reload - fld.s $fs2, $sp, 16 # 4-byte Folded Reload - fld.s $fs5, $sp, 12 # 4-byte Folded Reload + fld.s $fs2, $sp, 24 # 4-byte Folded Reload + fld.s $fs5, $sp, 20 # 4-byte Folded Reload .p2align 4, , 16 .LBB0_106: # %_ZNK10btSoftBody4Body5xformEv.exit1397 # in Loop: Header=BB0_109 Depth=1 fmul.s $fa0, $fs7, $fs4 fld.s $fa1, $sp, 56 # 4-byte Folded Reload fmadd.s $fa0, $fa1, $fs3, $fa0 - fmadd.s $fa0, $fs6, $fs1, $fa0 + fmadd.s $fa0, $fs0, $fs6, $fa0 fmul.s $fa1, $fs4, $fs5 - fmadd.s $fa1, $fs0, $fs3, $fa1 - fmadd.s $fa1, $fs2, $fs1, $fa1 + fmadd.s $fa1, $fs1, $fs3, $fa1 + fmadd.s $fa1, $fs2, $fs6, $fa1 ld.d $a0, $s2, 48 fld.s $fa2, $sp, 32 # 4-byte Folded Reload fmul.s $fa2, $fs4, $fa2 @@ -1723,7 +1721,7 @@ _ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi: # @_ZN17btSoftBodyHel fld.s $fa3, $a0, 4 fld.s $fa4, $s2, 76 fld.s $fa5, $sp, 80 # 4-byte Folded Reload - fmadd.s $fa2, $fa5, $fs1, $fa2 + fmadd.s $fa2, $fa5, $fs6, $fa2 fld.s $fa5, $a0, 0 fld.s $fa6, $s2, 72 fmul.s $fa3, $fa3, $fa4 @@ -2258,9 +2256,9 @@ _ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi: # @_ZN17btSoftBodyHel fld.s $fs3, $s2, 56 fld.s $fs7, $a0, 4 fld.s $fs4, $s2, 60 - fld.s $fs6, $a0, 8 - fld.s $fs1, $s2, 64 - fld.s $fs0, $a0, 16 + fld.s $fs0, $a0, 8 + fld.s $fs6, $s2, 64 + fld.s $fs1, $a0, 16 fld.s $fs5, $a0, 20 fld.s $fs2, $a0, 24 fld.s $fa0, $a0, 32 @@ -2280,10 +2278,8 @@ _ZN17btSoftBodyHelpers4DrawEP10btSoftBodyP12btIDebugDrawi: # @_ZN17btSoftBodyHel beqz $a0, .LBB0_106 # %bb.121: # in Loop: Header=BB0_109 Depth=1 .Ltmp46: # EH_LABEL - fst.s $fs5, $sp, 12 # 4-byte Folded Spill - fst.s $fs2, $sp, 16 # 4-byte Folded Spill - fst.s $fs0, $sp, 20 # 4-byte Folded Spill - fst.s $fs6, $sp, 24 # 4-byte Folded Spill + fst.s $fs5, $sp, 20 # 4-byte Folded Spill + fst.s $fs2, $sp, 24 # 4-byte Folded Spill pcaddu18i $ra, %call36(_ZN11btTransform11getIdentityEv) jirl $ra, $ra, 0 .Ltmp47: # EH_LABEL diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/MallocPlus.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/MallocPlus.s index 7b6c4d54..b92ccd04 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/MallocPlus.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/MallocPlus.s @@ -4526,10 +4526,10 @@ _ZN10MallocPlus18memory_reorder_allEPi: # @_ZN10MallocPlus18memory_reorder_allEP jirl $ra, $ra, 0 .LBB15_79: # %.loopexit202 .Ltmp65: # EH_LABEL - b .LBB15_91 + b .LBB15_90 .LBB15_80: # %.loopexit.split-lp .Ltmp77: # EH_LABEL - b .LBB15_91 + b .LBB15_90 .LBB15_81: # %_ZNSt8_Rb_treeIPvSt4pairIKS0_P24malloc_plus_memory_entryESt10_Select1stIS5_ESt4lessIS0_ESaIS5_EE10_Auto_nodeD2Ev.exit.i132 .Ltmp92: # EH_LABEL b .LBB15_88 @@ -4551,30 +4551,25 @@ _ZN10MallocPlus18memory_reorder_allEPi: # @_ZN10MallocPlus18memory_reorder_allEP .LBB15_87: # %_ZNSt8_Rb_treeIPvSt4pairIKS0_P24malloc_plus_memory_entryESt10_Select1stIS5_ESt4lessIS0_ESaIS5_EE10_Auto_nodeD2Ev.exit.i .Ltmp74: # EH_LABEL .LBB15_88: # %.body - ld.d $a1, $sp, 8 # 8-byte Folded Reload - st.d $a1, $sp, 8 # 8-byte Folded Spill move $s0, $a0 ori $a1, $zero, 48 move $a0, $s8 pcaddu18i $ra, %call36(_ZdlPvm) jirl $ra, $ra, 0 - b .LBB15_92 + b .LBB15_91 .LBB15_89: .Ltmp68: # EH_LABEL .LBB15_90: # %.body - ld.d $a1, $sp, 8 # 8-byte Folded Reload - st.d $a1, $sp, 8 # 8-byte Folded Spill -.LBB15_91: # %.body move $s0, $a0 -.LBB15_92: # %.body - beqz $fp, .LBB15_94 -# %bb.93: +.LBB15_91: # %.body + beqz $fp, .LBB15_93 +# %bb.92: ld.d $a0, $sp, 8 # 8-byte Folded Reload sub.d $a1, $a0, $fp move $a0, $fp pcaddu18i $ra, %call36(_ZdlPvm) jirl $ra, $ra, 0 -.LBB15_94: # %_ZNSt6vectorIiSaIiEED2Ev.exit +.LBB15_93: # %_ZNSt6vectorIiSaIiEED2Ev.exit addi.d $a0, $sp, 48 pcaddu18i $ra, %call36(_ZNSt3mapIPvP24malloc_plus_memory_entrySt4lessIS0_ESaISt4pairIKS0_S2_EEED2Ev) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s index 777eedb9..94d8e0e6 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/PowerParser.s @@ -45208,23 +45208,22 @@ _ZN2PP11PowerParser12jump_to_callERiRSt5dequeIiSaIiEES5_RNSt7__cxx1118basic_stri b .LBB54_98 .LBB54_240: # %.preheader ld.d $a0, $s5, 704 - b .LBB54_242 + ld.d $a1, $sp, 88 # 8-byte Folded Reload + beq $a0, $a1, .LBB54_245 +# %bb.241: + ld.d $fp, $sp, 88 # 8-byte Folded Reload + b .LBB54_243 .p2align 4, , 16 -.LBB54_241: # in Loop: Header=BB54_242 Depth=1 +.LBB54_242: # in Loop: Header=BB54_243 Depth=1 pcaddu18i $ra, %call36(_ZSt18_Rb_tree_incrementPSt18_Rb_tree_node_base) jirl $ra, $ra, 0 -.LBB54_242: # %.preheader - # =>This Loop Header: Depth=1 - # Child Loop BB54_243 Depth 2 ld.d $a1, $sp, 88 # 8-byte Folded Reload beq $a0, $a1, .LBB54_245 .LBB54_243: # %.lr.ph615 - # Parent Loop BB54_242 Depth=1 - # => This Inner Loop Header: Depth=2 + # =>This Inner Loop Header: Depth=1 ld.bu $a1, $a0, 161 - beqz $a1, .LBB54_241 -# %bb.244: # in Loop: Header=BB54_243 Depth=2 - ld.d $fp, $sp, 88 # 8-byte Folded Reload + beqz $a1, .LBB54_242 +# %bb.244: # in Loop: Header=BB54_243 Depth=1 move $a1, $fp pcaddu18i $ra, %call36(_ZSt28_Rb_tree_rebalance_for_erasePSt18_Rb_tree_node_baseRS_) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/graphics.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/graphics.s index e21a3c24..b97f7b79 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/graphics.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/graphics.s @@ -315,6 +315,7 @@ DrawSquaresToFile: # @DrawSquaresToFile move $s7, $zero move $s8, $zero move $fp, $zero + ld.d $s2, $sp, 40 # 8-byte Folded Reload .p2align 4, , 16 .LBB11_9: # %.lr.ph111 # =>This Inner Loop Header: Depth=1 @@ -339,7 +340,6 @@ DrawSquaresToFile: # @DrawSquaresToFile movgr2fr.w $fa1, $a2 ffint.d.w $fa1, $fa1 fsub.d $fa0, $fa0, $fa1 - ld.d $s2, $sp, 40 # 8-byte Folded Reload ld.d $a0, $s2, %pc_lo12(y_double) ld.d $a1, $sp, 80 # 8-byte Folded Reload ld.d $a1, $a1, %pc_lo12(dy_double) @@ -482,13 +482,14 @@ DrawSquaresToFile: # @DrawSquaresToFile move $s8, $zero move $s7, $zero st.d $s0, $sp, 56 # 8-byte Folded Spill + ld.d $s1, $sp, 80 # 8-byte Folded Reload + ld.d $s2, $sp, 48 # 8-byte Folded Reload .p2align 4, , 16 .LBB11_14: # %.lr.ph # =>This Inner Loop Header: Depth=1 ld.d $s5, $sp, 88 # 8-byte Folded Reload ld.d $a0, $s5, %pc_lo12(x_float) fldx.s $fa0, $a0, $s8 - ld.d $s1, $sp, 80 # 8-byte Folded Reload fld.s $fa1, $s1, %pc_lo12(graphics_xmin) ld.d $s0, $sp, 64 # 8-byte Folded Reload ld.d $a0, $s0, %pc_lo12(dx_float) @@ -514,7 +515,6 @@ DrawSquaresToFile: # @DrawSquaresToFile ftintrz.w.d $fa0, $fa0 fldx.s $fa1, $a0, $s8 fldx.s $fa2, $a1, $s8 - ld.d $s2, $sp, 48 # 8-byte Folded Reload fld.s $fa3, $s2, %pc_lo12(graphics_ymax) movfr2gr.s $a4, $fa0 ld.d $fp, $sp, 32 # 8-byte Folded Reload diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/state.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/state.s index 787ec085..4f9baa05 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/state.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CMakeFiles/CLAMR.dir/state.s @@ -2918,7 +2918,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd .cfi_offset 61, -136 .cfi_offset 62, -144 .cfi_offset 63, -152 - fst.d $fa0, $sp, 136 # 8-byte Folded Spill + fst.d $fa0, $sp, 824 # 8-byte Folded Spill move $s1, $a0 addi.d $a0, $sp, 840 pcaddu18i $ra, %call36(cpu_timer_start) @@ -2935,10 +2935,10 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd jirl $ra, $ra, 0 ld.d $fp, $s1, 192 ld.d $a0, $fp, 1368 - st.d $a0, $sp, 272 # 8-byte Folded Spill + st.d $a0, $sp, 264 # 8-byte Folded Spill ld.d $s3, $fp, 1376 ld.d $a0, $fp, 1384 - st.d $a0, $sp, 264 # 8-byte Folded Spill + st.d $a0, $sp, 256 # 8-byte Folded Spill ld.d $s6, $fp, 1392 ld.d $s4, $fp, 1352 ld.d $a1, $s0, 1176 @@ -2951,7 +2951,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd jirl $ra, $ra, 0 ld.d $a1, $s0, 1176 pcalau12i $a2, %pc_hi20(_ZZN5State22calc_finite_differenceEdE5H_new) - st.d $a2, $sp, 160 # 8-byte Folded Spill + st.d $a2, $sp, 152 # 8-byte Folded Spill st.d $a0, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5H_new) pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a3, $a0, %pc_lo12(.L.str.4) @@ -2962,7 +2962,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd jirl $ra, $ra, 0 ld.d $a1, $s0, 1176 pcalau12i $a2, %pc_hi20(_ZZN5State22calc_finite_differenceEdE5U_new) - st.d $a2, $sp, 152 # 8-byte Folded Spill + st.d $a2, $sp, 144 # 8-byte Folded Spill st.d $a0, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5U_new) pcalau12i $a0, %pc_hi20(.L.str.5) addi.d $a3, $a0, %pc_lo12(.L.str.5) @@ -2971,10 +2971,10 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $a0, $s1 pcaddu18i $ra, %call36(_ZN10MallocPlus13memory_mallocEmmPKci) jirl $ra, $ra, 0 - st.d $s1, $sp, 168 # 8-byte Folded Spill + st.d $s1, $sp, 160 # 8-byte Folded Spill ld.d $a3, $s1, 192 pcalau12i $a1, %pc_hi20(_ZZN5State22calc_finite_differenceEdE5V_new) - st.d $a1, $sp, 144 # 8-byte Folded Spill + st.d $a1, $sp, 136 # 8-byte Folded Spill st.d $a0, $a1, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5V_new) addi.d $a1, $sp, 836 addi.d $a2, $sp, 832 @@ -2983,32 +2983,32 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd jirl $ra, $ra, 0 ld.w $a0, $sp, 836 ld.w $a1, $sp, 832 - fld.d $ft15, $sp, 136 # 8-byte Folded Reload bge $a0, $a1, .LBB16_112 # %bb.3: # %.lr.ph move $t4, $s6 move $t2, $s3 - ld.d $a2, $sp, 168 # 8-byte Folded Reload + ld.d $a2, $sp, 160 # 8-byte Folded Reload ld.d $s8, $a2, 200 ld.d $t6, $a2, 208 ld.d $s6, $a2, 216 ld.d $a2, $fp, 1048 - st.d $a2, $sp, 728 # 8-byte Folded Spill + st.d $a2, $sp, 720 # 8-byte Folded Spill ld.d $t8, $fp, 1072 vldi $vr22, -928 - fmul.d $fs2, $ft15, $ft14 - ld.d $a2, $sp, 160 # 8-byte Folded Reload - ld.d $ra, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5H_new) + fld.d $fa0, $sp, 824 # 8-byte Folded Reload + fmul.d $fs2, $fa0, $ft14 ld.d $a2, $sp, 152 # 8-byte Folded Reload - ld.d $a3, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5U_new) + ld.d $ra, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5H_new) ld.d $a2, $sp, 144 # 8-byte Folded Reload + ld.d $a3, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5U_new) + ld.d $a2, $sp, 136 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5V_new) alsl.d $a4, $a0, $s4, 2 - ld.d $a5, $sp, 272 # 8-byte Folded Reload + ld.d $a5, $sp, 264 # 8-byte Folded Reload alsl.d $a5, $a0, $a5, 2 alsl.d $a6, $a0, $s3, 2 alsl.d $s1, $a0, $t4, 2 - ld.d $a7, $sp, 264 # 8-byte Folded Reload + ld.d $a7, $sp, 256 # 8-byte Folded Reload alsl.d $s2, $a0, $a7, 2 slli.d $s3, $a0, 3 sub.d $a0, $a1, $a0 @@ -3017,51 +3017,52 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s5, $s6 move $a7, $t6 move $t5, $s8 - fst.d $fs2, $sp, 184 # 8-byte Folded Spill - st.d $s3, $sp, 192 # 8-byte Folded Spill - fst.d $fs3, $sp, 176 # 8-byte Folded Spill + fst.d $fs2, $sp, 176 # 8-byte Folded Spill + st.d $s3, $sp, 184 # 8-byte Folded Spill + fst.d $fs3, $sp, 168 # 8-byte Folded Spill b .LBB16_6 .p2align 4, , 16 .LBB16_4: # in Loop: Header=BB16_6 Depth=1 - ld.d $a3, $sp, 536 # 8-byte Folded Reload - ld.d $a2, $sp, 528 # 8-byte Folded Reload - ld.d $a4, $sp, 520 # 8-byte Folded Reload - ld.d $a5, $sp, 512 # 8-byte Folded Reload - ld.d $a6, $sp, 504 # 8-byte Folded Reload - ld.d $a0, $sp, 496 # 8-byte Folded Reload - ld.d $s5, $sp, 488 # 8-byte Folded Reload - fld.d $fa2, $sp, 472 # 8-byte Folded Reload - fld.d $fa4, $sp, 424 # 8-byte Folded Reload - fld.d $fa5, $sp, 784 # 8-byte Folded Reload + ld.d $a3, $sp, 528 # 8-byte Folded Reload + ld.d $a2, $sp, 520 # 8-byte Folded Reload + ld.d $a4, $sp, 512 # 8-byte Folded Reload + ld.d $a5, $sp, 504 # 8-byte Folded Reload + ld.d $a6, $sp, 496 # 8-byte Folded Reload + ld.d $a0, $sp, 488 # 8-byte Folded Reload + ld.d $s5, $sp, 480 # 8-byte Folded Reload + fld.d $fa2, $sp, 464 # 8-byte Folded Reload + fld.d $fa4, $sp, 416 # 8-byte Folded Reload + fld.d $fa5, $sp, 776 # 8-byte Folded Reload .LBB16_5: # in Loop: Header=BB16_6 Depth=1 - fdiv.d $fa0, $ft15, $fs0 - fld.d $fa1, $sp, 464 # 8-byte Folded Reload - fld.d $fa3, $sp, 440 # 8-byte Folded Reload + fld.d $fa0, $sp, 824 # 8-byte Folded Reload + fdiv.d $fa0, $fa0, $fs0 + fld.d $fa1, $sp, 456 # 8-byte Folded Reload + fld.d $fa3, $sp, 432 # 8-byte Folded Reload fsub.d $fa1, $fa3, $fa1 fadd.d $fa1, $fa1, $ft0 - fld.d $fa3, $sp, 408 # 8-byte Folded Reload + fld.d $fa3, $sp, 400 # 8-byte Folded Reload fsub.d $fa1, $fa1, $fa3 fmul.d $fa1, $fa0, $fa1 fsub.d $fa1, $fs7, $fa1 fsub.d $fa1, $fa1, $ft3 - fld.d $fa3, $sp, 768 # 8-byte Folded Reload - fadd.d $fa1, $fa1, $fa3 fld.d $fa3, $sp, 760 # 8-byte Folded Reload + fadd.d $fa1, $fa1, $fa3 + fld.d $fa3, $sp, 752 # 8-byte Folded Reload fsub.d $fa1, $fa1, $fa3 fadd.d $fa1, $fa1, $ft5 fstx.d $fa1, $ra, $s3 - fld.d $fa1, $sp, 448 # 8-byte Folded Reload + fld.d $fa1, $sp, 440 # 8-byte Folded Reload fsub.d $fa1, $fa1, $fa2 fadd.d $fa1, $fa1, $ft11 fsub.d $fa1, $fa1, $fa4 fmul.d $fa1, $fa0, $fa1 fsub.d $fa1, $ft7, $fa1 - fld.d $fa2, $sp, 776 # 8-byte Folded Reload + fld.d $fa2, $sp, 768 # 8-byte Folded Reload fsub.d $fa1, $fa1, $fa2 fadd.d $fa1, $fa1, $fa5 fstx.d $fa1, $a3, $s3 - fld.d $fa1, $sp, 480 # 8-byte Folded Reload - fld.d $fa2, $sp, 456 # 8-byte Folded Reload + fld.d $fa1, $sp, 472 # 8-byte Folded Reload + fld.d $fa2, $sp, 448 # 8-byte Folded Reload fsub.d $fa1, $fa2, $fa1 fadd.d $fa1, $fa1, $ft10 fsub.d $fa1, $fa1, $fa6 @@ -3082,77 +3083,77 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd addi.d $a3, $a3, 8 addi.d $a0, $a0, -1 addi.d $a2, $a2, 8 - fld.d $fs2, $sp, 184 # 8-byte Folded Reload - fld.d $fs3, $sp, 176 # 8-byte Folded Reload + fld.d $fs2, $sp, 176 # 8-byte Folded Reload + fld.d $fs3, $sp, 168 # 8-byte Folded Reload beqz $a0, .LBB16_112 .LBB16_6: # =>This Inner Loop Header: Depth=1 - st.d $a0, $sp, 496 # 8-byte Folded Spill - st.d $a2, $sp, 528 # 8-byte Folded Spill - st.d $a3, $sp, 536 # 8-byte Folded Spill + st.d $a0, $sp, 488 # 8-byte Folded Spill + st.d $a2, $sp, 520 # 8-byte Folded Spill + st.d $a3, $sp, 528 # 8-byte Folded Spill ld.w $s7, $a5, 0 ld.w $s0, $a4, 0 slli.d $a1, $s7, 2 ldx.w $a0, $s4, $a1 ldx.w $a3, $t4, $a1 - st.d $a4, $sp, 520 # 8-byte Folded Spill - st.d $a5, $sp, 512 # 8-byte Folded Spill - st.d $a3, $sp, 400 # 8-byte Folded Spill + st.d $a4, $sp, 512 # 8-byte Folded Spill + st.d $a5, $sp, 504 # 8-byte Folded Spill + st.d $a3, $sp, 392 # 8-byte Folded Spill bge $s0, $a0, .LBB16_8 # %bb.7: # in Loop: Header=BB16_6 Depth=1 slli.d $a2, $a3, 3 slli.d $a3, $a3, 2 - ld.d $a4, $sp, 272 # 8-byte Folded Reload + ld.d $a4, $sp, 264 # 8-byte Folded Reload ldx.w $a3, $a4, $a3 fldx.d $fa0, $s8, $a2 - fst.d $fa0, $sp, 768 # 8-byte Folded Spill + fst.d $fa0, $sp, 760 # 8-byte Folded Spill fldx.d $fa0, $t6, $a2 - fst.d $fa0, $sp, 784 # 8-byte Folded Spill + fst.d $fa0, $sp, 776 # 8-byte Folded Spill fldx.d $ft0, $s6, $a2 - st.d $a3, $sp, 368 # 8-byte Folded Spill + st.d $a3, $sp, 360 # 8-byte Folded Spill slli.d $a2, $a3, 3 fldx.d $fa0, $s8, $a2 - fst.d $fa0, $sp, 216 # 8-byte Folded Spill + fst.d $fa0, $sp, 200 # 8-byte Folded Spill fldx.d $fa3, $t6, $a2 b .LBB16_9 .p2align 4, , 16 .LBB16_8: # in Loop: Header=BB16_6 Depth=1 - st.d $zero, $sp, 368 # 8-byte Folded Spill + st.d $zero, $sp, 360 # 8-byte Folded Spill fmov.d $fa3, $fs3 - fst.d $fs3, $sp, 216 # 8-byte Folded Spill + fst.d $fs3, $sp, 200 # 8-byte Folded Spill fmov.d $ft0, $fs3 - fst.d $fs3, $sp, 784 # 8-byte Folded Spill - fst.d $fs3, $sp, 768 # 8-byte Folded Spill + fst.d $fs3, $sp, 776 # 8-byte Folded Spill + fst.d $fs3, $sp, 760 # 8-byte Folded Spill .LBB16_9: # in Loop: Header=BB16_6 Depth=1 - st.d $a6, $sp, 504 # 8-byte Folded Spill + st.d $a6, $sp, 496 # 8-byte Folded Spill ld.w $a2, $a6, 0 - st.d $a2, $sp, 760 # 8-byte Folded Spill + st.d $a2, $sp, 752 # 8-byte Folded Spill slli.d $a2, $a2, 2 ldx.w $fp, $s4, $a2 ldx.w $a4, $t4, $a2 - st.d $a4, $sp, 664 # 8-byte Folded Spill + st.d $a4, $sp, 656 # 8-byte Folded Spill bge $s0, $fp, .LBB16_11 # %bb.10: # in Loop: Header=BB16_6 Depth=1 slli.d $a3, $a4, 3 slli.d $a4, $a4, 2 ldx.w $a4, $t2, $a4 fldx.d $fa0, $s8, $a3 - fst.d $fa0, $sp, 776 # 8-byte Folded Spill + fst.d $fa0, $sp, 768 # 8-byte Folded Spill fldx.d $fa0, $t6, $a3 - fst.d $fa0, $sp, 792 # 8-byte Folded Spill + fst.d $fa0, $sp, 784 # 8-byte Folded Spill fldx.d $fa5, $s6, $a3 - st.d $a4, $sp, 392 # 8-byte Folded Spill + st.d $a4, $sp, 384 # 8-byte Folded Spill slli.d $a3, $a4, 3 fldx.d $fa0, $s8, $a3 - fst.d $fa0, $sp, 224 # 8-byte Folded Spill + fst.d $fa0, $sp, 208 # 8-byte Folded Spill fldx.d $fa2, $t6, $a3 b .LBB16_12 .p2align 4, , 16 .LBB16_11: # in Loop: Header=BB16_6 Depth=1 - st.d $zero, $sp, 392 # 8-byte Folded Spill - fst.d $fs3, $sp, 776 # 8-byte Folded Spill - fst.d $fs3, $sp, 792 # 8-byte Folded Spill + st.d $zero, $sp, 384 # 8-byte Folded Spill + fst.d $fs3, $sp, 768 # 8-byte Folded Spill + fst.d $fs3, $sp, 784 # 8-byte Folded Spill fmov.d $fa5, $fs3 - fst.d $fs3, $sp, 224 # 8-byte Folded Spill + fst.d $fs3, $sp, 208 # 8-byte Folded Spill fmov.d $fa2, $fs3 .LBB16_12: # in Loop: Header=BB16_6 Depth=1 ld.w $t3, $s2, 0 @@ -3163,38 +3164,38 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # %bb.13: # in Loop: Header=BB16_6 Depth=1 slli.d $a4, $t1, 3 slli.d $a5, $t1, 2 - ld.d $t0, $sp, 264 # 8-byte Folded Reload + ld.d $t0, $sp, 256 # 8-byte Folded Reload ldx.w $a5, $t0, $a5 fldx.d $fa0, $s8, $a4 - fst.d $fa0, $sp, 800 # 8-byte Folded Spill + fst.d $fa0, $sp, 792 # 8-byte Folded Spill fldx.d $fa0, $t6, $a4 - fst.d $fa0, $sp, 704 # 8-byte Folded Spill + fst.d $fa0, $sp, 696 # 8-byte Folded Spill fldx.d $fa0, $s6, $a4 - fst.d $fa0, $sp, 808 # 8-byte Folded Spill - st.d $a5, $sp, 416 # 8-byte Folded Spill + fst.d $fa0, $sp, 800 # 8-byte Folded Spill + st.d $a5, $sp, 408 # 8-byte Folded Spill slli.d $a4, $a5, 3 fldx.d $fa1, $s8, $a4 fldx.d $fa0, $s6, $a4 b .LBB16_15 .p2align 4, , 16 .LBB16_14: # in Loop: Header=BB16_6 Depth=1 - st.d $zero, $sp, 416 # 8-byte Folded Spill + st.d $zero, $sp, 408 # 8-byte Folded Spill + fst.d $fs3, $sp, 792 # 8-byte Folded Spill + fst.d $fs3, $sp, 696 # 8-byte Folded Spill fst.d $fs3, $sp, 800 # 8-byte Folded Spill - fst.d $fs3, $sp, 704 # 8-byte Folded Spill - fst.d $fs3, $sp, 808 # 8-byte Folded Spill fmov.d $fa1, $fs3 fmov.d $fa0, $fs3 .LBB16_15: # in Loop: Header=BB16_6 Depth=1 ld.w $a4, $s1, 0 - st.d $a4, $sp, 672 # 8-byte Folded Spill + st.d $a4, $sp, 664 # 8-byte Folded Spill slli.d $a4, $a4, 2 ldx.w $a5, $s4, $a4 ldx.w $t0, $t2, $a4 - st.d $t3, $sp, 680 # 8-byte Folded Spill - fst.d $fa0, $sp, 248 # 8-byte Folded Spill - fst.d $fa1, $sp, 200 # 8-byte Folded Spill - fst.d $fa2, $sp, 240 # 8-byte Folded Spill - fst.d $fa3, $sp, 232 # 8-byte Folded Spill + st.d $t3, $sp, 672 # 8-byte Folded Spill + fst.d $fa0, $sp, 240 # 8-byte Folded Spill + fst.d $fa1, $sp, 192 # 8-byte Folded Spill + fst.d $fa2, $sp, 224 # 8-byte Folded Spill + fst.d $fa3, $sp, 216 # 8-byte Folded Spill bge $s0, $a5, .LBB16_17 # %bb.16: # in Loop: Header=BB16_6 Depth=1 move $t7, $t1 @@ -3205,17 +3206,17 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd slli.d $t0, $t0, 2 ldx.w $t0, $t4, $t0 fldx.d $fa0, $s8, $a7 - fst.d $fa0, $sp, 696 # 8-byte Folded Spill - fldx.d $fa0, $t6, $a7 fst.d $fa0, $sp, 688 # 8-byte Folded Spill + fldx.d $fa0, $t6, $a7 + fst.d $fa0, $sp, 680 # 8-byte Folded Spill fldx.d $fa0, $s6, $a7 - fst.d $fa0, $sp, 712 # 8-byte Folded Spill - st.d $t0, $sp, 432 # 8-byte Folded Spill + fst.d $fa0, $sp, 704 # 8-byte Folded Spill + st.d $t0, $sp, 424 # 8-byte Folded Spill slli.d $a7, $t0, 3 fldx.d $fa0, $s8, $a7 - fst.d $fa0, $sp, 208 # 8-byte Folded Spill + fst.d $fa0, $sp, 232 # 8-byte Folded Spill fldx.d $fa0, $s6, $a7 - fst.d $fa0, $sp, 256 # 8-byte Folded Spill + fst.d $fa0, $sp, 248 # 8-byte Folded Spill move $a7, $t5 move $t5, $t1 move $t1, $t7 @@ -3223,21 +3224,21 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd .p2align 4, , 16 .LBB16_17: # in Loop: Header=BB16_6 Depth=1 move $t3, $t0 - st.d $zero, $sp, 432 # 8-byte Folded Spill - fst.d $fs3, $sp, 696 # 8-byte Folded Spill + st.d $zero, $sp, 424 # 8-byte Folded Spill fst.d $fs3, $sp, 688 # 8-byte Folded Spill - fst.d $fs3, $sp, 712 # 8-byte Folded Spill - fst.d $fs3, $sp, 208 # 8-byte Folded Spill - fst.d $fs3, $sp, 256 # 8-byte Folded Spill + fst.d $fs3, $sp, 680 # 8-byte Folded Spill + fst.d $fs3, $sp, 704 # 8-byte Folded Spill + fst.d $fs3, $sp, 232 # 8-byte Folded Spill + fst.d $fs3, $sp, 248 # 8-byte Folded Spill .LBB16_18: # in Loop: Header=BB16_6 Depth=1 fldx.d $fs7, $t5, $s3 - st.d $a7, $sp, 720 # 8-byte Folded Spill + st.d $a7, $sp, 712 # 8-byte Folded Spill fldx.d $ft13, $a7, $s3 fldx.d $fa0, $s5, $s3 slli.d $t0, $s7, 3 fldx.d $fs4, $s8, $t0 slli.d $a7, $a0, 3 - ld.d $t7, $sp, 728 # 8-byte Folded Reload + ld.d $t7, $sp, 720 # 8-byte Folded Reload fldx.d $ft3, $t7, $a7 slli.d $a7, $s0, 3 fldx.d $fs0, $t7, $a7 @@ -3293,19 +3294,19 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $fa7, $fa7, $ft5 fmul.d $fa7, $fs2, $fa7 fsub.d $fa4, $ft10, $fa7 - fst.d $ft12, $sp, 632 # 8-byte Folded Spill + fst.d $ft12, $sp, 624 # 8-byte Folded Spill fmul.d $fa7, $ft12, $fa3 fdiv.d $ft12, $fa7, $fs4 - fst.d $ft13, $sp, 824 # 8-byte Folded Spill + fst.d $ft13, $sp, 816 # 8-byte Folded Spill fmul.d $fa7, $ft13, $fa0 fdiv.d $fa7, $fa7, $fs7 - fst.d $fa0, $sp, 816 # 8-byte Folded Spill + fst.d $fa0, $sp, 808 # 8-byte Folded Spill fmul.d $ft10, $fa0, $ft3 fmul.d $fa3, $fa3, $fs0 fadd.d $fa3, $fa3, $ft10 fdiv.d $ft13, $fa3, $fs5 fmul.d $fa0, $fa7, $fs0 - fst.d $fa0, $sp, 736 # 8-byte Folded Spill + fst.d $fa0, $sp, 728 # 8-byte Folded Spill fmul.d $ft11, $fa0, $ft11 fmul.d $ft12, $ft12, $ft3 fmul.d $ft12, $ft12, $ft4 @@ -3320,16 +3321,16 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $ft14, $ft14, $fa1 fadd.d $fa3, $ft13, $ft14 fmul.d $ft12, $fa4, $ft12 - fst.d $fs6, $sp, 304 # 8-byte Folded Spill + fst.d $fs6, $sp, 296 # 8-byte Folded Spill fdiv.d $fa0, $ft12, $fs6 - fst.d $fa4, $sp, 544 # 8-byte Folded Spill + fst.d $fa4, $sp, 536 # 8-byte Folded Spill bge $s0, $a0, .LBB16_20 # %bb.19: # in Loop: Header=BB16_6 Depth=1 - fld.d $ft14, $sp, 768 # 8-byte Folded Reload + fld.d $ft14, $sp, 760 # 8-byte Folded Reload fmul.d $ft12, $fs0, $ft14 fadd.d $ft6, $ft6, $ft12 fdiv.d $ft6, $ft6, $fs5 - fld.d $ft13, $sp, 784 # 8-byte Folded Reload + fld.d $ft13, $sp, 776 # 8-byte Folded Reload fmul.d $ft12, $ft3, $ft13 fmul.d $ft12, $ft4, $ft12 fsub.d $ft7, $ft7, $ft12 @@ -3363,7 +3364,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $ft0, $ft0, $ft3 fadd.d $ft3, $fa4, $ft7 fmul.d $ft3, $ft3, $fs1 - fst.d $ft3, $sp, 464 # 8-byte Folded Spill + fst.d $ft3, $sp, 456 # 8-byte Folded Spill fmul.d $ft3, $ft7, $ft7 fdiv.d $ft3, $ft3, $ft12 fmul.d $ft4, $ft12, $ft12 @@ -3371,26 +3372,26 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $ft3, $ft4, $ft3 fadd.d $ft3, $fa3, $ft3 fmul.d $fa3, $ft3, $fs1 - fst.d $ft7, $sp, 288 # 8-byte Folded Spill + fst.d $ft7, $sp, 280 # 8-byte Folded Spill fmul.d $ft0, $ft0, $ft7 - fst.d $ft12, $sp, 752 # 8-byte Folded Spill + fst.d $ft12, $sp, 744 # 8-byte Folded Spill fdiv.d $ft0, $ft0, $ft12 fadd.d $ft0, $fa0, $ft0 fmul.d $fa0, $ft0, $fs1 - fst.d $fa0, $sp, 480 # 8-byte Folded Spill + fst.d $fa0, $sp, 472 # 8-byte Folded Spill b .LBB16_21 .p2align 4, , 16 .LBB16_20: # in Loop: Header=BB16_6 Depth=1 - fst.d $fa0, $sp, 480 # 8-byte Folded Spill - fst.d $fa4, $sp, 464 # 8-byte Folded Spill - fst.d $fs3, $sp, 752 # 8-byte Folded Spill - fst.d $fs3, $sp, 288 # 8-byte Folded Spill + fst.d $fa0, $sp, 472 # 8-byte Folded Spill + fst.d $fa4, $sp, 456 # 8-byte Folded Spill + fst.d $fs3, $sp, 744 # 8-byte Folded Spill + fst.d $fs3, $sp, 280 # 8-byte Folded Spill .LBB16_21: # in Loop: Header=BB16_6 Depth=1 vldi $vr22, -928 slli.d $t0, $fp, 3 - ld.d $t7, $sp, 728 # 8-byte Folded Reload + ld.d $t7, $sp, 720 # 8-byte Folded Reload fldx.d $ft0, $t7, $t0 - ld.d $t0, $sp, 760 # 8-byte Folded Reload + ld.d $t0, $sp, 752 # 8-byte Folded Reload slli.d $t0, $t0, 3 fldx.d $fs1, $s8, $t0 fldx.d $ft11, $t6, $t0 @@ -3426,7 +3427,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $ft8, $ft8, $fa1 fadd.d $ft8, $ft8, $ft6 fmul.d $ft9, $ft11, $fs0 - fld.d $fa0, $sp, 824 # 8-byte Folded Reload + fld.d $fa0, $sp, 816 # 8-byte Folded Reload fmul.d $ft6, $fa0, $ft0 fadd.d $ft9, $ft9, $ft6 fdiv.d $ft9, $ft9, $fs6 @@ -3437,17 +3438,17 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $ft8, $ft8, $ft1 fmul.d $ft8, $fs2, $ft8 fsub.d $fa4, $ft9, $ft8 - fst.d $ft11, $sp, 616 # 8-byte Folded Spill + fst.d $ft11, $sp, 608 # 8-byte Folded Spill fmul.d $ft8, $ft11, $ft7 fdiv.d $ft8, $ft8, $fs1 fmul.d $ft9, $ft7, $fs0 - fld.d $fa0, $sp, 816 # 8-byte Folded Reload + fld.d $fa0, $sp, 808 # 8-byte Folded Reload fmul.d $ft7, $fa0, $ft0 fadd.d $ft9, $ft9, $ft7 fdiv.d $ft9, $ft9, $fs6 fmul.d $ft8, $ft8, $ft0 fmul.d $ft11, $ft8, $ft3 - fld.d $ft8, $sp, 736 # 8-byte Folded Reload + fld.d $ft8, $sp, 728 # 8-byte Folded Reload fmul.d $ft8, $ft8, $ft10 fsub.d $ft10, $ft11, $ft8 fdiv.d $ft10, $ft10, $ft1 @@ -3459,18 +3460,18 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $ft11, $ft11, $fa1 fadd.d $ft11, $ft10, $ft11 fmul.d $ft9, $fa4, $ft9 - fst.d $ft13, $sp, 560 # 8-byte Folded Spill + fst.d $ft13, $sp, 552 # 8-byte Folded Spill fdiv.d $ft10, $ft9, $ft13 - fst.d $fs5, $sp, 320 # 8-byte Folded Spill - fst.d $fs6, $sp, 312 # 8-byte Folded Spill - fst.d $fa4, $sp, 552 # 8-byte Folded Spill + fst.d $fs5, $sp, 312 # 8-byte Folded Spill + fst.d $fs6, $sp, 304 # 8-byte Folded Spill + fst.d $fa4, $sp, 544 # 8-byte Folded Spill bge $s0, $fp, .LBB16_23 # %bb.22: # in Loop: Header=BB16_6 Depth=1 - fld.d $fs5, $sp, 776 # 8-byte Folded Reload + fld.d $fs5, $sp, 768 # 8-byte Folded Reload fmul.d $ft9, $fs0, $fs5 fadd.d $ft4, $ft4, $ft9 fdiv.d $ft4, $ft4, $fs6 - fld.d $ft13, $sp, 792 # 8-byte Folded Reload + fld.d $ft13, $sp, 784 # 8-byte Folded Reload fmul.d $ft9, $ft0, $ft13 fmul.d $ft9, $ft3, $ft9 fsub.d $ft5, $ft9, $ft5 @@ -3504,7 +3505,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fa5, $fa5, $ft0 fadd.d $ft0, $fa4, $ft4 fmul.d $ft0, $ft0, $ft14 - fst.d $ft0, $sp, 440 # 8-byte Folded Spill + fst.d $ft0, $sp, 432 # 8-byte Folded Spill fmul.d $ft0, $ft4, $ft4 fdiv.d $ft0, $ft0, $ft9 fmul.d $ft1, $ft9, $ft9 @@ -3512,24 +3513,24 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $ft0, $ft1, $ft0 fadd.d $ft0, $ft11, $ft0 fmul.d $ft0, $ft0, $ft14 - fst.d $ft0, $sp, 448 # 8-byte Folded Spill - fst.d $ft4, $sp, 296 # 8-byte Folded Spill + fst.d $ft0, $sp, 440 # 8-byte Folded Spill + fst.d $ft4, $sp, 288 # 8-byte Folded Spill fmul.d $fa5, $ft4, $fa5 - fst.d $ft9, $sp, 744 # 8-byte Folded Spill + fst.d $ft9, $sp, 736 # 8-byte Folded Spill fdiv.d $fa5, $fa5, $ft9 fadd.d $fa5, $ft10, $fa5 fmul.d $fa5, $fa5, $ft14 - fst.d $fa5, $sp, 456 # 8-byte Folded Spill + fst.d $fa5, $sp, 448 # 8-byte Folded Spill b .LBB16_24 .p2align 4, , 16 .LBB16_23: # in Loop: Header=BB16_6 Depth=1 - fst.d $ft11, $sp, 448 # 8-byte Folded Spill - fst.d $ft10, $sp, 456 # 8-byte Folded Spill - fst.d $fa4, $sp, 440 # 8-byte Folded Spill - fst.d $fs3, $sp, 744 # 8-byte Folded Spill - fst.d $fs3, $sp, 296 # 8-byte Folded Spill + fst.d $ft11, $sp, 440 # 8-byte Folded Spill + fst.d $ft10, $sp, 448 # 8-byte Folded Spill + fst.d $fa4, $sp, 432 # 8-byte Folded Spill + fst.d $fs3, $sp, 736 # 8-byte Folded Spill + fst.d $fs3, $sp, 288 # 8-byte Folded Spill .LBB16_24: # in Loop: Header=BB16_6 Depth=1 - ld.d $t7, $sp, 680 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload slli.d $t0, $a6, 3 fldx.d $ft4, $t8, $t0 slli.d $t0, $t7, 3 @@ -3565,7 +3566,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fs6, $ft7, $ft8 fmul.d $ft7, $ft2, $ft13 fdiv.d $ft8, $ft7, $fs5 - fld.d $ft7, $sp, 824 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload fmul.d $ft7, $ft7, $ft4 fmul.d $ft2, $ft2, $fa5 fadd.d $ft2, $ft2, $ft7 @@ -3580,7 +3581,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fa7, $ft12, $fa7 fmul.d $ft8, $ft13, $ft13 fdiv.d $ft8, $ft8, $fs5 - fst.d $fs5, $sp, 640 # 8-byte Folded Spill + fst.d $fs5, $sp, 632 # 8-byte Folded Spill fmul.d $ft12, $fs5, $fs5 fmul.d $ft12, $ft12, $fa1 fadd.d $ft12, $ft12, $ft8 @@ -3589,7 +3590,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa6, $fa6, $ft8 fmul.d $ft8, $fa0, $ft4 vldi $vr0, -912 - fst.d $ft13, $sp, 648 # 8-byte Folded Spill + fst.d $ft13, $sp, 640 # 8-byte Folded Spill fmul.d $ft13, $ft13, $fa5 fadd.d $ft13, $ft13, $ft8 fdiv.d $ft13, $ft13, $ft3 @@ -3601,27 +3602,26 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $ft9, $ft9, $ft10 fmul.d $ft9, $fs2, $ft9 fsub.d $ft10, $ft13, $ft9 - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload fmul.d $fa7, $ft10, $fa7 fdiv.d $fs5, $fa7, $fs6 fmul.d $fa7, $ft10, $ft10 fdiv.d $fa7, $fa7, $fs6 - fst.d $fs6, $sp, 576 # 8-byte Folded Spill + fst.d $fs6, $sp, 568 # 8-byte Folded Spill fmul.d $ft9, $fs6, $fs6 fmul.d $ft9, $ft9, $fa1 fadd.d $fs6, $fa7, $ft9 fadd.d $fa7, $fs0, $ft4 fmul.d $ft11, $ft13, $fs0 fmul.d $fa4, $fa6, $fs0 - fst.d $fa3, $sp, 472 # 8-byte Folded Spill - fst.d $ft10, $sp, 384 # 8-byte Folded Spill - fst.d $fa7, $sp, 360 # 8-byte Folded Spill - fst.d $fs4, $sp, 344 # 8-byte Folded Spill - fst.d $fa4, $sp, 656 # 8-byte Folded Spill - fst.d $ft11, $sp, 608 # 8-byte Folded Spill + fst.d $fa3, $sp, 464 # 8-byte Folded Spill + fst.d $ft10, $sp, 376 # 8-byte Folded Spill + fst.d $fa7, $sp, 352 # 8-byte Folded Spill + fst.d $fs4, $sp, 336 # 8-byte Folded Spill + fst.d $ft11, $sp, 648 # 8-byte Folded Spill bge $s0, $a6, .LBB16_26 # %bb.25: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa6, $sp, 800 # 8-byte Folded Reload + fld.d $fa6, $sp, 792 # 8-byte Folded Reload fmul.d $ft9, $fs0, $fa6 fadd.d $ft6, $ft6, $ft9 fdiv.d $ft6, $ft6, $fa7 @@ -3629,8 +3629,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmin.d $ft9, $ft9, $fa0 fmov.d $fs4, $ft10 fmul.d $ft10, $ft11, $ft9 - fmov.d $fa3, $ft15 - fld.d $ft15, $sp, 808 # 8-byte Folded Reload + fld.d $ft15, $sp, 800 # 8-byte Folded Reload fmul.d $ft11, $ft4, $ft15 fdiv.d $ft12, $fs0, $ft4 fmin.d $ft12, $ft12, $fa0 @@ -3642,19 +3641,19 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $ft13, $fa2, $ft5 fmin.d $ft13, $ft13, $ft14 fmul.d $ft5, $ft5, $ft13 - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload fadd.d $ft5, $ft11, $ft5 fdiv.d $ft10, $ft10, $ft5 fmul.d $ft10, $fs2, $ft10 fsub.d $ft10, $ft6, $ft10 fmov.d $ft11, $fa4 - fld.d $fa4, $sp, 704 # 8-byte Folded Reload + fld.d $fa4, $sp, 696 # 8-byte Folded Reload fmul.d $ft6, $fa4, $ft15 fdiv.d $ft6, $ft6, $fa6 fmul.d $fa4, $fs0, $fa4 fadd.d $fa4, $ft7, $fa4 fdiv.d $fa4, $fa4, $fa7 - fld.d $ft7, $sp, 736 # 8-byte Folded Reload + fld.d $ft7, $sp, 728 # 8-byte Folded Reload fmul.d $ft7, $ft7, $ft9 fmul.d $ft6, $ft4, $ft6 fmul.d $ft6, $ft12, $ft6 @@ -3668,9 +3667,9 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $ft7, $ft7, $fa1 fadd.d $ft6, $ft7, $ft6 fmul.d $ft7, $fs0, $ft15 - fmov.d $ft15, $fa3 fadd.d $ft7, $ft8, $ft7 fdiv.d $ft7, $ft7, $fa7 + fmov.d $ft15, $ft11 fmul.d $ft8, $ft11, $ft9 fmul.d $ft4, $ft4, $ft6 fmul.d $ft4, $ft12, $ft4 @@ -3680,37 +3679,38 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fa6, $ft7, $ft4 fadd.d $ft4, $fs4, $fa6 fmul.d $fa3, $ft4, $ft14 - fst.d $fa3, $sp, 408 # 8-byte Folded Spill + fst.d $fa3, $sp, 400 # 8-byte Folded Spill fmul.d $fa4, $fa4, $fa6 fdiv.d $fa4, $fa4, $ft10 fadd.d $fa4, $fs5, $fa4 fmul.d $fa3, $fa4, $ft14 - fst.d $fa3, $sp, 424 # 8-byte Folded Spill - fst.d $fa6, $sp, 328 # 8-byte Folded Spill + fst.d $fa3, $sp, 416 # 8-byte Folded Spill + fst.d $fa6, $sp, 320 # 8-byte Folded Spill fmul.d $fa4, $fa6, $fa6 fdiv.d $fa4, $fa4, $ft10 - fst.d $ft10, $sp, 704 # 8-byte Folded Spill + fst.d $ft10, $sp, 696 # 8-byte Folded Spill fmul.d $ft4, $ft10, $ft10 fmul.d $ft4, $ft4, $fa1 fadd.d $fa4, $ft4, $fa4 fadd.d $fa4, $fs6, $fa4 fmul.d $fa6, $fa4, $ft14 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload move $t0, $t3 b .LBB16_27 .p2align 4, , 16 .LBB16_26: # in Loop: Header=BB16_6 Depth=1 - fst.d $fs5, $sp, 424 # 8-byte Folded Spill - fst.d $ft10, $sp, 408 # 8-byte Folded Spill - fst.d $fs3, $sp, 704 # 8-byte Folded Spill - fst.d $fs3, $sp, 328 # 8-byte Folded Spill - ld.d $a7, $sp, 720 # 8-byte Folded Reload + fmov.d $ft15, $fa4 + fst.d $fs5, $sp, 416 # 8-byte Folded Spill + fst.d $ft10, $sp, 400 # 8-byte Folded Spill + fst.d $fs3, $sp, 696 # 8-byte Folded Spill + fst.d $fs3, $sp, 320 # 8-byte Folded Spill + ld.d $a7, $sp, 712 # 8-byte Folded Reload move $t0, $t3 fmov.d $fa6, $fs6 .LBB16_27: # in Loop: Header=BB16_6 Depth=1 slli.d $a6, $a5, 3 fldx.d $fa4, $t8, $a6 - ld.d $t3, $sp, 672 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload slli.d $a6, $t3, 3 fldx.d $fs5, $s8, $a6 fldx.d $ft6, $t6, $a6 @@ -3743,7 +3743,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $ft0, $ft6, $fa3 fdiv.d $ft1, $ft0, $fs5 fmul.d $ft6, $ft6, $fa5 - fld.d $ft7, $sp, 824 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload fmul.d $ft0, $ft7, $fa4 fadd.d $ft6, $ft6, $ft0 fdiv.d $ft6, $ft6, $ft8 @@ -3756,7 +3756,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $ft1, $ft6, $ft1 fmul.d $ft2, $fa3, $fa3 fdiv.d $ft2, $ft2, $fs5 - fst.d $fs5, $sp, 624 # 8-byte Folded Spill + fst.d $fs5, $sp, 616 # 8-byte Folded Spill fmul.d $ft6, $fs5, $fs5 fmul.d $ft6, $ft6, $fa1 fadd.d $ft2, $ft6, $ft2 @@ -3776,7 +3776,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $ft11, $ft1, $fa0 fmul.d $ft1, $fs5, $fs5 fdiv.d $ft1, $ft1, $fa0 - fst.d $fa0, $sp, 568 # 8-byte Folded Spill + fst.d $fa0, $sp, 560 # 8-byte Folded Spill fmul.d $ft2, $fa0, $fa0 fmul.d $ft2, $ft2, $fa1 fadd.d $ft10, $ft1, $ft2 @@ -3784,18 +3784,18 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd vldi $vr16, -912 bge $s0, $a5, .LBB16_29 # %bb.28: # in Loop: Header=BB16_6 Depth=1 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload fmul.d $ft1, $fs0, $ft9 fadd.d $ft1, $ft5, $ft1 fdiv.d $ft1, $ft1, $fs4 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload fmul.d $ft2, $fa4, $ft6 fdiv.d $ft3, $fs0, $fa4 fmin.d $ft3, $ft3, $ft8 fmul.d $ft2, $ft3, $ft2 fdiv.d $ft5, $fa4, $fs0 fmin.d $ft5, $ft5, $ft8 - fld.d $fa0, $sp, 608 # 8-byte Folded Reload + fld.d $fa0, $sp, 648 # 8-byte Folded Reload fmul.d $fa7, $fa0, $ft5 fsub.d $fa7, $ft2, $fa7 fdiv.d $ft2, $fa2, $ft4 @@ -3808,7 +3808,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $fa7, $fa7, $fa2 fmul.d $fa7, $fs2, $fa7 fsub.d $ft1, $ft1, $fa7 - fld.d $fa0, $sp, 688 # 8-byte Folded Reload + fld.d $fa0, $sp, 680 # 8-byte Folded Reload fmul.d $fa7, $fa0, $ft6 fdiv.d $fa7, $fa7, $ft9 fmul.d $fa0, $fs0, $fa0 @@ -3816,7 +3816,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $fa0, $fa0, $fs4 fmul.d $fa7, $fa4, $fa7 fmul.d $fa7, $ft3, $fa7 - fld.d $fa3, $sp, 736 # 8-byte Folded Reload + fld.d $fa3, $sp, 728 # 8-byte Folded Reload fmul.d $fa3, $fa3, $ft5 fsub.d $fa3, $fa7, $fa3 fdiv.d $fa3, $fa3, $fa2 @@ -3832,8 +3832,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $fa5, $fa5, $fs4 fmul.d $fa3, $fa4, $fa3 fmul.d $fa3, $ft3, $fa3 - fld.d $fa4, $sp, 656 # 8-byte Folded Reload - fmul.d $fa4, $fa4, $ft5 + fmul.d $fa4, $ft15, $ft5 fsub.d $fa3, $fa3, $fa4 fdiv.d $fa2, $fa3, $fa2 fmul.d $fa2, $fs2, $fa2 @@ -3844,7 +3843,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fdiv.d $fa0, $fa0, $ft1 fadd.d $fa0, $ft11, $fa0 fmul.d $ft11, $fa0, $ft14 - fst.d $fa3, $sp, 336 # 8-byte Folded Spill + fst.d $fa3, $sp, 328 # 8-byte Folded Spill fmul.d $fa0, $fa3, $fa3 fdiv.d $fa0, $fa0, $ft1 fmul.d $fa2, $ft1, $ft1 @@ -3857,13 +3856,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd .LBB16_29: # in Loop: Header=BB16_6 Depth=1 fmov.d $ft0, $fs5 fmov.d $ft1, $fs3 - fst.d $fs3, $sp, 336 # 8-byte Folded Spill - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fst.d $fs3, $sp, 328 # 8-byte Folded Spill + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload .LBB16_30: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $fa3, $sp, 544 # 8-byte Folded Reload - ld.d $a5, $sp, 272 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $fa3, $sp, 536 # 8-byte Folded Reload + ld.d $a5, $sp, 264 # 8-byte Folded Reload ldx.w $a1, $a5, $a1 slli.d $a5, $a1, 3 fldx.d $fs3, $s8, $a5 @@ -3882,57 +3881,58 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa0, $fa2, $fa1 fmul.d $fa2, $fa0, $ft14 .LBB16_32: # in Loop: Header=BB16_6 Depth=1 - fst.d $fa2, $sp, 280 # 8-byte Folded Spill - fst.d $fs4, $sp, 352 # 8-byte Folded Spill - fst.d $fs5, $sp, 376 # 8-byte Folded Spill - st.d $s2, $sp, 600 # 8-byte Folded Spill - st.d $s1, $sp, 608 # 8-byte Folded Spill + fst.d $fa2, $sp, 272 # 8-byte Folded Spill + fst.d $fs4, $sp, 344 # 8-byte Folded Spill + fst.d $fs5, $sp, 368 # 8-byte Folded Spill + st.d $s2, $sp, 592 # 8-byte Folded Spill + st.d $s1, $sp, 600 # 8-byte Folded Spill ldx.w $s3, $t2, $a2 ldx.w $a4, $t4, $a4 - ld.d $a0, $sp, 264 # 8-byte Folded Reload + ld.d $a0, $sp, 256 # 8-byte Folded Reload ldx.w $a5, $a0, $a3 slli.d $a0, $s3, 3 fldx.d $fs2, $s8, $a0 fldx.d $fa5, $t6, $a0 slli.d $a0, $a4, 3 fldx.d $fa0, $s8, $a0 - fst.d $fa0, $sp, 592 # 8-byte Folded Spill + fst.d $fa0, $sp, 584 # 8-byte Folded Spill fldx.d $ft4, $s6, $a0 pcalau12i $a0, %pc_hi20(.LCPI16_1) fld.d $ft2, $a0, %pc_lo12(.LCPI16_1) slli.d $a0, $a5, 3 fldx.d $fa0, $s8, $a0 - fst.d $fa0, $sp, 584 # 8-byte Folded Spill + fst.d $fa0, $sp, 576 # 8-byte Folded Spill fldx.d $fa0, $s6, $a0 - fst.d $fa0, $sp, 688 # 8-byte Folded Spill - fld.d $fs4, $sp, 304 # 8-byte Folded Reload + fst.d $fa0, $sp, 680 # 8-byte Folded Spill + fld.d $fs4, $sp, 296 # 8-byte Folded Reload fmul.d $ft5, $fs4, $ft2 fsqrt.d $fa0, $ft5 fcmp.cor.d $fcc0, $fa0, $fa0 - st.d $s5, $sp, 488 # 8-byte Folded Spill + st.d $s5, $sp, 480 # 8-byte Folded Spill bceqz $fcc0, .LBB16_96 .LBB16_33: # %.split # in Loop: Header=BB16_6 Depth=1 alsl.d $s7, $s7, $s4, 2 slt $s1, $s0, $fp - fld.d $fa1, $sp, 776 # 8-byte Folded Reload + fld.d $fa1, $sp, 768 # 8-byte Folded Reload fadd.d $fa1, $fs1, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s1 fsel $fa1, $fs1, $fa1, $fcc0 - fld.d $fa2, $sp, 320 # 8-byte Folded Reload + fld.d $fa2, $sp, 312 # 8-byte Folded Reload fmul.d $fa4, $fa2, $ft14 fdiv.d $fa2, $fa3, $fs4 fabs.d $fa2, $fa2 - fst.d $fa2, $sp, 544 # 8-byte Folded Spill + fst.d $fa2, $sp, 536 # 8-byte Folded Spill fadd.d $fa0, $fa2, $fa0 - fld.d $fs4, $sp, 344 # 8-byte Folded Reload + fld.d $fs4, $sp, 336 # 8-byte Folded Reload fsub.d $fa2, $fs7, $fs4 fsub.d $fa3, $fs4, $fs3 fsub.d $fs3, $fa1, $fs7 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fst.d $fa4, $sp, 736 # 8-byte Folded Spill + fld.d $fa1, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa1, $fa0 + fst.d $fa4, $sp, 728 # 8-byte Folded Spill fdiv.d $fa0, $fa0, $fa4 pcalau12i $a0, %pc_hi20(.LCPI16_2) fld.d $fs6, $a0, %pc_lo12(.LCPI16_2) @@ -3957,16 +3957,16 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.w $a0, $s7, 0 fmul.d $fa0, $fa0, $fa1 fmul.d $ft3, $fa2, $fa0 - ld.d $a1, $sp, 368 # 8-byte Folded Reload + ld.d $a1, $sp, 360 # 8-byte Folded Reload slli.d $s2, $a1, 2 - fld.d $fa0, $sp, 752 # 8-byte Folded Reload - fld.d $fa1, $sp, 288 # 8-byte Folded Reload + fld.d $fa0, $sp, 744 # 8-byte Folded Reload + fld.d $fa1, $sp, 280 # 8-byte Folded Reload fdiv.d $fa2, $fa1, $fa0 - ld.d $a3, $sp, 664 # 8-byte Folded Reload - fst.d $fa2, $sp, 368 # 8-byte Folded Spill + ld.d $a3, $sp, 656 # 8-byte Folded Reload + fst.d $fa2, $sp, 360 # 8-byte Folded Spill bge $s0, $a0, .LBB16_39 # %bb.34: # in Loop: Header=BB16_6 Depth=1 - ld.d $a0, $sp, 400 # 8-byte Folded Reload + ld.d $a0, $sp, 392 # 8-byte Folded Reload slli.d $a0, $a0, 2 ldx.w $a0, $s4, $a0 ldx.w $a1, $s4, $s2 @@ -3975,15 +3975,15 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t4, $s2 slli.d $a0, $a0, 3 fldx.d $fa0, $s8, $a0 - fld.d $fa1, $sp, 216 # 8-byte Folded Reload + fld.d $fa1, $sp, 200 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_37 .p2align 4, , 16 .LBB16_36: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 216 # 8-byte Folded Reload + fld.d $fa3, $sp, 200 # 8-byte Folded Reload .LBB16_37: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 752 # 8-byte Folded Reload + fld.d $fa0, $sp, 744 # 8-byte Folded Reload fmul.d $fa1, $fa0, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 @@ -3992,12 +3992,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # in Loop: Header=BB16_6 Depth=1 fabs.d $fa1, $fa2 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 768 # 8-byte Folded Reload + fld.d $fa2, $sp, 760 # 8-byte Folded Reload fsub.d $fa1, $fs7, $fa2 fsub.d $fa2, $fa2, $fa3 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa3, $sp, 736 # 8-byte Folded Reload + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 + fld.d $fa3, $sp, 728 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa3 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4022,9 +4023,9 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $ft3, $fa0, $ft14 .LBB16_39: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 560 # 8-byte Folded Reload - fld.d $fa4, $sp, 552 # 8-byte Folded Reload - ld.d $a0, $sp, 760 # 8-byte Folded Reload + fld.d $fa3, $sp, 552 # 8-byte Folded Reload + fld.d $fa4, $sp, 544 # 8-byte Folded Reload + ld.d $a0, $sp, 752 # 8-byte Folded Reload alsl.d $fp, $a0, $s4, 2 ld.w $a1, $fp, 0 slli.d $a0, $s3, 2 @@ -4040,32 +4041,33 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa0, $fa5, $fa1 fmul.d $fa5, $fa0, $ft14 .LBB16_41: # in Loop: Header=BB16_6 Depth=1 - fst.d $fa5, $sp, 656 # 8-byte Folded Spill + fst.d $fa5, $sp, 648 # 8-byte Folded Spill ld.w $s3, $s7, 0 fmul.d $fa0, $fa3, $ft2 - fst.d $fa0, $sp, 760 # 8-byte Folded Spill + fst.d $fa0, $sp, 752 # 8-byte Folded Spill fsqrt.d $fa0, $fa0 fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB16_97 .LBB16_42: # %.split1373 # in Loop: Header=BB16_6 Depth=1 slt $s5, $s0, $s3 - fld.d $fa1, $sp, 768 # 8-byte Folded Reload + fld.d $fa1, $sp, 760 # 8-byte Folded Reload fadd.d $fa1, $fs4, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s5 fsel $fa1, $fs4, $fa1, $fcc0 - fld.d $fa2, $sp, 312 # 8-byte Folded Reload + fld.d $fa2, $sp, 304 # 8-byte Folded Reload fmul.d $fs4, $fa2, $ft14 fdiv.d $fa2, $fa4, $fa3 fabs.d $fa2, $fa2 - fst.d $fa2, $sp, 560 # 8-byte Folded Spill + fst.d $fa2, $sp, 552 # 8-byte Folded Spill fadd.d $fa0, $fa2, $fa0 fsub.d $fa2, $fs1, $fs7 fsub.d $fs3, $fs7, $fa1 fsub.d $fa1, $fs2, $fs1 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4087,10 +4089,10 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.w $a0, $fp, 0 fmul.d $fa0, $fa0, $fa1 fmul.d $fa5, $fa2, $fa0 - ld.d $a1, $sp, 392 # 8-byte Folded Reload + ld.d $a1, $sp, 384 # 8-byte Folded Reload slli.d $s3, $a1, 2 - fld.d $fa0, $sp, 744 # 8-byte Folded Reload - fld.d $fa1, $sp, 296 # 8-byte Folded Reload + fld.d $fa0, $sp, 736 # 8-byte Folded Reload + fld.d $fa1, $sp, 288 # 8-byte Folded Reload fdiv.d $fs1, $fa1, $fa0 bge $s0, $a0, .LBB16_48 # %bb.43: # in Loop: Header=BB16_6 Depth=1 @@ -4102,15 +4104,15 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t4, $s3 slli.d $a0, $a0, 3 fldx.d $fa0, $s8, $a0 - fld.d $fa1, $sp, 224 # 8-byte Folded Reload + fld.d $fa1, $sp, 208 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_46 .p2align 4, , 16 .LBB16_45: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 224 # 8-byte Folded Reload + fld.d $fa3, $sp, 208 # 8-byte Folded Reload .LBB16_46: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 744 # 8-byte Folded Reload + fld.d $fa0, $sp, 736 # 8-byte Folded Reload fmul.d $fa1, $fa0, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 @@ -4119,11 +4121,12 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # in Loop: Header=BB16_6 Depth=1 fabs.d $fa1, $fs1 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 776 # 8-byte Folded Reload + fld.d $fa2, $sp, 768 # 8-byte Folded Reload fsub.d $fa1, $fa2, $fs7 fsub.d $fa2, $fa3, $fa2 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4148,29 +4151,30 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $fa5, $fa0, $ft14 .LBB16_48: # in Loop: Header=BB16_6 Depth=1 - fst.d $fa5, $sp, 768 # 8-byte Folded Spill + fst.d $fa5, $sp, 760 # 8-byte Folded Spill fsqrt.d $fa0, $ft5 fcmp.cor.d $fcc0, $fa0, $fa0 - fld.d $fa5, $sp, 632 # 8-byte Folded Reload + fld.d $fa5, $sp, 624 # 8-byte Folded Reload fmov.d $fa1, $ft5 - fld.d $ft5, $sp, 616 # 8-byte Folded Reload + fld.d $ft5, $sp, 608 # 8-byte Folded Reload bceqz $fcc0, .LBB16_98 .LBB16_49: # %.split1377 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 792 # 8-byte Folded Reload + fld.d $fa1, $sp, 784 # 8-byte Folded Reload fadd.d $fa1, $ft5, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s1 fsel $fa1, $ft5, $fa1, $fcc0 - fld.d $fa2, $sp, 544 # 8-byte Folded Reload + fld.d $fa2, $sp, 536 # 8-byte Folded Reload fadd.d $fa0, $fa2, $fa0 fsub.d $fa2, $ft7, $fa5 - fld.d $fa3, $sp, 280 # 8-byte Folded Reload + fld.d $fa3, $sp, 272 # 8-byte Folded Reload fsub.d $fa3, $fa5, $fa3 fsub.d $fs2, $fa1, $ft7 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa1, $sp, 736 # 8-byte Folded Reload + fld.d $fa1, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa1, $fa0 + fld.d $fa1, $sp, 728 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa1 fsub.d $fa1, $ft8, $fa0 fmul.d $fa0, $fa0, $fa1 @@ -4194,7 +4198,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fs3, $fa2, $fa0 bge $s0, $a0, .LBB16_55 # %bb.50: # in Loop: Header=BB16_6 Depth=1 - ld.d $a0, $sp, 400 # 8-byte Folded Reload + ld.d $a0, $sp, 392 # 8-byte Folded Reload slli.d $a0, $a0, 2 ldx.w $a0, $s4, $a0 ldx.w $a1, $s4, $s2 @@ -4203,16 +4207,16 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t4, $s2 slli.d $a0, $a0, 3 fldx.d $fa0, $t6, $a0 - fld.d $fa1, $sp, 232 # 8-byte Folded Reload + fld.d $fa1, $sp, 216 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_53 .p2align 4, , 16 .LBB16_52: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 232 # 8-byte Folded Reload + fld.d $fa3, $sp, 216 # 8-byte Folded Reload .LBB16_53: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa2, $sp, 368 # 8-byte Folded Reload - fld.d $fa0, $sp, 752 # 8-byte Folded Reload + fld.d $fa2, $sp, 360 # 8-byte Folded Reload + fld.d $fa0, $sp, 744 # 8-byte Folded Reload fmul.d $fa1, $fa0, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 @@ -4221,12 +4225,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # in Loop: Header=BB16_6 Depth=1 fabs.d $fa1, $fa2 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 784 # 8-byte Folded Reload + fld.d $fa2, $sp, 776 # 8-byte Folded Reload fsub.d $fa1, $ft7, $fa2 fsub.d $fa2, $fa2, $fa3 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa3, $sp, 736 # 8-byte Folded Reload + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 + fld.d $fa3, $sp, 728 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa3 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4251,26 +4256,27 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $fs3, $fa0, $ft14 .LBB16_55: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 760 # 8-byte Folded Reload - fst.d $fs3, $sp, 776 # 8-byte Folded Spill + fld.d $fa1, $sp, 752 # 8-byte Folded Reload + fst.d $fs3, $sp, 768 # 8-byte Folded Spill fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB16_99 .LBB16_56: # %.split1381 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 784 # 8-byte Folded Reload + fld.d $fa1, $sp, 776 # 8-byte Folded Reload fadd.d $fa1, $fa5, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s5 fsel $fa1, $fa5, $fa1, $fcc0 - fld.d $fa2, $sp, 560 # 8-byte Folded Reload + fld.d $fa2, $sp, 552 # 8-byte Folded Reload fadd.d $fa0, $fa2, $fa0 fsub.d $fa2, $ft5, $ft7 fsub.d $fs2, $ft7, $fa1 - fld.d $fa1, $sp, 656 # 8-byte Folded Reload + fld.d $fa1, $sp, 648 # 8-byte Folded Reload fsub.d $fa1, $fa1, $ft5 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4302,19 +4308,19 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t4, $s3 slli.d $a0, $a0, 3 fldx.d $fa0, $t6, $a0 - fld.d $fa1, $sp, 240 # 8-byte Folded Reload + fld.d $fa1, $sp, 224 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_61 .p2align 4, , 16 .LBB16_59: # in Loop: Header=BB16_6 Depth=1 - fst.d $fa5, $sp, 784 # 8-byte Folded Spill + fst.d $fa5, $sp, 776 # 8-byte Folded Spill b .LBB16_63 .p2align 4, , 16 .LBB16_60: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 240 # 8-byte Folded Reload + fld.d $fa3, $sp, 224 # 8-byte Folded Reload .LBB16_61: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 744 # 8-byte Folded Reload + fld.d $fa0, $sp, 736 # 8-byte Folded Reload fmul.d $fa1, $fa0, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 @@ -4323,11 +4329,12 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # in Loop: Header=BB16_6 Depth=1 fabs.d $fa1, $fs1 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 792 # 8-byte Folded Reload + fld.d $fa2, $sp, 784 # 8-byte Folded Reload fsub.d $fa1, $fa2, $ft7 fsub.d $fa2, $fa3, $fa2 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4351,17 +4358,17 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa0, $fa5, $fa0 fmul.d $fa0, $fa0, $ft14 fmul.d $fa0, $fa0, $ft14 - fst.d $fa0, $sp, 784 # 8-byte Folded Spill + fst.d $fa0, $sp, 776 # 8-byte Folded Spill .LBB16_63: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa2, $sp, 576 # 8-byte Folded Reload - fld.d $fa4, $sp, 584 # 8-byte Folded Reload + fld.d $fa2, $sp, 568 # 8-byte Folded Reload + fld.d $fa4, $sp, 576 # 8-byte Folded Reload alsl.d $s2, $t7, $s4, 2 ld.w $a1, $s2, 0 slli.d $a0, $a5, 2 ldx.w $a2, $s4, $a0 - fld.d $fa5, $sp, 640 # 8-byte Folded Reload - fld.d $ft5, $sp, 624 # 8-byte Folded Reload - fld.d $fs2, $sp, 688 # 8-byte Folded Reload + fld.d $fa5, $sp, 632 # 8-byte Folded Reload + fld.d $ft5, $sp, 616 # 8-byte Folded Reload + fld.d $fs2, $sp, 680 # 8-byte Folded Reload bge $a1, $a2, .LBB16_65 # %bb.64: # in Loop: Header=BB16_6 Depth=1 ldx.w $a0, $t2, $a0 @@ -4376,7 +4383,7 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd alsl.d $fp, $t3, $s4, 2 ld.w $s1, $fp, 0 fmul.d $fa0, $fa2, $ft2 - fst.d $fa0, $sp, 752 # 8-byte Folded Spill + fst.d $fa0, $sp, 744 # 8-byte Folded Spill fsqrt.d $fa0, $fa0 fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB16_100 @@ -4387,19 +4394,20 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s3 fsel $fa1, $ft5, $fa1, $fcc0 - fld.d $fa3, $sp, 360 # 8-byte Folded Reload + fld.d $fa3, $sp, 352 # 8-byte Folded Reload fmul.d $fs3, $fa3, $ft14 - fld.d $fa3, $sp, 384 # 8-byte Folded Reload + fld.d $fa3, $sp, 376 # 8-byte Folded Reload fdiv.d $fa2, $fa3, $fa2 fabs.d $fa2, $fa2 - fst.d $fa2, $sp, 736 # 8-byte Folded Spill + fst.d $fa2, $sp, 728 # 8-byte Folded Spill fadd.d $fa0, $fa2, $fa0 fsub.d $fa2, $fs7, $fa5 fsub.d $fa3, $fa5, $fa4 fsub.d $fs1, $fa1, $fs7 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fst.d $fs3, $sp, 792 # 8-byte Folded Spill + fld.d $fa1, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa1, $fa0 + fst.d $fs3, $sp, 784 # 8-byte Folded Spill fdiv.d $fa0, $fa0, $fs3 fsub.d $fa1, $ft8, $fa0 fmul.d $fa0, $fa0, $fa1 @@ -4421,11 +4429,11 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.w $a0, $s2, 0 fmul.d $fa0, $fa0, $fa1 fmul.d $fs3, $fa2, $fa0 - ld.d $a1, $sp, 416 # 8-byte Folded Reload + ld.d $a1, $sp, 408 # 8-byte Folded Reload slli.d $s1, $a1, 2 - fld.d $fa0, $sp, 328 # 8-byte Folded Reload + fld.d $fa0, $sp, 320 # 8-byte Folded Reload fdiv.d $fa2, $fa0, $fa7 - fst.d $fa2, $sp, 680 # 8-byte Folded Spill + fst.d $fa2, $sp, 672 # 8-byte Folded Spill bge $s0, $a0, .LBB16_72 # %bb.67: # in Loop: Header=BB16_6 Depth=1 slli.d $a0, $t1, 2 @@ -4436,13 +4444,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t2, $s1 slli.d $a0, $a0, 3 fldx.d $fa0, $s8, $a0 - fld.d $fa1, $sp, 200 # 8-byte Folded Reload + fld.d $fa1, $sp, 192 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_70 .p2align 4, , 16 .LBB16_69: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 200 # 8-byte Folded Reload + fld.d $fa3, $sp, 192 # 8-byte Folded Reload .LBB16_70: # in Loop: Header=BB16_6 Depth=1 fmul.d $fa1, $fa7, $ft2 fsqrt.d $fa0, $fa1 @@ -4452,12 +4460,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd # in Loop: Header=BB16_6 Depth=1 fabs.d $fa1, $fa2 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 800 # 8-byte Folded Reload + fld.d $fa2, $sp, 792 # 8-byte Folded Reload fsub.d $fa1, $fs7, $fa2 fsub.d $fa2, $fa2, $fa3 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa3, $sp, 792 # 8-byte Folded Reload + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 + fld.d $fa3, $sp, 784 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa3 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4482,8 +4491,8 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $fs3, $fa0, $ft14 .LBB16_72: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa2, $sp, 568 # 8-byte Folded Reload - fld.d $fa4, $sp, 592 # 8-byte Folded Reload + fld.d $fa2, $sp, 560 # 8-byte Folded Reload + fld.d $fa4, $sp, 584 # 8-byte Folded Reload ld.w $a1, $fp, 0 slli.d $a0, $a4, 2 ldx.w $a2, $s4, $a0 @@ -4498,24 +4507,24 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa0, $ft4, $fa1 fmul.d $ft4, $fa0, $ft14 .LBB16_74: # in Loop: Header=BB16_6 Depth=1 - fst.d $fs3, $sp, 760 # 8-byte Folded Spill + fst.d $fs3, $sp, 752 # 8-byte Folded Spill ld.w $s5, $s2, 0 fmul.d $fa0, $fa2, $ft2 - fst.d $fa0, $sp, 744 # 8-byte Folded Spill + fst.d $fa0, $sp, 736 # 8-byte Folded Spill fsqrt.d $fa0, $fa0 fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB16_101 .LBB16_75: # %.split1389 # in Loop: Header=BB16_6 Depth=1 slt $s5, $s0, $s5 - fld.d $fa1, $sp, 800 # 8-byte Folded Reload + fld.d $fa1, $sp, 792 # 8-byte Folded Reload fadd.d $fa1, $fa5, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s5 fsel $fa1, $fa5, $fa1, $fcc0 - fld.d $fa3, $sp, 352 # 8-byte Folded Reload + fld.d $fa3, $sp, 344 # 8-byte Folded Reload fmul.d $fs4, $fa3, $ft14 - fld.d $fa3, $sp, 376 # 8-byte Folded Reload + fld.d $fa3, $sp, 368 # 8-byte Folded Reload fdiv.d $fa2, $fa3, $fa2 fabs.d $fs1, $fa2 fadd.d $fa0, $fs1, $fa0 @@ -4523,7 +4532,8 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fs3, $fs7, $fa1 fsub.d $fa1, $fa4, $ft5 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4545,11 +4555,11 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.w $a0, $fp, 0 fmul.d $fa0, $fa0, $fa1 fmul.d $ft5, $fa2, $fa0 - ld.d $a1, $sp, 432 # 8-byte Folded Reload + ld.d $a1, $sp, 424 # 8-byte Folded Reload slli.d $s7, $a1, 2 - fld.d $fa0, $sp, 336 # 8-byte Folded Reload + fld.d $fa0, $sp, 328 # 8-byte Folded Reload fdiv.d $fa3, $fa0, $ft1 - fst.d $fa3, $sp, 800 # 8-byte Folded Spill + fst.d $fa3, $sp, 792 # 8-byte Folded Spill bge $s0, $a0, .LBB16_81 # %bb.76: # in Loop: Header=BB16_6 Depth=1 slli.d $a0, $t0, 2 @@ -4560,13 +4570,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ldx.w $a0, $t2, $s7 slli.d $a0, $a0, 3 fldx.d $fa0, $s8, $a0 - fld.d $fa1, $sp, 208 # 8-byte Folded Reload + fld.d $fa1, $sp, 232 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa2, $fa0, $ft14 b .LBB16_79 .p2align 4, , 16 .LBB16_78: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa2, $sp, 208 # 8-byte Folded Reload + fld.d $fa2, $sp, 232 # 8-byte Folded Reload .LBB16_79: # in Loop: Header=BB16_6 Depth=1 fmul.d $fa1, $ft1, $ft2 fsqrt.d $fa0, $fa1 @@ -4579,7 +4589,8 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fa1, $ft9, $fs7 fsub.d $fa2, $fa2, $ft9 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4604,10 +4615,10 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $ft5, $fa0, $ft14 .LBB16_81: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 752 # 8-byte Folded Reload + fld.d $fa1, $sp, 744 # 8-byte Folded Reload fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 - fld.d $fa5, $sp, 648 # 8-byte Folded Reload + fld.d $fa5, $sp, 640 # 8-byte Folded Reload bceqz $fcc0, .LBB16_102 .LBB16_82: # %.split1393 # in Loop: Header=BB16_6 Depth=1 @@ -4615,14 +4626,15 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s3 fsel $fa1, $ft12, $fa1, $fcc0 - fld.d $fa2, $sp, 736 # 8-byte Folded Reload + fld.d $fa2, $sp, 728 # 8-byte Folded Reload fadd.d $fa0, $fa2, $fa0 fsub.d $fa2, $ft13, $fa5 fsub.d $fa3, $fa5, $fs2 fsub.d $fs2, $fa1, $ft13 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa1, $sp, 792 # 8-byte Folded Reload + fld.d $fa1, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa1, $fa0 + fld.d $fa1, $sp, 784 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa1 fsub.d $fa1, $ft8, $fa0 fmul.d $fa0, $fa0, $fa1 @@ -4649,43 +4661,44 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd slli.d $a0, $t1, 2 ldx.w $a0, $s4, $a0 ldx.w $a1, $s4, $s1 - ld.d $s2, $sp, 600 # 8-byte Folded Reload - ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s2, $sp, 592 # 8-byte Folded Reload + ld.d $s3, $sp, 184 # 8-byte Folded Reload bge $a0, $a1, .LBB16_86 # %bb.84: # in Loop: Header=BB16_6 Depth=1 ldx.w $a0, $t2, $s1 slli.d $a0, $a0, 3 fldx.d $fa0, $s6, $a0 - fld.d $fa1, $sp, 248 # 8-byte Folded Reload + fld.d $fa1, $sp, 240 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa3, $fa0, $ft14 b .LBB16_87 .p2align 4, , 16 .LBB16_85: # in Loop: Header=BB16_6 Depth=1 - ld.d $s1, $sp, 608 # 8-byte Folded Reload - ld.d $s2, $sp, 600 # 8-byte Folded Reload - ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s1, $sp, 600 # 8-byte Folded Reload + ld.d $s2, $sp, 592 # 8-byte Folded Reload + ld.d $s3, $sp, 184 # 8-byte Folded Reload b .LBB16_89 .p2align 4, , 16 .LBB16_86: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa3, $sp, 248 # 8-byte Folded Reload + fld.d $fa3, $sp, 240 # 8-byte Folded Reload .LBB16_87: # in Loop: Header=BB16_6 Depth=1 fmul.d $fa1, $fa7, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 - ld.d $s1, $sp, 608 # 8-byte Folded Reload + ld.d $s1, $sp, 600 # 8-byte Folded Reload bceqz $fcc0, .LBB16_110 .LBB16_88: # %.split1395 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 680 # 8-byte Folded Reload + fld.d $fa1, $sp, 672 # 8-byte Folded Reload fabs.d $fa1, $fa1 fadd.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 808 # 8-byte Folded Reload + fld.d $fa2, $sp, 800 # 8-byte Folded Reload fsub.d $fa1, $ft13, $fa2 fsub.d $fa2, $fa2, $fa3 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 - fld.d $fa3, $sp, 792 # 8-byte Folded Reload + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 + fld.d $fa3, $sp, 784 # 8-byte Folded Reload fdiv.d $fa0, $fa0, $fa3 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4710,13 +4723,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fmul.d $fa0, $fa0, $ft14 fmul.d $fs3, $fa0, $ft14 .LBB16_89: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 744 # 8-byte Folded Reload + fld.d $fa1, $sp, 736 # 8-byte Folded Reload fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB16_103 .LBB16_90: # %.split1397 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 808 # 8-byte Folded Reload + fld.d $fa1, $sp, 800 # 8-byte Folded Reload fadd.d $fa1, $fa5, $fa1 fmul.d $fa1, $fa1, $ft14 movgr2cf $fcc0, $s5 @@ -4726,7 +4739,8 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fsub.d $fs2, $ft13, $fa1 fsub.d $fa1, $ft4, $ft12 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4753,40 +4767,41 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd slli.d $a0, $t0, 2 ldx.w $a0, $s4, $a0 ldx.w $a1, $s4, $s7 - ld.d $a3, $sp, 536 # 8-byte Folded Reload - ld.d $a2, $sp, 528 # 8-byte Folded Reload - ld.d $a4, $sp, 520 # 8-byte Folded Reload - ld.d $a5, $sp, 512 # 8-byte Folded Reload - ld.d $a6, $sp, 504 # 8-byte Folded Reload - ld.d $s5, $sp, 488 # 8-byte Folded Reload - fld.d $fa5, $sp, 784 # 8-byte Folded Reload + ld.d $a3, $sp, 528 # 8-byte Folded Reload + ld.d $a2, $sp, 520 # 8-byte Folded Reload + ld.d $a4, $sp, 512 # 8-byte Folded Reload + ld.d $a5, $sp, 504 # 8-byte Folded Reload + ld.d $a6, $sp, 496 # 8-byte Folded Reload + ld.d $s5, $sp, 480 # 8-byte Folded Reload + fld.d $fa5, $sp, 776 # 8-byte Folded Reload bge $a0, $a1, .LBB16_93 # %bb.92: # in Loop: Header=BB16_6 Depth=1 ldx.w $a0, $t2, $s7 slli.d $a0, $a0, 3 fldx.d $fa0, $s6, $a0 - fld.d $fa1, $sp, 256 # 8-byte Folded Reload + fld.d $fa1, $sp, 248 # 8-byte Folded Reload fadd.d $fa0, $fa1, $fa0 fmul.d $fa2, $fa0, $ft14 b .LBB16_94 .p2align 4, , 16 .LBB16_93: # in Loop: Header=BB16_6 Depth=1 - fld.d $fa2, $sp, 256 # 8-byte Folded Reload + fld.d $fa2, $sp, 248 # 8-byte Folded Reload .LBB16_94: # in Loop: Header=BB16_6 Depth=1 fmul.d $fa1, $ft1, $ft2 fsqrt.d $fa0, $fa1 fcmp.cor.d $fcc0, $fa0, $fa0 - ld.d $a0, $sp, 496 # 8-byte Folded Reload + ld.d $a0, $sp, 488 # 8-byte Folded Reload bceqz $fcc0, .LBB16_111 .LBB16_95: # %.split1399 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa1, $sp, 800 # 8-byte Folded Reload + fld.d $fa1, $sp, 792 # 8-byte Folded Reload fabs.d $fa1, $fa1 fadd.d $fa0, $fa1, $fa0 fsub.d $fa1, $ft6, $ft13 fsub.d $fa2, $fa2, $ft6 fmul.d $fa0, $fa0, $ft14 - fmul.d $fa0, $ft15, $fa0 + fld.d $fa3, $sp, 824 # 8-byte Folded Reload + fmul.d $fa0, $fa3, $fa0 fdiv.d $fa0, $fa0, $fs4 fsub.d $fa3, $ft8, $fa0 fmul.d $fa0, $fa0, $fa3 @@ -4810,8 +4825,8 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd fadd.d $fa0, $fs1, $fa0 fmul.d $fa0, $fa0, $ft14 fmul.d $fs1, $fa0, $ft14 - fld.d $fa2, $sp, 472 # 8-byte Folded Reload - fld.d $fa4, $sp, 424 # 8-byte Folded Reload + fld.d $fa2, $sp, 464 # 8-byte Folded Reload + fld.d $fa4, $sp, 416 # 8-byte Folded Reload b .LBB16_5 .LBB16_96: # %call.sqrt # in Loop: Header=BB16_6 Depth=1 @@ -4825,43 +4840,43 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s2, $t0 move $s5, $t1 fmov.d $fs6, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill fmov.d $fs5, $ft11 - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill - fst.d $fa5, $sp, 656 # 8-byte Folded Spill + fst.d $fa5, $sp, 648 # 8-byte Folded Spill fst.d $ft5, $sp, 24 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 fld.d $ft5, $sp, 24 # 8-byte Folded Reload - fld.d $fa5, $sp, 656 # 8-byte Folded Reload + fld.d $fa5, $sp, 648 # 8-byte Folded Reload ld.d $a5, $sp, 32 # 8-byte Folded Reload - fld.d $fa3, $sp, 544 # 8-byte Folded Reload + fld.d $fa3, $sp, 536 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload fmov.d $ft11, $fs5 - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs6 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s5 move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s1 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -4869,27 +4884,26 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_33 .LBB16_97: # %call.sqrt1374 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 760 # 8-byte Folded Reload + fld.d $fa0, $sp, 752 # 8-byte Folded Reload st.d $t2, $sp, 104 # 8-byte Folded Spill st.d $t4, $sp, 72 # 8-byte Folded Spill st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill move $s5, $t5 - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill fmov.d $fs3, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill @@ -4898,30 +4912,30 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd jirl $ra, $ra, 0 fld.d $ft5, $sp, 24 # 8-byte Folded Reload ld.d $a5, $sp, 32 # 8-byte Folded Reload - fld.d $fa4, $sp, 552 # 8-byte Folded Reload - fld.d $fa3, $sp, 560 # 8-byte Folded Reload + fld.d $fa4, $sp, 544 # 8-byte Folded Reload + fld.d $fa3, $sp, 552 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs3 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s5 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -4929,7 +4943,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_42 .LBB16_98: # %call.sqrt1378 # in Loop: Header=BB16_6 Depth=1 @@ -4939,17 +4952,17 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill - st.d $t5, $sp, 552 # 8-byte Folded Spill - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill + st.d $t5, $sp, 544 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill fmov.d $fs2, $fa6 - fmov.d $fs3, $ft10 - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fmov.d $fs3, $ft11 + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill @@ -4958,28 +4971,28 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fmov.d $ft10, $fs3 - fld.d $ft5, $sp, 616 # 8-byte Folded Reload - fld.d $fa5, $sp, 632 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fmov.d $ft11, $fs3 + fld.d $ft5, $sp, 608 # 8-byte Folded Reload + fld.d $fa5, $sp, 624 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs2 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload - ld.d $t5, $sp, 552 # 8-byte Folded Reload - ld.d $a7, $sp, 720 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload + ld.d $t5, $sp, 544 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -4987,7 +5000,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_49 .LBB16_99: # %call.sqrt1382 # in Loop: Header=BB16_6 Depth=1 @@ -5001,13 +5013,13 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s2, $t0 move $s7, $t1 fmov.d $fs2, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill fmov.d $fs3, $ft11 - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill @@ -5016,28 +5028,28 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload fmov.d $ft11, $fs3 - fld.d $ft5, $sp, 616 # 8-byte Folded Reload - fld.d $fa5, $sp, 632 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $ft5, $sp, 608 # 8-byte Folded Reload + fld.d $fa5, $sp, 624 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs2 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s7 move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s1 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5045,11 +5057,10 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_56 .LBB16_100: # %call.sqrt1386 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 752 # 8-byte Folded Reload + fld.d $fa0, $sp, 744 # 8-byte Folded Reload st.d $t2, $sp, 104 # 8-byte Folded Spill st.d $t4, $sp, 72 # 8-byte Folded Spill st.d $t6, $sp, 64 # 8-byte Folded Spill @@ -5059,43 +5070,43 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s5, $t0 move $s7, $t1 fmov.d $fs1, $fa6 - fst.d $fs2, $sp, 688 # 8-byte Folded Spill + fst.d $fs2, $sp, 680 # 8-byte Folded Spill fmov.d $fs2, $ft10 fmov.d $fs3, $ft11 fmov.d $fs4, $ft12 fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill - fst.d $fa4, $sp, 584 # 8-byte Folded Spill + fst.d $fa4, $sp, 576 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $fa4, $sp, 584 # 8-byte Folded Reload + fld.d $fa4, $sp, 576 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload - fld.d $fa2, $sp, 576 # 8-byte Folded Reload + fld.d $fa2, $sp, 568 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload fmov.d $ft12, $fs4 fmov.d $ft11, $fs3 fmov.d $ft10, $fs2 - fld.d $fs2, $sp, 688 # 8-byte Folded Reload - fld.d $ft5, $sp, 624 # 8-byte Folded Reload - fld.d $fa5, $sp, 640 # 8-byte Folded Reload + fld.d $fs2, $sp, 680 # 8-byte Folded Reload + fld.d $ft5, $sp, 616 # 8-byte Folded Reload + fld.d $fa5, $sp, 632 # 8-byte Folded Reload fmov.d $fa6, $fs1 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s7 move $t0, $s5 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s3 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5103,55 +5114,54 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_66 .LBB16_101: # %call.sqrt1390 # in Loop: Header=BB16_6 Depth=1 - fld.d $fa0, $sp, 744 # 8-byte Folded Reload + fld.d $fa0, $sp, 736 # 8-byte Folded Reload st.d $t2, $sp, 104 # 8-byte Folded Spill st.d $t4, $sp, 72 # 8-byte Folded Spill st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill move $s7, $t5 - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill fmov.d $fs1, $fa6 - fst.d $fs2, $sp, 688 # 8-byte Folded Spill + fst.d $fs2, $sp, 680 # 8-byte Folded Spill fmov.d $fs2, $ft10 fmov.d $fs3, $ft11 fmov.d $fs4, $ft12 fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $fa4, $sp, 592 # 8-byte Folded Spill + fst.d $fa4, $sp, 584 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $fa4, $sp, 592 # 8-byte Folded Reload - fld.d $fa2, $sp, 568 # 8-byte Folded Reload + fld.d $fa4, $sp, 584 # 8-byte Folded Reload + fld.d $fa2, $sp, 560 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload fmov.d $ft12, $fs4 fmov.d $ft11, $fs3 fmov.d $ft10, $fs2 - fld.d $fs2, $sp, 688 # 8-byte Folded Reload - fld.d $ft5, $sp, 624 # 8-byte Folded Reload - fld.d $fa5, $sp, 640 # 8-byte Folded Reload + fld.d $fs2, $sp, 680 # 8-byte Folded Reload + fld.d $ft5, $sp, 616 # 8-byte Folded Reload + fld.d $fa5, $sp, 632 # 8-byte Folded Reload fmov.d $fa6, $fs1 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s7 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5159,7 +5169,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_75 .LBB16_102: # %call.sqrt1394 # in Loop: Header=BB16_6 Depth=1 @@ -5169,42 +5178,42 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill - st.d $t5, $sp, 552 # 8-byte Folded Spill - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill - fst.d $fs2, $sp, 688 # 8-byte Folded Spill + st.d $t5, $sp, 544 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill + fst.d $fs2, $sp, 680 # 8-byte Folded Spill fmov.d $fs2, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fmov.d $fs3, $ft12 + fmov.d $fs3, $ft10 + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $ft5, $sp, 672 # 8-byte Folded Spill + fst.d $ft5, $sp, 664 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $ft5, $sp, 672 # 8-byte Folded Reload + fld.d $ft5, $sp, 664 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fmov.d $ft12, $fs3 - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - fld.d $fa5, $sp, 648 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fmov.d $ft10, $fs3 + fld.d $fa5, $sp, 640 # 8-byte Folded Reload fmov.d $fa6, $fs2 - fld.d $fs2, $sp, 688 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload - ld.d $t5, $sp, 552 # 8-byte Folded Reload - ld.d $a7, $sp, 720 # 8-byte Folded Reload + fld.d $fs2, $sp, 680 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload + ld.d $t5, $sp, 544 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5212,7 +5221,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_82 .LBB16_103: # %call.sqrt1398 # in Loop: Header=BB16_6 Depth=1 @@ -5225,45 +5233,44 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s1, $t5 move $s2, $t0 fmov.d $fs2, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $ft5, $sp, 672 # 8-byte Folded Spill + fst.d $ft5, $sp, 664 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $ft5, $sp, 672 # 8-byte Folded Reload + fld.d $ft5, $sp, 664 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - fld.d $fa5, $sp, 648 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + fld.d $fa5, $sp, 640 # 8-byte Folded Reload fmov.d $fa6, $fs2 move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s1 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 ld.d $t8, $sp, 128 # 8-byte Folded Reload ld.d $t6, $sp, 64 # 8-byte Folded Reload - ld.d $s2, $sp, 600 # 8-byte Folded Reload + ld.d $s2, $sp, 592 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload - ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s3, $sp, 184 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - ld.d $s1, $sp, 608 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload + ld.d $s1, $sp, 600 # 8-byte Folded Reload b .LBB16_90 .LBB16_104: # %call.sqrt1372 # in Loop: Header=BB16_6 Depth=1 @@ -5274,51 +5281,51 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill move $fp, $t5 - st.d $t0, $sp, 288 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill move $s5, $t1 fst.d $fa6, $sp, 16 # 8-byte Folded Spill - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $fa3, $sp, 216 # 8-byte Folded Spill + fst.d $fa3, $sp, 200 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill - fst.d $fa5, $sp, 656 # 8-byte Folded Spill + fst.d $fa5, $sp, 648 # 8-byte Folded Spill fst.d $ft5, $sp, 24 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 fld.d $ft5, $sp, 24 # 8-byte Folded Reload - fld.d $fa2, $sp, 368 # 8-byte Folded Reload - fld.d $fa5, $sp, 656 # 8-byte Folded Reload + fld.d $fa2, $sp, 360 # 8-byte Folded Reload + fld.d $fa5, $sp, 648 # 8-byte Folded Reload ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload - fld.d $fa3, $sp, 216 # 8-byte Folded Reload + fld.d $fa3, $sp, 200 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fld.d $fa6, $sp, 16 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s5 - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $fp - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5326,7 +5333,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_38 .LBB16_105: # %call.sqrt1376 # in Loop: Header=BB16_6 Depth=1 @@ -5336,19 +5342,19 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill - st.d $t5, $sp, 552 # 8-byte Folded Spill - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill - fst.d $fa5, $sp, 768 # 8-byte Folded Spill + st.d $t5, $sp, 544 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill + fst.d $fa5, $sp, 760 # 8-byte Folded Spill fmov.d $fs2, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill - fst.d $fa3, $sp, 224 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill + fst.d $fa3, $sp, 208 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill @@ -5359,28 +5365,28 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $fa3, $sp, 224 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $fa3, $sp, 208 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs2 - fld.d $fa5, $sp, 768 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload - ld.d $t5, $sp, 552 # 8-byte Folded Reload - ld.d $a7, $sp, 720 # 8-byte Folded Reload + fld.d $fa5, $sp, 760 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload + ld.d $t5, $sp, 544 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5388,7 +5394,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_47 .LBB16_106: # %call.sqrt1380 # in Loop: Header=BB16_6 Depth=1 @@ -5401,49 +5406,49 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s1, $t5 move $s2, $t0 move $s7, $t1 - fst.d $fs3, $sp, 776 # 8-byte Folded Spill + fst.d $fs3, $sp, 768 # 8-byte Folded Spill fmov.d $fs3, $fa6 - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill - fst.d $fa3, $sp, 232 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill + fst.d $fa3, $sp, 216 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $fa2, $sp, 368 # 8-byte Folded Reload + fld.d $fa2, $sp, 360 # 8-byte Folded Reload ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $fa3, $sp, 232 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 664 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $fa3, $sp, 216 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + ld.d $a3, $sp, 656 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs3 - fld.d $fs3, $sp, 776 # 8-byte Folded Reload - fld.d $ft5, $sp, 616 # 8-byte Folded Reload - fld.d $fa5, $sp, 632 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $fs3, $sp, 768 # 8-byte Folded Reload + fld.d $ft5, $sp, 608 # 8-byte Folded Reload + fld.d $fa5, $sp, 624 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s7 move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s1 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5451,7 +5456,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_54 .LBB16_107: # %call.sqrt1384 # in Loop: Header=BB16_6 Depth=1 @@ -5465,44 +5469,44 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $s2, $t0 move $s1, $t1 fmov.d $fs3, $fa6 - fst.d $fa3, $sp, 240 # 8-byte Folded Spill - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $fa3, $sp, 224 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill move $s5, $a4 - fst.d $fa5, $sp, 784 # 8-byte Folded Spill + fst.d $fa5, $sp, 776 # 8-byte Folded Spill st.d $a5, $sp, 32 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 ld.d $a5, $sp, 32 # 8-byte Folded Reload - fld.d $fa5, $sp, 784 # 8-byte Folded Reload + fld.d $fa5, $sp, 776 # 8-byte Folded Reload move $a4, $s5 fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - fld.d $fa3, $sp, 240 # 8-byte Folded Reload - ld.d $t3, $sp, 672 # 8-byte Folded Reload - ld.d $t7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + fld.d $fa3, $sp, 224 # 8-byte Folded Reload + ld.d $t3, $sp, 664 # 8-byte Folded Reload + ld.d $t7, $sp, 672 # 8-byte Folded Reload fmov.d $fa6, $fs3 - fld.d $ft9, $sp, 696 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload move $t1, $s1 move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $fp - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5510,7 +5514,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd move $t6, $s7 move $t4, $s3 ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_62 .LBB16_108: # %call.sqrt1388 # in Loop: Header=BB16_6 Depth=1 @@ -5522,47 +5525,47 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $ra, $sp, 120 # 8-byte Folded Spill move $s5, $t5 move $s7, $t0 - st.d $t1, $sp, 216 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill fst.d $fa6, $sp, 16 # 8-byte Folded Spill - fst.d $fs3, $sp, 760 # 8-byte Folded Spill + fst.d $fs3, $sp, 752 # 8-byte Folded Spill fmov.d $fs3, $fa3 fmov.d $fs4, $ft10 - fst.d $fs2, $sp, 688 # 8-byte Folded Spill + fst.d $fs2, $sp, 680 # 8-byte Folded Spill fmov.d $fs2, $ft11 - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill st.d $a4, $sp, 40 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 ld.d $a4, $sp, 40 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload fmov.d $ft11, $fs2 - fld.d $fs2, $sp, 688 # 8-byte Folded Reload - fld.d $ft5, $sp, 624 # 8-byte Folded Reload - fld.d $fa5, $sp, 640 # 8-byte Folded Reload + fld.d $fs2, $sp, 680 # 8-byte Folded Reload + fld.d $ft5, $sp, 616 # 8-byte Folded Reload + fld.d $fa5, $sp, 632 # 8-byte Folded Reload fmov.d $ft10, $fs4 - fld.d $fa2, $sp, 680 # 8-byte Folded Reload + fld.d $fa2, $sp, 672 # 8-byte Folded Reload fmov.d $fa3, $fs3 - fld.d $fs3, $sp, 760 # 8-byte Folded Reload + fld.d $fs3, $sp, 752 # 8-byte Folded Reload fld.d $fa6, $sp, 16 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload move $t0, $s7 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s5 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5570,7 +5573,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_71 .LBB16_109: # %call.sqrt1392 # in Loop: Header=BB16_6 Depth=1 @@ -5580,45 +5582,45 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t6, $sp, 64 # 8-byte Folded Spill st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill - st.d $t5, $sp, 552 # 8-byte Folded Spill - st.d $t0, $sp, 288 # 8-byte Folded Spill - st.d $t1, $sp, 216 # 8-byte Folded Spill - fst.d $fs2, $sp, 688 # 8-byte Folded Spill - fmov.d $fs2, $fa2 - fst.d $fa6, $sp, 16 # 8-byte Folded Spill - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + st.d $t5, $sp, 544 # 8-byte Folded Spill + st.d $t0, $sp, 280 # 8-byte Folded Spill + st.d $t1, $sp, 200 # 8-byte Folded Spill + fst.d $fa2, $sp, 232 # 8-byte Folded Spill + fst.d $fs2, $sp, 680 # 8-byte Folded Spill + fmov.d $fs2, $fa6 + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $ft5, $sp, 672 # 8-byte Folded Spill + fst.d $ft5, $sp, 664 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $fa3, $sp, 800 # 8-byte Folded Reload - fld.d $ft5, $sp, 672 # 8-byte Folded Reload + fld.d $fa3, $sp, 792 # 8-byte Folded Reload + fld.d $ft5, $sp, 664 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $fa7, $sp, 704 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - fld.d $fa6, $sp, 16 # 8-byte Folded Reload - fmov.d $fa2, $fs2 - fld.d $fs2, $sp, 688 # 8-byte Folded Reload - fld.d $ft9, $sp, 696 # 8-byte Folded Reload - ld.d $t1, $sp, 216 # 8-byte Folded Reload - ld.d $t0, $sp, 288 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload - ld.d $t5, $sp, 552 # 8-byte Folded Reload - ld.d $a7, $sp, 720 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + fmov.d $fa6, $fs2 + fld.d $fs2, $sp, 680 # 8-byte Folded Reload + fld.d $fa2, $sp, 232 # 8-byte Folded Reload + fld.d $ft9, $sp, 688 # 8-byte Folded Reload + ld.d $t1, $sp, 200 # 8-byte Folded Reload + ld.d $t0, $sp, 280 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload + ld.d $t5, $sp, 544 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 @@ -5626,7 +5628,6 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd ld.d $t6, $sp, 64 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload b .LBB16_80 .LBB16_110: # %call.sqrt1396 # in Loop: Header=BB16_6 Depth=1 @@ -5638,48 +5639,47 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $ra, $sp, 120 # 8-byte Folded Spill move $s1, $t5 move $s2, $t0 - fst.d $fa3, $sp, 248 # 8-byte Folded Spill + fst.d $fa3, $sp, 240 # 8-byte Folded Spill fst.d $fa6, $sp, 16 # 8-byte Folded Spill - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill - fst.d $ft12, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill + fst.d $ft12, $sp, 56 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill fst.d $ft1, $sp, 96 # 8-byte Folded Spill fst.d $ft2, $sp, 88 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill fst.d $ft4, $sp, 80 # 8-byte Folded Spill - fst.d $ft5, $sp, 672 # 8-byte Folded Spill + fst.d $ft5, $sp, 664 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $ft5, $sp, 672 # 8-byte Folded Reload + fld.d $ft5, $sp, 664 # 8-byte Folded Reload fld.d $ft4, $sp, 80 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft2, $sp, 88 # 8-byte Folded Reload fld.d $ft1, $sp, 96 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $ft12, $sp, 48 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload - fld.d $fa5, $sp, 648 # 8-byte Folded Reload + fld.d $ft12, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload + fld.d $fa5, $sp, 640 # 8-byte Folded Reload fld.d $fa6, $sp, 16 # 8-byte Folded Reload - fld.d $fa3, $sp, 248 # 8-byte Folded Reload + fld.d $fa3, $sp, 240 # 8-byte Folded Reload move $t0, $s2 - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $s1 - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 ld.d $t8, $sp, 128 # 8-byte Folded Reload ld.d $t6, $sp, 64 # 8-byte Folded Reload - ld.d $s2, $sp, 600 # 8-byte Folded Reload + ld.d $s2, $sp, 592 # 8-byte Folded Reload ld.d $t4, $sp, 72 # 8-byte Folded Reload - ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s3, $sp, 184 # 8-byte Folded Reload ld.d $t2, $sp, 104 # 8-byte Folded Reload - ld.d $s1, $sp, 608 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload + ld.d $s1, $sp, 600 # 8-byte Folded Reload b .LBB16_88 .LBB16_111: # %call.sqrt1400 # in Loop: Header=BB16_6 Depth=1 @@ -5690,64 +5690,63 @@ _ZN5State22calc_finite_differenceEd: # @_ZN5State22calc_finite_differenceEd st.d $t8, $sp, 128 # 8-byte Folded Spill st.d $ra, $sp, 120 # 8-byte Folded Spill move $fp, $t5 - fst.d $fa2, $sp, 256 # 8-byte Folded Spill + fst.d $fa2, $sp, 248 # 8-byte Folded Spill fst.d $fa6, $sp, 16 # 8-byte Folded Spill - fst.d $ft10, $sp, 56 # 8-byte Folded Spill - fst.d $ft11, $sp, 304 # 8-byte Folded Spill + fst.d $ft10, $sp, 48 # 8-byte Folded Spill + fst.d $ft11, $sp, 296 # 8-byte Folded Spill fst.d $ft0, $sp, 112 # 8-byte Folded Spill - fst.d $ft3, $sp, 320 # 8-byte Folded Spill - fst.d $ft5, $sp, 672 # 8-byte Folded Spill + fst.d $ft3, $sp, 312 # 8-byte Folded Spill + fst.d $ft5, $sp, 664 # 8-byte Folded Spill pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 - fld.d $ft5, $sp, 672 # 8-byte Folded Reload - fld.d $fa5, $sp, 784 # 8-byte Folded Reload - fld.d $ft3, $sp, 320 # 8-byte Folded Reload + fld.d $ft5, $sp, 664 # 8-byte Folded Reload + fld.d $fa5, $sp, 776 # 8-byte Folded Reload + fld.d $ft3, $sp, 312 # 8-byte Folded Reload fld.d $ft0, $sp, 112 # 8-byte Folded Reload - fld.d $ft11, $sp, 304 # 8-byte Folded Reload - fld.d $ft10, $sp, 56 # 8-byte Folded Reload + fld.d $ft11, $sp, 296 # 8-byte Folded Reload + fld.d $ft10, $sp, 48 # 8-byte Folded Reload fld.d $fa6, $sp, 16 # 8-byte Folded Reload - fld.d $fa2, $sp, 256 # 8-byte Folded Reload - fld.d $ft6, $sp, 712 # 8-byte Folded Reload - fld.d $ft7, $sp, 824 # 8-byte Folded Reload - fld.d $ft13, $sp, 816 # 8-byte Folded Reload + fld.d $fa2, $sp, 248 # 8-byte Folded Reload + fld.d $ft6, $sp, 704 # 8-byte Folded Reload + fld.d $ft7, $sp, 816 # 8-byte Folded Reload + fld.d $ft13, $sp, 808 # 8-byte Folded Reload move $t5, $fp - ld.d $a7, $sp, 720 # 8-byte Folded Reload + ld.d $a7, $sp, 712 # 8-byte Folded Reload vldi $vr16, -912 - ld.d $a0, $sp, 496 # 8-byte Folded Reload + ld.d $a0, $sp, 488 # 8-byte Folded Reload ld.d $ra, $sp, 120 # 8-byte Folded Reload vldi $vr22, -928 ld.d $t8, $sp, 128 # 8-byte Folded Reload move $t6, $s5 - ld.d $s5, $sp, 488 # 8-byte Folded Reload - ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s5, $sp, 480 # 8-byte Folded Reload + ld.d $s3, $sp, 184 # 8-byte Folded Reload move $t4, $s2 - ld.d $s2, $sp, 600 # 8-byte Folded Reload - ld.d $s1, $sp, 608 # 8-byte Folded Reload + ld.d $s2, $sp, 592 # 8-byte Folded Reload + ld.d $s1, $sp, 600 # 8-byte Folded Reload move $t2, $s0 - ld.d $a6, $sp, 504 # 8-byte Folded Reload - ld.d $a5, $sp, 512 # 8-byte Folded Reload - ld.d $a4, $sp, 520 # 8-byte Folded Reload - ld.d $a2, $sp, 528 # 8-byte Folded Reload - ld.d $a3, $sp, 536 # 8-byte Folded Reload - fld.d $ft15, $sp, 136 # 8-byte Folded Reload + ld.d $a6, $sp, 496 # 8-byte Folded Reload + ld.d $a5, $sp, 504 # 8-byte Folded Reload + ld.d $a4, $sp, 512 # 8-byte Folded Reload + ld.d $a2, $sp, 520 # 8-byte Folded Reload + ld.d $a3, $sp, 528 # 8-byte Folded Reload b .LBB16_95 .LBB16_112: # %._crit_edge - ld.d $fp, $sp, 168 # 8-byte Folded Reload + ld.d $fp, $sp, 160 # 8-byte Folded Reload ld.d $a1, $fp, 200 - ld.d $a0, $sp, 160 # 8-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a2, $a0, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5H_new) move $a0, $fp pcaddu18i $ra, %call36(_ZN10MallocPlus14memory_replaceEPvS0_) jirl $ra, $ra, 0 ld.d $a1, $fp, 208 - ld.d $a2, $sp, 152 # 8-byte Folded Reload + ld.d $a2, $sp, 144 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5U_new) st.d $a0, $fp, 200 move $a0, $fp pcaddu18i $ra, %call36(_ZN10MallocPlus14memory_replaceEPvS0_) jirl $ra, $ra, 0 ld.d $a1, $fp, 216 - ld.d $a2, $sp, 144 # 8-byte Folded Reload + ld.d $a2, $sp, 136 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(_ZZN5State22calc_finite_differenceEdE5V_new) st.d $a0, $fp, 208 move $a0, $fp diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s index c6bacb33..389eb548 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/GenMesh.s @@ -1275,8 +1275,8 @@ _ZN7GenMesh11generatePieERSt6vectorI7double2SaIS1_EERS0_IiSaIiEES7_S7_S7_S7_S7_S st.d $fp, $s6, 16 b .LBB4_13 .LBB4_33: # %._crit_edge - ld.d $a1, $sp, 128 # 8-byte Folded Reload ld.d $a0, $sp, 80 # 8-byte Folded Reload + ld.d $a1, $sp, 128 # 8-byte Folded Reload mul.w $fp, $a0, $a1 bltz $fp, .LBB4_377 # %bb.34: diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s index dd1af6b8..8d4af5b9 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/CMakeFiles/PENNANT.dir/Hydro.s @@ -1963,6 +1963,8 @@ _ZN5Hydro7doCycleEd: # @_ZN5Hydro7doCycleEd ld.d $a0, $sp, 240 # 8-byte Folded Reload addi.d $a0, $a0, 16 st.d $a0, $sp, 40 # 8-byte Folded Spill + ld.d $s2, $sp, 64 # 8-byte Folded Reload + ld.d $s7, $sp, 176 # 8-byte Folded Reload b .LBB5_14 .p2align 4, , 16 .LBB5_13: # %_ZN5Hydro12sumCrnrForceEPK7double2S2_S2_PS0_ii.exit @@ -2005,7 +2007,6 @@ _ZN5Hydro7doCycleEd: # @_ZN5Hydro7doCycleEd .LBB5_16: # %_ZSt4copyIPdS0_ET0_T_S2_S1_.exit # in Loop: Header=BB5_14 Depth=1 move $a1, $s4 - ld.d $s2, $sp, 64 # 8-byte Folded Reload move $a2, $s2 ld.d $s1, $sp, 56 # 8-byte Folded Reload move $a3, $s1 @@ -2017,7 +2018,6 @@ _ZN5Hydro7doCycleEd: # @_ZN5Hydro7doCycleEd st.d $s5, $sp, 0 move $a1, $s4 move $a2, $s1 - ld.d $s7, $sp, 176 # 8-byte Folded Reload move $a3, $s7 ld.d $a4, $sp, 80 # 8-byte Folded Reload move $a5, $s8 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s index 0bca108a..ef3b8843 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CMakeFiles/CoMD.dir/eam.s @@ -685,11 +685,11 @@ initEamPot: # @initEamPot ori $a0, $zero, 1 pcaddu18i $ra, %call36(calloc) jirl $ra, $ra, 0 - vld $vr1, $sp, 16 # 16-byte Folded Reload + vld $vr0, $sp, 16 # 16-byte Folded Reload addi.d $s8, $a0, 8 st.d $s8, $s7, 24 st.w $s2, $s7, 0 - frecip.d $fa0, $fa1 + frecip.d $fa0, $fa0 fst.d $fa0, $s7, 16 st.d $zero, $s7, 8 blez $s2, .LBB0_54 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/main.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/main.s index 49877625..8cc2e421 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/main.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/main.s @@ -378,7 +378,6 @@ main: # @main ld.d $a0, $sp, 32 # 8-byte Folded Reload ld.w $a0, $a0, %pc_lo12(num_objects) ld.d $a1, $sp, 48 # 8-byte Folded Reload - st.d $a1, $sp, 48 # 8-byte Folded Spill addi.w $s8, $a1, 0 bge $s8, $a0, .LBB0_72 # %bb.34: # in Loop: Header=BB0_4 Depth=1 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/profile.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/profile.s index fee602a7..03f361d4 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/profile.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/CMakeFiles/miniAMR.dir/profile.s @@ -1006,6 +1006,9 @@ profile: # @profile st.d $a0, $sp, 152 # 8-byte Folded Spill move $s2, $zero move $s5, $zero + ld.d $s8, $sp, 272 # 8-byte Folded Reload + ld.d $fp, $sp, 264 # 8-byte Folded Reload + ld.d $s0, $sp, 256 # 8-byte Folded Reload b .LBB0_27 .p2align 4, , 16 .LBB0_25: # in Loop: Header=BB0_27 Depth=1 @@ -1038,13 +1041,11 @@ profile: # @profile pcaddu18i $ra, %call36(fprintf) jirl $ra, $ra, 0 ld.w $a0, $s4, 0 - ld.d $s8, $sp, 272 # 8-byte Folded Reload ld.w $a1, $s8, %pc_lo12(x_block_size) fld.d $fa0, $s7, -88 mul.d $a0, $a1, $a0 movgr2fr.w $fa1, $a0 ld.w $a0, $s4, 4 - ld.d $fp, $sp, 264 # 8-byte Folded Reload ld.w $a1, $fp, %pc_lo12(y_block_size) ffint.d.w $fa1, $fa1 fmul.d $fa0, $fa0, $fa1 @@ -1052,7 +1053,6 @@ profile: # @profile mul.d $a0, $a1, $a0 movgr2fr.w $fa2, $a0 ld.w $a0, $s4, 8 - ld.d $s0, $sp, 256 # 8-byte Folded Reload ld.w $a1, $s0, %pc_lo12(z_block_size) ffint.d.w $fa2, $fa2 fmul.d $fa1, $fa1, $fa2 @@ -2001,6 +2001,9 @@ profile: # @profile addi.d $s6, $a0, %pc_lo12(.L.str.139) move $s7, $zero move $s0, $zero + ld.d $s3, $sp, 272 # 8-byte Folded Reload + ld.d $s4, $sp, 264 # 8-byte Folded Reload + ld.d $s5, $sp, 256 # 8-byte Folded Reload b .LBB0_57 .p2align 4, , 16 .LBB0_56: # in Loop: Header=BB0_57 Depth=1 @@ -2032,13 +2035,11 @@ profile: # @profile pcaddu18i $ra, %call36(printf) jirl $ra, $ra, 0 ld.w $a0, $fp, 0 - ld.d $s3, $sp, 272 # 8-byte Folded Reload ld.w $a1, $s3, %pc_lo12(x_block_size) fld.d $fa0, $s2, -88 mul.d $a0, $a1, $a0 movgr2fr.w $fa1, $a0 ld.w $a0, $fp, 4 - ld.d $s4, $sp, 264 # 8-byte Folded Reload ld.w $a1, $s4, %pc_lo12(y_block_size) ffint.d.w $fa1, $fa1 fmul.d $fa0, $fa0, $fa1 @@ -2046,7 +2047,6 @@ profile: # @profile mul.d $a0, $a1, $a0 movgr2fr.w $fa2, $a0 ld.w $a0, $fp, 8 - ld.d $s5, $sp, 256 # 8-byte Folded Reload ld.w $a1, $s5, %pc_lo12(z_block_size) ffint.d.w $fa2, $fa2 fmul.d $fa1, $fa1, $fa2 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/operators.ompif.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/operators.ompif.s index 27246b54..b126f4b9 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/operators.ompif.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/operators.ompif.s @@ -7472,13 +7472,13 @@ initialize_problem: # @initialize_problem pcalau12i $a0, %pc_hi20(.LCPI22_3) fld.d $fs6, $a0, %pc_lo12(.LCPI22_3) lu52i.d $s3, $zero, 1023 - fst.d $fs0, $sp, 144 # 8-byte Folded Spill - fst.d $fa2, $sp, 48 # 8-byte Folded Spill - fst.d $fa0, $sp, 40 # 8-byte Folded Spill - fst.d $fs4, $sp, 32 # 8-byte Folded Spill - fst.d $fs6, $sp, 192 # 8-byte Folded Spill + fst.d $fs0, $sp, 152 # 8-byte Folded Spill + fst.d $fa2, $sp, 40 # 8-byte Folded Spill + fst.d $fa0, $sp, 32 # 8-byte Folded Spill + fst.d $fs4, $sp, 144 # 8-byte Folded Spill + fst.d $fs6, $sp, 184 # 8-byte Folded Spill fst.d $fs3, $sp, 24 # 8-byte Folded Spill - fst.d $fs5, $sp, 184 # 8-byte Folded Spill + fst.d $fs5, $sp, 176 # 8-byte Folded Spill b .LBB22_3 .p2align 4, , 16 .LBB22_2: # %._crit_edge322 @@ -7580,7 +7580,7 @@ initialize_problem: # @initialize_problem vldi $vr2, -928 fadd.d $fa0, $fa0, $fa2 fmul.d $fa1, $fs2, $fa0 - fst.d $fa1, $sp, 168 # 8-byte Folded Spill + fst.d $fa1, $sp, 192 # 8-byte Folded Spill add.d $a0, $a0, $s7 movgr2fr.w $fa0, $a0 ld.w $a0, $s5, 16 @@ -7613,7 +7613,7 @@ initialize_problem: # @initialize_problem fadd.d $fs3, $fa1, $fa4 fadd.d $fs2, $fa0, $fa0 fadd.d $fs7, $fa2, $fa2 - fst.d $fs7, $sp, 176 # 8-byte Folded Spill + fst.d $fs7, $sp, 168 # 8-byte Folded Spill fadd.d $fs0, $fa3, $fa3 fst.d $fs0, $sp, 104 # 8-byte Folded Spill vldi $vr1, -928 @@ -7682,8 +7682,8 @@ initialize_problem: # @initialize_problem pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 fmov.d $fs5, $fa0 - fld.d $fs3, $sp, 32 # 8-byte Folded Reload - fld.d $fa0, $sp, 168 # 8-byte Folded Reload + fld.d $fs3, $sp, 144 # 8-byte Folded Reload + fld.d $fa0, $sp, 192 # 8-byte Folded Reload fmul.d $fa0, $fa0, $fs3 fst.d $fa0, $sp, 56 # 8-byte Folded Spill pcaddu18i $ra, %call36(sin) @@ -7695,10 +7695,12 @@ initialize_problem: # @initialize_problem jirl $ra, $ra, 0 fmul.d $fs0, $fs0, $fa0 fmul.d $fa0, $fs1, $fs3 - fst.d $fa0, $sp, 152 # 8-byte Folded Spill + fst.d $fa0, $sp, 48 # 8-byte Folded Spill + fmov.d $fs1, $fs3 pcaddu18i $ra, %call36(sin) jirl $ra, $ra, 0 - fmul.d $fs0, $fs0, $fa0 + fmul.d $fs3, $fs0, $fa0 + fst.d $fs3, $sp, 192 # 8-byte Folded Spill vldi $vr0, -844 fmul.d $fs4, $fs2, $fa0 fst.d $fs4, $sp, 72 # 8-byte Folded Spill @@ -7706,7 +7708,7 @@ initialize_problem: # @initialize_problem fmov.d $fs2, $fs7 pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 - fmul.d $fs1, $fa0, $fs3 + fmul.d $fs1, $fa0, $fs1 fld.d $fs5, $sp, 56 # 8-byte Folded Reload fmov.d $fa0, $fs5 pcaddu18i $ra, %call36(cos) @@ -7716,13 +7718,14 @@ initialize_problem: # @initialize_problem pcaddu18i $ra, %call36(sin) jirl $ra, $ra, 0 fmul.d $fs1, $fs1, $fa0 - fld.d $fa0, $sp, 152 # 8-byte Folded Reload + fld.d $fs0, $sp, 48 # 8-byte Folded Reload + fmov.d $fa0, $fs0 pcaddu18i $ra, %call36(sin) jirl $ra, $ra, 0 fmul.d $fa0, $fs1, $fa0 - fmadd.d $fa0, $fs4, $fs0, $fa0 - fst.d $fa0, $sp, 168 # 8-byte Folded Spill - fld.d $fa0, $sp, 176 # 8-byte Folded Reload + fmadd.d $fa0, $fs4, $fs3, $fa0 + fst.d $fa0, $sp, 160 # 8-byte Folded Spill + fld.d $fa0, $sp, 168 # 8-byte Folded Reload vldi $vr1, -844 fmul.d $fs7, $fa0, $fa1 fst.d $fs7, $sp, 80 # 8-byte Folded Spill @@ -7730,6 +7733,7 @@ initialize_problem: # @initialize_problem fmov.d $fs1, $fs2 pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 + fld.d $fs3, $sp, 144 # 8-byte Folded Reload fmul.d $fs2, $fa0, $fs3 fmov.d $fs4, $fs5 fmov.d $fa0, $fs5 @@ -7741,13 +7745,14 @@ initialize_problem: # @initialize_problem pcaddu18i $ra, %call36(cos) jirl $ra, $ra, 0 fmul.d $fs2, $fs2, $fa0 - fld.d $fs6, $sp, 152 # 8-byte Folded Reload - fmov.d $fa0, $fs6 + fmov.d $fs6, $fs0 + fmov.d $fa0, $fs0 pcaddu18i $ra, %call36(sin) jirl $ra, $ra, 0 fmul.d $fa0, $fs2, $fa0 + fld.d $fs0, $sp, 192 # 8-byte Folded Reload fmadd.d $fa0, $fs7, $fs0, $fa0 - fst.d $fa0, $sp, 176 # 8-byte Folded Spill + fst.d $fa0, $sp, 168 # 8-byte Folded Spill fld.d $fa0, $sp, 104 # 8-byte Folded Reload vldi $vr1, -844 fmul.d $fs7, $fa0, $fa1 @@ -7771,11 +7776,10 @@ initialize_problem: # @initialize_problem fmadd.d $fa0, $fs7, $fs0, $fa0 fst.d $fa0, $sp, 96 # 8-byte Folded Spill fld.d $fa2, $sp, 72 # 8-byte Folded Reload - fld.d $fa0, $sp, 168 # 8-byte Folded Reload + fld.d $fa0, $sp, 160 # 8-byte Folded Reload fmul.d $fa0, $fa2, $fa0 - fld.d $fa1, $sp, 184 # 8-byte Folded Reload + fld.d $fa1, $sp, 176 # 8-byte Folded Reload fmadd.d $fs2, $fs0, $fa1, $fa0 - fst.d $fs0, $sp, 160 # 8-byte Folded Spill fmul.d $fs7, $fa2, $fs3 fst.d $fs1, $sp, 64 # 8-byte Folded Spill fmov.d $fa0, $fs1 @@ -7797,7 +7801,7 @@ initialize_problem: # @initialize_problem fmov.d $fa0, $fs1 pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 - fld.d $fa1, $sp, 192 # 8-byte Folded Reload + fld.d $fa1, $sp, 184 # 8-byte Folded Reload fmul.d $fs7, $fa0, $fa1 fmov.d $fa0, $fs4 pcaddu18i $ra, %call36(sin) @@ -7814,10 +7818,10 @@ initialize_problem: # @initialize_problem fmul.d $fa1, $fs1, $fa1 fmadd.d $fa0, $fa1, $fa0, $fs2 fst.d $fa0, $sp, 104 # 8-byte Folded Spill - fld.d $fa0, $sp, 176 # 8-byte Folded Reload + fld.d $fa0, $sp, 168 # 8-byte Folded Reload fld.d $fa1, $sp, 80 # 8-byte Folded Reload fmul.d $fa0, $fa1, $fa0 - fld.d $fa2, $sp, 184 # 8-byte Folded Reload + fld.d $fa2, $sp, 176 # 8-byte Folded Reload fmadd.d $fs1, $fs0, $fa2, $fa0 fmul.d $fs2, $fa1, $fs3 fld.d $fs0, $sp, 64 # 8-byte Folded Reload @@ -7840,7 +7844,7 @@ initialize_problem: # @initialize_problem fmov.d $fa0, $fs0 pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 - fld.d $fa1, $sp, 192 # 8-byte Folded Reload + fld.d $fa1, $sp, 184 # 8-byte Folded Reload fmul.d $fs2, $fa0, $fa1 fmov.d $fa0, $fs4 pcaddu18i $ra, %call36(sin) @@ -7860,8 +7864,8 @@ initialize_problem: # @initialize_problem fld.d $fs1, $sp, 96 # 8-byte Folded Reload fld.d $fa1, $sp, 88 # 8-byte Folded Reload fmul.d $fa0, $fa1, $fs1 - fld.d $fa2, $sp, 160 # 8-byte Folded Reload - fld.d $fa3, $sp, 184 # 8-byte Folded Reload + fld.d $fa2, $sp, 192 # 8-byte Folded Reload + fld.d $fa3, $sp, 176 # 8-byte Folded Reload fmadd.d $fs2, $fa2, $fa3, $fa0 fmul.d $fs7, $fa1, $fs3 fmov.d $fa0, $fs0 @@ -7883,7 +7887,7 @@ initialize_problem: # @initialize_problem fmov.d $fa0, $fs0 pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 - fld.d $fa1, $sp, 192 # 8-byte Folded Reload + fld.d $fa1, $sp, 184 # 8-byte Folded Reload fmul.d $fs3, $fa0, $fa1 fmov.d $fa0, $fs4 pcaddu18i $ra, %call36(sin) @@ -7903,15 +7907,15 @@ initialize_problem: # @initialize_problem ld.d $a1, $a0, 16 fmul.d $fa1, $fs4, $fa1 fmadd.d $fa0, $fa1, $fa0, $fs2 - fld.d $fs2, $sp, 40 # 8-byte Folded Reload + fld.d $fs2, $sp, 32 # 8-byte Folded Reload slli.d $a3, $s1, 3 stx.d $s3, $a1, $a3 ld.d $a1, $a0, 24 fld.d $fa1, $sp, 120 # 8-byte Folded Reload - fld.d $fa2, $sp, 176 # 8-byte Folded Reload + fld.d $fa2, $sp, 168 # 8-byte Folded Reload fmul.d $fa1, $fa1, $fa2 fld.d $fa2, $sp, 128 # 8-byte Folded Reload - fld.d $fa3, $sp, 168 # 8-byte Folded Reload + fld.d $fa3, $sp, 160 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $fa3, $fa1 fld.d $fa2, $sp, 112 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $fs1, $fa1 @@ -7921,17 +7925,17 @@ initialize_problem: # @initialize_problem fld.d $fa2, $sp, 104 # 8-byte Folded Reload fld.d $fa4, $sp, 80 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa4 - fld.d $fs1, $sp, 48 # 8-byte Folded Reload + fld.d $fs1, $sp, 40 # 8-byte Folded Reload fadd.d $fa0, $fa2, $fa0 fnmadd.d $fa0, $fa3, $fa0, $fa1 - fld.d $fa2, $sp, 160 # 8-byte Folded Reload + fld.d $fa2, $sp, 192 # 8-byte Folded Reload fstx.d $fa2, $a1, $a3 ld.d $a0, $a0, 8 ld.w $a2, $s5, 20 fmul.d $fa0, $fs1, $fa0 - fld.d $fa1, $sp, 144 # 8-byte Folded Reload + fld.d $fa1, $sp, 152 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 - fld.d $fs0, $sp, 144 # 8-byte Folded Reload + fld.d $fs0, $sp, 152 # 8-byte Folded Reload addi.w $s8, $s8, 1 fstx.d $fa0, $a0, $a3 blt $s8, $a2, .LBB22_14 diff --git a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s index b68165ac..222a2da9 100644 --- a/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s +++ b/results/MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/CMakeFiles/miniGMG.dir/solver.s @@ -2845,19 +2845,19 @@ CABiCGStab: # @CABiCGStab vld $vr18, $a0, %pc_lo12(.LCPI1_4) pcalau12i $a0, %pc_hi20(.LCPI1_5) vld $vr0, $a0, %pc_lo12(.LCPI1_5) - vst $vr0, $sp, 1328 # 16-byte Folded Spill + vst $vr0, $sp, 1344 # 16-byte Folded Spill move $s4, $zero fld.d $fs0, $sp, 72 # 8-byte Folded Reload fmov.d $fa6, $fs0 fmov.d $ft11, $fs0 vld $vr0, $sp, 16 # 16-byte Folded Reload - vst $vr0, $sp, 1264 # 16-byte Folded Spill vst $vr0, $sp, 1280 # 16-byte Folded Spill vst $vr0, $sp, 1296 # 16-byte Folded Spill vst $vr0, $sp, 1312 # 16-byte Folded Spill - vst $vr0, $sp, 1344 # 16-byte Folded Spill + vst $vr0, $sp, 1328 # 16-byte Folded Spill vst $vr0, $sp, 1360 # 16-byte Folded Spill vst $vr0, $sp, 1376 # 16-byte Folded Spill + vst $vr0, $sp, 1136 # 16-byte Folded Spill vori.b $vr20, $vr0, 0 vori.b $vr12, $vr0, 0 vori.b $vr11, $vr0, 0 @@ -2865,7 +2865,6 @@ CABiCGStab: # @CABiCGStab vori.b $vr4, $vr0, 0 vori.b $vr3, $vr0, 0 vori.b $vr2, $vr0, 0 - vst $vr0, $sp, 1136 # 16-byte Folded Spill vst $vr0, $sp, 1152 # 16-byte Folded Spill vst $vr0, $sp, 1168 # 16-byte Folded Spill vst $vr0, $sp, 1184 # 16-byte Folded Spill @@ -2873,6 +2872,7 @@ CABiCGStab: # @CABiCGStab vst $vr0, $sp, 1216 # 16-byte Folded Spill vst $vr0, $sp, 1232 # 16-byte Folded Spill vst $vr0, $sp, 1248 # 16-byte Folded Spill + vst $vr0, $sp, 1264 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2632 add.d $a3, $sp, $a0 @@ -2977,28 +2977,28 @@ CABiCGStab: # @CABiCGStab vst $vr7, $sp, 720 # 16-byte Folded Spill fst.d $fa6, $sp, 984 # 8-byte Folded Spill move $a0, $zero - vld $vr1, $sp, 1264 # 16-byte Folded Reload + vld $vr1, $sp, 1280 # 16-byte Folded Reload vreplvei.d $vr22, $vr1, 0 vreplvei.d $vr21, $vr1, 1 - vld $vr1, $sp, 1280 # 16-byte Folded Reload + vld $vr1, $sp, 1296 # 16-byte Folded Reload vreplvei.d $vr20, $vr1, 0 vreplvei.d $vr19, $vr1, 1 - vld $vr1, $sp, 1296 # 16-byte Folded Reload + vld $vr1, $sp, 1312 # 16-byte Folded Reload vreplvei.d $vr18, $vr1, 0 vreplvei.d $vr17, $vr1, 1 - vld $vr1, $sp, 1312 # 16-byte Folded Reload + vld $vr1, $sp, 1328 # 16-byte Folded Reload vreplvei.d $vr16, $vr1, 0 vreplvei.d $vr15, $vr1, 1 - vld $vr1, $sp, 1328 # 16-byte Folded Reload + vld $vr1, $sp, 1344 # 16-byte Folded Reload vreplvei.d $vr14, $vr1, 0 vreplvei.d $vr13, $vr1, 1 - vld $vr1, $sp, 1344 # 16-byte Folded Reload + vld $vr1, $sp, 1360 # 16-byte Folded Reload vreplvei.d $vr12, $vr1, 0 vreplvei.d $vr11, $vr1, 1 - vld $vr1, $sp, 1360 # 16-byte Folded Reload + vld $vr1, $sp, 1376 # 16-byte Folded Reload vreplvei.d $vr10, $vr1, 0 vreplvei.d $vr9, $vr1, 1 - vld $vr1, $sp, 1376 # 16-byte Folded Reload + vld $vr1, $sp, 1136 # 16-byte Folded Reload vreplvei.d $vr8, $vr1, 0 vreplvei.d $vr7, $vr1, 1 move $a1, $a2 @@ -3641,30 +3641,30 @@ CABiCGStab: # @CABiCGStab vld $vr7, $sp, 1024 # 16-byte Folded Reload vst $vr8, $sp, 240 # 16-byte Folded Spill vfmul.d $vr7, $vr8, $vr7 - vld $vr8, $sp, 1168 # 16-byte Folded Reload + vld $vr8, $sp, 1184 # 16-byte Folded Reload vfadd.d $vr8, $vr8, $vr7 - vst $vr8, $sp, 1168 # 16-byte Folded Spill - vld $vr7, $sp, 1152 # 16-byte Folded Reload + vst $vr8, $sp, 1184 # 16-byte Folded Spill + vld $vr7, $sp, 1168 # 16-byte Folded Reload vfadd.d $vr7, $vr7, $vr6 - vst $vr7, $sp, 1152 # 16-byte Folded Spill - vld $vr6, $sp, 1136 # 16-byte Folded Reload + vst $vr7, $sp, 1168 # 16-byte Folded Spill + vld $vr6, $sp, 1152 # 16-byte Folded Reload vfadd.d $vr6, $vr6, $vr5 - vst $vr6, $sp, 1136 # 16-byte Folded Spill - vld $vr5, $sp, 1184 # 16-byte Folded Reload + vst $vr6, $sp, 1152 # 16-byte Folded Spill + vld $vr5, $sp, 1200 # 16-byte Folded Reload vfadd.d $vr5, $vr5, $vr4 - vst $vr5, $sp, 1184 # 16-byte Folded Spill - vld $vr4, $sp, 1200 # 16-byte Folded Reload + vst $vr5, $sp, 1200 # 16-byte Folded Spill + vld $vr4, $sp, 1216 # 16-byte Folded Reload vfadd.d $vr4, $vr4, $vr3 - vst $vr4, $sp, 1200 # 16-byte Folded Spill - vld $vr3, $sp, 1216 # 16-byte Folded Reload + vst $vr4, $sp, 1216 # 16-byte Folded Spill + vld $vr3, $sp, 1232 # 16-byte Folded Reload vfadd.d $vr3, $vr3, $vr2 - vst $vr3, $sp, 1216 # 16-byte Folded Spill - vld $vr2, $sp, 1232 # 16-byte Folded Reload + vst $vr3, $sp, 1232 # 16-byte Folded Spill + vld $vr2, $sp, 1248 # 16-byte Folded Reload vfadd.d $vr2, $vr2, $vr1 - vst $vr2, $sp, 1232 # 16-byte Folded Spill - vld $vr1, $sp, 1248 # 16-byte Folded Reload + vst $vr2, $sp, 1248 # 16-byte Folded Spill + vld $vr1, $sp, 1264 # 16-byte Folded Reload vfadd.d $vr1, $vr1, $vr0 - vst $vr1, $sp, 1248 # 16-byte Folded Spill + vst $vr1, $sp, 1264 # 16-byte Folded Spill lu12i.w $a1, 1 ori $a1, $a1, 2528 add.d $a1, $sp, $a1 @@ -3695,7 +3695,7 @@ CABiCGStab: # @CABiCGStab vld $vr2, $a1, 0 vst $vr0, $sp, 208 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr0 - vld $vr1, $sp, 1264 # 16-byte Folded Reload + vld $vr1, $sp, 1280 # 16-byte Folded Reload vfsub.d $vr1, $vr1, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3232 @@ -3703,7 +3703,7 @@ CABiCGStab: # @CABiCGStab vst $vr1, $a1, 0 vst $vr2, $sp, 128 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr2 - vld $vr2, $sp, 1280 # 16-byte Folded Reload + vld $vr2, $sp, 1296 # 16-byte Folded Reload vfsub.d $vr2, $vr2, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3248 @@ -3711,7 +3711,7 @@ CABiCGStab: # @CABiCGStab vst $vr2, $a1, 0 vst $vr3, $sp, 192 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr3 - vld $vr3, $sp, 1296 # 16-byte Folded Reload + vld $vr3, $sp, 1312 # 16-byte Folded Reload vfsub.d $vr3, $vr3, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3264 @@ -3719,7 +3719,7 @@ CABiCGStab: # @CABiCGStab vst $vr3, $a1, 0 vst $vr4, $sp, 224 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr4 - vld $vr4, $sp, 1312 # 16-byte Folded Reload + vld $vr4, $sp, 1328 # 16-byte Folded Reload vfsub.d $vr6, $vr4, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3280 @@ -3727,7 +3727,7 @@ CABiCGStab: # @CABiCGStab vst $vr6, $a1, 0 vst $vr5, $sp, 176 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr5 - vld $vr4, $sp, 1328 # 16-byte Folded Reload + vld $vr4, $sp, 1344 # 16-byte Folded Reload vfsub.d $vr8, $vr4, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3296 @@ -3735,7 +3735,7 @@ CABiCGStab: # @CABiCGStab vst $vr8, $a1, 0 vst $vr7, $sp, 160 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr7 - vld $vr4, $sp, 1344 # 16-byte Folded Reload + vld $vr4, $sp, 1360 # 16-byte Folded Reload vfsub.d $vr9, $vr4, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3312 @@ -3747,7 +3747,7 @@ CABiCGStab: # @CABiCGStab vld $vr7, $a1, 0 vst $vr10, $sp, 144 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr10 - vld $vr4, $sp, 1360 # 16-byte Folded Reload + vld $vr4, $sp, 1376 # 16-byte Folded Reload vfsub.d $vr10, $vr4, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3328 @@ -3759,8 +3759,7 @@ CABiCGStab: # @CABiCGStab fld.d $fa5, $a1, 0 vst $vr7, $sp, 96 # 16-byte Folded Spill vfmul.d $vr0, $vr16, $vr7 - vld $vr4, $sp, 1376 # 16-byte Folded Reload - vst $vr4, $sp, 1376 # 16-byte Folded Spill + vld $vr4, $sp, 1136 # 16-byte Folded Reload vfsub.d $vr17, $vr4, $vr0 lu12i.w $a1, 2 ori $a1, $a1, 3344 @@ -4127,37 +4126,37 @@ CABiCGStab: # @CABiCGStab fst.d $fa3, $sp, 816 # 8-byte Folded Spill fmul.d $fa2, $ft14, $fa3 vreplvei.d $vr3, $vr31, 0 - vld $vr24, $sp, 1376 # 16-byte Folded Reload + vld $vr24, $sp, 1136 # 16-byte Folded Reload vfmul.d $vr4, $vr3, $vr24 - vld $vr5, $sp, 1248 # 16-byte Folded Reload + vld $vr5, $sp, 1264 # 16-byte Folded Reload vfadd.d $vr4, $vr5, $vr4 - vld $vr20, $sp, 1360 # 16-byte Folded Reload + vld $vr20, $sp, 1376 # 16-byte Folded Reload vfmul.d $vr5, $vr3, $vr20 - vld $vr6, $sp, 1232 # 16-byte Folded Reload + vld $vr6, $sp, 1248 # 16-byte Folded Reload vfadd.d $vr5, $vr6, $vr5 - vld $vr21, $sp, 1344 # 16-byte Folded Reload + vld $vr21, $sp, 1360 # 16-byte Folded Reload vfmul.d $vr6, $vr3, $vr21 - vld $vr7, $sp, 1216 # 16-byte Folded Reload + vld $vr7, $sp, 1232 # 16-byte Folded Reload vfadd.d $vr6, $vr7, $vr6 - vld $vr26, $sp, 1328 # 16-byte Folded Reload + vld $vr26, $sp, 1344 # 16-byte Folded Reload vfmul.d $vr7, $vr3, $vr26 - vld $vr8, $sp, 1200 # 16-byte Folded Reload + vld $vr8, $sp, 1216 # 16-byte Folded Reload vfadd.d $vr7, $vr8, $vr7 - vld $vr30, $sp, 1264 # 16-byte Folded Reload + vld $vr30, $sp, 1280 # 16-byte Folded Reload vfmul.d $vr8, $vr3, $vr30 - vld $vr9, $sp, 1136 # 16-byte Folded Reload + vld $vr9, $sp, 1152 # 16-byte Folded Reload vfadd.d $vr8, $vr9, $vr8 - vld $vr29, $sp, 1280 # 16-byte Folded Reload + vld $vr29, $sp, 1296 # 16-byte Folded Reload vfmul.d $vr9, $vr3, $vr29 - vld $vr10, $sp, 1152 # 16-byte Folded Reload + vld $vr10, $sp, 1168 # 16-byte Folded Reload vfadd.d $vr9, $vr10, $vr9 - vld $vr28, $sp, 1296 # 16-byte Folded Reload + vld $vr28, $sp, 1312 # 16-byte Folded Reload vfmul.d $vr10, $vr3, $vr28 - vld $vr11, $sp, 1168 # 16-byte Folded Reload + vld $vr11, $sp, 1184 # 16-byte Folded Reload vfadd.d $vr10, $vr11, $vr10 - vld $vr27, $sp, 1312 # 16-byte Folded Reload + vld $vr27, $sp, 1328 # 16-byte Folded Reload vfmul.d $vr11, $vr3, $vr27 - vld $vr12, $sp, 1184 # 16-byte Folded Reload + vld $vr12, $sp, 1200 # 16-byte Folded Reload vfadd.d $vr11, $vr12, $vr11 vreplvei.d $vr12, $vr2, 0 vld $vr13, $sp, 96 # 16-byte Folded Reload @@ -4177,21 +4176,21 @@ CABiCGStab: # @CABiCGStab vld $vr25, $sp, 224 # 16-byte Folded Reload vfmul.d $vr12, $vr12, $vr25 vfadd.d $vr11, $vr11, $vr12 - vst $vr11, $sp, 1184 # 16-byte Folded Spill + vst $vr11, $sp, 1200 # 16-byte Folded Spill vfadd.d $vr10, $vr10, $vr19 - vst $vr10, $sp, 1168 # 16-byte Folded Spill + vst $vr10, $sp, 1184 # 16-byte Folded Spill vfadd.d $vr9, $vr9, $vr18 - vst $vr9, $sp, 1152 # 16-byte Folded Spill + vst $vr9, $sp, 1168 # 16-byte Folded Spill vfadd.d $vr8, $vr8, $vr17 - vst $vr8, $sp, 1136 # 16-byte Folded Spill + vst $vr8, $sp, 1152 # 16-byte Folded Spill vfadd.d $vr7, $vr7, $vr16 - vst $vr7, $sp, 1200 # 16-byte Folded Spill + vst $vr7, $sp, 1216 # 16-byte Folded Spill vfadd.d $vr6, $vr6, $vr15 - vst $vr6, $sp, 1216 # 16-byte Folded Spill + vst $vr6, $sp, 1232 # 16-byte Folded Spill vfadd.d $vr5, $vr5, $vr14 - vst $vr5, $sp, 1232 # 16-byte Folded Spill + vst $vr5, $sp, 1248 # 16-byte Folded Spill vfadd.d $vr4, $vr4, $vr13 - vst $vr4, $sp, 1248 # 16-byte Folded Spill + vst $vr4, $sp, 1264 # 16-byte Folded Spill lu12i.w $a1, 1 ori $a1, $a1, 2416 add.d $a1, $sp, $a1 @@ -4364,26 +4363,26 @@ CABiCGStab: # @CABiCGStab fmul.d $fa2, $fa2, $fa3 fadd.d $ft11, $fa1, $fa2 vreplvei.d $vr11, $vr8, 0 - vst $vr8, $sp, 1264 # 16-byte Folded Spill + vst $vr8, $sp, 1280 # 16-byte Folded Spill vreplvei.d $vr8, $vr8, 1 vreplvei.d $vr12, $vr9, 0 - vst $vr9, $sp, 1280 # 16-byte Folded Spill + vst $vr9, $sp, 1296 # 16-byte Folded Spill vreplvei.d $vr9, $vr9, 1 vreplvei.d $vr13, $vr10, 0 move $a1, $a2 - vst $vr10, $sp, 1296 # 16-byte Folded Spill + vst $vr10, $sp, 1312 # 16-byte Folded Spill vreplvei.d $vr10, $vr10, 1 vreplvei.d $vr14, $vr7, 0 - vst $vr7, $sp, 1312 # 16-byte Folded Spill + vst $vr7, $sp, 1328 # 16-byte Folded Spill vreplvei.d $vr7, $vr7, 1 vreplvei.d $vr16, $vr6, 0 - vst $vr6, $sp, 1328 # 16-byte Folded Spill + vst $vr6, $sp, 1344 # 16-byte Folded Spill vreplvei.d $vr6, $vr6, 1 vreplvei.d $vr17, $vr5, 0 - vst $vr5, $sp, 1344 # 16-byte Folded Spill + vst $vr5, $sp, 1360 # 16-byte Folded Spill vreplvei.d $vr18, $vr5, 1 vreplvei.d $vr29, $vr4, 0 - vst $vr4, $sp, 1360 # 16-byte Folded Spill + vst $vr4, $sp, 1376 # 16-byte Folded Spill vreplvei.d $vr30, $vr4, 1 vreplvei.d $vr31, $vr15, 0 vreplvei.d $vr25, $vr15, 1 @@ -4521,7 +4520,7 @@ CABiCGStab: # @CABiCGStab fmadd.d $fa1, $fs1, $fa4, $fa1 fmadd.d $fa1, $ft11, $fa5, $fa1 fcmp.cule.d $fcc0, $fa1, $fa0 - vst $vr15, $sp, 1376 # 16-byte Folded Spill + vst $vr15, $sp, 1136 # 16-byte Folded Spill bcnez $fcc0, .LBB1_27 # %bb.26: # in Loop: Header=BB1_6 Depth=2 fsqrt.d $fa0, $fa1 @@ -4616,19 +4615,19 @@ CABiCGStab: # @CABiCGStab fld.d $ft3, $sp, 816 # 8-byte Folded Reload fmul.d $fa1, $fa1, $ft3 vfadd.d $vr2, $vr15, $vr2 - vld $vr11, $sp, 1360 # 16-byte Folded Reload + vld $vr11, $sp, 1376 # 16-byte Folded Reload vfadd.d $vr9, $vr11, $vr9 - vld $vr11, $sp, 1344 # 16-byte Folded Reload + vld $vr11, $sp, 1360 # 16-byte Folded Reload vfadd.d $vr8, $vr11, $vr8 - vld $vr11, $sp, 1328 # 16-byte Folded Reload + vld $vr11, $sp, 1344 # 16-byte Folded Reload vfadd.d $vr7, $vr11, $vr7 - vld $vr11, $sp, 1312 # 16-byte Folded Reload + vld $vr11, $sp, 1328 # 16-byte Folded Reload vfadd.d $vr6, $vr11, $vr6 - vld $vr11, $sp, 1264 # 16-byte Folded Reload - vfadd.d $vr5, $vr11, $vr5 vld $vr11, $sp, 1280 # 16-byte Folded Reload - vfadd.d $vr4, $vr11, $vr4 + vfadd.d $vr5, $vr11, $vr5 vld $vr11, $sp, 1296 # 16-byte Folded Reload + vfadd.d $vr4, $vr11, $vr4 + vld $vr11, $sp, 1312 # 16-byte Folded Reload vfadd.d $vr3, $vr11, $vr3 lu12i.w $a0, 1 ori $a0, $a0, 2432 @@ -4726,7 +4725,7 @@ CABiCGStab: # @CABiCGStab vld $vr21, $sp, 768 # 16-byte Folded Reload vld $vr20, $sp, 784 # 16-byte Folded Reload vld $vr22, $sp, 256 # 16-byte Folded Reload - vld $vr15, $sp, 1376 # 16-byte Folded Reload + vld $vr15, $sp, 1136 # 16-byte Folded Reload fmov.d $ft11, $fs2 vld $vr26, $sp, 720 # 16-byte Folded Reload lu12i.w $a0, 1 @@ -4754,8 +4753,7 @@ CABiCGStab: # @CABiCGStab fld.d $fs0, $sp, 1400 # 8-byte Folded Reload .LBB1_39: # in Loop: Header=BB1_5 Depth=1 ld.w $a4, $sp, 1408 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - vst $vr0, $sp, 1136 # 16-byte Folded Spill + vld $vr0, $sp, 1152 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4767,7 +4765,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1412 - vld $vr0, $sp, 1136 # 16-byte Folded Reload + vld $vr0, $sp, 1152 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4778,8 +4776,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1416 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - vst $vr0, $sp, 1152 # 16-byte Folded Spill + vld $vr0, $sp, 1168 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4790,7 +4787,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1420 - vld $vr0, $sp, 1152 # 16-byte Folded Reload + vld $vr0, $sp, 1168 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4801,8 +4798,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1424 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - vst $vr0, $sp, 1168 # 16-byte Folded Spill + vld $vr0, $sp, 1184 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4813,7 +4809,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1428 - vld $vr0, $sp, 1168 # 16-byte Folded Reload + vld $vr0, $sp, 1184 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4824,8 +4820,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1432 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - vst $vr0, $sp, 1184 # 16-byte Folded Spill + vld $vr0, $sp, 1200 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4836,7 +4831,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1436 - vld $vr0, $sp, 1184 # 16-byte Folded Reload + vld $vr0, $sp, 1200 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4847,8 +4842,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1440 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - vst $vr0, $sp, 1200 # 16-byte Folded Spill + vld $vr0, $sp, 1216 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4859,7 +4853,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1444 - vld $vr0, $sp, 1200 # 16-byte Folded Reload + vld $vr0, $sp, 1216 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4870,8 +4864,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1448 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - vst $vr0, $sp, 1216 # 16-byte Folded Spill + vld $vr0, $sp, 1232 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4882,7 +4875,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1452 - vld $vr0, $sp, 1216 # 16-byte Folded Reload + vld $vr0, $sp, 1232 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4893,8 +4886,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1456 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - vst $vr0, $sp, 1232 # 16-byte Folded Spill + vld $vr0, $sp, 1248 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4905,7 +4897,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1460 - vld $vr0, $sp, 1232 # 16-byte Folded Reload + vld $vr0, $sp, 1248 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4916,8 +4908,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1464 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - vst $vr0, $sp, 1248 # 16-byte Folded Spill + vld $vr0, $sp, 1264 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 vldi $vr0, -912 move $a0, $s1 @@ -4928,7 +4919,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1468 - vld $vr0, $sp, 1248 # 16-byte Folded Reload + vld $vr0, $sp, 1264 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 vldi $vr0, -912 move $a0, $s1 @@ -4953,7 +4944,6 @@ CABiCGStab: # @CABiCGStab # in Loop: Header=BB1_5 Depth=1 ld.w $a4, $sp, 1408 vld $vr0, $sp, 992 # 16-byte Folded Reload - vst $vr0, $sp, 992 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 movgr2fr.d $fs5, $zero ori $a2, $zero, 14 @@ -4977,7 +4967,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1416 vld $vr0, $sp, 1008 # 16-byte Folded Reload - vst $vr0, $sp, 1008 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5000,7 +4989,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1424 vld $vr0, $sp, 1024 # 16-byte Folded Reload - vst $vr0, $sp, 1024 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5023,7 +5011,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1432 vld $vr0, $sp, 1040 # 16-byte Folded Reload - vst $vr0, $sp, 1040 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5046,7 +5033,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1440 vld $vr0, $sp, 1056 # 16-byte Folded Reload - vst $vr0, $sp, 1056 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5069,7 +5055,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1448 vld $vr0, $sp, 1072 # 16-byte Folded Reload - vst $vr0, $sp, 1072 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5092,7 +5077,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1456 vld $vr0, $sp, 1088 # 16-byte Folded Reload - vst $vr0, $sp, 1088 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5115,7 +5099,6 @@ CABiCGStab: # @CABiCGStab jirl $ra, $ra, 0 ld.w $a4, $sp, 1464 vld $vr0, $sp, 1104 # 16-byte Folded Reload - vst $vr0, $sp, 1104 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 14 vldi $vr0, -912 @@ -5146,8 +5129,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1408 - vld $vr0, $sp, 1264 # 16-byte Folded Reload - vst $vr0, $sp, 1264 # 16-byte Folded Spill + vld $vr0, $sp, 1280 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 ori $a3, $zero, 13 @@ -5158,7 +5140,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1412 - vld $vr0, $sp, 1264 # 16-byte Folded Reload + vld $vr0, $sp, 1280 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5169,8 +5151,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1416 - vld $vr0, $sp, 1280 # 16-byte Folded Reload - vst $vr0, $sp, 1280 # 16-byte Folded Spill + vld $vr0, $sp, 1296 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5181,7 +5162,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1420 - vld $vr0, $sp, 1280 # 16-byte Folded Reload + vld $vr0, $sp, 1296 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5192,8 +5173,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1424 - vld $vr0, $sp, 1296 # 16-byte Folded Reload - vst $vr0, $sp, 1296 # 16-byte Folded Spill + vld $vr0, $sp, 1312 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5204,7 +5184,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1428 - vld $vr0, $sp, 1296 # 16-byte Folded Reload + vld $vr0, $sp, 1312 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5215,8 +5195,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1432 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - vst $vr0, $sp, 1312 # 16-byte Folded Spill + vld $vr0, $sp, 1328 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5227,7 +5206,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1436 - vld $vr0, $sp, 1312 # 16-byte Folded Reload + vld $vr0, $sp, 1328 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5238,8 +5217,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1440 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - vst $vr0, $sp, 1328 # 16-byte Folded Spill + vld $vr0, $sp, 1344 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5250,7 +5228,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1444 - vld $vr0, $sp, 1328 # 16-byte Folded Reload + vld $vr0, $sp, 1344 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5261,8 +5239,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1448 - vld $vr0, $sp, 1344 # 16-byte Folded Reload - vst $vr0, $sp, 1344 # 16-byte Folded Spill + vld $vr0, $sp, 1360 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5273,7 +5250,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1452 - vld $vr0, $sp, 1344 # 16-byte Folded Reload + vld $vr0, $sp, 1360 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5284,8 +5261,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1456 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - vst $vr0, $sp, 1360 # 16-byte Folded Spill + vld $vr0, $sp, 1376 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5296,7 +5272,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1460 - vld $vr0, $sp, 1360 # 16-byte Folded Reload + vld $vr0, $sp, 1376 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5307,8 +5283,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1464 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - vst $vr0, $sp, 1376 # 16-byte Folded Spill + vld $vr0, $sp, 1136 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 0 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5319,7 +5294,7 @@ CABiCGStab: # @CABiCGStab pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1468 - vld $vr0, $sp, 1376 # 16-byte Folded Reload + vld $vr0, $sp, 1136 # 16-byte Folded Reload vreplvei.d $vr1, $vr0, 1 ori $a2, $zero, 13 vldi $vr0, -912 @@ -5716,8 +5691,8 @@ CACG: # @CACG move $s1, $a0 ori $a2, $zero, 12 move $a3, $fp - fst.d $fa0, $sp, 24 # 8-byte Folded Spill - fst.d $fa1, $sp, 32 # 8-byte Folded Spill + fst.d $fa0, $sp, 32 # 8-byte Folded Spill + fst.d $fa1, $sp, 40 # 8-byte Folded Spill pcaddu18i $ra, %call36(residual) jirl $ra, $ra, 0 ori $a2, $zero, 13 @@ -5768,7 +5743,7 @@ CACG: # @CACG # %bb.3: # %.lr.ph move $s2, $zero fmul.d $fa0, $fs0, $fa0 - fst.d $fa0, $sp, 48 # 8-byte Folded Spill + fst.d $fa0, $sp, 88 # 8-byte Folded Spill b .LBB3_5 .p2align 4, , 16 .LBB3_4: # %.loopexit @@ -5792,9 +5767,9 @@ CACG: # @CACG ld.w $a3, $sp, 1136 move $a0, $s1 move $a1, $s0 - fld.d $fs1, $sp, 24 # 8-byte Folded Reload + fld.d $fs1, $sp, 32 # 8-byte Folded Reload fmov.d $fa0, $fs1 - fld.d $fs0, $sp, 32 # 8-byte Folded Reload + fld.d $fs0, $sp, 40 # 8-byte Folded Reload fmov.d $fa1, $fs0 pcaddu18i $ra, %call36(apply_op) jirl $ra, $ra, 0 @@ -5869,188 +5844,188 @@ CACG: # @CACG vldi $vr23, -912 fld.d $fs6, $sp, 1176 fld.d $fa0, $sp, 1184 - fst.d $fa0, $sp, 984 # 8-byte Folded Spill + fst.d $fa0, $sp, 344 # 8-byte Folded Spill fld.d $fa0, $sp, 1192 - fst.d $fa0, $sp, 976 # 8-byte Folded Spill + fst.d $fa0, $sp, 336 # 8-byte Folded Spill fld.d $fa0, $sp, 1200 - fst.d $fa0, $sp, 968 # 8-byte Folded Spill + fst.d $fa0, $sp, 1024 # 8-byte Folded Spill fld.d $fa0, $sp, 1208 - fst.d $fa0, $sp, 960 # 8-byte Folded Spill + fst.d $fa0, $sp, 328 # 8-byte Folded Spill fld.d $fa0, $sp, 1216 - fst.d $fa0, $sp, 280 # 8-byte Folded Spill + fst.d $fa0, $sp, 320 # 8-byte Folded Spill fld.d $fa0, $sp, 1224 - fst.d $fa0, $sp, 272 # 8-byte Folded Spill + fst.d $fa0, $sp, 312 # 8-byte Folded Spill fld.d $fa0, $sp, 1232 - fst.d $fa0, $sp, 264 # 8-byte Folded Spill + fst.d $fa0, $sp, 304 # 8-byte Folded Spill fld.d $fa0, $sp, 1240 - fst.d $fa0, $sp, 256 # 8-byte Folded Spill + fst.d $fa0, $sp, 296 # 8-byte Folded Spill fld.d $fa0, $sp, 1248 - fst.d $fa0, $sp, 248 # 8-byte Folded Spill + fst.d $fa0, $sp, 288 # 8-byte Folded Spill fld.d $fa0, $sp, 1256 - fst.d $fa0, $sp, 240 # 8-byte Folded Spill + fst.d $fa0, $sp, 280 # 8-byte Folded Spill fld.d $fa0, $sp, 1264 - fst.d $fa0, $sp, 232 # 8-byte Folded Spill + fst.d $fa0, $sp, 272 # 8-byte Folded Spill fld.d $fa0, $sp, 1272 - fst.d $fa0, $sp, 216 # 8-byte Folded Spill + fst.d $fa0, $sp, 256 # 8-byte Folded Spill fld.d $fa0, $sp, 1280 - fst.d $fa0, $sp, 208 # 8-byte Folded Spill + fst.d $fa0, $sp, 248 # 8-byte Folded Spill fld.d $fa0, $sp, 1288 - fst.d $fa0, $sp, 952 # 8-byte Folded Spill + fst.d $fa0, $sp, 1016 # 8-byte Folded Spill fld.d $fa0, $sp, 1296 - fst.d $fa0, $sp, 944 # 8-byte Folded Spill + fst.d $fa0, $sp, 1008 # 8-byte Folded Spill fld.d $fa0, $sp, 1304 - fst.d $fa0, $sp, 936 # 8-byte Folded Spill + fst.d $fa0, $sp, 1000 # 8-byte Folded Spill fld.d $fa0, $sp, 1312 - fst.d $fa0, $sp, 928 # 8-byte Folded Spill + fst.d $fa0, $sp, 992 # 8-byte Folded Spill fld.d $fa0, $sp, 1320 - fst.d $fa0, $sp, 920 # 8-byte Folded Spill + fst.d $fa0, $sp, 984 # 8-byte Folded Spill fld.d $fa0, $sp, 1328 - fst.d $fa0, $sp, 912 # 8-byte Folded Spill + fst.d $fa0, $sp, 976 # 8-byte Folded Spill fld.d $fa0, $sp, 1336 - fst.d $fa0, $sp, 904 # 8-byte Folded Spill + fst.d $fa0, $sp, 968 # 8-byte Folded Spill fld.d $fa0, $sp, 1344 - fst.d $fa0, $sp, 896 # 8-byte Folded Spill + fst.d $fa0, $sp, 960 # 8-byte Folded Spill fld.d $fa0, $sp, 1352 - fst.d $fa0, $sp, 888 # 8-byte Folded Spill + fst.d $fa0, $sp, 952 # 8-byte Folded Spill fld.d $fa0, $sp, 1360 - fst.d $fa0, $sp, 880 # 8-byte Folded Spill + fst.d $fa0, $sp, 944 # 8-byte Folded Spill fld.d $fa0, $sp, 1368 - fst.d $fa0, $sp, 872 # 8-byte Folded Spill + fst.d $fa0, $sp, 936 # 8-byte Folded Spill fld.d $fa0, $sp, 1376 - fst.d $fa0, $sp, 864 # 8-byte Folded Spill + fst.d $fa0, $sp, 928 # 8-byte Folded Spill fld.d $fa0, $sp, 1384 - fst.d $fa0, $sp, 856 # 8-byte Folded Spill + fst.d $fa0, $sp, 920 # 8-byte Folded Spill fld.d $fa0, $sp, 1392 - fst.d $fa0, $sp, 848 # 8-byte Folded Spill + fst.d $fa0, $sp, 912 # 8-byte Folded Spill fld.d $fa0, $sp, 1400 - fst.d $fa0, $sp, 840 # 8-byte Folded Spill + fst.d $fa0, $sp, 904 # 8-byte Folded Spill fld.d $fa0, $sp, 1408 - fst.d $fa0, $sp, 832 # 8-byte Folded Spill + fst.d $fa0, $sp, 896 # 8-byte Folded Spill fld.d $fa0, $sp, 1416 - fst.d $fa0, $sp, 824 # 8-byte Folded Spill + fst.d $fa0, $sp, 888 # 8-byte Folded Spill fld.d $fa0, $sp, 1424 - fst.d $fa0, $sp, 816 # 8-byte Folded Spill + fst.d $fa0, $sp, 880 # 8-byte Folded Spill fld.d $fa0, $sp, 1432 - fst.d $fa0, $sp, 808 # 8-byte Folded Spill + fst.d $fa0, $sp, 872 # 8-byte Folded Spill fld.d $fa0, $sp, 1440 - fst.d $fa0, $sp, 800 # 8-byte Folded Spill + fst.d $fa0, $sp, 864 # 8-byte Folded Spill fld.d $fa0, $sp, 1448 - fst.d $fa0, $sp, 792 # 8-byte Folded Spill + fst.d $fa0, $sp, 856 # 8-byte Folded Spill fld.d $fa0, $sp, 1456 - fst.d $fa0, $sp, 784 # 8-byte Folded Spill + fst.d $fa0, $sp, 848 # 8-byte Folded Spill fld.d $fa0, $sp, 1464 - fst.d $fa0, $sp, 776 # 8-byte Folded Spill + fst.d $fa0, $sp, 840 # 8-byte Folded Spill fld.d $fa0, $sp, 1472 - fst.d $fa0, $sp, 768 # 8-byte Folded Spill + fst.d $fa0, $sp, 832 # 8-byte Folded Spill fld.d $fa0, $sp, 1480 - fst.d $fa0, $sp, 760 # 8-byte Folded Spill + fst.d $fa0, $sp, 824 # 8-byte Folded Spill fld.d $fa0, $sp, 1488 - fst.d $fa0, $sp, 752 # 8-byte Folded Spill + fst.d $fa0, $sp, 816 # 8-byte Folded Spill fld.d $fa0, $sp, 1496 - fst.d $fa0, $sp, 744 # 8-byte Folded Spill + fst.d $fa0, $sp, 808 # 8-byte Folded Spill fld.d $fa0, $sp, 1504 - fst.d $fa0, $sp, 736 # 8-byte Folded Spill + fst.d $fa0, $sp, 800 # 8-byte Folded Spill fld.d $fa0, $sp, 1512 - fst.d $fa0, $sp, 728 # 8-byte Folded Spill + fst.d $fa0, $sp, 792 # 8-byte Folded Spill fld.d $fa0, $sp, 1520 - fst.d $fa0, $sp, 720 # 8-byte Folded Spill + fst.d $fa0, $sp, 784 # 8-byte Folded Spill fld.d $fa0, $sp, 1528 - fst.d $fa0, $sp, 712 # 8-byte Folded Spill + fst.d $fa0, $sp, 776 # 8-byte Folded Spill fld.d $fa0, $sp, 1536 - fst.d $fa0, $sp, 704 # 8-byte Folded Spill + fst.d $fa0, $sp, 768 # 8-byte Folded Spill fld.d $fa0, $sp, 1544 - fst.d $fa0, $sp, 696 # 8-byte Folded Spill + fst.d $fa0, $sp, 760 # 8-byte Folded Spill fld.d $fa0, $sp, 1552 - fst.d $fa0, $sp, 688 # 8-byte Folded Spill + fst.d $fa0, $sp, 752 # 8-byte Folded Spill fld.d $fa0, $sp, 1560 - fst.d $fa0, $sp, 680 # 8-byte Folded Spill + fst.d $fa0, $sp, 744 # 8-byte Folded Spill fld.d $fa0, $sp, 1568 - fst.d $fa0, $sp, 672 # 8-byte Folded Spill + fst.d $fa0, $sp, 736 # 8-byte Folded Spill fld.d $fa0, $sp, 1576 - fst.d $fa0, $sp, 664 # 8-byte Folded Spill + fst.d $fa0, $sp, 728 # 8-byte Folded Spill fld.d $fa0, $sp, 1584 - fst.d $fa0, $sp, 656 # 8-byte Folded Spill + fst.d $fa0, $sp, 720 # 8-byte Folded Spill fld.d $fa0, $sp, 1592 - fst.d $fa0, $sp, 648 # 8-byte Folded Spill + fst.d $fa0, $sp, 712 # 8-byte Folded Spill fld.d $fa0, $sp, 1600 - fst.d $fa0, $sp, 640 # 8-byte Folded Spill + fst.d $fa0, $sp, 704 # 8-byte Folded Spill fld.d $fa0, $sp, 1608 - fst.d $fa0, $sp, 632 # 8-byte Folded Spill + fst.d $fa0, $sp, 696 # 8-byte Folded Spill fld.d $fa0, $sp, 1616 - fst.d $fa0, $sp, 624 # 8-byte Folded Spill + fst.d $fa0, $sp, 688 # 8-byte Folded Spill fld.d $fa0, $sp, 1624 - fst.d $fa0, $sp, 616 # 8-byte Folded Spill + fst.d $fa0, $sp, 680 # 8-byte Folded Spill fld.d $fa0, $sp, 1632 - fst.d $fa0, $sp, 608 # 8-byte Folded Spill + fst.d $fa0, $sp, 672 # 8-byte Folded Spill fld.d $fa0, $sp, 1640 - fst.d $fa0, $sp, 600 # 8-byte Folded Spill + fst.d $fa0, $sp, 664 # 8-byte Folded Spill fld.d $fa0, $sp, 1648 - fst.d $fa0, $sp, 592 # 8-byte Folded Spill + fst.d $fa0, $sp, 656 # 8-byte Folded Spill fld.d $fa0, $sp, 1656 - fst.d $fa0, $sp, 584 # 8-byte Folded Spill + fst.d $fa0, $sp, 648 # 8-byte Folded Spill fld.d $fa0, $sp, 1664 - fst.d $fa0, $sp, 576 # 8-byte Folded Spill + fst.d $fa0, $sp, 640 # 8-byte Folded Spill fld.d $fa0, $sp, 1672 - fst.d $fa0, $sp, 568 # 8-byte Folded Spill + fst.d $fa0, $sp, 632 # 8-byte Folded Spill fld.d $fa0, $sp, 1680 - fst.d $fa0, $sp, 560 # 8-byte Folded Spill + fst.d $fa0, $sp, 624 # 8-byte Folded Spill fld.d $fa0, $sp, 1688 - fst.d $fa0, $sp, 552 # 8-byte Folded Spill + fst.d $fa0, $sp, 616 # 8-byte Folded Spill fld.d $fa0, $sp, 1696 - fst.d $fa0, $sp, 544 # 8-byte Folded Spill + fst.d $fa0, $sp, 608 # 8-byte Folded Spill fld.d $fa0, $sp, 1704 - fst.d $fa0, $sp, 536 # 8-byte Folded Spill + fst.d $fa0, $sp, 600 # 8-byte Folded Spill fld.d $fa0, $sp, 1712 - fst.d $fa0, $sp, 528 # 8-byte Folded Spill + fst.d $fa0, $sp, 592 # 8-byte Folded Spill fld.d $fa0, $sp, 1720 - fst.d $fa0, $sp, 520 # 8-byte Folded Spill + fst.d $fa0, $sp, 584 # 8-byte Folded Spill fld.d $fa0, $sp, 1728 - fst.d $fa0, $sp, 512 # 8-byte Folded Spill + fst.d $fa0, $sp, 576 # 8-byte Folded Spill fld.d $fa0, $sp, 1736 - fst.d $fa0, $sp, 504 # 8-byte Folded Spill + fst.d $fa0, $sp, 568 # 8-byte Folded Spill fld.d $fa0, $sp, 1744 - fst.d $fa0, $sp, 496 # 8-byte Folded Spill + fst.d $fa0, $sp, 560 # 8-byte Folded Spill fld.d $fa0, $sp, 1752 - fst.d $fa0, $sp, 488 # 8-byte Folded Spill + fst.d $fa0, $sp, 552 # 8-byte Folded Spill fld.d $fa0, $sp, 1760 - fst.d $fa0, $sp, 480 # 8-byte Folded Spill + fst.d $fa0, $sp, 544 # 8-byte Folded Spill fld.d $fa0, $sp, 1768 - fst.d $fa0, $sp, 472 # 8-byte Folded Spill + fst.d $fa0, $sp, 536 # 8-byte Folded Spill fld.d $fa0, $sp, 1776 - fst.d $fa0, $sp, 464 # 8-byte Folded Spill + fst.d $fa0, $sp, 528 # 8-byte Folded Spill fld.d $fa0, $sp, 1784 - fst.d $fa0, $sp, 456 # 8-byte Folded Spill + fst.d $fa0, $sp, 520 # 8-byte Folded Spill fld.d $fa0, $sp, 1792 - fst.d $fa0, $sp, 448 # 8-byte Folded Spill + fst.d $fa0, $sp, 512 # 8-byte Folded Spill fld.d $fa0, $sp, 1800 - fst.d $fa0, $sp, 440 # 8-byte Folded Spill + fst.d $fa0, $sp, 504 # 8-byte Folded Spill fld.d $fa0, $sp, 1808 - fst.d $fa0, $sp, 432 # 8-byte Folded Spill + fst.d $fa0, $sp, 496 # 8-byte Folded Spill fld.d $fa0, $sp, 1816 - fst.d $fa0, $sp, 424 # 8-byte Folded Spill + fst.d $fa0, $sp, 488 # 8-byte Folded Spill ori $s3, $zero, 4 - fst.d $fs3, $sp, 1040 # 8-byte Folded Spill - fst.d $fs3, $sp, 1016 # 8-byte Folded Spill - fst.d $fs3, $sp, 1008 # 8-byte Folded Spill - fst.d $fs3, $sp, 1000 # 8-byte Folded Spill - fst.d $fs3, $sp, 992 # 8-byte Folded Spill + fst.d $fs3, $sp, 1080 # 8-byte Folded Spill fst.d $fs3, $sp, 1056 # 8-byte Folded Spill fst.d $fs3, $sp, 1048 # 8-byte Folded Spill + fst.d $fs3, $sp, 1040 # 8-byte Folded Spill fst.d $fs3, $sp, 1032 # 8-byte Folded Spill - fst.d $fs3, $sp, 1024 # 8-byte Folded Spill - fst.d $fs3, $sp, 384 # 8-byte Folded Spill - fst.d $fs3, $sp, 376 # 8-byte Folded Spill - fst.d $fs3, $sp, 368 # 8-byte Folded Spill - fst.d $fs3, $sp, 360 # 8-byte Folded Spill - fst.d $fs3, $sp, 352 # 8-byte Folded Spill - fst.d $fs3, $sp, 344 # 8-byte Folded Spill - fst.d $fs3, $sp, 336 # 8-byte Folded Spill - fst.d $fs3, $sp, 328 # 8-byte Folded Spill - fst.d $fs3, $sp, 1104 # 8-byte Folded Spill + fst.d $fs3, $sp, 1096 # 8-byte Folded Spill fst.d $fs3, $sp, 1088 # 8-byte Folded Spill - fst.d $fs3, $sp, 1080 # 8-byte Folded Spill fst.d $fs3, $sp, 1072 # 8-byte Folded Spill fst.d $fs3, $sp, 1064 # 8-byte Folded Spill + fst.d $fs3, $sp, 440 # 8-byte Folded Spill + fst.d $fs3, $sp, 432 # 8-byte Folded Spill + fst.d $fs3, $sp, 424 # 8-byte Folded Spill + fst.d $fs3, $sp, 416 # 8-byte Folded Spill + fst.d $fs3, $sp, 408 # 8-byte Folded Spill + fst.d $fs3, $sp, 400 # 8-byte Folded Spill + fst.d $fs3, $sp, 392 # 8-byte Folded Spill + fst.d $fs3, $sp, 384 # 8-byte Folded Spill + fst.d $fs3, $sp, 176 # 8-byte Folded Spill + fmov.d $ft4, $fs3 + fmov.d $ft5, $fs3 + fmov.d $ft6, $fs3 + fmov.d $ft7, $fs3 fmov.d $ft8, $fs3 fmov.d $ft9, $fs3 fmov.d $ft10, $fs3 @@ -6064,34 +6039,34 @@ CACG: # @CACG fmov.d $fa6, $fs3 fmov.d $fa2, $fs3 vldi $vr24, -912 - fst.d $fs3, $sp, 112 # 8-byte Folded Spill + fst.d $fs3, $sp, 144 # 8-byte Folded Spill + fst.d $fs3, $sp, 240 # 8-byte Folded Spill + fst.d $fs3, $sp, 232 # 8-byte Folded Spill + fst.d $fs3, $sp, 224 # 8-byte Folded Spill + fst.d $fs3, $sp, 216 # 8-byte Folded Spill + fst.d $fs3, $sp, 208 # 8-byte Folded Spill fst.d $fs3, $sp, 200 # 8-byte Folded Spill fst.d $fs3, $sp, 192 # 8-byte Folded Spill fst.d $fs3, $sp, 184 # 8-byte Folded Spill - fst.d $fs3, $sp, 176 # 8-byte Folded Spill - fst.d $fs3, $sp, 168 # 8-byte Folded Spill - fst.d $fs3, $sp, 160 # 8-byte Folded Spill - fst.d $fs3, $sp, 152 # 8-byte Folded Spill - fst.d $fs3, $sp, 144 # 8-byte Folded Spill - fst.d $fs3, $sp, 224 # 8-byte Folded Spill - fst.d $fs3, $sp, 320 # 8-byte Folded Spill + fst.d $fs3, $sp, 264 # 8-byte Folded Spill + fst.d $fs3, $sp, 376 # 8-byte Folded Spill fmov.d $fs5, $fs3 - fst.d $fs3, $sp, 312 # 8-byte Folded Spill + fst.d $fs3, $sp, 368 # 8-byte Folded Spill fmov.d $fs7, $fs3 fmov.d $ft2, $fs3 fmov.d $ft1, $fs3 fmov.d $ft0, $fs3 fmov.d $ft3, $fs3 - fst.d $fs6, $sp, 392 # 8-byte Folded Spill + fst.d $fs6, $sp, 448 # 8-byte Folded Spill .p2align 4, , 16 .LBB3_6: # %.preheader242 # Parent Loop BB3_5 Depth=1 # => This Inner Loop Header: Depth=2 - vst $vr24, $sp, 400 # 16-byte Folded Spill - vst $vr23, $sp, 288 # 16-byte Folded Spill + vst $vr24, $sp, 464 # 16-byte Folded Spill + vst $vr23, $sp, 352 # 16-byte Folded Spill fst.d $ft12, $sp, 1112 # 8-byte Folded Spill fst.d $fs4, $sp, 1120 # 8-byte Folded Spill - fst.d $ft14, $sp, 1096 # 8-byte Folded Spill + fst.d $ft14, $sp, 1104 # 8-byte Folded Spill fst.d $fs1, $sp, 1128 # 8-byte Folded Spill fmadd.d $fa0, $fs0, $fs3, $fs3 fmadd.d $fa1, $fa2, $fs3, $fa0 @@ -6100,7 +6075,7 @@ CACG: # @CACG fadd.d $fa3, $fs0, $fs3 fmadd.d $fa3, $fa4, $fs3, $fa3 fmov.d $ft15, $fa4 - fst.d $fa4, $sp, 416 # 8-byte Folded Spill + fst.d $fa4, $sp, 480 # 8-byte Folded Spill fmadd.d $fa3, $fa6, $fs3, $fa3 fmadd.d $fa3, $fa7, $fs3, $fa3 fmadd.d $fa3, $fa5, $fs3, $fa3 @@ -6108,7 +6083,7 @@ CACG: # @CACG fmadd.d $fa3, $fs4, $fs3, $fa3 fmadd.d $fa3, $ft14, $fs3, $fa3 fmadd.d $fa3, $fs1, $fs3, $fa3 - fld.d $fa4, $sp, 1032 # 8-byte Folded Reload + fld.d $fa4, $sp, 1072 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $fs2, $fa3, $fa4 fmadd.d $fa3, $fa7, $fs3, $fa2 @@ -6121,7 +6096,7 @@ CACG: # @CACG fmadd.d $fa0, $fs4, $fs3, $fa0 fmadd.d $fa0, $ft14, $fs3, $fa0 fmadd.d $fa0, $fs1, $fs3, $fa0 - fld.d $fa4, $sp, 1048 # 8-byte Folded Reload + fld.d $fa4, $sp, 1088 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $fs0, $fa0, $fa4 fmadd.d $fa0, $ft12, $fs3, $fa3 @@ -6132,7 +6107,7 @@ CACG: # @CACG fmadd.d $fa1, $fs4, $fs3, $fa1 fmadd.d $fa1, $ft14, $fs3, $fa1 fmadd.d $fa1, $fs1, $fs3, $fa1 - fld.d $fa4, $sp, 1056 # 8-byte Folded Reload + fld.d $fa4, $sp, 1096 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $ft15, $fa1, $fa4 fmadd.d $fa1, $fs4, $fs3, $fa0 @@ -6143,15 +6118,15 @@ CACG: # @CACG fmadd.d $fa2, $fs4, $fs3, $fa2 fmadd.d $fa2, $ft14, $fs3, $fa2 fmadd.d $fa2, $fs1, $fs3, $fa2 - fld.d $fa4, $sp, 992 # 8-byte Folded Reload + fld.d $fa4, $sp, 1032 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $ft12, $fa2, $fa4 fmadd.d $fa2, $ft14, $fs3, $fa1 fmadd.d $fa2, $fs1, $fs3, $fa2 - fld.d $fa4, $sp, 1024 # 8-byte Folded Reload + fld.d $fa4, $sp, 1064 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $ft13, $fa2, $fa4 - fld.d $fa4, $sp, 1000 # 8-byte Folded Reload + fld.d $fa4, $sp, 1040 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 fadd.d $fs4, $fa2, $fa4 fld.d $fa2, $sp, 1112 # 8-byte Folded Reload @@ -6161,7 +6136,7 @@ CACG: # @CACG fmadd.d $fa2, $ft14, $fs3, $fa2 fld.d $fa3, $sp, 1128 # 8-byte Folded Reload fmadd.d $fa2, $fa3, $fs3, $fa2 - fld.d $fa3, $sp, 1008 # 8-byte Folded Reload + fld.d $fa3, $sp, 1048 # 8-byte Folded Reload fmul.d $fa3, $fa3, $fs3 fadd.d $fs1, $fa2, $fa3 ld.w $a0, $s1, 1312 @@ -6170,458 +6145,438 @@ CACG: # @CACG fmadd.d $fa0, $ft14, $fs3, $fa0 fld.d $fa2, $sp, 1128 # 8-byte Folded Reload fmadd.d $fa0, $fa2, $fs3, $fa0 - fld.d $fa2, $sp, 1016 # 8-byte Folded Reload + fld.d $fa2, $sp, 1056 # 8-byte Folded Reload fmul.d $fa2, $fa2, $fs3 fadd.d $ft14, $fa0, $fa2 addi.d $a0, $a0, 1 st.w $a0, $s1, 1312 - fld.d $fa0, $sp, 1096 # 8-byte Folded Reload + fld.d $fa0, $sp, 1104 # 8-byte Folded Reload fadd.d $fa0, $fa0, $fa1 fld.d $fa1, $sp, 1128 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs3, $fa0 - fld.d $fa1, $sp, 1040 # 8-byte Folded Reload + fld.d $fa1, $sp, 1080 # 8-byte Folded Reload fmul.d $fa1, $fa1, $fs3 fadd.d $fa2, $fa0, $fa1 fmadd.d $fa0, $fs6, $ft13, $fs3 - fld.d $fa1, $sp, 984 # 8-byte Folded Reload + fld.d $fa1, $sp, 344 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 976 # 8-byte Folded Reload + fld.d $fa1, $sp, 336 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 968 # 8-byte Folded Reload + fld.d $fa1, $sp, 1024 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 960 # 8-byte Folded Reload + fld.d $fa1, $sp, 328 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 280 # 8-byte Folded Reload + fld.d $fa1, $sp, 320 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 272 # 8-byte Folded Reload + fld.d $fa1, $sp, 312 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 264 # 8-byte Folded Reload + fld.d $fa1, $sp, 304 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 256 # 8-byte Folded Reload + fld.d $fa1, $sp, 296 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $ft3, $fs3 - fadd.d $ft4, $fa0, $fa1 - fld.d $fa0, $sp, 248 # 8-byte Folded Reload + fadd.d $fa0, $fa0, $fa1 + fst.d $fa0, $sp, 456 # 8-byte Folded Spill + fld.d $fa0, $sp, 288 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 240 # 8-byte Folded Reload + fld.d $fa1, $sp, 280 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 232 # 8-byte Folded Reload + fld.d $fa1, $sp, 272 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa3, $sp, 216 # 8-byte Folded Reload + fld.d $fa3, $sp, 256 # 8-byte Folded Reload fmadd.d $fa0, $fa3, $ft15, $fa0 - fld.d $fa4, $sp, 208 # 8-byte Folded Reload + fld.d $fa4, $sp, 248 # 8-byte Folded Reload fmadd.d $fa0, $fa4, $ft12, $fa0 - fld.d $fa1, $sp, 952 # 8-byte Folded Reload + fld.d $fa1, $sp, 1016 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 944 # 8-byte Folded Reload + fld.d $fa1, $sp, 1008 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 936 # 8-byte Folded Reload + fld.d $fa1, $sp, 1000 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 928 # 8-byte Folded Reload + fld.d $fa1, $sp, 992 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $ft0, $fs3 fadd.d $ft3, $fa0, $fa1 - fld.d $fa0, $sp, 920 # 8-byte Folded Reload + fld.d $fa0, $sp, 984 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 912 # 8-byte Folded Reload + fld.d $fa1, $sp, 976 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 904 # 8-byte Folded Reload + fld.d $fa1, $sp, 968 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 896 # 8-byte Folded Reload + fld.d $fa1, $sp, 960 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 888 # 8-byte Folded Reload + fld.d $fa1, $sp, 952 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 880 # 8-byte Folded Reload + fld.d $fa1, $sp, 944 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 872 # 8-byte Folded Reload + fld.d $fa1, $sp, 936 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 864 # 8-byte Folded Reload + fld.d $fa1, $sp, 928 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 856 # 8-byte Folded Reload + fld.d $fa1, $sp, 920 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $ft1, $fs3 fadd.d $ft0, $fa0, $fa1 - fld.d $fa0, $sp, 848 # 8-byte Folded Reload + fld.d $fa0, $sp, 912 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 840 # 8-byte Folded Reload + fld.d $fa1, $sp, 904 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 832 # 8-byte Folded Reload + fld.d $fa1, $sp, 896 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 824 # 8-byte Folded Reload + fld.d $fa1, $sp, 888 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 816 # 8-byte Folded Reload + fld.d $fa1, $sp, 880 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 808 # 8-byte Folded Reload + fld.d $fa1, $sp, 872 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 800 # 8-byte Folded Reload + fld.d $fa1, $sp, 864 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 792 # 8-byte Folded Reload + fld.d $fa1, $sp, 856 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 784 # 8-byte Folded Reload + fld.d $fa1, $sp, 848 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $ft2, $fs3 fadd.d $ft1, $fa0, $fa1 - fld.d $fa0, $sp, 776 # 8-byte Folded Reload + fld.d $fa0, $sp, 840 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 768 # 8-byte Folded Reload + fld.d $fa1, $sp, 832 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 760 # 8-byte Folded Reload + fld.d $fa1, $sp, 824 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 752 # 8-byte Folded Reload + fld.d $fa1, $sp, 816 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 744 # 8-byte Folded Reload + fld.d $fa1, $sp, 808 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 736 # 8-byte Folded Reload + fld.d $fa1, $sp, 800 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 728 # 8-byte Folded Reload + fld.d $fa1, $sp, 792 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 720 # 8-byte Folded Reload + fld.d $fa1, $sp, 784 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 712 # 8-byte Folded Reload + fld.d $fa1, $sp, 776 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $fs7, $fs3 fadd.d $ft2, $fa0, $fa1 - fld.d $fa0, $sp, 704 # 8-byte Folded Reload + fld.d $fa0, $sp, 768 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 696 # 8-byte Folded Reload + fld.d $fa1, $sp, 760 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 688 # 8-byte Folded Reload + fld.d $fa1, $sp, 752 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 680 # 8-byte Folded Reload + fld.d $fa1, $sp, 744 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 672 # 8-byte Folded Reload + fld.d $fa1, $sp, 736 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 664 # 8-byte Folded Reload + fld.d $fa1, $sp, 728 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 656 # 8-byte Folded Reload + fld.d $fa1, $sp, 720 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 648 # 8-byte Folded Reload + fld.d $fa1, $sp, 712 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 640 # 8-byte Folded Reload + fld.d $fa1, $sp, 704 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 - fld.d $fa1, $sp, 312 # 8-byte Folded Reload + fld.d $fa1, $sp, 368 # 8-byte Folded Reload fmul.d $fa1, $fa1, $fs3 fadd.d $fs7, $fa0, $fa1 - fld.d $fa0, $sp, 632 # 8-byte Folded Reload + fld.d $fa0, $sp, 696 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 624 # 8-byte Folded Reload + fld.d $fa1, $sp, 688 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 616 # 8-byte Folded Reload + fld.d $fa1, $sp, 680 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 608 # 8-byte Folded Reload + fld.d $fa1, $sp, 672 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 600 # 8-byte Folded Reload + fld.d $fa1, $sp, 664 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 592 # 8-byte Folded Reload + fld.d $fa1, $sp, 656 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 584 # 8-byte Folded Reload + fld.d $fa1, $sp, 648 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 576 # 8-byte Folded Reload + fld.d $fa1, $sp, 640 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 568 # 8-byte Folded Reload + fld.d $fa1, $sp, 632 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 fmul.d $fa1, $fs5, $fs3 fadd.d $fs6, $fa0, $fa1 - fld.d $fa0, $sp, 560 # 8-byte Folded Reload + fld.d $fa0, $sp, 624 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 - fld.d $fa1, $sp, 552 # 8-byte Folded Reload + fld.d $fa1, $sp, 616 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 544 # 8-byte Folded Reload + fld.d $fa1, $sp, 608 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 536 # 8-byte Folded Reload + fld.d $fa1, $sp, 600 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 - fld.d $fa1, $sp, 528 # 8-byte Folded Reload + fld.d $fa1, $sp, 592 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 520 # 8-byte Folded Reload + fld.d $fa1, $sp, 584 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 - fld.d $fa1, $sp, 512 # 8-byte Folded Reload + fld.d $fa1, $sp, 576 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 504 # 8-byte Folded Reload + fld.d $fa1, $sp, 568 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fa1, $sp, 496 # 8-byte Folded Reload + fld.d $fa1, $sp, 560 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 - fld.d $fa1, $sp, 320 # 8-byte Folded Reload + fld.d $fa1, $sp, 376 # 8-byte Folded Reload fmul.d $fa1, $fa1, $fs3 fadd.d $fs5, $fa0, $fa1 - fld.d $fa0, $sp, 488 # 8-byte Folded Reload - fst.d $ft13, $sp, 1024 # 8-byte Folded Spill + fst.d $ft13, $sp, 1064 # 8-byte Folded Spill + fld.d $fa0, $sp, 552 # 8-byte Folded Reload fmadd.d $fa0, $fa0, $ft13, $fs3 fld.d $ft13, $sp, 1128 # 8-byte Folded Reload - fld.d $fa1, $sp, 480 # 8-byte Folded Reload - fst.d $fs2, $sp, 1032 # 8-byte Folded Spill + fst.d $fs2, $sp, 1072 # 8-byte Folded Spill + fld.d $fa1, $sp, 544 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs2, $fa0 - fld.d $fa1, $sp, 472 # 8-byte Folded Reload - fst.d $fs0, $sp, 1048 # 8-byte Folded Spill + fst.d $fs0, $sp, 1088 # 8-byte Folded Spill + fld.d $fa1, $sp, 536 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs0, $fa0 - fld.d $fa1, $sp, 464 # 8-byte Folded Reload - fst.d $ft15, $sp, 1056 # 8-byte Folded Spill + fst.d $ft15, $sp, 1096 # 8-byte Folded Spill + fld.d $fa1, $sp, 528 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft15, $fa0 fld.d $ft15, $sp, 1112 # 8-byte Folded Reload - fld.d $fa1, $sp, 456 # 8-byte Folded Reload - fst.d $ft12, $sp, 992 # 8-byte Folded Spill + fst.d $ft12, $sp, 1032 # 8-byte Folded Spill + fld.d $fa1, $sp, 520 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft12, $fa0 - fld.d $fa1, $sp, 448 # 8-byte Folded Reload - fst.d $fs4, $sp, 1000 # 8-byte Folded Spill + fst.d $fs4, $sp, 1040 # 8-byte Folded Spill + fld.d $fa1, $sp, 512 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs4, $fa0 fld.d $fs4, $sp, 1120 # 8-byte Folded Reload - fld.d $fa1, $sp, 440 # 8-byte Folded Reload - fst.d $fs1, $sp, 1008 # 8-byte Folded Spill + fst.d $fs1, $sp, 1048 # 8-byte Folded Spill + fld.d $fa1, $sp, 504 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fs1, $fa0 - fld.d $fa1, $sp, 432 # 8-byte Folded Reload - fst.d $ft14, $sp, 1016 # 8-byte Folded Spill + fst.d $ft14, $sp, 1056 # 8-byte Folded Spill + fld.d $fa1, $sp, 496 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $ft14, $fa0 - fld.d $fs2, $sp, 1096 # 8-byte Folded Reload - fld.d $fa1, $sp, 424 # 8-byte Folded Reload - fst.d $fa2, $sp, 1040 # 8-byte Folded Spill + fld.d $fs2, $sp, 1104 # 8-byte Folded Reload + fst.d $fa2, $sp, 1080 # 8-byte Folded Spill + fld.d $fa1, $sp, 488 # 8-byte Folded Reload fmadd.d $fa0, $fa1, $fa2, $fa0 - fld.d $fa1, $sp, 224 # 8-byte Folded Reload + fld.d $fa1, $sp, 264 # 8-byte Folded Reload fmul.d $fa1, $fa1, $fs3 fadd.d $fa1, $fa0, $fa1 - vld $vr0, $sp, 400 # 16-byte Folded Reload - fst.d $ft4, $sp, 88 # 8-byte Folded Spill - fmadd.d $fa0, $fa0, $ft4, $fs3 - fld.d $fa2, $sp, 416 # 8-byte Folded Reload - fst.d $ft3, $sp, 64 # 8-byte Folded Spill + vld $vr0, $sp, 464 # 16-byte Folded Reload + fld.d $fa2, $sp, 456 # 8-byte Folded Reload + fmadd.d $fa0, $fa0, $fa2, $fs3 + fst.d $ft3, $sp, 104 # 8-byte Folded Spill + fld.d $fa2, $sp, 480 # 8-byte Folded Reload fmadd.d $fa0, $fa2, $ft3, $fa0 - fst.d $fa6, $sp, 120 # 8-byte Folded Spill - fst.d $ft0, $sp, 72 # 8-byte Folded Spill + fst.d $fa6, $sp, 152 # 8-byte Folded Spill + fst.d $ft0, $sp, 112 # 8-byte Folded Spill fmadd.d $fa0, $fa6, $ft0, $fa0 - fst.d $fa7, $sp, 128 # 8-byte Folded Spill - fst.d $ft1, $sp, 96 # 8-byte Folded Spill + fst.d $fa7, $sp, 160 # 8-byte Folded Spill + fst.d $ft1, $sp, 128 # 8-byte Folded Spill fmadd.d $fa0, $fa7, $ft1, $fa0 - fst.d $fa5, $sp, 136 # 8-byte Folded Spill - fst.d $ft2, $sp, 104 # 8-byte Folded Spill + fst.d $fa5, $sp, 168 # 8-byte Folded Spill + fst.d $ft2, $sp, 136 # 8-byte Folded Spill fmadd.d $fa0, $fa5, $ft2, $fa0 - fst.d $fs7, $sp, 312 # 8-byte Folded Spill + fst.d $fs7, $sp, 368 # 8-byte Folded Spill fmadd.d $fa0, $ft15, $fs7, $fa0 - fst.d $fs6, $sp, 80 # 8-byte Folded Spill + fst.d $fs6, $sp, 120 # 8-byte Folded Spill fmadd.d $fa0, $fs4, $fs6, $fa0 - fst.d $fs5, $sp, 320 # 8-byte Folded Spill + fst.d $fs5, $sp, 376 # 8-byte Folded Spill fmadd.d $fa0, $fs2, $fs5, $fa0 fmadd.d $fa0, $ft13, $fa1, $fa0 fcmp.ceq.d $fcc0, $fa0, $fs3 ori $s4, $zero, 1 bcnez $fcc0, .LBB3_16 # %bb.7: # in Loop: Header=BB3_6 Depth=2 - fst.d $fa1, $sp, 224 # 8-byte Folded Spill - fld.d $fa1, $sp, 1104 # 8-byte Folded Reload - fst.d $fa1, $sp, 1104 # 8-byte Folded Spill - fld.d $fa1, $sp, 392 # 8-byte Folded Reload + fst.d $fa1, $sp, 264 # 8-byte Folded Spill + fld.d $fa1, $sp, 448 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fs3 - fld.d $fa2, $sp, 984 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 976 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 968 # 8-byte Folded Reload + fld.d $fs2, $sp, 344 # 8-byte Folded Reload + fmadd.d $fa1, $fs2, $ft10, $fa1 + fld.d $ft15, $sp, 336 # 8-byte Folded Reload + fmadd.d $fa1, $ft15, $ft9, $fa1 + fld.d $fa2, $sp, 1024 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 960 # 8-byte Folded Reload - fld.d $ft7, $sp, 1064 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft7, $fa1 - vld $vr11, $sp, 288 # 16-byte Folded Reload - fld.d $fs2, $sp, 280 # 8-byte Folded Reload - fmadd.d $fa1, $fs2, $ft3, $fa1 - fld.d $fs1, $sp, 272 # 8-byte Folded Reload - fld.d $ft6, $sp, 1072 # 8-byte Folded Reload + fld.d $ft14, $sp, 328 # 8-byte Folded Reload + fmadd.d $fa1, $ft14, $ft7, $fa1 + vld $vr11, $sp, 352 # 16-byte Folded Reload + fld.d $ft13, $sp, 320 # 8-byte Folded Reload + fmadd.d $fa1, $ft13, $ft3, $fa1 + fld.d $fs1, $sp, 312 # 8-byte Folded Reload fmadd.d $fa1, $fs1, $ft6, $fa1 - fld.d $fs4, $sp, 264 # 8-byte Folded Reload - fld.d $ft5, $sp, 1080 # 8-byte Folded Reload + fld.d $fs4, $sp, 304 # 8-byte Folded Reload fmadd.d $fa1, $fs4, $ft5, $fa1 - fld.d $ft15, $sp, 256 # 8-byte Folded Reload - fld.d $ft4, $sp, 1088 # 8-byte Folded Reload - fmadd.d $fa1, $ft15, $ft4, $fa1 - fld.d $fa2, $sp, 144 # 8-byte Folded Reload + fld.d $ft12, $sp, 296 # 8-byte Folded Reload + fmadd.d $fa1, $ft12, $ft4, $fa1 + fld.d $fa2, $sp, 184 # 8-byte Folded Reload fmul.d $fa2, $fa2, $fs3 - fadd.d $ft14, $fa1, $fa2 - fld.d $fs5, $sp, 248 # 8-byte Folded Reload + fadd.d $fa1, $fa1, $fa2 + fld.d $fs5, $sp, 288 # 8-byte Folded Reload fmadd.d $fa2, $fs5, $ft11, $fs3 - fld.d $fs6, $sp, 240 # 8-byte Folded Reload + fld.d $fs6, $sp, 280 # 8-byte Folded Reload fmadd.d $fa2, $fs6, $ft10, $fa2 - fld.d $fs7, $sp, 232 # 8-byte Folded Reload + fld.d $fs7, $sp, 272 # 8-byte Folded Reload fmadd.d $fa2, $fs7, $ft9, $fa2 fmadd.d $fa2, $fa3, $ft8, $fa2 fmadd.d $fa2, $fa4, $ft7, $fa2 - fld.d $fa5, $sp, 952 # 8-byte Folded Reload + fld.d $fa5, $sp, 1016 # 8-byte Folded Reload fmadd.d $fa2, $fa5, $ft3, $fa2 - fld.d $fa5, $sp, 944 # 8-byte Folded Reload + fld.d $fa5, $sp, 1008 # 8-byte Folded Reload fmadd.d $fa2, $fa5, $ft6, $fa2 - fld.d $fa5, $sp, 936 # 8-byte Folded Reload + fld.d $fa5, $sp, 1000 # 8-byte Folded Reload fmadd.d $fa2, $fa5, $ft5, $fa2 - fld.d $fa5, $sp, 928 # 8-byte Folded Reload + fld.d $fa5, $sp, 992 # 8-byte Folded Reload fmadd.d $fa2, $fa5, $ft4, $fa2 - fld.d $fa3, $sp, 152 # 8-byte Folded Reload + fld.d $fa3, $sp, 192 # 8-byte Folded Reload fmul.d $fa3, $fa3, $fs3 - fadd.d $ft13, $fa2, $fa3 - fld.d $fa3, $sp, 920 # 8-byte Folded Reload + fadd.d $fa2, $fa2, $fa3 + fld.d $fa3, $sp, 984 # 8-byte Folded Reload fmadd.d $fa3, $fa3, $ft11, $fs3 - fld.d $fa5, $sp, 912 # 8-byte Folded Reload + fld.d $fa5, $sp, 976 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft10, $fa3 - fld.d $fa5, $sp, 904 # 8-byte Folded Reload + fld.d $fa5, $sp, 968 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft9, $fa3 - fld.d $fa5, $sp, 896 # 8-byte Folded Reload + fld.d $fa5, $sp, 960 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft8, $fa3 - fld.d $fa5, $sp, 888 # 8-byte Folded Reload + fld.d $fa5, $sp, 952 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft7, $fa3 - fld.d $fa5, $sp, 880 # 8-byte Folded Reload + fld.d $fa5, $sp, 944 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft3, $fa3 - fld.d $fa5, $sp, 872 # 8-byte Folded Reload + fld.d $fa5, $sp, 936 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft6, $fa3 - fld.d $fa5, $sp, 864 # 8-byte Folded Reload + fld.d $fa5, $sp, 928 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft5, $fa3 - fld.d $fa5, $sp, 856 # 8-byte Folded Reload + fld.d $fa5, $sp, 920 # 8-byte Folded Reload fmadd.d $fa3, $fa5, $ft4, $fa3 - fld.d $fa4, $sp, 160 # 8-byte Folded Reload + fld.d $fa4, $sp, 200 # 8-byte Folded Reload fmul.d $fa4, $fa4, $fs3 - fadd.d $ft12, $fa3, $fa4 - fld.d $fa4, $sp, 848 # 8-byte Folded Reload + fadd.d $fa3, $fa3, $fa4 + fld.d $fa4, $sp, 912 # 8-byte Folded Reload fmadd.d $fa4, $fa4, $ft11, $fs3 - fld.d $fa5, $sp, 840 # 8-byte Folded Reload + fld.d $fa5, $sp, 904 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft10, $fa4 - fld.d $fa5, $sp, 832 # 8-byte Folded Reload + fld.d $fa5, $sp, 896 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft9, $fa4 - fld.d $fa5, $sp, 824 # 8-byte Folded Reload + fld.d $fa5, $sp, 888 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft8, $fa4 - fld.d $fa5, $sp, 816 # 8-byte Folded Reload + fld.d $fa5, $sp, 880 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft7, $fa4 - fld.d $fa5, $sp, 808 # 8-byte Folded Reload + fld.d $fa5, $sp, 872 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft3, $fa4 - fld.d $fa5, $sp, 800 # 8-byte Folded Reload + fld.d $fa5, $sp, 864 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft6, $fa4 - fld.d $fa5, $sp, 792 # 8-byte Folded Reload + fld.d $fa5, $sp, 856 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft5, $fa4 - fld.d $fa5, $sp, 784 # 8-byte Folded Reload + fld.d $fa5, $sp, 848 # 8-byte Folded Reload fmadd.d $fa4, $fa5, $ft4, $fa4 - fld.d $fa5, $sp, 168 # 8-byte Folded Reload + fld.d $fa5, $sp, 208 # 8-byte Folded Reload fmul.d $fa5, $fa5, $fs3 - fadd.d $fa1, $fa4, $fa5 - fld.d $fa5, $sp, 776 # 8-byte Folded Reload + fadd.d $fa4, $fa4, $fa5 + fld.d $fa5, $sp, 840 # 8-byte Folded Reload fmadd.d $fa5, $fa5, $ft11, $fs3 - fld.d $fa6, $sp, 768 # 8-byte Folded Reload + fld.d $fa6, $sp, 832 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft10, $fa5 - fld.d $fa6, $sp, 760 # 8-byte Folded Reload + fld.d $fa6, $sp, 824 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft9, $fa5 - fld.d $fa6, $sp, 752 # 8-byte Folded Reload + fld.d $fa6, $sp, 816 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft8, $fa5 - fld.d $fa6, $sp, 744 # 8-byte Folded Reload + fld.d $fa6, $sp, 808 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft7, $fa5 - fld.d $fa6, $sp, 736 # 8-byte Folded Reload + fld.d $fa6, $sp, 800 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft3, $fa5 - fld.d $fa6, $sp, 728 # 8-byte Folded Reload + fld.d $fa6, $sp, 792 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft6, $fa5 - fld.d $fa6, $sp, 720 # 8-byte Folded Reload + fld.d $fa6, $sp, 784 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft5, $fa5 - fld.d $fa6, $sp, 712 # 8-byte Folded Reload + fld.d $fa6, $sp, 776 # 8-byte Folded Reload fmadd.d $fa5, $fa6, $ft4, $fa5 - fld.d $fa6, $sp, 176 # 8-byte Folded Reload + fld.d $fa6, $sp, 216 # 8-byte Folded Reload fmul.d $fa6, $fa6, $fs3 - fst.d $fa0, $sp, 176 # 8-byte Folded Spill - fadd.d $fa0, $fa5, $fa6 - fld.d $fa6, $sp, 704 # 8-byte Folded Reload + fadd.d $fa5, $fa5, $fa6 + fld.d $fa6, $sp, 768 # 8-byte Folded Reload fmadd.d $fa6, $fa6, $ft11, $fs3 - fld.d $fa7, $sp, 696 # 8-byte Folded Reload + fld.d $fa7, $sp, 760 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft10, $fa6 - fld.d $fa7, $sp, 688 # 8-byte Folded Reload + fld.d $fa7, $sp, 752 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft9, $fa6 - fld.d $fa7, $sp, 680 # 8-byte Folded Reload + fld.d $fa7, $sp, 744 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft8, $fa6 - fld.d $fa7, $sp, 672 # 8-byte Folded Reload + fld.d $fa7, $sp, 736 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft7, $fa6 - fld.d $fa7, $sp, 664 # 8-byte Folded Reload + fld.d $fa7, $sp, 728 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft3, $fa6 - fld.d $fa7, $sp, 656 # 8-byte Folded Reload + fld.d $fa7, $sp, 720 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft6, $fa6 - fld.d $fa7, $sp, 648 # 8-byte Folded Reload + fld.d $fa7, $sp, 712 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft5, $fa6 - fld.d $fa7, $sp, 640 # 8-byte Folded Reload + fld.d $fa7, $sp, 704 # 8-byte Folded Reload fmadd.d $fa6, $fa7, $ft4, $fa6 - fld.d $fa7, $sp, 184 # 8-byte Folded Reload + fld.d $fa7, $sp, 224 # 8-byte Folded Reload fmul.d $fa7, $fa7, $fs3 fadd.d $fa6, $fa6, $fa7 - fld.d $fa7, $sp, 632 # 8-byte Folded Reload + fld.d $fa7, $sp, 696 # 8-byte Folded Reload fmadd.d $fa7, $fa7, $ft11, $fs3 - fld.d $ft0, $sp, 624 # 8-byte Folded Reload + fld.d $ft0, $sp, 688 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft10, $fa7 - fld.d $ft0, $sp, 616 # 8-byte Folded Reload + fld.d $ft0, $sp, 680 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft9, $fa7 - fld.d $ft0, $sp, 608 # 8-byte Folded Reload + fld.d $ft0, $sp, 672 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft8, $fa7 - fld.d $ft0, $sp, 600 # 8-byte Folded Reload + fld.d $ft0, $sp, 664 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft7, $fa7 - fld.d $ft0, $sp, 592 # 8-byte Folded Reload + fld.d $ft0, $sp, 656 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft3, $fa7 - fld.d $ft0, $sp, 584 # 8-byte Folded Reload + fld.d $ft0, $sp, 648 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft6, $fa7 - fld.d $ft0, $sp, 576 # 8-byte Folded Reload + fld.d $ft0, $sp, 640 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft5, $fa7 - fld.d $ft0, $sp, 568 # 8-byte Folded Reload + fld.d $ft0, $sp, 632 # 8-byte Folded Reload fmadd.d $fa7, $ft0, $ft4, $fa7 - fld.d $ft0, $sp, 192 # 8-byte Folded Reload + fld.d $ft0, $sp, 232 # 8-byte Folded Reload fmul.d $ft0, $ft0, $fs3 - fadd.d $fs0, $fa7, $ft0 - fld.d $ft0, $sp, 560 # 8-byte Folded Reload + fadd.d $fa7, $fa7, $ft0 + fld.d $ft0, $sp, 624 # 8-byte Folded Reload fmadd.d $ft0, $ft0, $ft11, $fs3 - fld.d $ft1, $sp, 552 # 8-byte Folded Reload + fld.d $ft1, $sp, 616 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft10, $ft0 - fld.d $ft1, $sp, 544 # 8-byte Folded Reload + fld.d $ft1, $sp, 608 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft9, $ft0 - fld.d $ft1, $sp, 536 # 8-byte Folded Reload + fld.d $ft1, $sp, 600 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft8, $ft0 - fld.d $ft1, $sp, 528 # 8-byte Folded Reload + fld.d $ft1, $sp, 592 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft7, $ft0 - fld.d $ft1, $sp, 520 # 8-byte Folded Reload + fld.d $ft1, $sp, 584 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft3, $ft0 - fld.d $ft1, $sp, 512 # 8-byte Folded Reload + fld.d $ft1, $sp, 576 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft6, $ft0 - fld.d $ft1, $sp, 504 # 8-byte Folded Reload + fld.d $ft1, $sp, 568 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft5, $ft0 - fld.d $ft1, $sp, 496 # 8-byte Folded Reload + fld.d $ft1, $sp, 560 # 8-byte Folded Reload fmadd.d $ft0, $ft1, $ft4, $ft0 - fld.d $ft1, $sp, 200 # 8-byte Folded Reload + fld.d $ft1, $sp, 240 # 8-byte Folded Reload fmul.d $ft1, $ft1, $fs3 fadd.d $ft0, $ft0, $ft1 - fld.d $ft1, $sp, 488 # 8-byte Folded Reload + fld.d $ft1, $sp, 552 # 8-byte Folded Reload fmadd.d $ft1, $ft1, $ft11, $fs3 - fld.d $ft2, $sp, 480 # 8-byte Folded Reload + fld.d $ft2, $sp, 544 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft10, $ft1 - fld.d $ft2, $sp, 472 # 8-byte Folded Reload + fld.d $ft2, $sp, 536 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft9, $ft1 - fld.d $ft2, $sp, 464 # 8-byte Folded Reload + fld.d $ft2, $sp, 528 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft8, $ft1 - fld.d $ft2, $sp, 456 # 8-byte Folded Reload + fld.d $ft2, $sp, 520 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft7, $ft1 - fld.d $ft2, $sp, 448 # 8-byte Folded Reload + fld.d $ft2, $sp, 512 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft3, $ft1 - fld.d $ft2, $sp, 440 # 8-byte Folded Reload + fld.d $ft2, $sp, 504 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft6, $ft1 - fld.d $ft2, $sp, 432 # 8-byte Folded Reload + fld.d $ft2, $sp, 496 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft5, $ft1 - fld.d $ft2, $sp, 424 # 8-byte Folded Reload + fld.d $ft2, $sp, 488 # 8-byte Folded Reload fmadd.d $ft1, $ft2, $ft4, $ft1 - fld.d $ft2, $sp, 112 # 8-byte Folded Reload + fld.d $ft2, $sp, 144 # 8-byte Folded Reload fmul.d $ft2, $ft2, $fs3 - fadd.d $fa7, $ft1, $ft2 - fmov.d $fa2, $ft14 - fmadd.d $ft2, $ft11, $ft14, $fs3 - fmov.d $fa3, $ft13 - fmadd.d $ft2, $ft10, $ft13, $ft2 - fmov.d $fa4, $ft12 - fmadd.d $ft2, $ft9, $ft12, $ft2 - fmov.d $fa5, $fa1 - fmadd.d $ft2, $ft8, $fa1, $ft2 - fmov.d $ft1, $fa0 - fmadd.d $ft2, $ft7, $fa0, $ft2 - fst.d $fa6, $sp, 200 # 8-byte Folded Spill + fadd.d $ft1, $ft1, $ft2 + fmadd.d $ft2, $ft11, $fa1, $fs3 + fmadd.d $ft2, $ft10, $fa2, $ft2 + fmadd.d $ft2, $ft9, $fa3, $ft2 + fmadd.d $ft2, $ft8, $fa4, $ft2 + fmadd.d $ft2, $ft7, $fa5, $ft2 fmadd.d $ft2, $ft3, $fa6, $ft2 - fst.d $fs0, $sp, 192 # 8-byte Folded Spill - fmadd.d $ft2, $ft6, $fs0, $ft2 + fmadd.d $ft2, $ft6, $fa7, $ft2 fmadd.d $ft2, $ft5, $ft0, $ft2 - fmadd.d $ft2, $ft4, $fa7, $ft2 - fld.d $ft14, $sp, 960 # 8-byte Folded Reload - fmov.d $ft13, $fs2 - fmov.d $ft12, $ft15 - fld.d $fa1, $sp, 968 # 8-byte Folded Reload - fld.d $ft15, $sp, 976 # 8-byte Folded Reload - fld.d $fs2, $sp, 984 # 8-byte Folded Reload - fld.d $fa0, $sp, 176 # 8-byte Folded Reload + fmadd.d $ft2, $ft4, $ft1, $ft2 fdiv.d $fs0, $ft2, $fa0 fclass.d $fa0, $fs0 movfr2gr.d $a0, $fa0 @@ -6631,228 +6586,222 @@ CACG: # @CACG bnez $a0, .LBB3_17 # %bb.8: # %.lr.ph.i216.preheader # in Loop: Header=BB3_6 Depth=2 - fmov.d $fa6, $ft0 - fst.d $ft2, $sp, 56 # 8-byte Folded Spill - fld.d $fa0, $sp, 1024 # 8-byte Folded Reload + fst.d $ft2, $sp, 96 # 8-byte Folded Spill + fld.d $fa0, $sp, 1064 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft11, $ft11, $fa0 - fld.d $fa0, $sp, 1032 # 8-byte Folded Reload + fld.d $fa0, $sp, 1072 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft10, $ft10, $fa0 - fld.d $fa0, $sp, 1048 # 8-byte Folded Reload + fld.d $fa0, $sp, 1088 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft9, $ft9, $fa0 - fld.d $fa0, $sp, 1056 # 8-byte Folded Reload + fld.d $fa0, $sp, 1096 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft8, $ft8, $fa0 - fld.d $fa0, $sp, 992 # 8-byte Folded Reload + fld.d $fa0, $sp, 1032 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 - fsub.d $ft0, $ft7, $fa0 - fld.d $fa0, $sp, 1000 # 8-byte Folded Reload + fsub.d $ft7, $ft7, $fa0 + fld.d $fa0, $sp, 1040 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft3, $ft3, $fa0 - fld.d $fa0, $sp, 1008 # 8-byte Folded Reload + fld.d $fa0, $sp, 1048 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft6, $ft6, $fa0 - fld.d $fa0, $sp, 1016 # 8-byte Folded Reload + fld.d $fa0, $sp, 1056 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft5, $ft5, $fa0 - fld.d $fa0, $sp, 1040 # 8-byte Folded Reload + fld.d $fa0, $sp, 1080 # 8-byte Folded Reload fmul.d $fa0, $fs0, $fa0 fsub.d $ft4, $ft4, $fa0 movgr2fr.d $fa0, $zero - fld.d $ft2, $sp, 392 # 8-byte Folded Reload + fld.d $ft2, $sp, 448 # 8-byte Folded Reload fmadd.d $ft2, $ft2, $ft11, $fa0 fmadd.d $ft2, $fs2, $ft10, $ft2 fmadd.d $ft2, $ft15, $ft9, $ft2 - fmadd.d $ft2, $fa1, $ft8, $ft2 - fmadd.d $ft2, $ft14, $ft0, $ft2 + fld.d $ft15, $sp, 1024 # 8-byte Folded Reload + fmadd.d $ft2, $ft15, $ft8, $ft2 + fmadd.d $ft2, $ft14, $ft7, $ft2 fmadd.d $ft2, $ft13, $ft3, $ft2 fmadd.d $ft2, $fs1, $ft6, $ft2 fmadd.d $ft2, $fs4, $ft5, $ft2 fmadd.d $ft2, $ft12, $ft4, $ft2 - fmul.d $fa1, $fa2, $fa0 + fmul.d $fa1, $fa1, $fa0 fadd.d $fs1, $ft2, $fa1 fmadd.d $fa1, $fs5, $ft11, $fa0 fmadd.d $fa1, $fs6, $ft10, $fa1 fmadd.d $fa1, $fs7, $ft9, $fa1 - fld.d $fa2, $sp, 216 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 208 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $ft2, $sp, 952 # 8-byte Folded Reload + fld.d $ft2, $sp, 256 # 8-byte Folded Reload + fmadd.d $fa1, $ft2, $ft8, $fa1 + fld.d $ft2, $sp, 248 # 8-byte Folded Reload + fmadd.d $fa1, $ft2, $ft7, $fa1 + fld.d $ft2, $sp, 1016 # 8-byte Folded Reload fmadd.d $fa1, $ft2, $ft3, $fa1 - fld.d $ft2, $sp, 944 # 8-byte Folded Reload + fld.d $ft2, $sp, 1008 # 8-byte Folded Reload fmadd.d $fa1, $ft2, $ft6, $fa1 - fld.d $ft2, $sp, 936 # 8-byte Folded Reload + fld.d $ft2, $sp, 1000 # 8-byte Folded Reload fmadd.d $fa1, $ft2, $ft5, $fa1 - fld.d $ft2, $sp, 928 # 8-byte Folded Reload + fld.d $ft2, $sp, 992 # 8-byte Folded Reload fmadd.d $fa1, $ft2, $ft4, $fa1 - fmul.d $fa2, $fa3, $fa0 + fmul.d $fa2, $fa2, $fa0 fadd.d $ft14, $fa1, $fa2 - fld.d $fa1, $sp, 920 # 8-byte Folded Reload + fld.d $fa1, $sp, 984 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 912 # 8-byte Folded Reload + fld.d $fa2, $sp, 976 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 904 # 8-byte Folded Reload + fld.d $fa2, $sp, 968 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 896 # 8-byte Folded Reload + fld.d $fa2, $sp, 960 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 888 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 880 # 8-byte Folded Reload + fld.d $fa2, $sp, 952 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 944 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 872 # 8-byte Folded Reload + fld.d $fa2, $sp, 936 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 864 # 8-byte Folded Reload + fld.d $fa2, $sp, 928 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 856 # 8-byte Folded Reload + fld.d $fa2, $sp, 920 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fmul.d $fa2, $fa4, $fa0 + fmul.d $fa2, $fa3, $fa0 fadd.d $ft13, $fa1, $fa2 - fld.d $fa1, $sp, 848 # 8-byte Folded Reload + fld.d $fa1, $sp, 912 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 840 # 8-byte Folded Reload + fld.d $fa2, $sp, 904 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 832 # 8-byte Folded Reload + fld.d $fa2, $sp, 896 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 824 # 8-byte Folded Reload + fld.d $fa2, $sp, 888 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 816 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 808 # 8-byte Folded Reload + fld.d $fa2, $sp, 880 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 872 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 800 # 8-byte Folded Reload + fld.d $fa2, $sp, 864 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 792 # 8-byte Folded Reload + fld.d $fa2, $sp, 856 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 784 # 8-byte Folded Reload + fld.d $fa2, $sp, 848 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fmul.d $fa2, $fa5, $fa0 + fmul.d $fa2, $fa4, $fa0 fadd.d $ft12, $fa1, $fa2 - fld.d $fa1, $sp, 776 # 8-byte Folded Reload + fld.d $fa1, $sp, 840 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 768 # 8-byte Folded Reload + fld.d $fa2, $sp, 832 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 760 # 8-byte Folded Reload + fld.d $fa2, $sp, 824 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 752 # 8-byte Folded Reload + fld.d $fa2, $sp, 816 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 744 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 736 # 8-byte Folded Reload + fld.d $fa2, $sp, 808 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 800 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 728 # 8-byte Folded Reload + fld.d $fa2, $sp, 792 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 720 # 8-byte Folded Reload + fld.d $fa2, $sp, 784 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 712 # 8-byte Folded Reload + fld.d $fa2, $sp, 776 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fmul.d $fa2, $ft1, $fa0 + fmul.d $fa2, $fa5, $fa0 fadd.d $ft2, $fa1, $fa2 - fld.d $fa1, $sp, 704 # 8-byte Folded Reload + fld.d $fa1, $sp, 768 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 696 # 8-byte Folded Reload + fld.d $fa2, $sp, 760 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 688 # 8-byte Folded Reload + fld.d $fa2, $sp, 752 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 680 # 8-byte Folded Reload + fld.d $fa2, $sp, 744 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 672 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 664 # 8-byte Folded Reload + fld.d $fa2, $sp, 736 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 728 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 656 # 8-byte Folded Reload + fld.d $fa2, $sp, 720 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 648 # 8-byte Folded Reload + fld.d $fa2, $sp, 712 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 640 # 8-byte Folded Reload + fld.d $fa2, $sp, 704 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fld.d $fa2, $sp, 200 # 8-byte Folded Reload - fmul.d $fa2, $fa2, $fa0 + fmul.d $fa2, $fa6, $fa0 fadd.d $fa5, $fa1, $fa2 - fld.d $fa1, $sp, 632 # 8-byte Folded Reload + fld.d $fa1, $sp, 696 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 624 # 8-byte Folded Reload + fld.d $fa2, $sp, 688 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 616 # 8-byte Folded Reload + fld.d $fa2, $sp, 680 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 608 # 8-byte Folded Reload + fld.d $fa2, $sp, 672 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 600 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 592 # 8-byte Folded Reload + fld.d $fa2, $sp, 664 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 656 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 584 # 8-byte Folded Reload + fld.d $fa2, $sp, 648 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 576 # 8-byte Folded Reload + fld.d $fa2, $sp, 640 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 568 # 8-byte Folded Reload + fld.d $fa2, $sp, 632 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fld.d $fa2, $sp, 192 # 8-byte Folded Reload - fmul.d $fa2, $fa2, $fa0 + fmul.d $fa2, $fa7, $fa0 fadd.d $fa4, $fa1, $fa2 - fld.d $fa1, $sp, 560 # 8-byte Folded Reload + fld.d $fa1, $sp, 624 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 552 # 8-byte Folded Reload + fld.d $fa2, $sp, 616 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 544 # 8-byte Folded Reload + fld.d $fa2, $sp, 608 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 536 # 8-byte Folded Reload + fld.d $fa2, $sp, 600 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 528 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 520 # 8-byte Folded Reload + fld.d $fa2, $sp, 592 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 584 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 512 # 8-byte Folded Reload + fld.d $fa2, $sp, 576 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 504 # 8-byte Folded Reload + fld.d $fa2, $sp, 568 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 496 # 8-byte Folded Reload + fld.d $fa2, $sp, 560 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fmul.d $fa2, $fa6, $fa0 + fmul.d $fa2, $ft0, $fa0 fadd.d $fa3, $fa1, $fa2 - fld.d $fa1, $sp, 488 # 8-byte Folded Reload + fld.d $fa1, $sp, 552 # 8-byte Folded Reload fmadd.d $fa1, $fa1, $ft11, $fa0 - fld.d $fa2, $sp, 480 # 8-byte Folded Reload + fld.d $fa2, $sp, 544 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft10, $fa1 - fld.d $fa2, $sp, 472 # 8-byte Folded Reload + fld.d $fa2, $sp, 536 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft9, $fa1 - fld.d $fa2, $sp, 464 # 8-byte Folded Reload + fld.d $fa2, $sp, 528 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft8, $fa1 - fld.d $fa2, $sp, 456 # 8-byte Folded Reload - fmadd.d $fa1, $fa2, $ft0, $fa1 - fld.d $fa2, $sp, 448 # 8-byte Folded Reload + fld.d $fa2, $sp, 520 # 8-byte Folded Reload + fmadd.d $fa1, $fa2, $ft7, $fa1 + fld.d $fa2, $sp, 512 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft3, $fa1 - fld.d $fa2, $sp, 440 # 8-byte Folded Reload + fld.d $fa2, $sp, 504 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft6, $fa1 - fld.d $fa2, $sp, 432 # 8-byte Folded Reload + fld.d $fa2, $sp, 496 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft5, $fa1 - fld.d $fa2, $sp, 424 # 8-byte Folded Reload + fld.d $fa2, $sp, 488 # 8-byte Folded Reload fmadd.d $fa1, $fa2, $ft4, $fa1 - fmul.d $fa2, $fa7, $fa0 + fmul.d $fa2, $ft1, $fa0 fadd.d $ft15, $fa1, $fa2 - fst.d $fs1, $sp, 144 # 8-byte Folded Spill + fst.d $fs1, $sp, 184 # 8-byte Folded Spill fmadd.d $fa1, $ft11, $fs1, $fa0 - fst.d $ft14, $sp, 152 # 8-byte Folded Spill + fst.d $ft14, $sp, 192 # 8-byte Folded Spill fmadd.d $fa1, $ft10, $ft14, $fa1 - fst.d $ft13, $sp, 160 # 8-byte Folded Spill + fst.d $ft13, $sp, 200 # 8-byte Folded Spill fmadd.d $fa1, $ft9, $ft13, $fa1 - fst.d $ft12, $sp, 168 # 8-byte Folded Spill + fst.d $ft12, $sp, 208 # 8-byte Folded Spill fmadd.d $fa1, $ft8, $ft12, $fa1 - fst.d $ft2, $sp, 176 # 8-byte Folded Spill - fst.d $ft0, $sp, 1064 # 8-byte Folded Spill - fmadd.d $fa1, $ft0, $ft2, $fa1 + fst.d $ft2, $sp, 216 # 8-byte Folded Spill + fmadd.d $fa1, $ft7, $ft2, $fa1 vori.b $vr20, $vr11, 0 - fst.d $fa5, $sp, 184 # 8-byte Folded Spill + fst.d $fa5, $sp, 224 # 8-byte Folded Spill fmadd.d $fa1, $ft3, $fa5, $fa1 - fst.d $fa4, $sp, 192 # 8-byte Folded Spill - fst.d $ft6, $sp, 1072 # 8-byte Folded Spill + fst.d $fa4, $sp, 232 # 8-byte Folded Spill fmadd.d $fa1, $ft6, $fa4, $fa1 - fst.d $fa3, $sp, 200 # 8-byte Folded Spill - fst.d $ft5, $sp, 1080 # 8-byte Folded Spill + fst.d $fa3, $sp, 240 # 8-byte Folded Spill fmadd.d $fa1, $ft5, $fa3, $fa1 - fst.d $ft4, $sp, 1088 # 8-byte Folded Spill fmadd.d $fs2, $ft4, $ft15, $fa1 fcmp.cule.d $fcc0, $fs2, $fa0 bcnez $fcc0, .LBB3_10 @@ -6861,65 +6810,65 @@ CACG: # @CACG fcmp.cor.d $fcc0, $fa0, $fa0 bceqz $fcc0, .LBB3_14 .LBB3_10: # in Loop: Header=BB3_6 Depth=2 - vld $vr7, $sp, 400 # 16-byte Folded Reload + vld $vr7, $sp, 464 # 16-byte Folded Reload fmul.d $fa1, $fs0, $fa7 - fld.d $ft14, $sp, 1104 # 8-byte Folded Reload + fld.d $ft14, $sp, 176 # 8-byte Folded Reload fadd.d $ft14, $ft14, $fa1 - fld.d $fa6, $sp, 416 # 8-byte Folded Reload + fld.d $fa6, $sp, 480 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fa6 - fld.d $fa2, $sp, 328 # 8-byte Folded Reload + fld.d $fa2, $sp, 384 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fst.d $fa2, $sp, 328 # 8-byte Folded Spill - fld.d $fa5, $sp, 120 # 8-byte Folded Reload + fst.d $fa2, $sp, 384 # 8-byte Folded Spill + fld.d $fa5, $sp, 152 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fa5 - fld.d $fa2, $sp, 336 # 8-byte Folded Reload + fld.d $fa2, $sp, 392 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fst.d $fa2, $sp, 336 # 8-byte Folded Spill - fld.d $fa4, $sp, 128 # 8-byte Folded Reload + fst.d $fa2, $sp, 392 # 8-byte Folded Spill + fld.d $fa4, $sp, 160 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fa4 - fld.d $fa2, $sp, 344 # 8-byte Folded Reload + fld.d $fa2, $sp, 400 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fst.d $fa2, $sp, 344 # 8-byte Folded Spill - fld.d $fa3, $sp, 136 # 8-byte Folded Reload + fst.d $fa2, $sp, 400 # 8-byte Folded Spill + fld.d $fa3, $sp, 168 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fa3 - fld.d $fa2, $sp, 352 # 8-byte Folded Reload + fld.d $fa2, $sp, 408 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fst.d $fa2, $sp, 352 # 8-byte Folded Spill + fst.d $fa2, $sp, 408 # 8-byte Folded Spill fld.d $fs5, $sp, 1112 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fs5 - fld.d $fa2, $sp, 360 # 8-byte Folded Reload + fld.d $fa2, $sp, 416 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fst.d $fa2, $sp, 360 # 8-byte Folded Spill + fst.d $fa2, $sp, 416 # 8-byte Folded Spill fld.d $fs4, $sp, 1120 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fs4 - fld.d $ft1, $sp, 368 # 8-byte Folded Reload + fld.d $ft1, $sp, 424 # 8-byte Folded Reload fadd.d $ft1, $ft1, $fa1 - fld.d $ft13, $sp, 1096 # 8-byte Folded Reload + fld.d $ft13, $sp, 1104 # 8-byte Folded Reload fmul.d $fa1, $fs0, $ft13 - fld.d $ft0, $sp, 376 # 8-byte Folded Reload + fld.d $ft0, $sp, 432 # 8-byte Folded Reload fadd.d $ft0, $ft0, $fa1 fld.d $fs1, $sp, 1128 # 8-byte Folded Reload fmul.d $fa1, $fs0, $fs1 - fld.d $fa2, $sp, 48 # 8-byte Folded Reload + fld.d $fa2, $sp, 88 # 8-byte Folded Reload fcmp.clt.d $fcc0, $fa0, $fa2 - fld.d $fa2, $sp, 384 # 8-byte Folded Reload + fld.d $fa2, $sp, 440 # 8-byte Folded Reload fadd.d $fa2, $fa2, $fa1 - fld.d $fs7, $sp, 104 # 8-byte Folded Reload - fld.d $ft2, $sp, 96 # 8-byte Folded Reload - fld.d $ft3, $sp, 88 # 8-byte Folded Reload - fst.d $fa2, $sp, 384 # 8-byte Folded Spill - fst.d $ft0, $sp, 376 # 8-byte Folded Spill - fst.d $ft1, $sp, 368 # 8-byte Folded Spill + fld.d $fs7, $sp, 136 # 8-byte Folded Reload + fld.d $ft2, $sp, 128 # 8-byte Folded Reload + fld.d $ft3, $sp, 456 # 8-byte Folded Reload + fst.d $fa2, $sp, 440 # 8-byte Folded Spill + fst.d $ft0, $sp, 432 # 8-byte Folded Spill + fst.d $ft1, $sp, 424 # 8-byte Folded Spill bcnez $fcc0, .LBB3_19 # %bb.11: # in Loop: Header=BB3_6 Depth=2 - fst.d $ft15, $sp, 112 # 8-byte Folded Spill + fst.d $ft15, $sp, 144 # 8-byte Folded Spill movgr2fr.d $fa0, $zero fcmp.ceq.d $fcc0, $fs2, $fa0 ori $s4, $zero, 1 vori.b $vr23, $vr20, 0 bcnez $fcc0, .LBB3_15 # %bb.12: # in Loop: Header=BB3_6 Depth=2 - fld.d $fa0, $sp, 56 # 8-byte Folded Reload + fld.d $fa0, $sp, 96 # 8-byte Folded Reload fdiv.d $fa0, $fs2, $fa0 fclass.d $fa1, $fa0 movfr2gr.d $a0, $fa1 @@ -6929,7 +6878,7 @@ CACG: # @CACG bnez $a0, .LBB3_15 # %bb.13: # %.lr.ph.i231.preheader # in Loop: Header=BB3_6 Depth=2 - fst.d $ft14, $sp, 1104 # 8-byte Folded Spill + fst.d $ft14, $sp, 176 # 8-byte Folded Spill fmul.d $fa1, $fa0, $fa7 fadd.d $fs0, $ft11, $fa1 fmul.d $fa1, $fa0, $fa6 @@ -6939,85 +6888,81 @@ CACG: # @CACG fmul.d $fa1, $fa0, $fa4 fadd.d $fa7, $ft8, $fa1 fmul.d $fa1, $fa0, $fa3 - fld.d $fa3, $sp, 1064 # 8-byte Folded Reload - fadd.d $fa5, $fa3, $fa1 + fadd.d $fa5, $ft7, $fa1 fmul.d $fa1, $fa0, $fs5 fadd.d $ft12, $ft15, $fa1 fmul.d $fa1, $fa0, $fs4 - fld.d $fa3, $sp, 1072 # 8-byte Folded Reload - fadd.d $fs4, $fa3, $fa1 + fadd.d $fs4, $ft6, $fa1 fmul.d $fa1, $fa0, $ft13 - fld.d $fa3, $sp, 1080 # 8-byte Folded Reload - fadd.d $ft14, $fa3, $fa1 + fadd.d $ft14, $ft5, $fa1 fmul.d $fa0, $fa0, $fs1 addi.w $s3, $s3, -1 - fld.d $fa1, $sp, 1088 # 8-byte Folded Reload - fadd.d $fs1, $fa1, $fa0 - fld.d $fs6, $sp, 392 # 8-byte Folded Reload - fld.d $fs5, $sp, 80 # 8-byte Folded Reload - fld.d $ft1, $sp, 72 # 8-byte Folded Reload - fld.d $ft0, $sp, 64 # 8-byte Folded Reload + fadd.d $fs1, $ft4, $fa0 + fld.d $fs6, $sp, 448 # 8-byte Folded Reload + fld.d $fs5, $sp, 120 # 8-byte Folded Reload + fld.d $ft1, $sp, 112 # 8-byte Folded Reload + fld.d $ft0, $sp, 104 # 8-byte Folded Reload bnez $s3, .LBB3_6 b .LBB3_20 .LBB3_14: # %call.sqrt1004 # in Loop: Header=BB3_6 Depth=2 fmov.d $fa0, $fs2 - vst $vr20, $sp, 288 # 16-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft10, $sp, 16 # 8-byte Folded Spill - fst.d $ft11, $sp, 8 # 8-byte Folded Spill + vst $vr20, $sp, 352 # 16-byte Folded Spill + fst.d $ft4, $sp, 144 # 8-byte Folded Spill + fst.d $ft5, $sp, 80 # 8-byte Folded Spill + fst.d $ft6, $sp, 72 # 8-byte Folded Spill + fst.d $ft7, $sp, 64 # 8-byte Folded Spill + fst.d $ft8, $sp, 56 # 8-byte Folded Spill + fst.d $ft9, $sp, 48 # 8-byte Folded Spill + fst.d $ft10, $sp, 24 # 8-byte Folded Spill + fst.d $ft11, $sp, 16 # 8-byte Folded Spill fmov.d $fs1, $ft15 pcaddu18i $ra, %call36(sqrt) jirl $ra, $ra, 0 fmov.d $ft15, $fs1 - fld.d $ft11, $sp, 8 # 8-byte Folded Reload - fld.d $ft10, $sp, 16 # 8-byte Folded Reload - fld.d $ft9, $sp, 40 # 8-byte Folded Reload - fld.d $ft8, $sp, 112 # 8-byte Folded Reload - vld $vr20, $sp, 288 # 16-byte Folded Reload + fld.d $ft11, $sp, 16 # 8-byte Folded Reload + fld.d $ft10, $sp, 24 # 8-byte Folded Reload + fld.d $ft9, $sp, 48 # 8-byte Folded Reload + fld.d $ft8, $sp, 56 # 8-byte Folded Reload + fld.d $ft7, $sp, 64 # 8-byte Folded Reload + fld.d $ft6, $sp, 72 # 8-byte Folded Reload + fld.d $ft5, $sp, 80 # 8-byte Folded Reload + fld.d $ft4, $sp, 144 # 8-byte Folded Reload + vld $vr20, $sp, 352 # 16-byte Folded Reload b .LBB3_10 .p2align 4, , 16 .LBB3_15: # in Loop: Header=BB3_5 Depth=1 fmov.d $fs2, $ft13 fmov.d $fs0, $ft11 fmov.d $fs7, $ft10 - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - vst $vr23, $sp, 288 # 16-byte Folded Spill + fst.d $ft9, $sp, 48 # 8-byte Folded Spill + fst.d $ft8, $sp, 56 # 8-byte Folded Spill + fst.d $ft7, $sp, 64 # 8-byte Folded Spill + fst.d $ft6, $sp, 72 # 8-byte Folded Spill + fst.d $ft5, $sp, 80 # 8-byte Folded Spill + fst.d $ft4, $sp, 144 # 8-byte Folded Spill + vst $vr23, $sp, 352 # 16-byte Folded Spill move $s3, $zero ori $s5, $zero, 1 b .LBB3_22 .LBB3_16: # in Loop: Header=BB3_5 Depth=1 fmov.d $fs5, $ft15 fmov.d $fs1, $ft13 - fmov.d $fs0, $ft11 - fmov.d $fs7, $ft10 - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - fld.d $fa0, $sp, 1064 # 8-byte Folded Reload - fst.d $fa0, $sp, 1064 # 8-byte Folded Spill - fld.d $fa0, $sp, 1072 # 8-byte Folded Reload - fst.d $fa0, $sp, 1072 # 8-byte Folded Spill - fld.d $fa0, $sp, 1080 # 8-byte Folded Reload - fst.d $fa0, $sp, 1080 # 8-byte Folded Spill - fld.d $fa0, $sp, 1088 # 8-byte Folded Reload - fst.d $fa0, $sp, 1088 # 8-byte Folded Spill b .LBB3_18 .LBB3_17: # in Loop: Header=BB3_5 Depth=1 fld.d $fs5, $sp, 1112 # 8-byte Folded Reload fld.d $fs4, $sp, 1120 # 8-byte Folded Reload - fld.d $fs2, $sp, 1096 # 8-byte Folded Reload + fld.d $fs2, $sp, 1104 # 8-byte Folded Reload fld.d $fs1, $sp, 1128 # 8-byte Folded Reload +.LBB3_18: # in Loop: Header=BB3_5 Depth=1 fmov.d $fs0, $ft11 fmov.d $fs7, $ft10 - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - fst.d $ft7, $sp, 1064 # 8-byte Folded Spill - fst.d $ft6, $sp, 1072 # 8-byte Folded Spill - fst.d $ft5, $sp, 1080 # 8-byte Folded Spill - fst.d $ft4, $sp, 1088 # 8-byte Folded Spill -.LBB3_18: # in Loop: Header=BB3_5 Depth=1 + fst.d $ft9, $sp, 48 # 8-byte Folded Spill + fst.d $ft8, $sp, 56 # 8-byte Folded Spill + fst.d $ft7, $sp, 64 # 8-byte Folded Spill + fst.d $ft6, $sp, 72 # 8-byte Folded Spill + fst.d $ft5, $sp, 80 # 8-byte Folded Spill + fst.d $ft4, $sp, 144 # 8-byte Folded Spill move $s3, $zero ori $s5, $zero, 1 b .LBB3_21 @@ -7025,31 +6970,39 @@ CACG: # @CACG fmov.d $fs2, $ft13 fmov.d $fs0, $ft11 fmov.d $fs7, $ft10 - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - vst $vr20, $sp, 288 # 16-byte Folded Spill + fst.d $ft9, $sp, 48 # 8-byte Folded Spill + fst.d $ft8, $sp, 56 # 8-byte Folded Spill + fst.d $ft7, $sp, 64 # 8-byte Folded Spill + fst.d $ft6, $sp, 72 # 8-byte Folded Spill + fst.d $ft5, $sp, 80 # 8-byte Folded Spill + fst.d $ft4, $sp, 144 # 8-byte Folded Spill + vst $vr20, $sp, 352 # 16-byte Folded Spill move $s4, $zero ori $s3, $zero, 1 ori $s5, $zero, 1 b .LBB3_22 .LBB3_20: # in Loop: Header=BB3_5 Depth=1 - vst $vr24, $sp, 400 # 16-byte Folded Spill - fst.d $fa2, $sp, 416 # 8-byte Folded Spill - fst.d $fa6, $sp, 120 # 8-byte Folded Spill - fst.d $fa7, $sp, 128 # 8-byte Folded Spill - fst.d $fa5, $sp, 136 # 8-byte Folded Spill + vst $vr24, $sp, 464 # 16-byte Folded Spill + fst.d $fa2, $sp, 480 # 8-byte Folded Spill + fst.d $fa6, $sp, 152 # 8-byte Folded Spill + fst.d $fa7, $sp, 160 # 8-byte Folded Spill + fst.d $fa5, $sp, 168 # 8-byte Folded Spill fmov.d $fs5, $ft12 fmov.d $fs2, $ft14 fmov.d $fs0, $ft11 fmov.d $fs7, $ft10 - fst.d $ft9, $sp, 40 # 8-byte Folded Spill - fst.d $ft8, $sp, 112 # 8-byte Folded Spill - vst $vr23, $sp, 288 # 16-byte Folded Spill + fst.d $ft9, $sp, 48 # 8-byte Folded Spill + fst.d $ft8, $sp, 56 # 8-byte Folded Spill + fst.d $ft7, $sp, 64 # 8-byte Folded Spill + fst.d $ft6, $sp, 72 # 8-byte Folded Spill + fst.d $ft5, $sp, 80 # 8-byte Folded Spill + fst.d $ft4, $sp, 144 # 8-byte Folded Spill + vst $vr23, $sp, 352 # 16-byte Folded Spill move $s5, $zero ori $s4, $zero, 1 ori $s3, $zero, 1 .LBB3_21: # in Loop: Header=BB3_5 Depth=1 - fld.d $ft14, $sp, 1104 # 8-byte Folded Reload + fld.d $ft14, $sp, 176 # 8-byte Folded Reload .LBB3_22: # in Loop: Header=BB3_5 Depth=1 ld.w $a4, $sp, 1136 vldi $vr0, -912 @@ -7066,7 +7019,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 328 # 8-byte Folded Reload + fld.d $fa1, $sp, 384 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1144 @@ -7075,7 +7028,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 336 # 8-byte Folded Reload + fld.d $fa1, $sp, 392 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1148 @@ -7084,7 +7037,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 344 # 8-byte Folded Reload + fld.d $fa1, $sp, 400 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1152 @@ -7093,7 +7046,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 352 # 8-byte Folded Reload + fld.d $fa1, $sp, 408 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1156 @@ -7102,7 +7055,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 360 # 8-byte Folded Reload + fld.d $fa1, $sp, 416 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1160 @@ -7111,7 +7064,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 368 # 8-byte Folded Reload + fld.d $fa1, $sp, 424 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1164 @@ -7120,7 +7073,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 376 # 8-byte Folded Reload + fld.d $fa1, $sp, 432 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1168 @@ -7129,7 +7082,7 @@ CACG: # @CACG move $a1, $s0 move $a2, $fp move $a3, $fp - fld.d $fa1, $sp, 384 # 8-byte Folded Reload + fld.d $fa1, $sp, 440 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 bnez $s5, .LBB3_4 @@ -7142,7 +7095,7 @@ CACG: # @CACG move $a0, $s1 move $a1, $s0 fmov.d $fa0, $fs6 - vld $vr1, $sp, 400 # 16-byte Folded Reload + vld $vr1, $sp, 464 # 16-byte Folded Reload # kill: def $f1_64 killed $f1_64 killed $vr1 pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 @@ -7152,7 +7105,7 @@ CACG: # @CACG ori $a3, $zero, 14 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 416 # 8-byte Folded Reload + fld.d $fa1, $sp, 480 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1144 @@ -7161,7 +7114,7 @@ CACG: # @CACG ori $a3, $zero, 14 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 120 # 8-byte Folded Reload + fld.d $fa1, $sp, 152 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1148 @@ -7170,7 +7123,7 @@ CACG: # @CACG ori $a3, $zero, 14 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 128 # 8-byte Folded Reload + fld.d $fa1, $sp, 160 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1152 @@ -7179,7 +7132,7 @@ CACG: # @CACG ori $a3, $zero, 14 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 136 # 8-byte Folded Reload + fld.d $fa1, $sp, 168 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1156 @@ -7242,7 +7195,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 40 # 8-byte Folded Reload + fld.d $fa1, $sp, 48 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1148 @@ -7251,7 +7204,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 112 # 8-byte Folded Reload + fld.d $fa1, $sp, 56 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1152 @@ -7260,7 +7213,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 1064 # 8-byte Folded Reload + fld.d $fa1, $sp, 64 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1156 @@ -7269,7 +7222,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - vld $vr1, $sp, 288 # 16-byte Folded Reload + vld $vr1, $sp, 352 # 16-byte Folded Reload # kill: def $f1_64 killed $f1_64 killed $vr1 pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 @@ -7279,7 +7232,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 1072 # 8-byte Folded Reload + fld.d $fa1, $sp, 72 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1164 @@ -7288,7 +7241,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 1080 # 8-byte Folded Reload + fld.d $fa1, $sp, 80 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 ld.w $a4, $sp, 1168 @@ -7297,7 +7250,7 @@ CACG: # @CACG ori $a3, $zero, 13 move $a0, $s1 move $a1, $s0 - fld.d $fa1, $sp, 1088 # 8-byte Folded Reload + fld.d $fa1, $sp, 144 # 8-byte Folded Reload pcaddu18i $ra, %call36(add_grids) jirl $ra, $ra, 0 b .LBB3_4 diff --git a/results/MultiSource/Benchmarks/FreeBench/fourinarow/CMakeFiles/fourinarow.dir/fourinarow.s b/results/MultiSource/Benchmarks/FreeBench/fourinarow/CMakeFiles/fourinarow.dir/fourinarow.s index 7683998a..1aad75fb 100644 --- a/results/MultiSource/Benchmarks/FreeBench/fourinarow/CMakeFiles/fourinarow.dir/fourinarow.s +++ b/results/MultiSource/Benchmarks/FreeBench/fourinarow/CMakeFiles/fourinarow.dir/fourinarow.s @@ -2042,6 +2042,11 @@ value: # @value slli.d $a0, $t6, 14 st.d $a0, $sp, 16 # 8-byte Folded Spill ori $a0, $zero, 1 + ld.d $t4, $sp, 1600 # 8-byte Folded Reload + ld.d $t3, $sp, 1568 # 8-byte Folded Reload + ld.d $fp, $sp, 1560 # 8-byte Folded Reload + ld.d $s0, $sp, 1552 # 8-byte Folded Reload + ld.d $s1, $sp, 1544 # 8-byte Folded Reload .p2align 4, , 16 .LBB7_1: # %.preheader164.preheader # =>This Inner Loop Header: Depth=1 @@ -2220,7 +2225,6 @@ value: # @value masknez $a0, $a0, $a1 maskeqz $a1, $a2, $a1 or $a0, $a1, $a0 - ld.d $t4, $sp, 1600 # 8-byte Folded Reload andn $a1, $t4, $a4 sltui $a1, $a1, 1 movgr2fr.w $fa7, $a0 @@ -2242,7 +2246,6 @@ value: # @value masknez $a0, $a0, $a1 maskeqz $a1, $a2, $a1 or $a0, $a1, $a0 - ld.d $t3, $sp, 1568 # 8-byte Folded Reload andn $a1, $t3, $a4 sltui $a1, $a1, 1 movgr2fr.w $fa7, $a0 @@ -2253,7 +2256,6 @@ value: # @value masknez $a0, $a0, $a1 maskeqz $a1, $a2, $a1 or $a0, $a1, $a0 - ld.d $fp, $sp, 1560 # 8-byte Folded Reload andn $a1, $fp, $a4 sltui $a1, $a1, 1 movgr2fr.w $fa7, $a0 @@ -2264,7 +2266,6 @@ value: # @value masknez $a0, $a0, $a1 maskeqz $a1, $a2, $a1 or $a0, $a1, $a0 - ld.d $s0, $sp, 1552 # 8-byte Folded Reload andn $a1, $s0, $a4 sltui $a1, $a1, 1 movgr2fr.w $fa7, $a0 @@ -2275,7 +2276,6 @@ value: # @value masknez $a0, $a0, $a1 maskeqz $a1, $a2, $a1 or $a0, $a1, $a0 - ld.d $s1, $sp, 1544 # 8-byte Folded Reload andn $a1, $s1, $a4 sltui $a1, $a1, 1 movgr2fr.w $fa7, $a0 diff --git a/results/MultiSource/Benchmarks/MallocBench/cfrac/CMakeFiles/cfrac.dir/pcfrac.s b/results/MultiSource/Benchmarks/MallocBench/cfrac/CMakeFiles/cfrac.dir/pcfrac.s index ee02d4c2..9244ace3 100644 --- a/results/MultiSource/Benchmarks/MallocBench/cfrac/CMakeFiles/cfrac.dir/pcfrac.s +++ b/results/MultiSource/Benchmarks/MallocBench/cfrac/CMakeFiles/cfrac.dir/pcfrac.s @@ -1296,8 +1296,8 @@ getEas: # @getEas pcaddu18i $ra, %call36(exp) jirl $ra, $ra, 0 fmov.d $fs1, $fa0 - vld $vr0, $sp, 48 # 16-byte Folded Reload vldi $vr1, -928 + vld $vr0, $sp, 48 # 16-byte Folded Reload fmul.d $fa1, $fa0, $fa1 fmov.d $fa0, $fs0 pcaddu18i $ra, %call36(pow) diff --git a/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/expand.s b/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/expand.s index bb09fb89..ee16ebf6 100644 --- a/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/expand.s +++ b/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/expand.s @@ -1442,6 +1442,7 @@ select_feasible: # @select_feasible move $s1, $zero alsl.d $a1, $a1, $a0, 2 slli.d $a2, $a2, 2 + ld.d $a5, $sp, 96 # 8-byte Folded Reload b .LBB7_3 .p2align 4, , 16 .LBB7_2: # in Loop: Header=BB7_3 Depth=1 @@ -1454,7 +1455,6 @@ select_feasible: # @select_feasible # %bb.4: # in Loop: Header=BB7_3 Depth=1 slli.d $a3, $s1, 3 addi.w $s1, $s1, 1 - ld.d $a5, $sp, 96 # 8-byte Folded Reload stx.d $a0, $a5, $a3 b .LBB7_2 .LBB7_5: diff --git a/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s b/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s index 35d0d6d6..144dfa28 100644 --- a/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s +++ b/results/MultiSource/Benchmarks/MallocBench/espresso/CMakeFiles/espresso.dir/pair.s @@ -453,9 +453,9 @@ set_pair1: # @set_pair1 addi.d $s3, $a0, %pc_lo12(.L.str.1) move $fp, $zero move $s8, $zero + ld.d $s1, $sp, 40 # 8-byte Folded Reload .p2align 4, , 16 .LBB1_81: # =>This Inner Loop Header: Depth=1 - ld.d $s1, $sp, 40 # 8-byte Folded Reload ld.d $a0, $s1, 8 ldx.w $a0, $a0, $fp ld.d $a1, $s1, 16 diff --git a/results/MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/iscan.s b/results/MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/iscan.s index 850635d8..843eb003 100644 --- a/results/MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/iscan.s +++ b/results/MultiSource/Benchmarks/MallocBench/gs/CMakeFiles/gs.dir/iscan.s @@ -588,8 +588,6 @@ scan_token: # @scan_token b .LBB2_51 .LBB2_48: # in Loop: Header=BB2_3 Depth=1 move $s2, $a0 - ld.d $a0, $sp, 64 # 8-byte Folded Reload - st.d $a0, $sp, 64 # 8-byte Folded Spill bltu $s7, $fp, .LBB2_50 # %bb.49: # in Loop: Header=BB2_3 Depth=1 addi.w $a1, $s1, 0 diff --git a/results/MultiSource/Benchmarks/MiBench/automotive-susan/CMakeFiles/automotive-susan.dir/susan.s b/results/MultiSource/Benchmarks/MiBench/automotive-susan/CMakeFiles/automotive-susan.dir/susan.s index 275cb147..b5ab29b4 100644 --- a/results/MultiSource/Benchmarks/MiBench/automotive-susan/CMakeFiles/automotive-susan.dir/susan.s +++ b/results/MultiSource/Benchmarks/MiBench/automotive-susan/CMakeFiles/automotive-susan.dir/susan.s @@ -4064,8 +4064,8 @@ susan_edges: # @susan_edges add.d $a2, $a2, $s3 add.d $a2, $a2, $s5 add.d $a6, $a2, $a6 - ld.d $a2, $sp, 248 # 8-byte Folded Reload st.d $t3, $sp, 136 # 8-byte Folded Spill + ld.d $a2, $sp, 248 # 8-byte Folded Reload alsl.d $a2, $a2, $t3, 2 ld.d $t3, $sp, 192 # 8-byte Folded Reload move $fp, $a7 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s index 995da378..7bc475ae 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/formatBitstream.s @@ -224,6 +224,7 @@ BF_BitstreamFrame: # @BF_BitstreamFrame move $s2, $zero move $s8, $zero addi.d $s1, $s0, 48 + ld.d $s6, $sp, 64 # 8-byte Folded Reload .p2align 4, , 16 .LBB1_18: # %.preheader180.us.i # =>This Loop Header: Depth=1 @@ -231,7 +232,6 @@ BF_BitstreamFrame: # @BF_BitstreamFrame move $fp, $a3 move $s7, $s2 ld.d $s0, $sp, 96 # 8-byte Folded Reload - ld.d $s6, $sp, 64 # 8-byte Folded Reload .p2align 4, , 16 .LBB1_19: # Parent Loop BB1_18 Depth=1 # => This Inner Loop Header: Depth=2 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s index 6ab6609b..c5d744f9 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/layer3.s @@ -6452,6 +6452,7 @@ III_dequantize_sample: # @III_dequantize_sample .LBB4_107: ori $a0, $zero, 3 ori $a1, $zero, 1 + ld.d $a4, $sp, 88 # 8-byte Folded Reload b .LBB4_109 .p2align 4, , 16 .LBB4_108: # in Loop: Header=BB4_109 Depth=1 @@ -6469,7 +6470,6 @@ III_dequantize_sample: # @III_dequantize_sample ld.w $a2, $t5, 4 ld.w $a3, $t5, 8 ld.w $s4, $t5, 0 - ld.d $a4, $sp, 88 # 8-byte Folded Reload alsl.d $s2, $a2, $a4, 3 addi.d $a2, $a3, -3 sltui $a2, $a2, 1 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s index 567bebba..e586d3f3 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-lame/CMakeFiles/consumer-lame.dir/psymodel.s @@ -593,6 +593,7 @@ L3psycho_anal: # @L3psycho_anal move $t3, $zero movgr2fr.d $fa0, $zero ori $t4, $zero, 2 + ld.d $t8, $sp, 544 # 8-byte Folded Reload b .LBB0_21 .p2align 4, , 16 .LBB0_19: # in Loop: Header=BB0_21 Depth=1 @@ -625,7 +626,6 @@ L3psycho_anal: # @L3psycho_anal move $t5, $a6 .LBB0_25: # %._crit_edge # in Loop: Header=BB0_21 Depth=1 - ld.d $t8, $sp, 544 # 8-byte Folded Reload alsl.d $t6, $t3, $t8, 3 slli.d $t7, $t3, 3 stx.w $t5, $t8, $t7 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z08.s b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z08.s index 95cdc2dc..aa7ea6fa 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z08.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z08.s @@ -2300,6 +2300,7 @@ Manifest: # @Manifest # %bb.125: move $s8, $s5 ori $s1, $zero, 1 + ld.d $s5, $sp, 232 # 8-byte Folded Reload b .LBB1_127 .LBB1_126: # %.loopexit2473 # in Loop: Header=BB1_127 Depth=1 @@ -2318,7 +2319,6 @@ Manifest: # @Manifest # %bb.129: # in Loop: Header=BB1_127 Depth=1 beq $a1, $s1, .LBB1_126 # %bb.130: # in Loop: Header=BB1_127 Depth=1 - ld.d $s5, $sp, 232 # 8-byte Folded Reload ld.d $s2, $s5, 0 ld.d $a1, $sp, 256 # 8-byte Folded Reload st.d $a1, $sp, 16 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z12.s b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z12.s index a6865858..31aa65cf 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z12.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z12.s @@ -375,7 +375,7 @@ MinSize: # @MinSize beqz $a1, .LBB1_5 b .LBB1_123 .LBB1_6: - st.d $fp, $sp, 64 # 8-byte Folded Spill + st.d $fp, $sp, 56 # 8-byte Folded Spill st.d $a2, $sp, 88 # 8-byte Folded Spill st.d $s6, $sp, 112 # 8-byte Folded Spill bnez $s0, .LBB1_375 @@ -409,7 +409,7 @@ MinSize: # @MinSize ori $a0, $zero, 1 beq $s0, $a0, .LBB1_477 # %bb.13: - st.d $fp, $sp, 64 # 8-byte Folded Spill + st.d $fp, $sp, 56 # 8-byte Folded Spill st.d $s0, $sp, 80 # 8-byte Folded Spill st.d $s6, $sp, 112 # 8-byte Folded Spill ld.d $fp, $s6, 8 @@ -602,13 +602,13 @@ MinSize: # @MinSize st.d $a1, $a0, 0 b .LBB1_183 .LBB1_38: - st.d $fp, $sp, 64 # 8-byte Folded Spill + st.d $fp, $sp, 56 # 8-byte Folded Spill st.d $a2, $sp, 88 # 8-byte Folded Spill st.d $s6, $sp, 112 # 8-byte Folded Spill bnez $s0, .LBB1_375 .LBB1_39: - ld.d $fp, $sp, 112 # 8-byte Folded Reload - ld.d $s5, $fp, 8 + ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $s5, $a0, 8 .p2align 4, , 16 .LBB1_40: # =>This Inner Loop Header: Depth=1 ld.d $s5, $s5, 16 @@ -633,7 +633,6 @@ MinSize: # @MinSize jirl $ra, $ra, 0 ld.d $a0, $s5, 24 .LBB1_43: - st.d $fp, $sp, 112 # 8-byte Folded Spill pcalau12i $a1, %got_pc_hi20(xx_link) ld.d $a2, $a1, %got_pc_lo12(xx_link) ld.d $a1, $a0, 24 @@ -654,7 +653,7 @@ MinSize: # @MinSize ld.d $s6, $a1, %got_pc_lo12(zz_hold) ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - ld.d $s4, $sp, 64 # 8-byte Folded Reload + ld.d $s4, $sp, 56 # 8-byte Folded Reload beq $a1, $a0, .LBB1_47 # %bb.46: pcalau12i $a2, %got_pc_hi20(zz_res) @@ -699,7 +698,6 @@ MinSize: # @MinSize stx.d $a1, $s1, $a0 ld.bu $a0, $s4, 0 ori $a1, $zero, 44 - st.d $s4, $sp, 64 # 8-byte Folded Spill beq $a0, $a1, .LBB1_49 # %bb.48: ori $a1, $zero, 42 @@ -1693,7 +1691,7 @@ MinSize: # @MinSize ori $a0, $zero, 12 ori $a1, $zero, 5 ori $a3, $zero, 2 - ld.d $a4, $sp, 64 # 8-byte Folded Reload + ld.d $a4, $sp, 56 # 8-byte Folded Reload pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 st.b $zero, $s6, 41 @@ -1717,6 +1715,7 @@ MinSize: # @MinSize ldx.d $a0, $s1, $a0 ld.d $a1, $sp, 96 # 8-byte Folded Reload st.w $a2, $a1, 0 + st.d $s4, $sp, 56 # 8-byte Folded Spill beqz $a0, .LBB1_285 # %bb.180: st.d $a0, $s6, 0 @@ -2355,6 +2354,7 @@ MinSize: # @MinSize pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 .LBB1_259: # %.thread.i + st.d $s4, $sp, 56 # 8-byte Folded Spill ld.wu $a0, $s3, 40 lu12i.w $a1, -130048 lu32i.d $a1, 0 @@ -2370,7 +2370,7 @@ MinSize: # @MinSize ori $a1, $zero, 46 ori $a2, $zero, 45 move $a3, $s8 - st.d $s8, $sp, 56 # 8-byte Folded Spill + st.d $s8, $sp, 64 # 8-byte Folded Spill .LBB1_261: # %.preheader243.i # =>This Loop Header: Depth=1 # Child Loop BB1_262 Depth 2 @@ -2389,7 +2389,7 @@ MinSize: # @MinSize bne $a4, $a2, .LBB1_267 # %bb.266: # in Loop: Header=BB1_261 Depth=1 ld.d $a3, $a3, 8 - st.d $a3, $sp, 56 # 8-byte Folded Spill + st.d $a3, $sp, 64 # 8-byte Folded Spill bne $a3, $s0, .LBB1_261 b .LBB1_269 .LBB1_267: # %.loopexit244.loopexit.i @@ -2398,10 +2398,10 @@ MinSize: # @MinSize bne $a3, $s0, .LBB1_261 b .LBB1_269 .LBB1_268: - st.d $s0, $sp, 56 # 8-byte Folded Spill + st.d $s0, $sp, 64 # 8-byte Folded Spill .LBB1_269: # %.loopexit245.i ld.d $s0, $sp, 80 # 8-byte Folded Reload - ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $a0, $sp, 64 # 8-byte Folded Reload beq $s8, $a0, .LBB1_288 # %bb.270: # %.preheader241.i.preheader pcalau12i $a0, %got_pc_hi20(no_fpos) @@ -2418,7 +2418,7 @@ MinSize: # @MinSize bstrins.d $a1, $a0, 63, 12 st.w $a1, $s3, 40 ld.d $s8, $s8, 8 - ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $a0, $sp, 64 # 8-byte Folded Reload beq $s8, $a0, .LBB1_288 .LBB1_272: # %.preheader241.i # =>This Loop Header: Depth=1 @@ -2599,7 +2599,7 @@ MinSize: # @MinSize st.d $a2, $a0, 16 st.d $a0, $a2, 24 .LBB1_288: # %.loopexit242.i - ld.d $s4, $sp, 64 # 8-byte Folded Reload + ld.d $s4, $sp, 56 # 8-byte Folded Reload ld.bu $a0, $s4, 0 addi.d $a1, $a0, -43 ori $a2, $zero, 1 @@ -2911,7 +2911,7 @@ MinSize: # @MinSize ori $a0, $zero, 12 ori $a1, $zero, 7 ori $a3, $zero, 2 - ld.d $a4, $sp, 64 # 8-byte Folded Reload + ld.d $a4, $sp, 56 # 8-byte Folded Reload pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 st.b $zero, $s6, 41 @@ -2938,7 +2938,7 @@ MinSize: # @MinSize ori $a1, $zero, 6 .LBB1_318: ori $a3, $zero, 2 - ld.d $a4, $sp, 64 # 8-byte Folded Reload + ld.d $a4, $sp, 56 # 8-byte Folded Reload pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 vrepli.b $vr0, 0 @@ -3269,7 +3269,7 @@ MinSize: # @MinSize ori $a0, $zero, 4 ori $a1, $zero, 46 move $a2, $s8 - st.d $s8, $sp, 56 # 8-byte Folded Spill + st.d $s8, $sp, 64 # 8-byte Folded Spill .LBB1_352: # %.preheader236.i # =>This Loop Header: Depth=1 # Child Loop BB1_353 Depth 2 @@ -3286,7 +3286,7 @@ MinSize: # @MinSize bne $a3, $a1, .LBB1_357 # %bb.356: # in Loop: Header=BB1_352 Depth=1 ld.d $a2, $a2, 8 - st.d $a2, $sp, 56 # 8-byte Folded Spill + st.d $a2, $sp, 64 # 8-byte Folded Spill bne $a2, $s0, .LBB1_352 b .LBB1_359 .LBB1_357: # %.loopexit237.loopexit.i @@ -3295,10 +3295,10 @@ MinSize: # @MinSize bne $a2, $s0, .LBB1_352 b .LBB1_359 .LBB1_358: - st.d $s0, $sp, 56 # 8-byte Folded Spill + st.d $s0, $sp, 64 # 8-byte Folded Spill .LBB1_359: # %.loopexit238.i move $s0, $s2 - ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $a0, $sp, 64 # 8-byte Folded Reload beq $s8, $a0, .LBB1_375 # %bb.360: # %.preheader.i.preheader pcalau12i $a0, %got_pc_hi20(no_fpos) @@ -3314,7 +3314,7 @@ MinSize: # @MinSize bstrins.d $a1, $a0, 63, 12 st.w $a1, $s3, 40 ld.d $s8, $s8, 8 - ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $a0, $sp, 64 # 8-byte Folded Reload beq $s8, $a0, .LBB1_375 .LBB1_362: # %.preheader.i # =>This Loop Header: Depth=1 @@ -3446,7 +3446,7 @@ MinSize: # @MinSize st.d $a0, $a1, 24 b .LBB1_361 .LBB1_375: # %BuildSpanner.exit.thread - ld.d $fp, $sp, 64 # 8-byte Folded Reload + ld.d $fp, $sp, 56 # 8-byte Folded Reload ld.bu $a0, $fp, 0 ori $a1, $zero, 44 bne $a0, $a1, .LBB1_377 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z19.s b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z19.s index c241ee06..2b4e3617 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z19.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z19.s @@ -3881,14 +3881,15 @@ AttachGalley: # @AttachGalley ld.d $fp, $a0, %got_pc_lo12(xx_hold) ld.d $a0, $s0, 24 st.d $s0, $fp, 0 - bne $a0, $s0, .LBB2_388 - b .LBB2_393 -.LBB2_387: # in Loop: Header=BB2_388 Depth=1 + beq $a0, $s0, .LBB2_393 +# %bb.387: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_389 +.LBB2_388: # in Loop: Header=BB2_389 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -3906,23 +3907,23 @@ AttachGalley: # @AttachGalley stx.d $a1, $s2, $a0 ld.d $a0, $s0, 24 beq $a0, $s0, .LBB2_393 -.LBB2_388: # %.lr.ph1211 +.LBB2_389: # %.lr.ph1211 # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_390 -# %bb.389: # in Loop: Header=BB2_388 Depth=1 + beq $a1, $a0, .LBB2_391 +# %bb.390: # in Loop: Header=BB2_389 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_390: # in Loop: Header=BB2_388 Depth=1 +.LBB2_391: # in Loop: Header=BB2_389 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_387 -# %bb.391: # in Loop: Header=BB2_388 Depth=1 + beq $a1, $a0, .LBB2_388 +# %bb.392: # in Loop: Header=BB2_389 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -3933,13 +3934,18 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_387 -.LBB2_392: # in Loop: Header=BB2_393 Depth=1 + b .LBB2_388 +.LBB2_393: # %.preheader1051 + ld.d $a0, $s0, 8 + beq $a0, $s0, .LBB2_400 +# %bb.394: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_396 +.LBB2_395: # in Loop: Header=BB2_396 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -3955,27 +3961,25 @@ AttachGalley: # @AttachGalley ld.d $s0, $fp, 0 slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 -.LBB2_393: # %.preheader1051 - # =>This Inner Loop Header: Depth=1 ld.d $a0, $s0, 8 - beq $a0, $s0, .LBB2_398 -# %bb.394: # %.lr.ph1213 - # in Loop: Header=BB2_393 Depth=1 + beq $a0, $s0, .LBB2_400 +.LBB2_396: # %.lr.ph1213 + # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_396 -# %bb.395: # in Loop: Header=BB2_393 Depth=1 + beq $a1, $a0, .LBB2_398 +# %bb.397: # in Loop: Header=BB2_396 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_396: # in Loop: Header=BB2_393 Depth=1 +.LBB2_398: # in Loop: Header=BB2_396 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_392 -# %bb.397: # in Loop: Header=BB2_393 Depth=1 + beq $a1, $a0, .LBB2_395 +# %bb.399: # in Loop: Header=BB2_396 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -3986,8 +3990,8 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_392 -.LBB2_398: # %._crit_edge1214 + b .LBB2_395 +.LBB2_400: # %._crit_edge1214 ld.bu $a0, $s0, 32 addi.d $a1, $a0, -11 sltui $a1, $a1, 2 @@ -4010,11 +4014,11 @@ AttachGalley: # @AttachGalley ld.d $a0, $sp, 208 # 8-byte Folded Reload ld.hu $a2, $a0, 42 ld.d $a1, $sp, 232 # 8-byte Folded Reload - bnez $a1, .LBB2_405 -# %bb.399: - andi $a1, $a2, 8 bnez $a1, .LBB2_407 -# %bb.400: +# %bb.401: + andi $a1, $a2, 8 + bnez $a1, .LBB2_409 +# %bb.402: ori $a1, $zero, 17 move $a2, $s5 move $a3, $s5 @@ -4022,15 +4026,15 @@ AttachGalley: # @AttachGalley jirl $ra, $ra, 0 ld.d $a5, $sp, 208 # 8-byte Folded Reload ld.d $a0, $a5, 24 -.LBB2_401: # =>This Inner Loop Header: Depth=1 +.LBB2_403: # =>This Inner Loop Header: Depth=1 ld.d $a0, $a0, 0 ld.bu $a1, $a0, 32 st.d $a0, $sp, 312 - beqz $a1, .LBB2_401 -# %bb.402: + beqz $a1, .LBB2_403 +# %bb.404: ori $a2, $zero, 17 - beq $a1, $a2, .LBB2_404 -# %bb.403: + beq $a1, $a2, .LBB2_406 +# %bb.405: ld.d $a4, $s7, 0 pcalau12i $a0, %pc_hi20(.L.str) addi.d $a2, $a0, %pc_lo12(.L.str) @@ -4043,7 +4047,7 @@ AttachGalley: # @AttachGalley jirl $ra, $ra, 0 ld.d $a5, $sp, 208 # 8-byte Folded Reload ld.d $a0, $sp, 312 -.LBB2_404: # %.loopexit1050 +.LBB2_406: # %.loopexit1050 ld.hu $a2, $a5, 64 ld.h $a1, $a0, 64 bstrpick.d $a2, $a2, 7, 7 @@ -4166,17 +4170,17 @@ AttachGalley: # @AttachGalley srli.d $a1, $a1, 2 bstrins.d $a2, $a1, 11, 11 st.h $a2, $a0, 42 - b .LBB2_407 -.LBB2_405: + b .LBB2_409 +.LBB2_407: andi $a1, $a2, 16 - bnez $a1, .LBB2_407 -# %bb.406: + bnez $a1, .LBB2_409 +# %bb.408: ori $a1, $zero, 19 move $a2, $s4 move $a3, $s5 pcaddu18i $ra, %call36(Interpose) jirl $ra, $ra, 0 -.LBB2_407: +.LBB2_409: ld.d $a1, $s3, 8 ld.d $a2, $sp, 368 ori $a3, $zero, 1 @@ -4188,19 +4192,19 @@ AttachGalley: # @AttachGalley andi $a1, $a1, 24 ld.d $s0, $sp, 224 # 8-byte Folded Reload ld.d $s3, $sp, 240 # 8-byte Folded Reload - bnez $a1, .LBB2_411 -# %bb.408: + bnez $a1, .LBB2_413 +# %bb.410: ld.d $a2, $s3, 0 -.LBB2_409: # =>This Inner Loop Header: Depth=1 +.LBB2_411: # =>This Inner Loop Header: Depth=1 ld.d $a2, $a2, 16 ld.bu $a1, $a2, 32 - beqz $a1, .LBB2_409 -# %bb.410: + beqz $a1, .LBB2_411 +# %bb.412: ori $a1, $zero, 19 move $a3, $a2 pcaddu18i $ra, %call36(Interpose) jirl $ra, $ra, 0 -.LBB2_411: +.LBB2_413: ori $a3, $zero, 1 move $a0, $s3 move $a1, $s3 @@ -4210,14 +4214,15 @@ AttachGalley: # @AttachGalley ld.d $a0, $s3, 24 st.d $s3, $fp, 0 ld.d $a5, $sp, 264 # 8-byte Folded Reload - bne $a0, $s3, .LBB2_413 - b .LBB2_418 -.LBB2_412: # in Loop: Header=BB2_413 Depth=1 + beq $a0, $s3, .LBB2_420 +# %bb.414: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_416 +.LBB2_415: # in Loop: Header=BB2_416 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4234,24 +4239,24 @@ AttachGalley: # @AttachGalley slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 ld.d $a0, $s3, 24 - beq $a0, $s3, .LBB2_418 -.LBB2_413: # %.lr.ph1218 + beq $a0, $s3, .LBB2_420 +.LBB2_416: # %.lr.ph1218 # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_415 -# %bb.414: # in Loop: Header=BB2_413 Depth=1 + beq $a1, $a0, .LBB2_418 +# %bb.417: # in Loop: Header=BB2_416 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_415: # in Loop: Header=BB2_413 Depth=1 +.LBB2_418: # in Loop: Header=BB2_416 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_412 -# %bb.416: # in Loop: Header=BB2_413 Depth=1 + beq $a1, $a0, .LBB2_415 +# %bb.419: # in Loop: Header=BB2_416 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4262,13 +4267,18 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_412 -.LBB2_417: # in Loop: Header=BB2_418 Depth=1 + b .LBB2_415 +.LBB2_420: # %.preheader1049 + ld.d $a0, $s3, 8 + beq $a0, $s3, .LBB2_427 +# %bb.421: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_423 +.LBB2_422: # in Loop: Header=BB2_423 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4284,27 +4294,25 @@ AttachGalley: # @AttachGalley ld.d $s3, $fp, 0 slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 -.LBB2_418: # %.preheader1049 - # =>This Inner Loop Header: Depth=1 ld.d $a0, $s3, 8 - beq $a0, $s3, .LBB2_423 -# %bb.419: # %.lr.ph1220 - # in Loop: Header=BB2_418 Depth=1 + beq $a0, $s3, .LBB2_427 +.LBB2_423: # %.lr.ph1220 + # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_421 -# %bb.420: # in Loop: Header=BB2_418 Depth=1 + beq $a1, $a0, .LBB2_425 +# %bb.424: # in Loop: Header=BB2_423 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_421: # in Loop: Header=BB2_418 Depth=1 +.LBB2_425: # in Loop: Header=BB2_423 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_417 -# %bb.422: # in Loop: Header=BB2_418 Depth=1 + beq $a1, $a0, .LBB2_422 +# %bb.426: # in Loop: Header=BB2_423 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4315,8 +4323,8 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_417 -.LBB2_423: # %._crit_edge1221 + b .LBB2_422 +.LBB2_427: # %._crit_edge1221 ld.bu $a0, $s3, 32 addi.d $a1, $a0, -11 sltui $a1, $a1, 2 @@ -4337,8 +4345,8 @@ AttachGalley: # @AttachGalley slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 ld.d $a0, $s0, 8 - beq $a0, $s0, .LBB2_425 -# %bb.424: + beq $a0, $s0, .LBB2_429 +# %bb.428: ld.d $a4, $s7, 0 pcalau12i $a0, %pc_hi20(.L.str) addi.d $a2, $a0, %pc_lo12(.L.str) @@ -4350,26 +4358,27 @@ AttachGalley: # @AttachGalley pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 ld.d $a5, $sp, 264 # 8-byte Folded Reload -.LBB2_425: +.LBB2_429: ld.hu $a0, $s0, 42 andi $a0, $a0, 32 - beqz $a0, .LBB2_427 -# %bb.426: + beqz $a0, .LBB2_431 +# %bb.430: ld.d $a0, $sp, 368 ld.h $a1, $a0, 42 ori $a1, $a1, 32 st.h $a1, $a0, 42 -.LBB2_427: +.LBB2_431: ld.d $a0, $s0, 24 st.d $s0, $fp, 0 - bne $a0, $s0, .LBB2_429 + beq $a0, $s0, .LBB2_438 +# %bb.432: + ld.d $a4, $sp, 248 # 8-byte Folded Reload b .LBB2_434 -.LBB2_428: # in Loop: Header=BB2_429 Depth=1 +.LBB2_433: # in Loop: Header=BB2_434 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4386,24 +4395,24 @@ AttachGalley: # @AttachGalley slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 ld.d $a0, $s0, 24 - beq $a0, $s0, .LBB2_434 -.LBB2_429: # %.lr.ph1225 + beq $a0, $s0, .LBB2_438 +.LBB2_434: # %.lr.ph1225 # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_431 -# %bb.430: # in Loop: Header=BB2_429 Depth=1 + beq $a1, $a0, .LBB2_436 +# %bb.435: # in Loop: Header=BB2_434 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_431: # in Loop: Header=BB2_429 Depth=1 +.LBB2_436: # in Loop: Header=BB2_434 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_428 -# %bb.432: # in Loop: Header=BB2_429 Depth=1 + beq $a1, $a0, .LBB2_433 +# %bb.437: # in Loop: Header=BB2_434 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4414,13 +4423,18 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_428 -.LBB2_433: # in Loop: Header=BB2_434 Depth=1 + b .LBB2_433 +.LBB2_438: # %.preheader1048 + ld.d $a0, $s0, 8 + beq $a0, $s0, .LBB2_445 +# %bb.439: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_441 +.LBB2_440: # in Loop: Header=BB2_441 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4436,27 +4450,25 @@ AttachGalley: # @AttachGalley ld.d $s0, $fp, 0 slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 -.LBB2_434: # %.preheader1048 - # =>This Inner Loop Header: Depth=1 ld.d $a0, $s0, 8 - beq $a0, $s0, .LBB2_439 -# %bb.435: # %.lr.ph1227 - # in Loop: Header=BB2_434 Depth=1 + beq $a0, $s0, .LBB2_445 +.LBB2_441: # %.lr.ph1227 + # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_437 -# %bb.436: # in Loop: Header=BB2_434 Depth=1 + beq $a1, $a0, .LBB2_443 +# %bb.442: # in Loop: Header=BB2_441 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_437: # in Loop: Header=BB2_434 Depth=1 +.LBB2_443: # in Loop: Header=BB2_441 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_433 -# %bb.438: # in Loop: Header=BB2_434 Depth=1 + beq $a1, $a0, .LBB2_440 +# %bb.444: # in Loop: Header=BB2_441 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4467,8 +4479,8 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_433 -.LBB2_439: # %._crit_edge1228 + b .LBB2_440 +.LBB2_445: # %._crit_edge1228 ld.bu $a0, $s0, 32 addi.d $a1, $a0, -11 sltui $a1, $a1, 2 @@ -4490,16 +4502,16 @@ AttachGalley: # @AttachGalley ld.d $s0, $sp, 376 slli.d $a1, $a1, 3 stx.d $a0, $s2, $a1 - beqz $s3, .LBB2_458 -# %bb.440: - beqz $s0, .LBB2_459 -# %bb.441: + beqz $s3, .LBB2_466 +# %bb.446: + beqz $s0, .LBB2_467 +# %bb.447: ld.d $s4, $s0, 8 - beq $s4, $s0, .LBB2_445 -# %bb.442: + beq $s4, $s0, .LBB2_451 +# %bb.448: ld.bu $a0, $s4, 32 - beqz $a0, .LBB2_444 -# %bb.443: + beqz $a0, .LBB2_450 +# %bb.449: ld.d $a4, $s7, 0 pcalau12i $a0, %pc_hi20(.L.str) addi.d $a2, $a0, %pc_lo12(.L.str) @@ -4511,7 +4523,7 @@ AttachGalley: # @AttachGalley pcaddu18i $ra, %call36(Error) jirl $ra, $ra, 0 ld.d $a5, $sp, 264 # 8-byte Folded Reload -.LBB2_444: +.LBB2_450: st.d $s4, $s1, 0 st.d $s0, $s6, 0 ld.d $a0, $s0, 0 @@ -4542,17 +4554,18 @@ AttachGalley: # @AttachGalley ld.d $a0, $s1, 0 ld.d $s0, $sp, 376 st.d $a0, $a3, 8 -.LBB2_445: +.LBB2_451: ld.d $a0, $s0, 24 st.d $s0, $fp, 0 - bne $a0, $s0, .LBB2_447 - b .LBB2_452 -.LBB2_446: # in Loop: Header=BB2_447 Depth=1 + beq $a0, $s0, .LBB2_458 +# %bb.452: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_454 +.LBB2_453: # in Loop: Header=BB2_454 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4569,24 +4582,24 @@ AttachGalley: # @AttachGalley slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 ld.d $a0, $s0, 24 - beq $a0, $s0, .LBB2_452 -.LBB2_447: # %.lr.ph1232 + beq $a0, $s0, .LBB2_458 +.LBB2_454: # %.lr.ph1232 # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_449 -# %bb.448: # in Loop: Header=BB2_447 Depth=1 + beq $a1, $a0, .LBB2_456 +# %bb.455: # in Loop: Header=BB2_454 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_449: # in Loop: Header=BB2_447 Depth=1 +.LBB2_456: # in Loop: Header=BB2_454 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_446 -# %bb.450: # in Loop: Header=BB2_447 Depth=1 + beq $a1, $a0, .LBB2_453 +# %bb.457: # in Loop: Header=BB2_454 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4597,13 +4610,18 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_446 -.LBB2_451: # in Loop: Header=BB2_452 Depth=1 + b .LBB2_453 +.LBB2_458: # %.preheader1047 + ld.d $a0, $s0, 8 + beq $a0, $s0, .LBB2_465 +# %bb.459: + ld.d $a4, $sp, 248 # 8-byte Folded Reload + b .LBB2_461 +.LBB2_460: # in Loop: Header=BB2_461 Depth=1 ld.bu $a1, $a0, 32 addi.d $a2, $a1, -11 sltui $a2, $a2, 2 addi.d $a3, $a0, 33 - ld.d $a4, $sp, 248 # 8-byte Folded Reload add.d $a1, $a4, $a1 masknez $a1, $a1, $a2 maskeqz $a2, $a3, $a2 @@ -4619,27 +4637,25 @@ AttachGalley: # @AttachGalley ld.d $s0, $fp, 0 slli.d $a0, $a0, 3 stx.d $a1, $s2, $a0 -.LBB2_452: # %.preheader1047 - # =>This Inner Loop Header: Depth=1 ld.d $a0, $s0, 8 - beq $a0, $s0, .LBB2_457 -# %bb.453: # %.lr.ph1234 - # in Loop: Header=BB2_452 Depth=1 + beq $a0, $s0, .LBB2_465 +.LBB2_461: # %.lr.ph1234 + # =>This Inner Loop Header: Depth=1 ld.d $a1, $a0, 24 st.d $a0, $a5, 0 - beq $a1, $a0, .LBB2_455 -# %bb.454: # in Loop: Header=BB2_452 Depth=1 + beq $a1, $a0, .LBB2_463 +# %bb.462: # in Loop: Header=BB2_461 Depth=1 ld.d $a2, $a0, 16 st.d $a1, $s1, 0 st.d $a2, $a1, 16 st.d $a1, $a2, 24 st.d $a0, $a0, 24 st.d $a0, $a0, 16 -.LBB2_455: # in Loop: Header=BB2_452 Depth=1 +.LBB2_463: # in Loop: Header=BB2_461 Depth=1 ld.d $a1, $a0, 8 st.d $a0, $s6, 0 - beq $a1, $a0, .LBB2_451 -# %bb.456: # in Loop: Header=BB2_452 Depth=1 + beq $a1, $a0, .LBB2_460 +# %bb.464: # in Loop: Header=BB2_461 Depth=1 st.d $a1, $s1, 0 ld.d $a0, $a0, 0 st.d $a0, $a1, 0 @@ -4650,8 +4666,8 @@ AttachGalley: # @AttachGalley st.d $a1, $a1, 0 ld.d $a0, $a5, 0 st.d $a1, $a1, 8 - b .LBB2_451 -.LBB2_457: # %._crit_edge1235 + b .LBB2_460 +.LBB2_465: # %._crit_edge1235 ld.bu $a0, $s0, 32 addi.d $a1, $a0, -11 sltui $a1, $a1, 2 @@ -4674,16 +4690,15 @@ AttachGalley: # @AttachGalley stx.d $a1, $s2, $a0 ld.d $a0, $sp, 112 # 8-byte Folded Reload st.d $a2, $a0, 0 - ori $a0, $zero, 5 - b .LBB2_316 -.LBB2_458: + b .LBB2_468 +.LBB2_466: ld.d $a0, $sp, 112 # 8-byte Folded Reload st.d $s0, $a0, 0 - ori $a0, $zero, 5 - b .LBB2_316 -.LBB2_459: + b .LBB2_468 +.LBB2_467: ld.d $a0, $sp, 112 # 8-byte Folded Reload st.d $s3, $a0, 0 +.LBB2_468: ori $a0, $zero, 5 b .LBB2_316 .Lfunc_end2: diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z22.s b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z22.s index a4bd2a5f..cecb697c 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z22.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z22.s @@ -1128,7 +1128,6 @@ ExpandRecursives: # @ExpandRecursives bnez $a0, .LBB2_63 # %bb.62: # in Loop: Header=BB2_4 Depth=1 ld.d $a0, $sp, 56 # 8-byte Folded Reload - st.d $a0, $sp, 56 # 8-byte Folded Spill ld.w $a1, $a0, 52 ld.w $a2, $a0, 60 ori $a3, $zero, 1 diff --git a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z23.s b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z23.s index 6af00990..f00b99c2 100644 --- a/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z23.s +++ b/results/MultiSource/Benchmarks/MiBench/consumer-typeset/CMakeFiles/consumer-typeset.dir/z23.s @@ -2572,6 +2572,7 @@ FixAndPrintObject: # @FixAndPrintObject beq $s3, $fp, .LBB0_372 # %bb.365: # %.preheader2158.preheader addi.w $s7, $zero, -91 + ld.d $s0, $sp, 192 # 8-byte Folded Reload b .LBB0_367 .LBB0_366: # in Loop: Header=BB0_367 Depth=1 ld.d $s3, $s3, 8 @@ -2603,7 +2604,6 @@ FixAndPrintObject: # @FixAndPrintObject st.d $s4, $sp, 0 move $a0, $s2 move $a2, $s1 - ld.d $s0, $sp, 192 # 8-byte Folded Reload move $a4, $s0 ld.d $a6, $sp, 184 # 8-byte Folded Reload pcaddu18i $ra, %call36(FixAndPrintObject) diff --git a/results/MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s b/results/MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s index 87da0b6b..4f877d1e 100644 --- a/results/MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s +++ b/results/MultiSource/Benchmarks/PAQ8p/CMakeFiles/paq8p.dir/paq8p.s @@ -8306,9 +8306,9 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri srli.d $t4, $t4, 5 srli.d $t8, $t8, 6 xor $t4, $t8, $t4 - lu12i.w $fp, 16384 + lu12i.w $a4, 16384 ld.w $t8, $t6, 136 - or $t4, $t4, $fp + or $t4, $t4, $a4 xor $a5, $t4, $a5 xor $a0, $a5, $a0 addi.d $a5, $t8, 1 @@ -8347,7 +8347,7 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri srli.d $a0, $a0, 6 xor $a0, $a0, $t4 ld.w $t4, $t6, 136 - or $a0, $a0, $fp + or $a0, $a0, $a4 xor $a0, $t8, $a0 xor $a0, $a0, $a5 addi.d $a5, $t4, 1 @@ -8382,7 +8382,7 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri srli.d $a0, $a0, 6 xor $a0, $a0, $t4 ld.w $t4, $t6, 136 - or $a0, $a0, $fp + or $a0, $a0, $a4 xor $a0, $s7, $a0 xor $a0, $a0, $a5 addi.d $a5, $t4, 1 @@ -8418,7 +8418,7 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri xor $a0, $a0, $s7 ld.w $t4, $t6, 136 xor $a5, $a0, $a5 - ori $a0, $fp, 1 + ori $a0, $a4, 1 xor $a5, $a5, $a0 addi.d $s7, $t4, 1 st.w $s7, $t6, 136 @@ -8540,8 +8540,8 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri addi.w $a5, $a5, -1 and $t4, $a5, $t4 ldx.bu $t4, $a2, $t4 - addi.d $a4, $t8, -2 - sub.w $a0, $a0, $a4 + addi.d $fp, $t8, -2 + sub.w $a0, $a0, $fp and $a0, $a5, $a0 ldx.bu $a0, $a2, $a0 srli.d $a5, $t4, 2 @@ -8559,7 +8559,7 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri xor $a0, $a0, $s6 ld.w $t4, $t6, 136 xor $a0, $a0, $a5 - ori $a5, $fp, 2 + ori $a5, $a4, 2 xor $a0, $a0, $a5 addi.d $a5, $t4, 1 st.w $a5, $t6, 136 @@ -8790,7 +8790,7 @@ _Z9model8bitR5Mixeri: # @_Z9model8bitR5Mixeri addi.w $t4, $t4, -1 and $s5, $t4, $s5 ldx.bu $s5, $a2, $s5 - sub.w $a0, $a0, $a4 + sub.w $a0, $a0, $fp and $a0, $t4, $a0 ldx.bu $a0, $a2, $a0 add.d $a0, $a0, $s5 @@ -12522,10 +12522,10 @@ _Z9jpegModelR5Mixer: # @_Z9jpegModelR5Mixer ori $t5, $a6, 1549 lu32i.d $t5, 8 ori $t6, $zero, 64 + ld.d $t1, $sp, 80 # 8-byte Folded Reload .LBB48_155: # =>This Inner Loop Header: Depth=1 ldx.bu $t7, $s0, $a0 slli.d $t7, $t7, 2 - ld.d $t1, $sp, 80 # 8-byte Folded Reload ldx.w $fp, $t1, $t7 ori $a6, $zero, 1 sll.d $t8, $a6, $a0 @@ -18821,6 +18821,8 @@ _Z8wavModelR5Mixer: # @_Z8wavModelR5Mixer move $s3, $zero ori $a3, $zero, 1 ori $s6, $zero, 12 + ld.d $fp, $sp, 208 # 8-byte Folded Reload + ld.d $s5, $sp, 200 # 8-byte Folded Reload .LBB61_78: # %.preheader498 # =>This Loop Header: Depth=1 # Child Loop BB61_80 Depth 2 @@ -18835,8 +18837,6 @@ _Z8wavModelR5Mixer: # @_Z8wavModelR5Mixer st.d $s1, $sp, 192 # 8-byte Folded Spill move $s8, $s7 st.d $s3, $sp, 80 # 8-byte Folded Spill - ld.d $fp, $sp, 208 # 8-byte Folded Reload - ld.d $s5, $sp, 200 # 8-byte Folded Reload .p2align 4, , 16 .LBB61_80: # Parent Loop BB61_78 Depth=1 # => This Inner Loop Header: Depth=2 @@ -19046,6 +19046,7 @@ _Z8wavModelR5Mixer: # @_Z8wavModelR5Mixer move $s3, $zero ori $a3, $zero, 1 ori $s6, $zero, 12 + ld.d $s5, $sp, 200 # 8-byte Folded Reload b .LBB61_103 .p2align 4, , 16 .LBB61_102: # %.loopexit502 @@ -19070,7 +19071,6 @@ _Z8wavModelR5Mixer: # @_Z8wavModelR5Mixer andi $a2, $a1, 1 maskeqz $a2, $s6, $a2 add.w $a2, $a2, $a0 - ld.d $s5, $sp, 200 # 8-byte Folded Reload blt $a2, $s8, .LBB61_102 # %bb.105: # %.lr.ph543 # in Loop: Header=BB61_103 Depth=1 @@ -24146,7 +24146,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype .cfi_offset 29, -72 .cfi_offset 30, -80 .cfi_offset 31, -88 - move $s4, $a2 + move $s2, $a2 st.d $a1, $sp, 216 # 8-byte Folded Spill st.d $a0, $sp, 208 # 8-byte Folded Spill pcaddu18i $ra, %call36(ftell) @@ -24167,8 +24167,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype ori $a1, $zero, 1 pcaddu18i $ra, %call36(calloc) jirl $ra, $ra, 0 - st.d $a0, $sp, 136 # 8-byte Folded Spill - beqz $a0, .LBB77_166 + st.d $a0, $sp, 144 # 8-byte Folded Spill + beqz $a0, .LBB77_165 # %bb.3: # %_ZN5ArrayIiLi0EEC2Ei.exit addi.d $a0, $fp, 2047 addi.w $a0, $a0, 1 @@ -24183,24 +24183,24 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype ori $a1, $zero, 1 pcaddu18i $ra, %call36(calloc) jirl $ra, $ra, 0 - st.d $a0, $sp, 128 # 8-byte Folded Spill - beqz $a0, .LBB77_167 + st.d $a0, $sp, 136 # 8-byte Folded Spill + beqz $a0, .LBB77_166 # %bb.6: # %_ZN5ArrayIiLi0EEC2Ei.exit593 ld.d $a0, $sp, 216 # 8-byte Folded Reload - blez $a0, .LBB77_159 + blez $a0, .LBB77_158 # %bb.7: # %.lr.ph - st.d $s3, $sp, 8 # 8-byte Folded Spill - st.d $s1, $sp, 32 # 8-byte Folded Spill + st.d $s3, $sp, 16 # 8-byte Folded Spill + st.d $s1, $sp, 40 # 8-byte Folded Spill move $s3, $zero - move $s7, $zero - st.d $zero, $sp, 16 # 8-byte Folded Spill + move $s4, $zero + st.d $zero, $sp, 24 # 8-byte Folded Spill move $fp, $zero - move $s2, $zero + move $t4, $zero st.d $zero, $sp, 264 # 8-byte Folded Spill st.d $zero, $sp, 288 # 8-byte Folded Spill - move $t3, $zero - st.d $zero, $sp, 144 # 8-byte Folded Spill - st.d $zero, $sp, 112 # 8-byte Folded Spill + move $s7, $zero + st.d $zero, $sp, 152 # 8-byte Folded Spill + st.d $zero, $sp, 120 # 8-byte Folded Spill move $t2, $zero st.d $zero, $sp, 280 # 8-byte Folded Spill st.d $zero, $sp, 200 # 8-byte Folded Spill @@ -24208,47 +24208,48 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype st.d $zero, $sp, 224 # 8-byte Folded Spill st.d $zero, $sp, 232 # 8-byte Folded Spill st.d $zero, $sp, 192 # 8-byte Folded Spill - st.d $zero, $sp, 80 # 8-byte Folded Spill + st.d $zero, $sp, 88 # 8-byte Folded Spill st.d $zero, $sp, 304 # 8-byte Folded Spill - st.d $zero, $sp, 24 # 8-byte Folded Spill + st.d $zero, $sp, 32 # 8-byte Folded Spill + st.d $zero, $sp, 64 # 8-byte Folded Spill st.d $zero, $sp, 56 # 8-byte Folded Spill - st.d $zero, $sp, 48 # 8-byte Folded Spill move $t0, $zero - st.d $zero, $sp, 120 # 8-byte Folded Spill - move $s0, $zero + st.d $zero, $sp, 128 # 8-byte Folded Spill + move $s5, $zero lu12i.w $a0, 65496 ori $a0, $a0, 4094 - st.d $a0, $sp, 72 # 8-byte Folded Spill + st.d $a0, $sp, 80 # 8-byte Folded Spill lu12i.w $a0, -262144 ori $a0, $a0, 8 - st.d $a0, $sp, 88 # 8-byte Folded Spill + st.d $a0, $sp, 96 # 8-byte Folded Spill lu12i.w $a0, 4 ori $a0, $a0, 589 st.d $a0, $sp, 176 # 8-byte Folded Spill lu12i.w $a0, 1283 ori $a0, $a0, 1290 - st.d $a0, $sp, 152 # 8-byte Folded Spill + st.d $a0, $sp, 160 # 8-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 1 - st.d $a0, $sp, 64 # 8-byte Folded Spill - addi.w $a0, $s4, -2 - st.d $a0, $sp, 104 # 8-byte Folded Spill + st.d $a0, $sp, 72 # 8-byte Folded Spill + addi.w $a0, $s2, -2 + st.d $a0, $sp, 112 # 8-byte Folded Spill addi.w $a0, $zero, -1 lu12i.w $a1, 15 ori $a1, $a1, 4095 - st.d $a1, $sp, 40 # 8-byte Folded Spill + st.d $a1, $sp, 48 # 8-byte Folded Spill st.d $a0, $sp, 272 # 8-byte Folded Spill st.d $a0, $sp, 184 # 8-byte Folded Spill st.d $a0, $sp, 248 # 8-byte Folded Spill - st.d $s4, $sp, 96 # 8-byte Folded Spill + st.d $s2, $sp, 104 # 8-byte Folded Spill b .LBB77_9 .p2align 4, , 16 .LBB77_8: # in Loop: Header=BB77_9 Depth=1 addi.w $fp, $fp, 1 ld.d $a0, $sp, 216 # 8-byte Folded Reload - beq $a0, $fp, .LBB77_141 + beq $a0, $fp, .LBB77_140 .LBB77_9: # =>This Inner Loop Header: Depth=1 - st.d $t3, $sp, 256 # 8-byte Folded Spill + st.d $t4, $sp, 256 # 8-byte Folded Spill + move $s0, $s5 move $s5, $t2 move $s1, $t1 move $s6, $t0 @@ -24257,13 +24258,13 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype jirl $ra, $ra, 0 move $s8, $a0 ld.d $a0, $sp, 184 # 8-byte Folded Reload - beq $s8, $a0, .LBB77_140 + beq $s8, $a0, .LBB77_139 # %bb.10: # in Loop: Header=BB77_9 Depth=1 - st.d $s7, $sp, 240 # 8-byte Folded Spill + st.d $s4, $sp, 240 # 8-byte Folded Spill st.d $s3, $sp, 296 # 8-byte Folded Spill slli.d $a0, $s3, 8 or $s3, $s8, $a0 - bstrpick.d $s7, $s3, 15, 0 + bstrpick.d $s4, $s3, 15, 0 ld.d $a6, $sp, 280 # 8-byte Folded Reload bnez $a6, .LBB77_14 # %bb.11: # in Loop: Header=BB77_9 Depth=1 @@ -24271,7 +24272,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bltu $fp, $a0, .LBB77_14 # %bb.12: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 31, 4 - ld.d $a1, $sp, 72 # 8-byte Folded Reload + ld.d $a1, $sp, 80 # 8-byte Folded Reload move $t0, $s6 move $t1, $s1 move $t2, $s5 @@ -24279,6 +24280,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype # %bb.13: # in Loop: Header=BB77_9 Depth=1 addi.w $a0, $fp, 2 move $a6, $fp + move $a7, $s0 b .LBB77_22 .p2align 4, , 16 .LBB77_14: # in Loop: Header=BB77_9 Depth=1 @@ -24288,7 +24290,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype beqz $a6, .LBB77_19 # %bb.15: # %.thread609 # in Loop: Header=BB77_9 Depth=1 - ld.d $a0, $sp, 144 # 8-byte Folded Reload + ld.d $a0, $sp, 152 # 8-byte Folded Reload + move $a7, $s0 bne $fp, $a0, .LBB77_22 # %bb.16: # in Loop: Header=BB77_9 Depth=1 addi.w $a0, $s3, 0 @@ -24307,19 +24310,20 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype .p2align 4, , 16 .LBB77_19: # in Loop: Header=BB77_9 Depth=1 st.d $zero, $sp, 280 # 8-byte Folded Spill + move $a7, $s0 andi $a0, $s8, 248 ori $a1, $zero, 208 bne $a0, $a1, .LBB77_30 b .LBB77_36 .LBB77_20: # in Loop: Header=BB77_9 Depth=1 - add.d $a0, $fp, $s7 + add.d $a0, $fp, $s4 addi.w $a0, $a0, 2 .LBB77_21: # %.thread609.thread # in Loop: Header=BB77_9 Depth=1 ld.d $a6, $sp, 280 # 8-byte Folded Reload .LBB77_22: # %.thread609.thread # in Loop: Header=BB77_9 Depth=1 - st.d $a0, $sp, 144 # 8-byte Folded Spill + st.d $a0, $sp, 152 # 8-byte Folded Spill slt $a1, $a0, $fp sub.w $a0, $fp, $a6 lu12i.w $a2, 16 @@ -24332,7 +24336,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bstrins.d $a4, $a4, 32, 24 and $a4, $s3, $a4 addi.w $a4, $a4, 0 - ld.d $a5, $sp, 88 # 8-byte Folded Reload + ld.d $a5, $sp, 96 # 8-byte Folded Reload xor $a4, $a4, $a5 sltui $a4, $a4, 1 masknez $a5, $t2, $a4 @@ -24352,7 +24356,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype # %bb.23: # in Loop: Header=BB77_9 Depth=1 bge $a6, $t2, .LBB77_29 # %bb.24: # in Loop: Header=BB77_9 Depth=1 - ld.d $a1, $sp, 40 # 8-byte Folded Reload + ld.d $a1, $sp, 48 # 8-byte Folded Reload blt $a1, $a0, .LBB77_29 # %bb.25: # in Loop: Header=BB77_9 Depth=1 sub.w $a0, $fp, $t2 @@ -24365,9 +24369,9 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bne $a0, $a1, .LBB77_29 # %bb.27: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 1 - bne $s4, $a0, .LBB77_151 + bne $s2, $a0, .LBB77_150 # %bb.28: # in Loop: Header=BB77_9 Depth=1 - st.d $fp, $sp, 112 # 8-byte Folded Spill + st.d $fp, $sp, 120 # 8-byte Folded Spill .p2align 4, , 16 .LBB77_29: # %.thread # in Loop: Header=BB77_9 Depth=1 @@ -24381,14 +24385,14 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype # %bb.31: # %.thread # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 1 - bne $s4, $a0, .LBB77_36 + bne $s2, $a0, .LBB77_36 # %bb.32: # %.thread # in Loop: Header=BB77_9 Depth=1 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 120 # 8-byte Folded Reload beqz $a0, .LBB77_36 # %bb.33: # %.thread # in Loop: Header=BB77_9 Depth=1 - ld.d $a0, $sp, 112 # 8-byte Folded Reload + ld.d $a0, $sp, 120 # 8-byte Folded Reload bgeu $a0, $fp, .LBB77_36 # %bb.34: # %.thread # in Loop: Header=BB77_9 Depth=1 @@ -24397,7 +24401,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype lu12i.w $a1, 15 ori $a1, $a1, 3840 bne $a0, $a1, .LBB77_36 - b .LBB77_142 + b .LBB77_141 .p2align 4, , 16 .LBB77_35: # in Loop: Header=BB77_9 Depth=1 move $t2, $zero @@ -24407,14 +24411,14 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype .p2align 4, , 16 .LBB77_36: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 176 # 8-byte Folded Reload - xor $a0, $s7, $a0 + xor $a0, $s4, $a0 sltui $a0, $a0, 1 - masknez $a1, $s0, $a0 + masknez $a1, $a7, $a0 maskeqz $a0, $fp, $a0 - or $s0, $a0, $a1 - beqz $s0, .LBB77_40 + or $s5, $a0, $a1 + beqz $s5, .LBB77_40 # %bb.37: # in Loop: Header=BB77_9 Depth=1 - sub.w $a0, $fp, $s0 + sub.w $a0, $fp, $s5 ori $a1, $zero, 12 beq $a0, $a1, .LBB77_41 # %bb.38: # in Loop: Header=BB77_9 Depth=1 @@ -24429,11 +24433,11 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bstrins.d $a1, $a0, 15, 8 bstrpick.d $a0, $s3, 55, 8 bstrins.d $a1, $a0, 23, 16 - st.d $a1, $sp, 120 # 8-byte Folded Spill + st.d $a1, $sp, 128 # 8-byte Folded Spill b .LBB77_45 .p2align 4, , 16 .LBB77_40: # in Loop: Header=BB77_9 Depth=1 - move $s0, $zero + move $s5, $zero b .LBB77_64 .LBB77_41: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 31, 24 @@ -24443,7 +24447,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bstrins.d $a1, $a0, 15, 8 bstrpick.d $a0, $s3, 55, 8 bstrins.d $a1, $a0, 23, 16 - st.d $a1, $sp, 24 # 8-byte Folded Spill + st.d $a1, $sp, 32 # 8-byte Folded Spill b .LBB77_45 .LBB77_42: # in Loop: Header=BB77_9 Depth=1 addi.w $a0, $a0, -16 @@ -24453,15 +24457,15 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype lu12i.w $a1, 163840 beq $a0, $a1, .LBB77_45 # %bb.44: # in Loop: Header=BB77_9 Depth=1 - move $s0, $zero - st.d $zero, $sp, 120 # 8-byte Folded Spill + move $s5, $zero + st.d $zero, $sp, 128 # 8-byte Folded Spill move $t0, $zero addi.w $a0, $zero, -1 st.d $a0, $sp, 248 # 8-byte Folded Spill .p2align 4, , 16 .LBB77_45: # %.thread618 # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $s0, 20 + addi.w $a0, $s5, 20 bne $a0, $fp, .LBB77_47 # %bb.46: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 31, 24 @@ -24471,11 +24475,11 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bstrins.d $a0, $a1, 23, 16 slli.d $a1, $s8, 24 or $a0, $a0, $a1 - st.d $a0, $sp, 48 # 8-byte Folded Spill + st.d $a0, $sp, 56 # 8-byte Folded Spill addi.w $a0, $a0, 0 beqz $a0, .LBB77_50 .LBB77_47: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $s0, 24 + addi.w $a0, $s5, 24 bne $a0, $fp, .LBB77_51 .LBB77_48: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 31, 24 @@ -24485,30 +24489,30 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bstrins.d $a0, $a1, 23, 16 slli.d $a1, $s8, 24 or $a0, $a0, $a1 - st.d $a0, $sp, 56 # 8-byte Folded Spill + st.d $a0, $sp, 64 # 8-byte Folded Spill addi.w $a0, $a0, 0 bnez $a0, .LBB77_51 # %bb.49: # in Loop: Header=BB77_9 Depth=1 - move $s0, $zero - st.d $zero, $sp, 120 # 8-byte Folded Spill + move $s5, $zero + st.d $zero, $sp, 128 # 8-byte Folded Spill move $t0, $zero - st.d $zero, $sp, 56 # 8-byte Folded Spill + st.d $zero, $sp, 64 # 8-byte Folded Spill addi.w $a0, $zero, -1 st.d $a0, $sp, 248 # 8-byte Folded Spill b .LBB77_51 .LBB77_50: # in Loop: Header=BB77_9 Depth=1 - move $s0, $zero - st.d $zero, $sp, 120 # 8-byte Folded Spill + move $s5, $zero + st.d $zero, $sp, 128 # 8-byte Folded Spill move $t0, $zero - st.d $zero, $sp, 48 # 8-byte Folded Spill + st.d $zero, $sp, 56 # 8-byte Folded Spill addi.w $a0, $zero, -1 st.d $a0, $sp, 248 # 8-byte Folded Spill - addi.w $a0, $s0, 24 + addi.w $a0, $s5, 24 beq $a0, $fp, .LBB77_48 .p2align 4, , 16 .LBB77_51: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $s0, 31 - addi.w $a1, $s0, 27 + addi.w $a0, $s5, 31 + addi.w $a1, $s5, 27 xor $a1, $a1, $fp sltui $a1, $a1, 1 masknez $a2, $t0, $a1 @@ -24519,13 +24523,13 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype addi.w $a0, $s3, 0 beqz $a0, .LBB77_57 # %bb.53: # in Loop: Header=BB77_9 Depth=1 - move $s0, $zero - st.d $zero, $sp, 120 # 8-byte Folded Spill + move $s5, $zero + st.d $zero, $sp, 128 # 8-byte Folded Spill move $t0, $zero addi.w $a0, $zero, -1 st.d $a0, $sp, 248 # 8-byte Folded Spill .LBB77_54: # in Loop: Header=BB77_9 Depth=1 - ld.d $a0, $sp, 104 # 8-byte Folded Reload + ld.d $a0, $sp, 112 # 8-byte Folded Reload ori $a1, $zero, 2 bltu $a1, $a0, .LBB77_58 .LBB77_55: # in Loop: Header=BB77_9 Depth=1 @@ -24541,10 +24545,10 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype # %bb.56: # in Loop: Header=BB77_9 Depth=1 ld.d $a1, $sp, 248 # 8-byte Folded Reload bnez $a1, .LBB77_58 - b .LBB77_147 + b .LBB77_146 .LBB77_57: # in Loop: Header=BB77_9 Depth=1 st.d $zero, $sp, 248 # 8-byte Folded Spill - ld.d $a0, $sp, 104 # 8-byte Folded Reload + ld.d $a0, $sp, 112 # 8-byte Folded Reload ori $a1, $zero, 2 bgeu $a1, $a0, .LBB77_55 .p2align 4, , 16 @@ -24553,22 +24557,22 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype bne $t0, $a0, .LBB77_60 # %bb.59: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 248 # 8-byte Folded Reload - beqz $a0, .LBB77_144 + beqz $a0, .LBB77_143 .LBB77_60: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 8 bne $t0, $a0, .LBB77_62 # %bb.61: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 248 # 8-byte Folded Reload - beqz $a0, .LBB77_145 + beqz $a0, .LBB77_144 .LBB77_62: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 24 bne $t0, $a0, .LBB77_64 # %bb.63: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 248 # 8-byte Folded Reload - beqz $a0, .LBB77_146 + beqz $a0, .LBB77_145 .LBB77_64: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 23, 0 - ld.d $a1, $sp, 152 # 8-byte Folded Reload + ld.d $a1, $sp, 160 # 8-byte Folded Reload xor $a0, $a0, $a1 sltui $a0, $a0, 1 ld.d $a1, $sp, 304 # 8-byte Folded Reload @@ -24577,7 +24581,7 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype or $a0, $a0, $a1 beqz $a0, .LBB77_71 # %bb.65: # in Loop: Header=BB77_9 Depth=1 - st.d $t2, $sp, 160 # 8-byte Folded Spill + st.d $t2, $sp, 168 # 8-byte Folded Spill st.d $a0, $sp, 304 # 8-byte Folded Spill addi.w $a0, $a0, 1 xor $a0, $a0, $fp @@ -24592,8 +24596,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype maskeqz $a0, $a0, $a1 masknez $a1, $a4, $a1 or $s6, $a0, $a1 + addi.d $s2, $sp, 312 ori $a0, $zero, 32 - st.d $s2, $sp, 168 # 8-byte Folded Spill bne $s8, $a0, .LBB77_74 # %bb.66: # in Loop: Header=BB77_9 Depth=1 bnez $s6, .LBB77_74 @@ -24605,8 +24609,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype beqz $t1, .LBB77_74 # %bb.69: # in Loop: Header=BB77_9 Depth=1 move $s1, $t0 + stx.b $zero, $t1, $s2 addi.d $a0, $sp, 312 - stx.b $zero, $t1, $a0 ori $a2, $zero, 10 move $a1, $zero pcaddu18i $ra, %call36(__isoc23_strtol) @@ -24620,7 +24624,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype .p2align 4, , 16 .LBB77_71: # in Loop: Header=BB77_9 Depth=1 st.d $zero, $sp, 304 # 8-byte Folded Spill - b .LBB77_86 + ld.d $t4, $sp, 256 # 8-byte Folded Reload + b .LBB77_96 .LBB77_72: # in Loop: Header=BB77_9 Depth=1 st.d $zero, $sp, 304 # 8-byte Folded Spill st.d $zero, $sp, 232 # 8-byte Folded Spill @@ -24643,18 +24648,18 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype beqz $t1, .LBB77_79 # %bb.77: # in Loop: Header=BB77_9 Depth=1 move $s6, $t0 + stx.b $zero, $t1, $s2 addi.d $a0, $sp, 312 - stx.b $zero, $t1, $a0 ori $a2, $zero, 10 move $a1, $zero pcaddu18i $ra, %call36(__isoc23_strtol) jirl $ra, $ra, 0 st.d $a0, $sp, 224 # 8-byte Folded Spill addi.w $a0, $a0, 0 - beqz $a0, .LBB77_129 + beqz $a0, .LBB77_86 # %bb.78: # in Loop: Header=BB77_9 Depth=1 move $t1, $zero - b .LBB77_130 + b .LBB77_87 .p2align 4, , 16 .LBB77_79: # in Loop: Header=BB77_9 Depth=1 ld.d $a1, $sp, 200 # 8-byte Folded Reload @@ -24665,8 +24670,8 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype # %bb.80: # in Loop: Header=BB77_9 Depth=1 beqz $t1, .LBB77_82 # %bb.81: # in Loop: Header=BB77_9 Depth=1 + stx.b $zero, $t1, $s2 addi.d $a0, $sp, 312 - stx.b $zero, $t1, $a0 ori $a2, $zero, 10 move $a1, $zero move $s6, $t0 @@ -24675,14 +24680,14 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype move $t0, $s6 st.d $a0, $sp, 200 # 8-byte Folded Spill move $t1, $zero - b .LBB77_131 + b .LBB77_88 .LBB77_82: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 1 - beqz $s6, .LBB77_131 + beqz $s6, .LBB77_88 .p2align 4, , 16 # %bb.83: # in Loop: Header=BB77_9 Depth=1 ori $a1, $zero, 31 - bge $a1, $t1, .LBB77_132 + bge $a1, $t1, .LBB77_89 .LBB77_84: # in Loop: Header=BB77_9 Depth=1 st.d $zero, $sp, 304 # 8-byte Folded Spill st.d $zero, $sp, 192 # 8-byte Folded Spill @@ -24690,27 +24695,69 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype st.d $zero, $sp, 224 # 8-byte Folded Spill move $t1, $zero st.d $zero, $sp, 200 # 8-byte Folded Spill - ld.d $s4, $sp, 96 # 8-byte Folded Reload + ld.d $s2, $sp, 104 # 8-byte Folded Reload .LBB77_85: # in Loop: Header=BB77_9 Depth=1 - ld.d $s2, $sp, 168 # 8-byte Folded Reload - ld.d $t2, $sp, 160 # 8-byte Folded Reload -.LBB77_86: # %.thread863 + ld.d $t4, $sp, 256 # 8-byte Folded Reload + ld.d $t2, $sp, 168 # 8-byte Folded Reload + b .LBB77_96 +.LBB77_86: # in Loop: Header=BB77_9 Depth=1 + st.d $zero, $sp, 200 # 8-byte Folded Spill + move $t1, $zero + st.d $zero, $sp, 304 # 8-byte Folded Spill + st.d $zero, $sp, 232 # 8-byte Folded Spill + st.d $zero, $sp, 224 # 8-byte Folded Spill +.LBB77_87: # %.thread642 + # in Loop: Header=BB77_9 Depth=1 + move $t0, $s6 +.LBB77_88: # %.thread642 # in Loop: Header=BB77_9 Depth=1 - ld.d $a3, $sp, 256 # 8-byte Folded Reload -.LBB77_87: # %.thread863 + move $a0, $zero + addi.w $a1, $t1, 1 + stx.b $s8, $t1, $s2 + move $t1, $a1 + ori $a1, $zero, 31 + blt $a1, $t1, .LBB77_84 +.LBB77_89: # in Loop: Header=BB77_9 Depth=1 + ld.d $a1, $sp, 232 # 8-byte Folded Reload + addi.w $a3, $a1, 0 + ld.d $a1, $sp, 224 # 8-byte Folded Reload + addi.w $a2, $a1, 0 + ld.d $a1, $sp, 200 # 8-byte Folded Reload + addi.w $a1, $a1, 0 + ld.d $s2, $sp, 104 # 8-byte Folded Reload + ori $a4, $zero, 6 + bne $s2, $a4, .LBB77_93 +# %bb.90: # in Loop: Header=BB77_9 Depth=1 + beqz $a3, .LBB77_93 +# %bb.91: # in Loop: Header=BB77_9 Depth=1 + beqz $a2, .LBB77_93 +# %bb.92: # in Loop: Header=BB77_9 Depth=1 + bnez $a1, .LBB77_148 +.LBB77_93: # in Loop: Header=BB77_9 Depth=1 + masknez $a0, $a0, $s1 + st.d $a0, $sp, 192 # 8-byte Folded Spill + beqz $a3, .LBB77_85 +# %bb.94: # in Loop: Header=BB77_9 Depth=1 + ld.d $t4, $sp, 256 # 8-byte Folded Reload + ld.d $t2, $sp, 168 # 8-byte Folded Reload + beqz $a2, .LBB77_96 +# %bb.95: # in Loop: Header=BB77_9 Depth=1 + bnez $a1, .LBB77_149 + .p2align 4, , 16 +.LBB77_96: # %.thread863 # in Loop: Header=BB77_9 Depth=1 - addi.d $a0, $s7, -474 + addi.d $a0, $s4, -474 sltui $a0, $a0, 1 - masknez $a1, $a3, $a0 + masknez $a1, $s7, $a0 maskeqz $a0, $fp, $a0 - or $t3, $a0, $a1 - beqz $t3, .LBB77_114 -# %bb.88: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 1 - bne $a0, $fp, .LBB77_99 -# %bb.89: # in Loop: Header=BB77_9 Depth=1 + or $s7, $a0, $a1 + beqz $s7, .LBB77_123 +# %bb.97: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 1 + bne $a0, $fp, .LBB77_108 +# %bb.98: # in Loop: Header=BB77_9 Depth=1 sltui $a0, $s8, 2 - maskeqz $t3, $t3, $a0 + maskeqz $s7, $s7, $a0 addi.w $a1, $zero, -1 masknez $a1, $a1, $a0 maskeqz $a2, $s8, $a0 @@ -24722,28 +24769,28 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype ld.d $a1, $sp, 264 # 8-byte Folded Reload maskeqz $a1, $a1, $a0 st.d $a1, $sp, 264 # 8-byte Folded Spill - addi.w $a0, $t3, 2 - beq $a0, $fp, .LBB77_100 -.LBB77_90: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $s7, -1 + addi.w $a0, $s7, 2 + beq $a0, $fp, .LBB77_109 +.LBB77_99: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s4, -1 ori $a1, $zero, 3 - bltu $a0, $a1, .LBB77_101 -.LBB77_91: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 4 + bltu $a0, $a1, .LBB77_110 +.LBB77_100: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 4 ld.d $a1, $sp, 288 # 8-byte Folded Reload - bne $a0, $fp, .LBB77_93 -# %bb.92: # in Loop: Header=BB77_9 Depth=1 - move $t3, $zero + bne $a0, $fp, .LBB77_102 +# %bb.101: # in Loop: Header=BB77_9 Depth=1 + move $s7, $zero move $a1, $zero st.d $zero, $sp, 264 # 8-byte Folded Spill addi.w $a0, $zero, -1 st.d $a0, $sp, 272 # 8-byte Folded Spill -.LBB77_93: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 6 - bne $a0, $fp, .LBB77_102 -.LBB77_94: # in Loop: Header=BB77_9 Depth=1 - sltui $a0, $s7, 1 - masknez $t3, $t3, $a0 +.LBB77_102: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 6 + bne $a0, $fp, .LBB77_111 +.LBB77_103: # in Loop: Header=BB77_9 Depth=1 + sltui $a0, $s4, 1 + masknez $s7, $s7, $a0 move $a3, $a1 ld.d $a1, $sp, 272 # 8-byte Folded Reload masknez $a1, $a1, $a0 @@ -24752,36 +24799,36 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype or $a1, $a2, $a1 st.d $a1, $sp, 272 # 8-byte Folded Spill masknez $a1, $a3, $a0 - st.d $s7, $sp, 264 # 8-byte Folded Spill - addi.w $a0, $t3, 8 - beq $a0, $fp, .LBB77_103 -.LBB77_95: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 10 - bne $a0, $fp, .LBB77_105 -.LBB77_96: # in Loop: Header=BB77_9 Depth=1 + st.d $s4, $sp, 264 # 8-byte Folded Spill + addi.w $a0, $s7, 8 + beq $a0, $fp, .LBB77_112 +.LBB77_104: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 10 + bne $a0, $fp, .LBB77_114 +.LBB77_105: # in Loop: Header=BB77_9 Depth=1 bstrpick.d $a0, $s3, 15, 0 ori $a1, $zero, 4 - bltu $a1, $a0, .LBB77_98 -# %bb.97: # in Loop: Header=BB77_9 Depth=1 + bltu $a1, $a0, .LBB77_107 +# %bb.106: # in Loop: Header=BB77_9 Depth=1 ori $a1, $zero, 1 sll.d $a0, $a1, $a0 andi $a0, $a0, 26 - bnez $a0, .LBB77_106 -.LBB77_98: # in Loop: Header=BB77_9 Depth=1 - move $t3, $zero + bnez $a0, .LBB77_115 +.LBB77_107: # in Loop: Header=BB77_9 Depth=1 move $s7, $zero + move $s4, $zero st.d $zero, $sp, 264 # 8-byte Folded Spill addi.w $a0, $zero, -1 st.d $a0, $sp, 272 # 8-byte Folded Spill - b .LBB77_106 + b .LBB77_115 .p2align 4, , 16 -.LBB77_99: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 2 - bne $a0, $fp, .LBB77_90 -.LBB77_100: # in Loop: Header=BB77_9 Depth=1 +.LBB77_108: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 2 + bne $a0, $fp, .LBB77_99 +.LBB77_109: # in Loop: Header=BB77_9 Depth=1 addi.w $a0, $s8, -1 sltui $a0, $a0, 2 - maskeqz $t3, $t3, $a0 + maskeqz $s7, $s7, $a0 addi.w $a1, $zero, -1 masknez $a1, $a1, $a0 ld.d $a2, $sp, 272 # 8-byte Folded Reload @@ -24794,101 +24841,101 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype ld.d $a1, $sp, 264 # 8-byte Folded Reload maskeqz $a1, $a1, $a0 st.d $a1, $sp, 264 # 8-byte Folded Spill - addi.w $a0, $s7, -1 + addi.w $a0, $s4, -1 ori $a1, $zero, 3 - bgeu $a0, $a1, .LBB77_91 -.LBB77_101: # in Loop: Header=BB77_9 Depth=1 + bgeu $a0, $a1, .LBB77_100 +.LBB77_110: # in Loop: Header=BB77_9 Depth=1 ld.d $a1, $sp, 288 # 8-byte Folded Reload - addi.w $a0, $t3, 6 - beq $a0, $fp, .LBB77_94 + addi.w $a0, $s7, 6 + beq $a0, $fp, .LBB77_103 .p2align 4, , 16 -.LBB77_102: # in Loop: Header=BB77_9 Depth=1 - addi.w $a0, $t3, 8 - bne $a0, $fp, .LBB77_95 -.LBB77_103: # in Loop: Header=BB77_9 Depth=1 - beqz $s7, .LBB77_139 -# %bb.104: # in Loop: Header=BB77_9 Depth=1 +.LBB77_111: # in Loop: Header=BB77_9 Depth=1 + addi.w $a0, $s7, 8 + bne $a0, $fp, .LBB77_104 +.LBB77_112: # in Loop: Header=BB77_9 Depth=1 + beqz $s4, .LBB77_138 +# %bb.113: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 264 # 8-byte Folded Reload - mul.d $a0, $a0, $s7 - addi.w $s2, $a0, 512 - addi.w $a0, $t3, 10 - beq $a0, $fp, .LBB77_96 -.LBB77_105: # in Loop: Header=BB77_9 Depth=1 - move $s7, $a1 -.LBB77_106: # in Loop: Header=BB77_9 Depth=1 - beqz $s2, .LBB77_115 -# %bb.107: # in Loop: Header=BB77_9 Depth=1 - sub.w $a0, $fp, $t3 - blez $a0, .LBB77_116 -# %bb.108: # in Loop: Header=BB77_9 Depth=1 - bge $s2, $a0, .LBB77_116 -# %bb.109: # in Loop: Header=BB77_9 Depth=1 + mul.d $a0, $a0, $s4 + addi.w $t4, $a0, 512 + addi.w $a0, $s7, 10 + beq $a0, $fp, .LBB77_105 +.LBB77_114: # in Loop: Header=BB77_9 Depth=1 + move $s4, $a1 +.LBB77_115: # in Loop: Header=BB77_9 Depth=1 + beqz $t4, .LBB77_124 +# %bb.116: # in Loop: Header=BB77_9 Depth=1 + sub.w $a0, $fp, $s7 + blez $a0, .LBB77_125 +# %bb.117: # in Loop: Header=BB77_9 Depth=1 + bge $t4, $a0, .LBB77_125 +# %bb.118: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 7 - bne $s4, $a0, .LBB77_112 -# %bb.110: # in Loop: Header=BB77_9 Depth=1 + bne $s2, $a0, .LBB77_121 +# %bb.119: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 1 - bne $s7, $a0, .LBB77_112 -# %bb.111: # in Loop: Header=BB77_9 Depth=1 + bne $s4, $a0, .LBB77_121 +# %bb.120: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 272 # 8-byte Folded Reload - beqz $a0, .LBB77_152 -.LBB77_112: # in Loop: Header=BB77_9 Depth=1 + beqz $a0, .LBB77_151 +.LBB77_121: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 1 - bne $s7, $a0, .LBB77_116 -# %bb.113: # in Loop: Header=BB77_9 Depth=1 + bne $s4, $a0, .LBB77_125 +# %bb.122: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 272 # 8-byte Folded Reload - bnez $a0, .LBB77_116 - b .LBB77_153 + bnez $a0, .LBB77_125 + b .LBB77_152 .p2align 4, , 16 -.LBB77_114: # in Loop: Header=BB77_9 Depth=1 - move $t3, $zero - b .LBB77_117 +.LBB77_123: # in Loop: Header=BB77_9 Depth=1 + move $s7, $zero + b .LBB77_126 .p2align 4, , 16 -.LBB77_115: # in Loop: Header=BB77_9 Depth=1 - move $s2, $zero -.LBB77_116: # in Loop: Header=BB77_9 Depth=1 - st.d $s7, $sp, 288 # 8-byte Folded Spill -.LBB77_117: # in Loop: Header=BB77_9 Depth=1 +.LBB77_124: # in Loop: Header=BB77_9 Depth=1 + move $t4, $zero +.LBB77_125: # in Loop: Header=BB77_9 Depth=1 + st.d $s4, $sp, 288 # 8-byte Folded Spill +.LBB77_126: # in Loop: Header=BB77_9 Depth=1 ld.d $a0, $sp, 296 # 8-byte Folded Reload bstrpick.d $a0, $a0, 31, 25 - ld.d $s7, $sp, 240 # 8-byte Folded Reload + ld.d $s4, $sp, 240 # 8-byte Folded Reload ori $a1, $zero, 116 - bne $a0, $a1, .LBB77_119 -# %bb.118: # in Loop: Header=BB77_9 Depth=1 + bne $a0, $a1, .LBB77_128 +# %bb.127: # in Loop: Header=BB77_9 Depth=1 addi.d $a0, $s8, 1 andi $a0, $a0, 254 - beqz $a0, .LBB77_121 -.LBB77_119: # in Loop: Header=BB77_9 Depth=1 + beqz $a0, .LBB77_130 +.LBB77_128: # in Loop: Header=BB77_9 Depth=1 ori $a0, $zero, 8 - bne $s4, $a0, .LBB77_8 -.LBB77_120: # in Loop: Header=BB77_9 Depth=1 - ld.d $a0, $sp, 80 # 8-byte Folded Reload + bne $s2, $a0, .LBB77_8 +.LBB77_129: # in Loop: Header=BB77_9 Depth=1 + ld.d $a0, $sp, 88 # 8-byte Folded Reload sub.w $a0, $fp, $a0 - ld.d $a1, $sp, 64 # 8-byte Folded Reload + ld.d $a1, $sp, 72 # 8-byte Folded Reload blt $a0, $a1, .LBB77_8 - b .LBB77_143 -.LBB77_121: # in Loop: Header=BB77_9 Depth=1 + b .LBB77_142 +.LBB77_130: # in Loop: Header=BB77_9 Depth=1 srli.d $a0, $s3, 24 add.d $a0, $fp, $a0 andi $a0, $a0, 255 slli.d $a1, $a0, 2 - ld.d $a2, $sp, 136 # 8-byte Folded Reload + ld.d $a2, $sp, 144 # 8-byte Folded Reload ldx.w $a3, $a2, $a1 move $a1, $zero srli.d $a2, $s3, 22 andi $a2, $a2, 1020 ori $a4, $zero, 6 - blt $a3, $a4, .LBB77_128 -# %bb.122: # in Loop: Header=BB77_9 Depth=1 - ld.d $a4, $sp, 128 # 8-byte Folded Reload + blt $a3, $a4, .LBB77_137 +# %bb.131: # in Loop: Header=BB77_9 Depth=1 + ld.d $a4, $sp, 136 # 8-byte Folded Reload ldx.w $a4, $a4, $a2 - bge $a4, $a3, .LBB77_128 -# %bb.123: # in Loop: Header=BB77_9 Depth=1 + bge $a4, $a3, .LBB77_137 +# %bb.132: # in Loop: Header=BB77_9 Depth=1 sub.w $a4, $fp, $a3 ori $a5, $zero, 4095 - blt $a5, $a4, .LBB77_128 -# %bb.124: # in Loop: Header=BB77_9 Depth=1 - addi.w $a1, $s7, 1 - ld.d $a7, $sp, 16 # 8-byte Folded Reload + blt $a5, $a4, .LBB77_137 +# %bb.133: # in Loop: Header=BB77_9 Depth=1 + addi.w $a1, $s4, 1 + ld.d $a7, $sp, 24 # 8-byte Folded Reload sltui $a4, $a7, 1 slt $a5, $a7, $a3 masknez $a6, $a3, $a5 @@ -24897,134 +24944,88 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype masknez $a5, $a5, $a4 maskeqz $a3, $a3, $a4 or $a3, $a3, $a5 - st.d $a3, $sp, 16 # 8-byte Folded Spill + st.d $a3, $sp, 24 # 8-byte Folded Spill ori $a3, $zero, 8 - beq $s4, $a3, .LBB77_127 -# %bb.125: # in Loop: Header=BB77_9 Depth=1 + beq $s2, $a3, .LBB77_136 +# %bb.134: # in Loop: Header=BB77_9 Depth=1 ori $a3, $zero, 3 - blt $s7, $a3, .LBB77_127 -# %bb.126: # in Loop: Header=BB77_9 Depth=1 - ld.d $a3, $sp, 16 # 8-byte Folded Reload + blt $s4, $a3, .LBB77_136 +# %bb.135: # in Loop: Header=BB77_9 Depth=1 + ld.d $a3, $sp, 24 # 8-byte Folded Reload ori $a4, $zero, 5 - blt $a4, $a3, .LBB77_156 -.LBB77_127: # in Loop: Header=BB77_9 Depth=1 - st.d $fp, $sp, 80 # 8-byte Folded Spill -.LBB77_128: # %.thread682 + blt $a4, $a3, .LBB77_155 +.LBB77_136: # in Loop: Header=BB77_9 Depth=1 + st.d $fp, $sp, 88 # 8-byte Folded Spill +.LBB77_137: # %.thread682 # in Loop: Header=BB77_9 Depth=1 - ld.d $a3, $sp, 128 # 8-byte Folded Reload - add.d $a2, $a3, $a2 ld.d $a3, $sp, 136 # 8-byte Folded Reload + add.d $a2, $a3, $a2 + ld.d $a3, $sp, 144 # 8-byte Folded Reload alsl.d $a0, $a0, $a3, 2 st.w $fp, $a0, 0 st.w $fp, $a2, 0 - move $s7, $a1 + move $s4, $a1 ori $a0, $zero, 8 - beq $s4, $a0, .LBB77_120 + beq $s2, $a0, .LBB77_129 b .LBB77_8 -.LBB77_129: # in Loop: Header=BB77_9 Depth=1 - st.d $zero, $sp, 200 # 8-byte Folded Spill - move $t1, $zero - st.d $zero, $sp, 304 # 8-byte Folded Spill - st.d $zero, $sp, 232 # 8-byte Folded Spill - st.d $zero, $sp, 224 # 8-byte Folded Spill -.LBB77_130: # %.thread642 - # in Loop: Header=BB77_9 Depth=1 - move $t0, $s6 -.LBB77_131: # %.thread642 - # in Loop: Header=BB77_9 Depth=1 - move $a0, $zero - addi.w $a1, $t1, 1 - addi.d $a2, $sp, 312 - stx.b $s8, $t1, $a2 - move $t1, $a1 - ori $a1, $zero, 31 - blt $a1, $t1, .LBB77_84 -.LBB77_132: # in Loop: Header=BB77_9 Depth=1 - ld.d $a1, $sp, 232 # 8-byte Folded Reload - addi.w $a3, $a1, 0 - ld.d $a1, $sp, 224 # 8-byte Folded Reload - addi.w $a2, $a1, 0 - ld.d $a1, $sp, 200 # 8-byte Folded Reload - addi.w $a1, $a1, 0 - ld.d $s4, $sp, 96 # 8-byte Folded Reload - ori $a4, $zero, 6 - bne $s4, $a4, .LBB77_136 -# %bb.133: # in Loop: Header=BB77_9 Depth=1 - beqz $a3, .LBB77_136 -# %bb.134: # in Loop: Header=BB77_9 Depth=1 - beqz $a2, .LBB77_136 -# %bb.135: # in Loop: Header=BB77_9 Depth=1 - bnez $a1, .LBB77_149 -.LBB77_136: # in Loop: Header=BB77_9 Depth=1 - masknez $a0, $a0, $s1 - st.d $a0, $sp, 192 # 8-byte Folded Spill - beqz $a3, .LBB77_85 -# %bb.137: # in Loop: Header=BB77_9 Depth=1 - ld.d $s2, $sp, 168 # 8-byte Folded Reload - ld.d $t2, $sp, 160 # 8-byte Folded Reload - ld.d $a3, $sp, 256 # 8-byte Folded Reload - beqz $a2, .LBB77_87 -# %bb.138: # in Loop: Header=BB77_9 Depth=1 - beqz $a1, .LBB77_87 - b .LBB77_150 -.LBB77_139: # in Loop: Header=BB77_9 Depth=1 - move $t3, $zero +.LBB77_138: # in Loop: Header=BB77_9 Depth=1 + move $s7, $zero move $a1, $zero st.d $zero, $sp, 264 # 8-byte Folded Spill addi.w $a0, $zero, -1 st.d $a0, $sp, 272 # 8-byte Folded Spill - addi.w $a0, $t3, 10 - beq $a0, $fp, .LBB77_96 - b .LBB77_105 + addi.w $a0, $s7, 10 + beq $a0, $fp, .LBB77_105 + b .LBB77_114 +.LBB77_139: + ld.d $s2, $sp, 184 # 8-byte Folded Reload .LBB77_140: - ld.d $s4, $sp, 184 # 8-byte Folded Reload + ld.d $s1, $sp, 40 # 8-byte Folded Reload + b .LBB77_158 .LBB77_141: - ld.d $s1, $sp, 32 # 8-byte Folded Reload - b .LBB77_159 + move $s2, $zero + ld.d $s1, $sp, 40 # 8-byte Folded Reload + b .LBB77_158 .LBB77_142: - move $s4, $zero - ld.d $s1, $sp, 32 # 8-byte Folded Reload - b .LBB77_159 -.LBB77_143: - move $s4, $zero - ld.d $a0, $sp, 8 # 8-byte Folded Reload - ld.d $a1, $sp, 80 # 8-byte Folded Reload + move $s2, $zero + ld.d $a0, $sp, 16 # 8-byte Folded Reload + ld.d $a1, $sp, 88 # 8-byte Folded Reload add.d $a1, $a0, $a1 - b .LBB77_157 + b .LBB77_156 +.LBB77_143: + ld.d $a0, $sp, 16 # 8-byte Folded Reload + add.d $a0, $a0, $s5 + addi.d $a1, $a0, -1 + ori $s2, $zero, 2 + b .LBB77_156 .LBB77_144: - ld.d $a0, $sp, 8 # 8-byte Folded Reload - add.d $a0, $a0, $s0 + ld.d $a0, $sp, 16 # 8-byte Folded Reload + add.d $a0, $a0, $s5 addi.d $a1, $a0, -1 - ori $s4, $zero, 2 - b .LBB77_157 + ori $s2, $zero, 3 + b .LBB77_156 .LBB77_145: - ld.d $a0, $sp, 8 # 8-byte Folded Reload - add.d $a0, $a0, $s0 + ld.d $a0, $sp, 16 # 8-byte Folded Reload + add.d $a0, $a0, $s5 addi.d $a1, $a0, -1 - ori $s4, $zero, 3 - b .LBB77_157 + ori $s2, $zero, 4 + b .LBB77_156 .LBB77_146: - ld.d $a0, $sp, 8 # 8-byte Folded Reload - add.d $a0, $a0, $s0 - addi.d $a1, $a0, -1 - ori $s4, $zero, 4 - b .LBB77_157 -.LBB77_147: ori $a2, $zero, 4 - ld.d $a1, $sp, 56 # 8-byte Folded Reload - ld.d $a3, $sp, 48 # 8-byte Folded Reload + ld.d $a1, $sp, 64 # 8-byte Folded Reload + ld.d $a3, $sp, 56 # 8-byte Folded Reload mul.d $a1, $a1, $a3 - bne $t0, $a2, .LBB77_154 -# %bb.148: # %.thread623 + bne $t0, $a2, .LBB77_153 +# %bb.147: # %.thread623 addi.w $a0, $a1, 0 srli.d $a0, $a0, 1 - ld.d $a1, $sp, 24 # 8-byte Folded Reload + ld.d $a1, $sp, 32 # 8-byte Folded Reload add.d $a0, $a0, $a1 - ld.d $s1, $sp, 32 # 8-byte Folded Reload - ld.d $a3, $sp, 8 # 8-byte Folded Reload - b .LBB77_165 -.LBB77_149: - move $s4, $zero + ld.d $s1, $sp, 40 # 8-byte Folded Reload + ld.d $a3, $sp, 16 # 8-byte Folded Reload + b .LBB77_164 +.LBB77_148: + move $s2, $zero ld.d $a0, $sp, 232 # 8-byte Folded Reload ld.d $a1, $sp, 224 # 8-byte Folded Reload mul.d $a0, $a1, $a0 @@ -25032,80 +25033,80 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype add.d $a0, $a1, $a0 add.d $a0, $a0, $fp addi.w $a0, $a0, -1 - ld.d $a1, $sp, 8 # 8-byte Folded Reload + ld.d $a1, $sp, 16 # 8-byte Folded Reload add.d $a1, $a1, $a0 - b .LBB77_157 -.LBB77_150: - ld.d $a0, $sp, 8 # 8-byte Folded Reload + b .LBB77_156 +.LBB77_149: + ld.d $a0, $sp, 16 # 8-byte Folded Reload ld.d $a1, $sp, 304 # 8-byte Folded Reload add.d $a0, $a0, $a1 addi.d $a1, $a0, -2 - ori $s4, $zero, 6 - b .LBB77_157 -.LBB77_151: - ld.d $a0, $sp, 8 # 8-byte Folded Reload + ori $s2, $zero, 6 + b .LBB77_156 +.LBB77_150: + ld.d $a0, $sp, 16 # 8-byte Folded Reload ld.d $a1, $sp, 280 # 8-byte Folded Reload add.d $a0, $a0, $a1 addi.d $a1, $a0, -3 - ori $s4, $zero, 1 - b .LBB77_157 + ori $s2, $zero, 1 + b .LBB77_156 +.LBB77_151: + move $s2, $zero + ld.d $a0, $sp, 16 # 8-byte Folded Reload + add.d $a1, $a0, $t4 + b .LBB77_156 .LBB77_152: - move $s4, $zero - ld.d $a0, $sp, 8 # 8-byte Folded Reload - add.d $a1, $a0, $s2 - b .LBB77_157 -.LBB77_153: - ld.d $a0, $sp, 8 # 8-byte Folded Reload - add.d $a0, $a0, $t3 + ld.d $a0, $sp, 16 # 8-byte Folded Reload + add.d $a0, $a0, $s7 addi.d $a1, $a0, -1 - ori $s4, $zero, 7 - b .LBB77_157 -.LBB77_154: + ori $s2, $zero, 7 + b .LBB77_156 +.LBB77_153: ori $a2, $zero, 24 - ld.d $s1, $sp, 32 # 8-byte Folded Reload - ld.d $a3, $sp, 8 # 8-byte Folded Reload - bne $t0, $a2, .LBB77_164 -# %bb.155: + ld.d $s1, $sp, 40 # 8-byte Folded Reload + ld.d $a3, $sp, 16 # 8-byte Folded Reload + bne $t0, $a2, .LBB77_163 +# %bb.154: alsl.d $a0, $a1, $a1, 1 - ld.d $a1, $sp, 24 # 8-byte Folded Reload + ld.d $a1, $sp, 32 # 8-byte Folded Reload add.d $a0, $a0, $a1 - b .LBB77_165 -.LBB77_156: - ld.d $a0, $sp, 8 # 8-byte Folded Reload - ld.d $a1, $sp, 16 # 8-byte Folded Reload + b .LBB77_164 +.LBB77_155: + ld.d $a0, $sp, 16 # 8-byte Folded Reload + ld.d $a1, $sp, 24 # 8-byte Folded Reload add.d $a0, $a0, $a1 addi.d $a1, $a0, -5 - ori $s4, $zero, 8 + ori $s2, $zero, 8 +.LBB77_156: # %.thread689.sink.split + ld.d $s1, $sp, 40 # 8-byte Folded Reload .LBB77_157: # %.thread689.sink.split - ld.d $s1, $sp, 32 # 8-byte Folded Reload -.LBB77_158: # %.thread689.sink.split ld.d $a0, $sp, 208 # 8-byte Folded Reload move $a2, $zero pcaddu18i $ra, %call36(fseek) jirl $ra, $ra, 0 -.LBB77_159: # %.thread689 +.LBB77_158: # %.thread689 ld.w $fp, $s1, 0 ld.w $s0, $s1, 4 addi.w $a0, $fp, -1024 st.w $a0, $s1, 0 - bge $s0, $a0, .LBB77_161 -# %bb.160: + bge $s0, $a0, .LBB77_160 +# %bb.159: st.w $a0, $s1, 4 move $s0, $a0 -.LBB77_161: # %_ZN5ArrayIiLi0EED2Ev.exit594 - ld.d $a0, $sp, 128 # 8-byte Folded Reload +.LBB77_160: # %_ZN5ArrayIiLi0EED2Ev.exit594 + ld.d $a0, $sp, 136 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 addi.w $a0, $fp, -2048 st.w $a0, $s1, 0 - bge $s0, $a0, .LBB77_163 -# %bb.162: + bge $s0, $a0, .LBB77_162 +# %bb.161: st.w $a0, $s1, 4 -.LBB77_163: # %_ZN5ArrayIiLi0EED2Ev.exit595 - ld.d $a0, $sp, 136 # 8-byte Folded Reload +.LBB77_162: # %_ZN5ArrayIiLi0EED2Ev.exit595 + ld.d $a0, $sp, 144 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 - move $a0, $s4 + move $a0, $s2 ld.d $s8, $sp, 344 # 8-byte Folded Reload ld.d $s7, $sp, 352 # 8-byte Folded Reload ld.d $s6, $sp, 360 # 8-byte Folded Reload @@ -25119,44 +25120,44 @@ _Z6detectP8_IO_FILEi8Filetype: # @_Z6detectP8_IO_FILEi8Filetype ld.d $ra, $sp, 424 # 8-byte Folded Reload addi.d $sp, $sp, 432 ret -.LBB77_164: +.LBB77_163: sltui $a0, $a0, 1 - ld.d $a2, $sp, 24 # 8-byte Folded Reload + ld.d $a2, $sp, 32 # 8-byte Folded Reload add.d $a1, $a1, $a2 - ld.d $a2, $sp, 120 # 8-byte Folded Reload + ld.d $a2, $sp, 128 # 8-byte Folded Reload masknez $a2, $a2, $a0 maskeqz $a0, $a1, $a0 or $a0, $a0, $a2 -.LBB77_165: - move $s4, $zero +.LBB77_164: + move $s2, $zero addi.w $a0, $a0, 0 add.d $a1, $a3, $a0 - b .LBB77_158 -.LBB77_166: + b .LBB77_157 +.LBB77_165: pcalau12i $a0, %pc_hi20(.L.str.59) addi.d $a0, $a0, %pc_lo12(.L.str.59) pcaddu18i $ra, %call36(_Z4quitPKc) jirl $ra, $ra, 0 -.LBB77_167: +.LBB77_166: .Ltmp324: # EH_LABEL pcalau12i $a0, %pc_hi20(.L.str.59) addi.d $a0, $a0, %pc_lo12(.L.str.59) pcaddu18i $ra, %call36(_Z4quitPKc) jirl $ra, $ra, 0 .Ltmp325: # EH_LABEL -# %bb.168: # %.noexc -.LBB77_169: +# %bb.167: # %.noexc +.LBB77_168: .Ltmp326: # EH_LABEL ld.w $a1, $s1, 0 ld.w $a2, $s1, 4 move $s0, $a0 addi.w $a0, $a1, -1024 st.w $a0, $s1, 0 - bge $a2, $a0, .LBB77_171 -# %bb.170: + bge $a2, $a0, .LBB77_170 +# %bb.169: st.w $a0, $s1, 4 -.LBB77_171: # %_ZN5ArrayIiLi0EED2Ev.exit - ld.d $a0, $sp, 136 # 8-byte Folded Reload +.LBB77_170: # %_ZN5ArrayIiLi0EED2Ev.exit + ld.d $a0, $sp, 144 # 8-byte Folded Reload pcaddu18i $ra, %call36(free) jirl $ra, $ra, 0 move $a0, $s0 diff --git a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/findcheck.s b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/findcheck.s index 48803247..745b7e7f 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/findcheck.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/findcheck.s @@ -259,6 +259,7 @@ finalcheck: # @finalcheck bstrpick.d $a7, $a7, 31, 0 ori $t0, $zero, 1 ori $t1, $zero, 1 + ld.d $s2, $sp, 56 # 8-byte Folded Reload b .LBB0_16 .p2align 4, , 16 .LBB0_14: # %._crit_edge174 @@ -272,7 +273,6 @@ finalcheck: # @finalcheck st.w $a5, $s1, 0 sub.d $t8, $t5, $t6 add.d $a4, $a4, $t8 - ld.d $s2, $sp, 56 # 8-byte Folded Reload st.w $a4, $s2, 0 add.d $t3, $t3, $t5 add.d $t4, $t4, $t6 diff --git a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/grdcell.s b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/grdcell.s index 431ac74f..8c1e7de6 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/grdcell.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/grdcell.s @@ -54,7 +54,8 @@ grdcell: # @grdcell st.d $zero, $sp, 168 # 8-byte Folded Spill st.d $zero, $sp, 104 # 8-byte Folded Spill lu12i.w $a0, 1606 - ori $a1, $a0, 368 + ori $a0, $a0, 368 + st.d $a0, $sp, 128 # 8-byte Folded Spill lu12i.w $a0, 472646 ori $a0, $a0, 368 lu32i.d $a0, 353385 @@ -78,7 +79,6 @@ grdcell: # @grdcell # kill: killed $r4 # implicit-def: $r4 # kill: killed $r4 - st.d $a1, $sp, 128 # 8-byte Folded Spill b .LBB0_5 .LBB0_2: # in Loop: Header=BB0_5 Depth=1 move $s2, $s4 diff --git a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/usite0.s b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/usite0.s index 02203408..43b7468d 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/usite0.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/usite0.s @@ -73,7 +73,6 @@ usite0: # @usite0 move $a6, $zero jirl $ra, $a7, 0 ld.w $a1, $s6, 0 - ld.d $s6, $sp, 32 # 8-byte Folded Reload ld.d $a2, $s8, 0 slli.d $a1, $a1, 3 ld.w $a3, $fp, 0 @@ -111,7 +110,8 @@ usite0: # @usite0 pcaddu18i $ra, %call36(usoftnet) jirl $ra, $ra, 0 ld.w $a1, $s4, 0 - ld.w $a2, $s6, 0 + ld.d $a2, $sp, 32 # 8-byte Folded Reload + ld.w $a2, $a2, 0 add.d $s5, $fp, $a0 add.w $a0, $s5, $s7 add.w $a1, $a2, $a1 diff --git a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/xgraph.s b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/xgraph.s index 277268b7..e5ec1eda 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/xgraph.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/xgraph.s @@ -766,6 +766,7 @@ xgraph: # @xgraph addi.d $a0, $a1, 2 bstrpick.d $a0, $a0, 31, 0 st.d $a0, $sp, 48 # 8-byte Folded Spill + ld.d $s8, $sp, 80 # 8-byte Folded Reload b .LBB0_87 .p2align 4, , 16 .LBB0_86: # %._crit_edge330 @@ -812,7 +813,6 @@ xgraph: # @xgraph add.d $a0, $s4, $a0 ld.w $s0, $a0, 36 slli.d $s2, $a1, 3 - ld.d $s8, $sp, 80 # 8-byte Folded Reload ldx.d $s6, $s8, $s2 ori $a0, $zero, 32 pcaddu18i $ra, %call36(malloc) diff --git a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/ygraph.s b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/ygraph.s index 8119c01b..bd961f59 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/ygraph.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/CMakeFiles/timberwolfmc.dir/ygraph.s @@ -766,6 +766,7 @@ ygraph: # @ygraph addi.d $a0, $a1, 2 bstrpick.d $a0, $a0, 31, 0 st.d $a0, $sp, 48 # 8-byte Folded Spill + ld.d $s8, $sp, 80 # 8-byte Folded Reload b .LBB0_87 .p2align 4, , 16 .LBB0_86: # %._crit_edge330 @@ -812,7 +813,6 @@ ygraph: # @ygraph add.d $a0, $s4, $a0 ld.w $s0, $a0, 36 slli.d $s2, $a1, 3 - ld.d $s8, $sp, 80 # 8-byte Folded Reload ldx.d $s6, $s8, $s2 ori $a0, $zero, 32 pcaddu18i $ra, %call36(malloc) diff --git a/results/MultiSource/Benchmarks/Prolangs-C/bison/CMakeFiles/mybison.dir/conflicts.s b/results/MultiSource/Benchmarks/Prolangs-C/bison/CMakeFiles/mybison.dir/conflicts.s index b076ae23..d7093549 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/bison/CMakeFiles/mybison.dir/conflicts.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/bison/CMakeFiles/mybison.dir/conflicts.s @@ -2275,12 +2275,12 @@ print_reductions: # @print_reductions pcalau12i $a0, %got_pc_hi20(ntokens) ld.d $a4, $a0, %got_pc_lo12(ntokens) ori $a5, $zero, 1 + ld.d $t0, $sp, 48 # 8-byte Folded Reload b .LBB10_70 .p2align 4, , 16 .LBB10_68: # in Loop: Header=BB10_70 Depth=1 srai.d $a0, $a6, 5 slli.d $a0, $a0, 2 - ld.d $t0, $sp, 48 # 8-byte Folded Reload ldx.w $a7, $t0, $a0 sll.w $a6, $a5, $a6 or $a6, $a7, $a6 diff --git a/results/MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s b/results/MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s index 569c948d..a6923f3e 100644 --- a/results/MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s +++ b/results/MultiSource/Benchmarks/Prolangs-C/football/CMakeFiles/football.dir/io.s @@ -3990,6 +3990,7 @@ display_rankings: # @display_rankings st.d $s7, $sp, 168 # 8-byte Folded Spill st.d $s5, $sp, 152 # 8-byte Folded Spill st.d $s3, $sp, 144 # 8-byte Folded Spill + ld.d $s8, $sp, 200 # 8-byte Folded Reload b .LBB21_2 .p2align 4, , 16 .LBB21_1: # in Loop: Header=BB21_2 Depth=1 @@ -4095,7 +4096,6 @@ display_rankings: # @display_rankings st.d $a1, $sp, 344 # 8-byte Folded Spill ld.d $a0, $sp, 216 # 8-byte Folded Reload add.d $s1, $a0, $fp - ld.d $s8, $sp, 200 # 8-byte Folded Reload move $a0, $s8 move $a1, $s2 pcaddu18i $ra, %call36(find_teams_rank) diff --git a/results/MultiSource/Benchmarks/Ptrdist/ks/CMakeFiles/ks.dir/KS-2.s b/results/MultiSource/Benchmarks/Ptrdist/ks/CMakeFiles/ks.dir/KS-2.s index f2c9dd4c..de687009 100644 --- a/results/MultiSource/Benchmarks/Ptrdist/ks/CMakeFiles/ks.dir/KS-2.s +++ b/results/MultiSource/Benchmarks/Ptrdist/ks/CMakeFiles/ks.dir/KS-2.s @@ -1125,6 +1125,7 @@ main: # @main ld.d $a0, $a0, %got_pc_lo12(GP) st.d $a0, $sp, 24 # 8-byte Folded Spill fmov.s $fs3, $fs0 + ld.d $s8, $sp, 56 # 8-byte Folded Reload b .LBB7_3 .p2align 4, , 16 .LBB7_2: # %SwapSubsetAndReset.exit @@ -1208,7 +1209,6 @@ main: # @main fcmp.ceq.s $fcc0, $fs3, $fs2 bceqz $fcc0, .LBB7_11 # %bb.10: # in Loop: Header=BB7_3 Depth=1 - ld.d $s8, $sp, 56 # 8-byte Folded Reload ld.d $a0, $s8, 0 fcvt.d.s $fs3, $fs2 movfr2gr.d $a2, $fs3 diff --git a/results/MultiSource/Benchmarks/SciMark2-C/CMakeFiles/scimark2.dir/scimark2.s b/results/MultiSource/Benchmarks/SciMark2-C/CMakeFiles/scimark2.dir/scimark2.s index e285f58e..275f1305 100644 --- a/results/MultiSource/Benchmarks/SciMark2-C/CMakeFiles/scimark2.dir/scimark2.s +++ b/results/MultiSource/Benchmarks/SciMark2-C/CMakeFiles/scimark2.dir/scimark2.s @@ -114,7 +114,6 @@ main: # @main pcaddu18i $ra, %call36(puts) jirl $ra, $ra, 0 vld $vr0, $sp, 16 # 16-byte Folded Reload - vst $vr0, $sp, 16 # 16-byte Folded Spill movfr2gr.d $a1, $fa0 pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a0, $a0, %pc_lo12(.L.str.4) diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s index 9d5da418..42a2e675 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Falign.s @@ -324,13 +324,12 @@ Fgetlag: # @Fgetlag bnez $s3, .LBB0_16 .LBB0_17: # %.preheader389 ld.d $a0, $sp, 176 # 8-byte Folded Reload - ld.d $s2, $sp, 248 # 8-byte Folded Reload + ld.d $s1, $sp, 248 # 8-byte Folded Reload blez $a0, .LBB0_20 # %bb.18: # %.lr.ph395 pcalau12i $a0, %pc_hi20(Fgetlag.tmpseq2) ld.d $fp, $a0, %pc_lo12(Fgetlag.tmpseq2) ld.d $s0, $sp, 176 # 8-byte Folded Reload - move $s1, $s2 .p2align 4, , 16 .LBB0_19: # =>This Inner Loop Header: Depth=1 ld.d $a0, $fp, 0 @@ -491,6 +490,7 @@ Fgetlag: # @Fgetlag pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 272 # 8-byte Folded Reload b .LBB0_44 .p2align 4, , 16 .LBB0_43: # %seq_vec_3.exit @@ -505,7 +505,6 @@ Fgetlag: # @Fgetlag beqz $a6, .LBB0_43 # %bb.45: # %.lr.ph.i336.preheader # in Loop: Header=BB0_44 Depth=1 - ld.d $a7, $sp, 272 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -562,7 +561,6 @@ Fgetlag: # @Fgetlag b .LBB0_52 .LBB0_55: # %._crit_edge407 add.w $a2, $s6, $s0 - st.d $a2, $sp, 56 # 8-byte Folded Spill beqz $s7, .LBB0_70 # %bb.56: # %._crit_edge407 ld.w $a0, $s2, 0 @@ -570,6 +568,7 @@ Fgetlag: # @Fgetlag beq $a0, $a1, .LBB0_70 # %bb.57: # %.preheader382 ld.d $fp, $sp, 176 # 8-byte Folded Reload + move $s2, $a2 blez $fp, .LBB0_79 # %bb.58: # %.lr.ph411 pcalau12i $a0, %pc_hi20(Fgetlag.seqVector2) @@ -659,6 +658,7 @@ Fgetlag: # @Fgetlag b .LBB0_67 .LBB0_70: # %.preheader383 ld.d $fp, $sp, 176 # 8-byte Folded Reload + move $s2, $a2 blez $fp, .LBB0_79 # %bb.71: # %.lr.ph409 pcalau12i $a0, %pc_hi20(Fgetlag.seqVector2) @@ -668,6 +668,7 @@ Fgetlag: # @Fgetlag pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 280 # 8-byte Folded Reload b .LBB0_73 .p2align 4, , 16 .LBB0_72: # %seq_vec_3.exit363 @@ -682,7 +683,6 @@ Fgetlag: # @Fgetlag beqz $a6, .LBB0_72 # %bb.74: # %.lr.ph.i357.preheader # in Loop: Header=BB0_73 Depth=1 - ld.d $a7, $sp, 280 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -711,8 +711,9 @@ Fgetlag: # @Fgetlag fstx.d $fa1, $a6, $a4 b .LBB0_75 .LBB0_79: # %.loopexit - blez $s4, .LBB0_89 + blez $s4, .LBB0_90 # %bb.80: # %.lr.ph414.preheader + st.d $s2, $sp, 56 # 8-byte Folded Spill move $s3, $zero move $s7, $zero pcalau12i $s0, %pc_hi20(Fgetlag.seqVector2) @@ -743,12 +744,13 @@ Fgetlag: # @Fgetlag move $s3, $zero bstrpick.d $a0, $s6, 31, 0 slli.d $s7, $a0, 4 + ld.d $s2, $sp, 56 # 8-byte Folded Reload b .LBB0_85 .p2align 4, , 16 .LBB0_84: # %._crit_edge417 # in Loop: Header=BB0_85 Depth=1 addi.d $s3, $s3, 1 - bge $s3, $s4, .LBB0_89 + bge $s3, $s4, .LBB0_90 .LBB0_85: # %.preheader380 # =>This Loop Header: Depth=1 # Child Loop BB0_87 Depth 2 @@ -780,37 +782,38 @@ Fgetlag: # @Fgetlag ld.w $s4, $a0, %pc_lo12(n20or4or2) ld.d $fp, $sp, 176 # 8-byte Folded Reload b .LBB0_84 -.LBB0_89: # %.preheader379 +.LBB0_89: + ld.d $s2, $sp, 56 # 8-byte Folded Reload +.LBB0_90: # %.preheader379 ld.d $s0, $sp, 64 # 8-byte Folded Reload ld.d $a1, $s0, %pc_lo12(Fgetlag.naisekiNoWa) - ld.d $a0, $sp, 56 # 8-byte Folded Reload - srai.d $s3, $a0, 1 - blez $s8, .LBB0_95 -# %bb.90: # %.lr.ph426 + srai.d $s3, $s2, 1 + blez $s8, .LBB0_96 +# %bb.91: # %.lr.ph426 ld.d $a0, $s5, %pc_lo12(Fgetlag.naiseki) move $a2, $zero bstrpick.d $a3, $s4, 31, 0 vrepli.b $vr0, 0 - b .LBB0_92 + b .LBB0_93 .p2align 4, , 16 -.LBB0_91: # %._crit_edge423 - # in Loop: Header=BB0_92 Depth=1 +.LBB0_92: # %._crit_edge423 + # in Loop: Header=BB0_93 Depth=1 addi.d $a2, $a2, 1 - beq $a2, $s8, .LBB0_95 -.LBB0_92: # =>This Loop Header: Depth=1 - # Child Loop BB0_94 Depth 2 + beq $a2, $s8, .LBB0_96 +.LBB0_93: # =>This Loop Header: Depth=1 + # Child Loop BB0_95 Depth 2 slli.d $a4, $a2, 4 vstx $vr0, $a1, $a4 - blez $s4, .LBB0_91 -# %bb.93: # %.lr.ph422.preheader - # in Loop: Header=BB0_92 Depth=1 + blez $s4, .LBB0_92 +# %bb.94: # %.lr.ph422.preheader + # in Loop: Header=BB0_93 Depth=1 alsl.d $a5, $a2, $a1, 4 move $a6, $a3 move $a7, $a0 vori.b $vr1, $vr0, 0 .p2align 4, , 16 -.LBB0_94: # %.lr.ph422 - # Parent Loop BB0_92 Depth=1 +.LBB0_95: # %.lr.ph422 + # Parent Loop BB0_93 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $t0, $a7, 0 vldx $vr2, $t0, $a4 @@ -818,9 +821,9 @@ Fgetlag: # @Fgetlag vst $vr1, $a5, 0 addi.d $a6, $a6, -1 addi.d $a7, $a7, 8 - bnez $a6, .LBB0_94 - b .LBB0_91 -.LBB0_95: # %._crit_edge427 + bnez $a6, .LBB0_95 + b .LBB0_92 +.LBB0_96: # %._crit_edge427 sub.w $a0, $zero, $s6 move $a2, $zero pcaddu18i $ra, %call36(fft) @@ -829,57 +832,57 @@ Fgetlag: # @Fgetlag ld.d $a2, $a0, %pc_lo12(Fgetlag.soukan) addi.w $a1, $zero, -2 addi.d $a0, $s3, 1 - bge $a1, $s8, .LBB0_102 -# %bb.96: # %.lr.ph431 + bge $a1, $s8, .LBB0_103 +# %bb.97: # %.lr.ph431 ld.d $a3, $s0, %pc_lo12(Fgetlag.naisekiNoWa) bstrpick.d $a1, $a0, 31, 0 ori $a5, $zero, 14 slli.d $a4, $s3, 4 - bltu $a0, $a5, .LBB0_99 -# %bb.97: # %vector.memcheck + bltu $a0, $a5, .LBB0_100 +# %bb.98: # %vector.memcheck alsl.d $a5, $s3, $a3, 4 addi.d $a5, $a5, 8 - bgeu $a2, $a5, .LBB0_201 -# %bb.98: # %vector.memcheck + bgeu $a2, $a5, .LBB0_202 +# %bb.99: # %vector.memcheck alsl.d $a5, $a1, $a2, 3 slli.d $a6, $a1, 4 sub.d $a6, $a4, $a6 add.d $a6, $a6, $a3 addi.d $a6, $a6, 16 - bgeu $a6, $a5, .LBB0_201 -.LBB0_99: + bgeu $a6, $a5, .LBB0_202 +.LBB0_100: move $a5, $zero -.LBB0_100: # %scalar.ph.preheader +.LBB0_101: # %scalar.ph.preheader slli.d $a6, $a5, 4 sub.d $a4, $a4, $a6 add.d $a3, $a3, $a4 alsl.d $a4, $a5, $a2, 3 sub.d $a1, $a1, $a5 .p2align 4, , 16 -.LBB0_101: # %scalar.ph +.LBB0_102: # %scalar.ph # =>This Inner Loop Header: Depth=1 fld.d $fa0, $a3, 0 fst.d $fa0, $a4, 0 addi.d $a3, $a3, -16 addi.d $a1, $a1, -1 addi.d $a4, $a4, 8 - bnez $a1, .LBB0_101 -.LBB0_102: # %.preheader378 - bge $a0, $s8, .LBB0_106 -# %bb.103: # %.lr.ph434 + bnez $a1, .LBB0_102 +.LBB0_103: # %.preheader378 + bge $a0, $s8, .LBB0_107 +# %bb.104: # %.lr.ph434 ld.d $a0, $s0, %pc_lo12(Fgetlag.naisekiNoWa) nor $a1, $s3, $zero add.d $a1, $a1, $s8 ori $a3, $zero, 28 addi.d $a5, $s3, 1 - bgeu $a1, $a3, .LBB0_127 -.LBB0_104: # %scalar.ph674.preheader + bgeu $a1, $a3, .LBB0_128 +.LBB0_105: # %scalar.ph674.preheader sub.d $a1, $s3, $a5 add.w $a1, $a1, $s6 alsl.d $a3, $a5, $a2, 3 sub.d $a4, $s8, $a5 .p2align 4, , 16 -.LBB0_105: # %scalar.ph674 +.LBB0_106: # %scalar.ph674 # =>This Inner Loop Header: Depth=1 slli.d $a5, $a1, 4 fldx.d $fa0, $a0, $a5 @@ -887,8 +890,8 @@ Fgetlag: # @Fgetlag addi.w $a1, $a1, -1 addi.d $a4, $a4, -1 addi.d $a3, $a3, 8 - bnez $a4, .LBB0_105 -.LBB0_106: # %._crit_edge435 + bnez $a4, .LBB0_106 +.LBB0_107: # %._crit_edge435 ld.d $a0, $sp, 232 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.kouho) ori $a1, $zero, 20 @@ -903,26 +906,26 @@ Fgetlag: # @Fgetlag move $s8, $zero move $s1, $zero ori $s0, $zero, 48 - b .LBB0_108 + ld.d $s2, $sp, 216 # 8-byte Folded Reload + ld.d $s4, $sp, 256 # 8-byte Folded Reload + b .LBB0_109 .p2align 4, , 16 -.LBB0_107: # %._crit_edge437 - # in Loop: Header=BB0_108 Depth=1 +.LBB0_108: # %._crit_edge437 + # in Loop: Header=BB0_109 Depth=1 addi.d $s1, $s1, 1 ori $a0, $zero, 20 - beq $s1, $a0, .LBB0_115 -.LBB0_108: # =>This Loop Header: Depth=1 + beq $s1, $a0, .LBB0_116 +.LBB0_109: # =>This Loop Header: Depth=1 + # Child Loop BB0_115 Depth 2 # Child Loop BB0_114 Depth 2 - # Child Loop BB0_113 Depth 2 ld.d $a0, $sp, 232 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.kouho) slli.d $a1, $s1, 2 ldx.w $s7, $a0, $a1 ld.d $s3, $sp, 224 # 8-byte Folded Reload ld.d $a5, $s3, %pc_lo12(Fgetlag.tmpptr1) - ld.d $s2, $sp, 216 # 8-byte Folded Reload ld.d $a6, $s2, %pc_lo12(Fgetlag.tmpptr2) move $a0, $s7 - ld.d $s4, $sp, 256 # 8-byte Folded Reload move $a1, $s4 move $a2, $fp ld.d $a3, $sp, 240 # 8-byte Folded Reload @@ -944,28 +947,28 @@ Fgetlag: # @Fgetlag jirl $ra, $ra, 0 move $s3, $a0 add.w $a0, $s8, $a0 - blt $a0, $s5, .LBB0_110 -# %bb.109: # in Loop: Header=BB0_108 Depth=1 + blt $a0, $s5, .LBB0_111 +# %bb.110: # in Loop: Header=BB0_109 Depth=1 move $a0, $s6 pcaddu18i $ra, %call36(ErrorExit) jirl $ra, $ra, 0 -.LBB0_110: # in Loop: Header=BB0_108 Depth=1 - beqz $s3, .LBB0_115 -# %bb.111: # %.preheader377 - # in Loop: Header=BB0_108 Depth=1 - blez $s3, .LBB0_107 -# %bb.112: # %.lr.ph436 - # in Loop: Header=BB0_108 Depth=1 +.LBB0_111: # in Loop: Header=BB0_109 Depth=1 + beqz $s3, .LBB0_116 +# %bb.112: # %.preheader377 + # in Loop: Header=BB0_109 Depth=1 + blez $s3, .LBB0_108 +# %bb.113: # %.lr.ph436 + # in Loop: Header=BB0_109 Depth=1 ld.d $a0, $sp, 264 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.segment) ld.d $a1, $sp, 192 # 8-byte Folded Reload ld.d $a1, $a1, %pc_lo12(Fgetlag.segment1) ld.d $a2, $sp, 184 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(Fgetlag.segment2) - blez $s7, .LBB0_114 + blez $s7, .LBB0_115 .p2align 4, , 16 -.LBB0_113: # %.lr.ph436.split.us - # Parent Loop BB0_108 Depth=1 +.LBB0_114: # %.lr.ph436.split.us + # Parent Loop BB0_109 Depth=1 # => This Inner Loop Header: Depth=2 mul.d $a3, $s8, $s0 ldx.w $a4, $a0, $a3 @@ -1017,11 +1020,11 @@ Fgetlag: # @Fgetlag addi.w $s8, $a4, 1 addi.w $s3, $s3, -1 st.w $s8, $sp, 292 - bnez $s3, .LBB0_113 - b .LBB0_107 + bnez $s3, .LBB0_114 + b .LBB0_108 .p2align 4, , 16 -.LBB0_114: # %.lr.ph436.split - # Parent Loop BB0_108 Depth=1 +.LBB0_115: # %.lr.ph436.split + # Parent Loop BB0_109 Depth=1 # => This Inner Loop Header: Depth=2 mul.d $a3, $s8, $s0 ldx.w $a4, $a0, $a3 @@ -1073,9 +1076,9 @@ Fgetlag: # @Fgetlag addi.w $s8, $a4, 1 addi.w $s3, $s3, -1 st.w $s8, $sp, 292 - bnez $s3, .LBB0_114 - b .LBB0_107 -.LBB0_115: + bnez $s3, .LBB0_115 + b .LBB0_108 +.LBB0_116: pcalau12i $a0, %got_pc_hi20(stderr) ld.d $a0, $a0, %got_pc_lo12(stderr) st.d $a0, $sp, 168 # 8-byte Folded Spill @@ -1085,13 +1088,13 @@ Fgetlag: # @Fgetlag move $a2, $s8 pcaddu18i $ra, %call36(fprintf) jirl $ra, $ra, 0 - bnez $s8, .LBB0_118 -# %bb.116: + bnez $s8, .LBB0_119 +# %bb.117: pcalau12i $a0, %got_pc_hi20(fftNoAnchStop) ld.d $a0, $a0, %got_pc_lo12(fftNoAnchStop) ld.w $a0, $a0, 0 - beqz $a0, .LBB0_118 -# %bb.117: # %.thread + beqz $a0, .LBB0_119 +# %bb.118: # %.thread pcalau12i $a0, %pc_hi20(.L.str.4) addi.d $a0, $a0, %pc_lo12(.L.str.4) pcaddu18i $ra, %call36(ErrorExit) @@ -1102,15 +1105,15 @@ Fgetlag: # @Fgetlag ld.d $s4, $sp, 88 # 8-byte Folded Reload ld.d $s5, $sp, 80 # 8-byte Folded Reload ld.d $fp, $sp, 104 # 8-byte Folded Reload - b .LBB0_135 -.LBB0_118: + b .LBB0_136 +.LBB0_119: ld.d $a0, $sp, 112 # 8-byte Folded Reload ld.d $a2, $a0, %pc_lo12(Fgetlag.sortedseg1) ld.d $s4, $sp, 88 # 8-byte Folded Reload ld.d $s5, $sp, 80 # 8-byte Folded Reload ld.d $fp, $sp, 104 # 8-byte Folded Reload - blez $s8, .LBB0_134 -# %bb.119: # %.lr.ph441 + blez $s8, .LBB0_135 +# %bb.120: # %.lr.ph441 ld.d $a0, $sp, 192 # 8-byte Folded Reload ld.d $a1, $a0, %pc_lo12(Fgetlag.segment1) ld.d $a0, $sp, 184 # 8-byte Folded Reload @@ -1119,12 +1122,12 @@ Fgetlag: # @Fgetlag ld.d $a0, $a0, %pc_lo12(Fgetlag.sortedseg2) ori $a5, $zero, 4 move $a4, $zero - bltu $s8, $a5, .LBB0_124 -# %bb.120: # %.lr.ph441 + bltu $s8, $a5, .LBB0_125 +# %bb.121: # %.lr.ph441 sub.d $a5, $a0, $a2 ori $a6, $zero, 32 - bltu $a5, $a6, .LBB0_124 -# %bb.121: # %vector.ph696 + bltu $a5, $a6, .LBB0_125 +# %bb.122: # %vector.ph696 move $a5, $zero bstrpick.d $a4, $s8, 30, 2 slli.d $a4, $a4, 2 @@ -1138,7 +1141,7 @@ Fgetlag: # @Fgetlag vrepli.d $vr3, 96 vreplgr2vr.d $vr4, $a3 .p2align 4, , 16 -.LBB0_122: # %vector.body699 +.LBB0_123: # %vector.body699 # =>This Inner Loop Header: Depth=1 vori.b $vr5, $vr1, 0 vmadd.d $vr5, $vr0, $vr2 @@ -1156,11 +1159,11 @@ Fgetlag: # @Fgetlag vst $vr6, $a7, 16 addi.d $a5, $a5, 32 vaddi.du $vr0, $vr0, 4 - bne $a6, $a5, .LBB0_122 -# %bb.123: # %middle.block705 + bne $a6, $a5, .LBB0_123 +# %bb.124: # %middle.block705 ori $s0, $zero, 1 - beq $a4, $s8, .LBB0_135 -.LBB0_124: # %scalar.ph694.preheader + beq $a4, $s8, .LBB0_136 +.LBB0_125: # %scalar.ph694.preheader slli.d $a5, $a4, 3 slli.d $a6, $a4, 5 alsl.d $a6, $a4, $a6, 4 @@ -1168,7 +1171,7 @@ Fgetlag: # @Fgetlag add.d $a1, $a1, $a6 sub.d $a4, $s8, $a4 .p2align 4, , 16 -.LBB0_125: # %scalar.ph694 +.LBB0_126: # %scalar.ph694 # =>This Inner Loop Header: Depth=1 stx.d $a1, $a2, $a5 stx.d $a3, $a0, $a5 @@ -1176,33 +1179,33 @@ Fgetlag: # @Fgetlag addi.d $a3, $a3, 48 addi.d $a4, $a4, -1 addi.d $a1, $a1, 48 - bnez $a4, .LBB0_125 -# %bb.126: + bnez $a4, .LBB0_126 +# %bb.127: ori $s0, $zero, 1 - b .LBB0_135 -.LBB0_127: # %vector.scevcheck + b .LBB0_136 +.LBB0_128: # %vector.scevcheck sub.d $a3, $s8, $s3 addi.d $a4, $a3, -2 addi.w $a3, $s6, -1 sub.w $a6, $a3, $a4 - blt $a3, $a6, .LBB0_104 -# %bb.128: # %vector.scevcheck + blt $a3, $a6, .LBB0_105 +# %bb.129: # %vector.scevcheck srli.d $a4, $a4, 32 - bnez $a4, .LBB0_104 -# %bb.129: # %vector.memcheck664 + bnez $a4, .LBB0_105 +# %bb.130: # %vector.memcheck664 alsl.d $a4, $s3, $a2, 3 addi.d $a4, $a4, 8 alsl.d $a6, $a3, $a0, 4 addi.d $a6, $a6, 8 - bgeu $a4, $a6, .LBB0_131 -# %bb.130: # %vector.memcheck664 + bgeu $a4, $a6, .LBB0_132 +# %bb.131: # %vector.memcheck664 alsl.d $a4, $s8, $a2, 3 add.d $a3, $s3, $a3 sub.d $a3, $a3, $s8 alsl.d $a3, $a3, $a0, 4 addi.d $a3, $a3, 32 - bltu $a3, $a4, .LBB0_104 -.LBB0_131: # %vector.ph676 + bltu $a3, $a4, .LBB0_105 +.LBB0_132: # %vector.ph676 add.d $a6, $s3, $s6 slli.d $a7, $s3, 3 move $a3, $a1 @@ -1220,7 +1223,7 @@ Fgetlag: # @Fgetlag addi.d $a5, $a5, 24 move $a6, $a3 .p2align 4, , 16 -.LBB0_132: # %vector.body683 +.LBB0_133: # %vector.body683 # =>This Inner Loop Header: Depth=1 vsub.w $vr2, $vr0, $vr1 vsubi.wu $vr3, $vr2, 2 @@ -1249,14 +1252,14 @@ Fgetlag: # @Fgetlag vaddi.wu $vr1, $vr1, 4 addi.d $a6, $a6, -4 addi.d $a5, $a5, 32 - bnez $a6, .LBB0_132 -# %bb.133: # %middle.block689 + bnez $a6, .LBB0_133 +# %bb.134: # %middle.block689 move $a5, $a4 - bne $a1, $a3, .LBB0_104 - b .LBB0_106 -.LBB0_134: + bne $a1, $a3, .LBB0_105 + b .LBB0_107 +.LBB0_135: move $s0, $zero -.LBB0_135: # %._crit_edge442 +.LBB0_136: # %._crit_edge442 addi.w $s3, $s8, -1 move $a0, $zero move $a1, $s3 @@ -1268,24 +1271,24 @@ Fgetlag: # @Fgetlag move $a1, $s3 pcaddu18i $ra, %call36(mymergesort) jirl $ra, $ra, 0 - beqz $s0, .LBB0_150 -# %bb.136: # %.lr.ph446 + beqz $s0, .LBB0_151 +# %bb.137: # %.lr.ph446 ld.d $a0, $sp, 112 # 8-byte Folded Reload ld.d $a3, $a0, %pc_lo12(Fgetlag.sortedseg1) bstrpick.d $a0, $s8, 31, 0 ori $a2, $zero, 4 bstrpick.d $a1, $a0, 30, 2 - bgeu $s8, $a2, .LBB0_138 -# %bb.137: + bgeu $s8, $a2, .LBB0_139 +# %bb.138: move $a2, $zero - b .LBB0_141 -.LBB0_138: # %vector.ph710 + b .LBB0_142 +.LBB0_139: # %vector.ph710 move $a4, $zero slli.d $a2, $a1, 2 addi.d $a5, $a3, 16 move $a6, $a2 .p2align 4, , 16 -.LBB0_139: # %vector.body713 +.LBB0_140: # %vector.body713 # =>This Inner Loop Header: Depth=1 addi.d $a7, $a4, 1 addi.d $t0, $a4, 2 @@ -1301,36 +1304,36 @@ Fgetlag: # @Fgetlag addi.d $a6, $a6, -4 addi.d $a4, $a4, 4 addi.d $a5, $a5, 32 - bnez $a6, .LBB0_139 -# %bb.140: # %middle.block717 - beq $a2, $a0, .LBB0_143 -.LBB0_141: # %scalar.ph708.preheader + bnez $a6, .LBB0_140 +# %bb.141: # %middle.block717 + beq $a2, $a0, .LBB0_144 +.LBB0_142: # %scalar.ph708.preheader alsl.d $a3, $a2, $a3, 3 sub.d $a4, $a0, $a2 .p2align 4, , 16 -.LBB0_142: # %scalar.ph708 +.LBB0_143: # %scalar.ph708 # =>This Inner Loop Header: Depth=1 ld.d $a5, $a3, 0 st.w $a2, $a5, 40 addi.d $a2, $a2, 1 addi.d $a4, $a4, -1 addi.d $a3, $a3, 8 - bnez $a4, .LBB0_142 -.LBB0_143: # %.lr.ph449 + bnez $a4, .LBB0_143 +.LBB0_144: # %.lr.ph449 ld.d $a2, $sp, 120 # 8-byte Folded Reload ld.d $a2, $a2, %pc_lo12(Fgetlag.sortedseg2) ori $a3, $zero, 4 - bgeu $s8, $a3, .LBB0_145 -# %bb.144: + bgeu $s8, $a3, .LBB0_146 +# %bb.145: move $a1, $zero - b .LBB0_148 -.LBB0_145: # %vector.ph722 + b .LBB0_149 +.LBB0_146: # %vector.ph722 move $a3, $zero slli.d $a1, $a1, 2 addi.d $a4, $a2, 16 move $a5, $a1 .p2align 4, , 16 -.LBB0_146: # %vector.body725 +.LBB0_147: # %vector.body725 # =>This Inner Loop Header: Depth=1 addi.d $a6, $a3, 1 addi.d $a7, $a3, 2 @@ -1346,31 +1349,31 @@ Fgetlag: # @Fgetlag addi.d $a5, $a5, -4 addi.d $a3, $a3, 4 addi.d $a4, $a4, 32 - bnez $a5, .LBB0_146 -# %bb.147: # %middle.block730 - beq $a1, $a0, .LBB0_150 -.LBB0_148: # %scalar.ph720.preheader + bnez $a5, .LBB0_147 +# %bb.148: # %middle.block730 + beq $a1, $a0, .LBB0_151 +.LBB0_149: # %scalar.ph720.preheader alsl.d $a2, $a1, $a2, 3 sub.d $a0, $a0, $a1 .p2align 4, , 16 -.LBB0_149: # %scalar.ph720 +.LBB0_150: # %scalar.ph720 # =>This Inner Loop Header: Depth=1 ld.d $a3, $a2, 0 st.w $a1, $a3, 40 addi.d $a1, $a1, 1 addi.d $a0, $a0, -1 addi.d $a2, $a2, 8 - bnez $a0, .LBB0_149 -.LBB0_150: # %._crit_edge450 + bnez $a0, .LBB0_150 +.LBB0_151: # %._crit_edge450 pcalau12i $s1, %pc_hi20(Fgetlag.crossscoresize) ld.w $a0, $s1, %pc_lo12(Fgetlag.crossscoresize) addi.w $s3, $s8, 2 - blt $a0, $s3, .LBB0_206 -# %bb.151: # %._crit_edge450._crit_edge + blt $a0, $s3, .LBB0_207 +# %bb.152: # %._crit_edge450._crit_edge pcalau12i $a0, %pc_hi20(Fgetlag.crossscore) ld.d $s6, $a0, %pc_lo12(Fgetlag.crossscore) - blt $s8, $fp, .LBB0_154 -.LBB0_152: # %.preheader375.lr.ph + blt $s8, $fp, .LBB0_155 +.LBB0_153: # %.preheader375.lr.ph ori $a0, $zero, 1 slt $a1, $a0, $s3 masknez $a0, $a0, $a1 @@ -1379,7 +1382,7 @@ Fgetlag: # @Fgetlag slli.d $s3, $fp, 3 move $s1, $s6 .p2align 4, , 16 -.LBB0_153: # %._crit_edge453 +.LBB0_154: # %._crit_edge453 # =>This Inner Loop Header: Depth=1 ld.d $a0, $s1, 0 move $a1, $zero @@ -1388,8 +1391,8 @@ Fgetlag: # @Fgetlag jirl $ra, $ra, 0 addi.d $fp, $fp, -1 addi.d $s1, $s1, 8 - bnez $fp, .LBB0_153 -.LBB0_154: # %.preheader374 + bnez $fp, .LBB0_154 +.LBB0_155: # %.preheader374 ld.d $a0, $sp, 136 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.cut1) ld.d $a1, $sp, 128 # 8-byte Folded Reload @@ -1398,8 +1401,8 @@ Fgetlag: # @Fgetlag ld.d $a2, $a2, %pc_lo12(Fgetlag.sortedseg1) ld.d $a3, $sp, 120 # 8-byte Folded Reload ld.d $a3, $a3, %pc_lo12(Fgetlag.sortedseg2) - beqz $s0, .LBB0_157 -# %bb.155: # %.lr.ph456 + beqz $s0, .LBB0_158 +# %bb.156: # %.lr.ph456 ld.d $a4, $sp, 192 # 8-byte Folded Reload ld.d $a5, $a4, %pc_lo12(Fgetlag.segment1) move $a4, $zero @@ -1409,7 +1412,7 @@ Fgetlag: # @Fgetlag move $t0, $a2 move $t1, $a3 .p2align 4, , 16 -.LBB0_156: # =>This Inner Loop Header: Depth=1 +.LBB0_157: # =>This Inner Loop Header: Depth=1 ld.w $t2, $a5, 8 ld.d $t3, $t0, 0 alsl.d $t2, $t2, $s6, 3 @@ -1431,8 +1434,8 @@ Fgetlag: # @Fgetlag addi.d $a5, $a5, 48 addi.d $a6, $a6, 4 addi.d $a7, $a7, 4 - blt $a4, $t2, .LBB0_156 -.LBB0_157: # %._crit_edge457 + blt $a4, $t2, .LBB0_157 +.LBB0_158: # %._crit_edge457 st.w $zero, $a0, 0 st.w $zero, $a1, 0 ld.w $a4, $sp, 292 @@ -1460,42 +1463,42 @@ Fgetlag: # @Fgetlag ld.d $a0, $sp, 72 # 8-byte Folded Reload ld.w $a0, $a0, 0 ld.d $s1, $sp, 256 # 8-byte Folded Reload - beqz $a0, .LBB0_159 -# %bb.158: # %._crit_edge457 + beqz $a0, .LBB0_160 +# %bb.159: # %._crit_edge457 ld.w $a0, $sp, 292 - blt $a0, $fp, .LBB0_204 -.LBB0_159: - blez $s1, .LBB0_162 -# %bb.160: # %.lr.ph460 + blt $a0, $fp, .LBB0_205 +.LBB0_160: + blez $s1, .LBB0_163 +# %bb.161: # %.lr.ph460 ld.d $a0, $sp, 144 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.result1) move $a1, $s1 .p2align 4, , 16 -.LBB0_161: # =>This Inner Loop Header: Depth=1 +.LBB0_162: # =>This Inner Loop Header: Depth=1 ld.d $a2, $a0, 0 st.b $zero, $a2, 0 addi.d $a1, $a1, -1 addi.d $a0, $a0, 8 - bnez $a1, .LBB0_161 -.LBB0_162: # %.preheader373 + bnez $a1, .LBB0_162 +.LBB0_163: # %.preheader373 ld.d $fp, $sp, 176 # 8-byte Folded Reload - blez $fp, .LBB0_165 -# %bb.163: # %.lr.ph462 + blez $fp, .LBB0_166 +# %bb.164: # %.lr.ph462 ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.result2) move $a1, $fp .p2align 4, , 16 -.LBB0_164: # =>This Inner Loop Header: Depth=1 +.LBB0_165: # =>This Inner Loop Header: Depth=1 ld.d $a2, $a0, 0 st.b $zero, $a2, 0 addi.d $a1, $a1, -1 addi.d $a0, $a0, 8 - bnez $a1, .LBB0_164 -.LBB0_165: # %.preheader372 + bnez $a1, .LBB0_165 +.LBB0_166: # %.preheader372 ld.w $a0, $sp, 292 ori $a1, $zero, 2 - blt $a0, $a1, .LBB0_194 -# %bb.166: # %.preheader371.lr.ph + blt $a0, $a1, .LBB0_195 +# %bb.167: # %.preheader371.lr.ph addi.d $a0, $s1, -1 sltui $a0, $a0, 1 addi.d $a1, $fp, -1 @@ -1521,25 +1524,26 @@ Fgetlag: # @Fgetlag move $s7, $zero vrepli.b $vr0, 0 vst $vr0, $sp, 192 # 16-byte Folded Spill - b .LBB0_168 + ld.d $s2, $sp, 256 # 8-byte Folded Reload + b .LBB0_169 .p2align 4, , 16 -.LBB0_167: # %._crit_edge473 - # in Loop: Header=BB0_168 Depth=1 +.LBB0_168: # %._crit_edge473 + # in Loop: Header=BB0_169 Depth=1 ld.w $a0, $sp, 292 addi.d $s0, $s0, 1 addi.w $a0, $a0, -1 ld.d $fp, $sp, 176 # 8-byte Folded Reload ld.d $s1, $sp, 256 # 8-byte Folded Reload - bge $s0, $a0, .LBB0_194 -.LBB0_168: # %.preheader371 + bge $s0, $a0, .LBB0_195 +.LBB0_169: # %.preheader371 # =>This Loop Header: Depth=1 - # Child Loop BB0_170 Depth 2 - # Child Loop BB0_173 Depth 2 - # Child Loop BB0_189 Depth 2 - # Child Loop BB0_192 Depth 2 - blez $s1, .LBB0_171 -# %bb.169: # %.lr.ph464 - # in Loop: Header=BB0_168 Depth=1 + # Child Loop BB0_171 Depth 2 + # Child Loop BB0_174 Depth 2 + # Child Loop BB0_190 Depth 2 + # Child Loop BB0_193 Depth 2 + blez $s1, .LBB0_172 +# %bb.170: # %.lr.ph464 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 136 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.cut1) ld.d $s1, $s5, %pc_lo12(Fgetlag.tmpres1) @@ -1547,7 +1551,7 @@ Fgetlag: # @Fgetlag ld.d $s3, $sp, 264 # 8-byte Folded Reload ld.d $s4, $sp, 240 # 8-byte Folded Reload .p2align 4, , 16 -.LBB0_170: # Parent Loop BB0_168 Depth=1 +.LBB0_171: # Parent Loop BB0_169 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a1, $s4, 0 ld.w $a2, $s6, 0 @@ -1565,12 +1569,12 @@ Fgetlag: # @Fgetlag addi.d $s4, $s4, 8 addi.d $s3, $s3, -1 addi.d $s1, $s1, 8 - bnez $s3, .LBB0_170 -.LBB0_171: # %.preheader370 - # in Loop: Header=BB0_168 Depth=1 - blez $fp, .LBB0_174 -# %bb.172: # %.lr.ph466 - # in Loop: Header=BB0_168 Depth=1 + bnez $s3, .LBB0_171 +.LBB0_172: # %.preheader370 + # in Loop: Header=BB0_169 Depth=1 + blez $fp, .LBB0_175 +# %bb.173: # %.lr.ph466 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 128 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(Fgetlag.cut2) ld.d $s1, $s8, %pc_lo12(Fgetlag.tmpres2) @@ -1578,7 +1582,7 @@ Fgetlag: # @Fgetlag ld.d $s3, $sp, 232 # 8-byte Folded Reload ld.d $s4, $sp, 248 # 8-byte Folded Reload .p2align 4, , 16 -.LBB0_173: # Parent Loop BB0_168 Depth=1 +.LBB0_174: # Parent Loop BB0_169 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a1, $s4, 0 ld.w $a2, $s6, 0 @@ -1596,30 +1600,29 @@ Fgetlag: # @Fgetlag addi.d $s4, $s4, 8 addi.d $s3, $s3, -1 addi.d $s1, $s1, 8 - bnez $s3, .LBB0_173 -.LBB0_174: # %._crit_edge467 - # in Loop: Header=BB0_168 Depth=1 + bnez $s3, .LBB0_174 +.LBB0_175: # %._crit_edge467 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 224 # 8-byte Folded Reload ld.bu $a1, $a0, 0 addi.d $a0, $a1, -65 - ld.d $s2, $sp, 256 # 8-byte Folded Reload ori $a2, $zero, 32 - bltu $a2, $a0, .LBB0_193 -# %bb.175: # %._crit_edge467 - # in Loop: Header=BB0_168 Depth=1 + bltu $a2, $a0, .LBB0_194 +# %bb.176: # %._crit_edge467 + # in Loop: Header=BB0_169 Depth=1 slli.d $a0, $a0, 2 pcalau12i $a2, %pc_hi20(.LJTI0_0) addi.d $a2, $a2, %pc_lo12(.LJTI0_0) ldx.w $a0, $a2, $a0 add.d $a0, $a2, $a0 jr $a0 -.LBB0_176: # in Loop: Header=BB0_168 Depth=1 +.LBB0_177: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a1, $s8, %pc_lo12(Fgetlag.tmpres2) ld.d $s1, $sp, 160 # 8-byte Folded Reload ld.d $a2, $sp, 216 # 8-byte Folded Reload - bnez $a2, .LBB0_182 -# %bb.177: # in Loop: Header=BB0_168 Depth=1 + bnez $a2, .LBB0_183 +# %bb.178: # in Loop: Header=BB0_169 Depth=1 vld $vr0, $sp, 192 # 16-byte Folded Reload vst $vr0, $sp, 24 vst $vr0, $sp, 8 @@ -1633,14 +1636,14 @@ Fgetlag: # @Fgetlag move $a7, $zero pcaddu18i $ra, %call36(A__align) jirl $ra, $ra, 0 - b .LBB0_185 -.LBB0_178: # in Loop: Header=BB0_168 Depth=1 + b .LBB0_186 +.LBB0_179: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a1, $s8, %pc_lo12(Fgetlag.tmpres2) ld.d $s1, $sp, 160 # 8-byte Folded Reload ld.d $a2, $sp, 216 # 8-byte Folded Reload - bnez $a2, .LBB0_182 -# %bb.179: # in Loop: Header=BB0_168 Depth=1 + bnez $a2, .LBB0_183 +# %bb.180: # in Loop: Header=BB0_169 Depth=1 vld $vr0, $sp, 192 # 16-byte Folded Reload vst $vr0, $sp, 24 vst $vr0, $sp, 8 @@ -1654,8 +1657,8 @@ Fgetlag: # @Fgetlag move $a7, $zero pcaddu18i $ra, %call36(H__align) jirl $ra, $ra, 0 - b .LBB0_185 -.LBB0_180: # in Loop: Header=BB0_168 Depth=1 + b .LBB0_186 +.LBB0_181: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a1, $s8, %pc_lo12(Fgetlag.tmpres2) ld.d $a2, $sp, 272 # 8-byte Folded Reload @@ -1666,19 +1669,19 @@ Fgetlag: # @Fgetlag move $a6, $s1 pcaddu18i $ra, %call36(Aalign) jirl $ra, $ra, 0 - b .LBB0_185 -.LBB0_181: # in Loop: Header=BB0_168 Depth=1 + b .LBB0_186 +.LBB0_182: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a1, $s8, %pc_lo12(Fgetlag.tmpres2) ld.d $s1, $sp, 160 # 8-byte Folded Reload ld.d $a2, $sp, 216 # 8-byte Folded Reload - beqz $a2, .LBB0_184 -.LBB0_182: # in Loop: Header=BB0_168 Depth=1 + beqz $a2, .LBB0_185 +.LBB0_183: # in Loop: Header=BB0_169 Depth=1 move $a2, $s1 pcaddu18i $ra, %call36(G__align11) jirl $ra, $ra, 0 - b .LBB0_185 -.LBB0_183: # in Loop: Header=BB0_168 Depth=1 + b .LBB0_186 +.LBB0_184: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a1, $s8, %pc_lo12(Fgetlag.tmpres2) st.d $zero, $sp, 16 @@ -1693,8 +1696,8 @@ Fgetlag: # @Fgetlag move $a7, $zero pcaddu18i $ra, %call36(MSalignmm) jirl $ra, $ra, 0 - b .LBB0_185 -.LBB0_184: # in Loop: Header=BB0_168 Depth=1 + b .LBB0_186 +.LBB0_185: # in Loop: Header=BB0_169 Depth=1 vld $vr0, $sp, 192 # 16-byte Folded Reload vst $vr0, $sp, 24 vst $vr0, $sp, 8 @@ -1709,28 +1712,28 @@ Fgetlag: # @Fgetlag pcaddu18i $ra, %call36(Q__align) jirl $ra, $ra, 0 .p2align 4, , 16 -.LBB0_185: # in Loop: Header=BB0_168 Depth=1 +.LBB0_186: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $a0, $a0, 0 pcaddu18i $ra, %call36(strlen) jirl $ra, $ra, 0 add.w $s7, $s7, $a0 - bge $s1, $s7, .LBB0_187 -# %bb.186: # in Loop: Header=BB0_168 Depth=1 + bge $s1, $s7, .LBB0_188 +# %bb.187: # in Loop: Header=BB0_169 Depth=1 pcalau12i $a0, %pc_hi20(.L.str.9) addi.d $a0, $a0, %pc_lo12(.L.str.9) pcaddu18i $ra, %call36(ErrorExit) jirl $ra, $ra, 0 -.LBB0_187: # in Loop: Header=BB0_168 Depth=1 - blez $s2, .LBB0_190 -# %bb.188: # %.lr.ph470 - # in Loop: Header=BB0_168 Depth=1 +.LBB0_188: # in Loop: Header=BB0_169 Depth=1 + blez $s2, .LBB0_191 +# %bb.189: # %.lr.ph470 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 144 # 8-byte Folded Reload ld.d $fp, $a0, %pc_lo12(Fgetlag.result1) ld.d $s1, $s5, %pc_lo12(Fgetlag.tmpres1) ld.d $s3, $sp, 264 # 8-byte Folded Reload .p2align 4, , 16 -.LBB0_189: # Parent Loop BB0_168 Depth=1 +.LBB0_190: # Parent Loop BB0_169 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $fp, 0 ld.d $a1, $s1, 0 @@ -1739,19 +1742,19 @@ Fgetlag: # @Fgetlag addi.d $s1, $s1, 8 addi.d $s3, $s3, -1 addi.d $fp, $fp, 8 - bnez $s3, .LBB0_189 -.LBB0_190: # %.preheader369 - # in Loop: Header=BB0_168 Depth=1 + bnez $s3, .LBB0_190 +.LBB0_191: # %.preheader369 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 176 # 8-byte Folded Reload - blez $a0, .LBB0_167 -# %bb.191: # %.lr.ph472 - # in Loop: Header=BB0_168 Depth=1 + blez $a0, .LBB0_168 +# %bb.192: # %.lr.ph472 + # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $fp, $a0, %pc_lo12(Fgetlag.result2) ld.d $s1, $s8, %pc_lo12(Fgetlag.tmpres2) ld.d $s3, $sp, 232 # 8-byte Folded Reload .p2align 4, , 16 -.LBB0_192: # Parent Loop BB0_168 Depth=1 +.LBB0_193: # Parent Loop BB0_169 Depth=1 # => This Inner Loop Header: Depth=2 ld.d $a0, $fp, 0 ld.d $a1, $s1, 0 @@ -1760,9 +1763,9 @@ Fgetlag: # @Fgetlag addi.d $s1, $s1, 8 addi.d $s3, $s3, -1 addi.d $fp, $fp, 8 - bnez $s3, .LBB0_192 - b .LBB0_167 -.LBB0_193: # in Loop: Header=BB0_168 Depth=1 + bnez $s3, .LBB0_193 + b .LBB0_168 +.LBB0_194: # in Loop: Header=BB0_169 Depth=1 ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a0, $a0, 0 ext.w.b $a2, $a1 @@ -1773,15 +1776,15 @@ Fgetlag: # @Fgetlag pcaddu18i $ra, %call36(ErrorExit) jirl $ra, $ra, 0 ld.d $s1, $sp, 160 # 8-byte Folded Reload - b .LBB0_185 -.LBB0_194: # %.preheader368 + b .LBB0_186 +.LBB0_195: # %.preheader368 ld.d $s0, $sp, 240 # 8-byte Folded Reload - blez $s1, .LBB0_197 -# %bb.195: # %.lr.ph477 + blez $s1, .LBB0_198 +# %bb.196: # %.lr.ph477 ld.d $a0, $sp, 144 # 8-byte Folded Reload ld.d $fp, $a0, %pc_lo12(Fgetlag.result1) .p2align 4, , 16 -.LBB0_196: # =>This Inner Loop Header: Depth=1 +.LBB0_197: # =>This Inner Loop Header: Depth=1 ld.d $a0, $s0, 0 ld.d $a1, $fp, 0 pcaddu18i $ra, %call36(strcpy) @@ -1789,16 +1792,16 @@ Fgetlag: # @Fgetlag addi.d $fp, $fp, 8 addi.d $s1, $s1, -1 addi.d $s0, $s0, 8 - bnez $s1, .LBB0_196 -.LBB0_197: # %.preheader + bnez $s1, .LBB0_197 +.LBB0_198: # %.preheader ld.d $s0, $sp, 176 # 8-byte Folded Reload ld.d $s1, $sp, 248 # 8-byte Folded Reload - blez $s0, .LBB0_200 -# %bb.198: # %.lr.ph479 + blez $s0, .LBB0_201 +# %bb.199: # %.lr.ph479 ld.d $a0, $sp, 152 # 8-byte Folded Reload ld.d $fp, $a0, %pc_lo12(Fgetlag.result2) .p2align 4, , 16 -.LBB0_199: # =>This Inner Loop Header: Depth=1 +.LBB0_200: # =>This Inner Loop Header: Depth=1 ld.d $a0, $s1, 0 ld.d $a1, $fp, 0 pcaddu18i $ra, %call36(strcpy) @@ -1806,8 +1809,8 @@ Fgetlag: # @Fgetlag addi.d $fp, $fp, 8 addi.d $s0, $s0, -1 addi.d $s1, $s1, 8 - bnez $s0, .LBB0_199 -.LBB0_200: # %._crit_edge480 + bnez $s0, .LBB0_200 +.LBB0_201: # %._crit_edge480 movgr2fr.d $fa0, $zero ld.d $s8, $sp, 296 # 8-byte Folded Reload ld.d $s7, $sp, 304 # 8-byte Folded Reload @@ -1822,7 +1825,7 @@ Fgetlag: # @Fgetlag ld.d $ra, $sp, 376 # 8-byte Folded Reload addi.d $sp, $sp, 384 ret -.LBB0_201: # %vector.ph +.LBB0_202: # %vector.ph bstrpick.d $a5, $a1, 31, 2 pcalau12i $a6, %pc_hi20(.LCPI0_0) vld $vr0, $a6, %pc_lo12(.LCPI0_0) @@ -1831,7 +1834,7 @@ Fgetlag: # @Fgetlag addi.d $a6, $a2, 16 move $a7, $a5 .p2align 4, , 16 -.LBB0_202: # %vector.body +.LBB0_203: # %vector.body # =>This Inner Loop Header: Depth=1 vsub.d $vr2, $vr1, $vr0 vpickve2gr.d $t0, $vr2, 0 @@ -1854,11 +1857,11 @@ Fgetlag: # @Fgetlag vaddi.du $vr0, $vr0, 4 addi.d $a7, $a7, -4 addi.d $a6, $a6, 32 - bnez $a7, .LBB0_202 -# %bb.203: # %middle.block - beq $a5, $a1, .LBB0_102 - b .LBB0_100 -.LBB0_204: + bnez $a7, .LBB0_203 +# %bb.204: # %middle.block + beq $a5, $a1, .LBB0_103 + b .LBB0_101 +.LBB0_205: ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a3, $a0, 0 pcalau12i $a0, %pc_hi20(.L.str.6) @@ -1870,12 +1873,12 @@ Fgetlag: # @Fgetlag pcalau12i $a0, %got_pc_hi20(fftRepeatStop) ld.d $a0, $a0, %got_pc_lo12(fftRepeatStop) ld.w $a0, $a0, 0 - beqz $a0, .LBB0_159 -# %bb.205: + beqz $a0, .LBB0_160 +# %bb.206: ori $a0, $zero, 1 pcaddu18i $ra, %call36(exit) jirl $ra, $ra, 0 -.LBB0_206: +.LBB0_207: ld.d $a0, $sp, 168 # 8-byte Folded Reload ld.d $a0, $a0, 0 st.w $s3, $s1, %pc_lo12(Fgetlag.crossscoresize) @@ -1886,11 +1889,11 @@ Fgetlag: # @Fgetlag jirl $ra, $ra, 0 pcalau12i $fp, %pc_hi20(Fgetlag.crossscore) ld.d $a0, $fp, %pc_lo12(Fgetlag.crossscore) - beqz $a0, .LBB0_208 -# %bb.207: + beqz $a0, .LBB0_209 +# %bb.208: pcaddu18i $ra, %call36(FreeDoubleMtx) jirl $ra, $ra, 0 -.LBB0_208: +.LBB0_209: ld.w $a0, $s1, %pc_lo12(Fgetlag.crossscoresize) move $a1, $a0 pcaddu18i $ra, %call36(AllocateDoubleMtx) @@ -1898,46 +1901,46 @@ Fgetlag: # @Fgetlag move $s6, $a0 st.d $a0, $fp, %pc_lo12(Fgetlag.crossscore) ld.d $fp, $sp, 104 # 8-byte Folded Reload - bge $s8, $fp, .LBB0_152 - b .LBB0_154 + bge $s8, $fp, .LBB0_153 + b .LBB0_155 .Lfunc_end0: .size Fgetlag, .Lfunc_end0-Fgetlag .section .rodata,"a",@progbits .p2align 2, 0x0 .LJTI0_0: - .word .LBB0_176-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_178-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_183-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 + .word .LBB0_177-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_179-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_184-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_182-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 + .word .LBB0_194-.LJTI0_0 .word .LBB0_181-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_193-.LJTI0_0 - .word .LBB0_180-.LJTI0_0 # -- End function .text .p2align 5 # -- Begin function mymergesort @@ -2615,6 +2618,7 @@ Falign: # @Falign pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t2, $sp, 208 # 8-byte Folded Reload b .LBB2_41 .p2align 4, , 16 .LBB2_40: # %seq_vec_5.exit @@ -2629,7 +2633,6 @@ Falign: # @Falign beqz $t1, .LBB2_40 # %bb.42: # %.lr.ph.i.preheader # in Loop: Header=BB2_41 Depth=1 - ld.d $t2, $sp, 208 # 8-byte Folded Reload fldx.d $fa0, $t2, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -2668,6 +2671,7 @@ Falign: # @Falign pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 208 # 8-byte Folded Reload b .LBB2_49 .p2align 4, , 16 .LBB2_48: # %seq_vec_3.exit @@ -2682,7 +2686,6 @@ Falign: # @Falign beqz $a6, .LBB2_48 # %bb.50: # %.lr.ph.i412.preheader # in Loop: Header=BB2_49 Depth=1 - ld.d $a7, $sp, 208 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -2765,6 +2768,7 @@ Falign: # @Falign pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t2, $sp, 216 # 8-byte Folded Reload b .LBB2_65 .p2align 4, , 16 .LBB2_64: # %seq_vec_5.exit422 @@ -2779,7 +2783,6 @@ Falign: # @Falign beqz $t1, .LBB2_64 # %bb.66: # %.lr.ph.i418.preheader # in Loop: Header=BB2_65 Depth=1 - ld.d $t2, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $t2, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -2819,6 +2822,7 @@ Falign: # @Falign pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 216 # 8-byte Folded Reload b .LBB2_73 .p2align 4, , 16 .LBB2_72: # %seq_vec_3.exit430 @@ -2833,7 +2837,6 @@ Falign: # @Falign beqz $a6, .LBB2_72 # %bb.74: # %.lr.ph.i424.preheader # in Loop: Header=BB2_73 Depth=1 - ld.d $a7, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -5070,6 +5073,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t3, $sp, 216 # 8-byte Folded Reload b .LBB3_57 .p2align 4, , 16 .LBB3_56: # %seq_vec_5.exit @@ -5084,7 +5088,6 @@ Falign_noudp: # @Falign_noudp beqz $t1, .LBB3_56 # %bb.58: # %.lr.ph.i452.preheader # in Loop: Header=BB3_57 Depth=1 - ld.d $t3, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $t3, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -5127,6 +5130,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a3, %pc_hi20(.LJTI3_0) addi.d $a3, $a3, %pc_lo12(.LJTI3_0) move $a4, $zero + ld.d $t1, $sp, 216 # 8-byte Folded Reload b .LBB3_65 .p2align 4, , 16 .LBB3_64: # %seq_vec_4.exit @@ -5141,7 +5145,6 @@ Falign_noudp: # @Falign_noudp beqz $a7, .LBB3_64 # %bb.66: # %.lr.ph.i.preheader # in Loop: Header=BB3_65 Depth=1 - ld.d $t1, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $t1, $a6 addi.d $a5, $a5, 1 move $a6, $a1 @@ -5192,6 +5195,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 216 # 8-byte Folded Reload b .LBB3_79 .p2align 4, , 16 .LBB3_78: # %seq_vec_3.exit @@ -5206,7 +5210,6 @@ Falign_noudp: # @Falign_noudp beqz $a6, .LBB3_78 # %bb.80: # %.lr.ph.i454.preheader # in Loop: Header=BB3_79 Depth=1 - ld.d $a7, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -5288,6 +5291,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t3, $sp, 224 # 8-byte Folded Reload b .LBB3_95 .p2align 4, , 16 .LBB3_94: # %seq_vec_5.exit470 @@ -5302,7 +5306,6 @@ Falign_noudp: # @Falign_noudp beqz $t1, .LBB3_94 # %bb.96: # %.lr.ph.i466.preheader # in Loop: Header=BB3_95 Depth=1 - ld.d $t3, $sp, 224 # 8-byte Folded Reload fldx.d $fa0, $t3, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -5345,6 +5348,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a3, %pc_hi20(.LJTI3_1) addi.d $a3, $a3, %pc_lo12(.LJTI3_1) move $a4, $zero + ld.d $t1, $sp, 224 # 8-byte Folded Reload b .LBB3_103 .p2align 4, , 16 .LBB3_102: # %seq_vec_4.exit464 @@ -5359,7 +5363,6 @@ Falign_noudp: # @Falign_noudp beqz $a7, .LBB3_102 # %bb.104: # %.lr.ph.i460.preheader # in Loop: Header=BB3_103 Depth=1 - ld.d $t1, $sp, 224 # 8-byte Folded Reload fldx.d $fa0, $t1, $a6 addi.d $a5, $a5, 1 move $a6, $a1 @@ -5410,6 +5413,7 @@ Falign_noudp: # @Falign_noudp pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 224 # 8-byte Folded Reload b .LBB3_117 .p2align 4, , 16 .LBB3_116: # %seq_vec_3.exit478 @@ -5424,7 +5428,6 @@ Falign_noudp: # @Falign_noudp beqz $a6, .LBB3_116 # %bb.118: # %.lr.ph.i472.preheader # in Loop: Header=BB3_117 Depth=1 - ld.d $a7, $sp, 224 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -7042,6 +7045,8 @@ Falign_udpari_long: # @Falign_udpari_long move $s4, $zero ori $s1, $zero, 48 st.d $t0, $sp, 184 # 8-byte Folded Spill + ld.d $s3, $sp, 192 # 8-byte Folded Reload + ld.d $s2, $sp, 232 # 8-byte Folded Reload b .LBB4_33 .p2align 4, , 16 .LBB4_32: # %.loopexit435 @@ -7063,12 +7068,10 @@ Falign_udpari_long: # @Falign_udpari_long move $a4, $s0 ld.d $s0, $sp, 200 # 8-byte Folded Reload ld.d $a5, $s0, %pc_lo12(Falign_udpari_long.tmpptr1) - ld.d $s3, $sp, 192 # 8-byte Folded Reload ld.d $a6, $s3, %pc_lo12(Falign_udpari_long.tmpptr2) move $a0, $s5 ld.d $s8, $sp, 240 # 8-byte Folded Reload move $a1, $s8 - ld.d $s2, $sp, 232 # 8-byte Folded Reload move $a2, $s2 ld.d $a3, $sp, 224 # 8-byte Folded Reload move $s7, $a4 @@ -8164,6 +8167,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t3, $sp, 208 # 8-byte Folded Reload b .LBB4_161 .p2align 4, , 16 .LBB4_160: # %seq_vec_5.exit @@ -8178,7 +8182,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $t1, .LBB4_160 # %bb.162: # %.lr.ph.i391.preheader # in Loop: Header=BB4_161 Depth=1 - ld.d $t3, $sp, 208 # 8-byte Folded Reload fldx.d $fa0, $t3, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -8240,6 +8243,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a3, %pc_hi20(.LJTI4_0) addi.d $a3, $a3, %pc_lo12(.LJTI4_0) move $a4, $zero + ld.d $t1, $sp, 208 # 8-byte Folded Reload b .LBB4_171 .p2align 4, , 16 .LBB4_170: # %seq_vec_4.exit @@ -8254,7 +8258,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $a7, .LBB4_170 # %bb.172: # %.lr.ph.i.preheader # in Loop: Header=BB4_171 Depth=1 - ld.d $t1, $sp, 208 # 8-byte Folded Reload fldx.d $fa0, $t1, $a6 addi.d $a5, $a5, 1 move $a6, $a1 @@ -8306,6 +8309,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 208 # 8-byte Folded Reload b .LBB4_185 .p2align 4, , 16 .LBB4_184: # %seq_vec_3.exit @@ -8320,7 +8324,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $a6, .LBB4_184 # %bb.186: # %.lr.ph.i393.preheader # in Loop: Header=BB4_185 Depth=1 - ld.d $a7, $sp, 208 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 @@ -8403,6 +8406,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a5, %got_pc_hi20(volume) ld.d $a5, $a5, %got_pc_lo12(volume) move $a6, $zero + ld.d $t2, $sp, 216 # 8-byte Folded Reload b .LBB4_201 .p2align 4, , 16 .LBB4_200: # %seq_vec_5.exit409 @@ -8417,7 +8421,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $t1, .LBB4_200 # %bb.202: # %.lr.ph.i405.preheader # in Loop: Header=BB4_201 Depth=1 - ld.d $t2, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $t2, $t0 addi.d $a7, $a7, 1 move $t0, $a1 @@ -8460,6 +8463,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a3, %pc_hi20(.LJTI4_1) addi.d $a3, $a3, %pc_lo12(.LJTI4_1) move $a4, $zero + ld.d $t0, $sp, 216 # 8-byte Folded Reload b .LBB4_209 .p2align 4, , 16 .LBB4_208: # %seq_vec_4.exit403 @@ -8474,7 +8478,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $a7, .LBB4_208 # %bb.210: # %.lr.ph.i399.preheader # in Loop: Header=BB4_209 Depth=1 - ld.d $t0, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $t0, $a6 addi.d $a5, $a5, 1 move $a6, $a1 @@ -8525,6 +8528,7 @@ Falign_udpari_long: # @Falign_udpari_long pcalau12i $a2, %got_pc_hi20(amino_n) ld.d $a2, $a2, %got_pc_lo12(amino_n) move $a3, $zero + ld.d $a7, $sp, 216 # 8-byte Folded Reload b .LBB4_223 .p2align 4, , 16 .LBB4_222: # %seq_vec_3.exit417 @@ -8539,7 +8543,6 @@ Falign_udpari_long: # @Falign_udpari_long beqz $a6, .LBB4_222 # %bb.224: # %.lr.ph.i411.preheader # in Loop: Header=BB4_223 Depth=1 - ld.d $a7, $sp, 216 # 8-byte Folded Reload fldx.d $fa0, $a7, $a4 move $a4, $zero addi.d $a5, $a5, 1 diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s index a1492810..dbfcf0bd 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Lalignmm.s @@ -2362,7 +2362,7 @@ Lalign2m2m_hmout: # @Lalign2m2m_hmout jirl $ra, $ra, 0 st.d $a0, $sp, 216 # 8-byte Folded Spill ori $a1, $zero, 39 - st.d $s0, $sp, 400 # 8-byte Folded Spill + st.d $s0, $sp, 408 # 8-byte Folded Spill move $a0, $s0 pcaddu18i $ra, %call36(AllocateFloatMtx) jirl $ra, $ra, 0 @@ -2770,7 +2770,7 @@ Lalign2m2m_hmout: # @Lalign2m2m_hmout pcaddu18i $ra, %call36(AllocateIntVec) jirl $ra, $ra, 0 st.d $a0, $sp, 24 # 8-byte Folded Spill - ld.d $s0, $sp, 400 # 8-byte Folded Reload + ld.d $s0, $sp, 408 # 8-byte Folded Reload move $a0, $s0 pcaddu18i $ra, %call36(AllocateFloatVec) jirl $ra, $ra, 0 diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/MSalignmm.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/MSalignmm.s index 4b38dbd9..66a63261 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/MSalignmm.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/MSalignmm.s @@ -972,10 +972,9 @@ MSalignmm_rec: # @MSalignmm_rec move $a0, $s7 pcaddu18i $ra, %call36(AllocateFloatVec) jirl $ra, $ra, 0 - st.d $fp, $sp, 504 # 8-byte Folded Spill + st.d $fp, $sp, 512 # 8-byte Folded Spill move $fp, $a0 move $a0, $s7 - ld.d $s2, $sp, 304 # 8-byte Folded Reload pcaddu18i $ra, %call36(AllocateFloatVec) jirl $ra, $ra, 0 st.d $a0, $sp, 368 # 8-byte Folded Spill @@ -1007,7 +1006,8 @@ MSalignmm_rec: # @MSalignmm_rec jirl $ra, $ra, 0 move $s1, $a0 ld.d $a0, $sp, 240 # 8-byte Folded Reload - alsl.d $s2, $s2, $a0, 3 + ld.d $a1, $sp, 304 # 8-byte Folded Reload + alsl.d $s2, $a1, $a0, 3 ld.d $a0, $sp, 232 # 8-byte Folded Reload alsl.d $s7, $s8, $a0, 3 ori $a7, $zero, 1 @@ -1038,7 +1038,7 @@ MSalignmm_rec: # @MSalignmm_rec jirl $ra, $ra, 0 move $t3, $fp ld.d $t1, $sp, 448 # 8-byte Folded Reload - ld.d $a0, $sp, 504 # 8-byte Folded Reload + ld.d $a0, $sp, 512 # 8-byte Folded Reload addi.d $a0, $a0, 2 bstrpick.d $a0, $a0, 31, 0 addi.d $a1, $fp, 4 @@ -2548,9 +2548,9 @@ MSalignmm_rec: # @MSalignmm_rec jirl $ra, $ra, 0 ld.d $a5, $sp, 416 # 8-byte Folded Reload ld.d $t5, $sp, 496 # 8-byte Folded Reload - ld.d $a1, $sp, 512 # 8-byte Folded Reload ld.d $t3, $sp, 472 # 8-byte Folded Reload slli.d $a0, $s0, 2 + ld.d $a1, $sp, 512 # 8-byte Folded Reload fldx.s $fa0, $a1, $a0 move $a1, $zero ld.d $a3, $sp, 504 # 8-byte Folded Reload @@ -3183,8 +3183,8 @@ MSalignmm_rec: # @MSalignmm_rec ld.d $a0, $sp, 360 # 8-byte Folded Reload alsl.d $a0, $s5, $a0, 2 fld.s $fa0, $a0, 4 - ld.d $a1, $sp, 520 # 8-byte Folded Reload ld.d $a0, $sp, 384 # 8-byte Folded Reload + ld.d $a1, $sp, 520 # 8-byte Folded Reload alsl.d $a0, $a1, $a0, 2 fld.s $fa1, $a0, -4 ld.d $a0, $sp, 224 # 8-byte Folded Reload diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/SAalignmm.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/SAalignmm.s index 0c36ba01..0427f58d 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/SAalignmm.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/SAalignmm.s @@ -436,6 +436,7 @@ Aalign: # @Aalign st.d $a0, $sp, 80 # 8-byte Folded Spill pcalau12i $a0, %got_pc_hi20(penalty) ld.d $s3, $a0, %got_pc_lo12(penalty) + ld.d $s0, $sp, 112 # 8-byte Folded Reload b .LBB0_43 .p2align 4, , 16 .LBB0_42: # %._crit_edge197 @@ -475,7 +476,6 @@ Aalign: # @Aalign fst.s $fa0, $s6, 0 move $a0, $s8 move $a3, $s5 - ld.d $s0, $sp, 112 # 8-byte Folded Reload move $a4, $s0 move $a7, $zero pcaddu18i $ra, %call36(match_calc) diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Salignmm.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Salignmm.s index 5fab6183..d62d3137 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Salignmm.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/Salignmm.s @@ -980,14 +980,14 @@ A__align: # @A__align move $s0, $s1 fcvt.d.s $fa0, $fs0 ld.d $t0, $sp, 256 # 8-byte Folded Reload - ld.d $t1, $sp, 112 # 8-byte Folded Reload + ld.d $a5, $sp, 112 # 8-byte Folded Reload blez $s1, .LBB3_32 # %bb.26: # %.lr.ph357 ld.d $a0, $sp, 240 # 8-byte Folded Reload ld.d $a0, $a0, %pc_lo12(A__align.ogcp1) ld.d $a1, $sp, 216 # 8-byte Folded Reload ld.d $a2, $a1, %pc_lo12(A__align.fgcp1) - bstrpick.d $a1, $t1, 30, 0 + bstrpick.d $a1, $a5, 30, 0 ori $a3, $zero, 4 bltu $a1, $a3, .LBB3_29 # %bb.27: # %vector.memcheck @@ -1196,7 +1196,7 @@ A__align: # @A__align move $a2, $s5 b .LBB3_60 .LBB3_51: # %vector.ph - bstrpick.d $a3, $t1, 30, 2 + bstrpick.d $a3, $a5, 30, 2 slli.d $a3, $a3, 2 vreplvei.d $vr1, $vr0, 0 vldi $vr2, -912 diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/io.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/io.s index 6ef90256..b7fc9942 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/io.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/io.s @@ -9063,6 +9063,7 @@ ReadFasta34m10: # @ReadFasta34m10 pcalau12i $a0, %pc_hi20(.L.str.47) addi.d $s5, $a0, %pc_lo12(.L.str.47) move $s6, $zero + ld.d $s8, $sp, 56 # 8-byte Folded Reload b .LBB53_5 .p2align 4, , 16 .LBB53_3: # in Loop: Header=BB53_5 Depth=1 @@ -9072,7 +9073,6 @@ ReadFasta34m10: # @ReadFasta34m10 pcaddu18i $ra, %call36(strtol) jirl $ra, $ra, 0 slli.d $s7, $s6, 2 - ld.d $s8, $sp, 56 # 8-byte Folded Reload stx.w $a0, $s8, $s7 addi.d $a0, $sp, 88 ori $a1, $zero, 41 diff --git a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/rna.s b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/rna.s index c296617d..bc087ecd 100644 --- a/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/rna.s +++ b/results/MultiSource/Benchmarks/mafft/CMakeFiles/pairlocalalign.dir/rna.s @@ -1928,6 +1928,7 @@ mccaskillextract: # @mccaskillextract lu52i.d $a0, $a0, -1032 st.d $a0, $sp, 72 # 8-byte Folded Spill movgr2fr.d $fs0, $zero + ld.d $s4, $sp, 80 # 8-byte Folded Reload b .LBB2_3 .p2align 4, , 16 .LBB2_2: # %._crit_edge10 @@ -1984,7 +1985,6 @@ mccaskillextract: # @mccaskillextract .LBB2_7: # %.thread # in Loop: Header=BB2_9 Depth=3 slli.d $s8, $a1, 2 - ld.d $s4, $sp, 80 # 8-byte Folded Reload ldx.w $a1, $s4, $s8 addi.w $a1, $a1, 2 ori $a2, $zero, 24 diff --git a/results/MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/store.s b/results/MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/store.s index 397c85b2..f638bfdd 100644 --- a/results/MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/store.s +++ b/results/MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/CMakeFiles/mpeg2decode.dir/store.s @@ -1323,6 +1323,7 @@ conv420to422: # @conv420to422 move $a1, $zero ori $t4, $zero, 67 ori $t5, $zero, 227 + ld.d $a3, $sp, 80 # 8-byte Folded Reload .p2align 4, , 16 .LBB4_4: # %.preheader223.us # =>This Loop Header: Depth=1 @@ -1333,7 +1334,6 @@ conv420to422: # @conv420to422 move $s1, $zero ori $t8, $zero, 3 move $fp, $a0 - ld.d $a3, $sp, 80 # 8-byte Folded Reload move $a1, $t3 .p2align 4, , 16 .LBB4_5: # Parent Loop BB4_4 Depth=1 diff --git a/results/MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s b/results/MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s index 5fe73c31..2c10b077 100644 --- a/results/MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s +++ b/results/MultiSource/Benchmarks/nbench/CMakeFiles/nbench.dir/nbench1.s @@ -8238,24 +8238,24 @@ DoNNetIteration: # @DoNNetIteration fld.d $fa3, $s8, 472 vld $vr0, $sp, 768 # 16-byte Folded Reload fmadd.d $fa0, $fs4, $fa0, $fs7 - vld $vr4, $sp, 880 # 16-byte Folded Reload fst.d $fa1, $sp, 240 # 8-byte Folded Spill + vld $vr4, $sp, 880 # 16-byte Folded Reload fmadd.d $fa0, $fa1, $fa4, $fa0 - vld $vr1, $sp, 864 # 16-byte Folded Reload fst.d $fa2, $sp, 232 # 8-byte Folded Spill + vld $vr1, $sp, 864 # 16-byte Folded Reload fmadd.d $fa0, $fa2, $fa1, $fa0 - vld $vr1, $sp, 848 # 16-byte Folded Reload fst.d $fa3, $sp, 224 # 8-byte Folded Spill + vld $vr1, $sp, 848 # 16-byte Folded Reload fmadd.d $fa0, $fa3, $fa1, $fa0 fld.d $fa1, $s8, 480 fld.d $fa2, $s8, 488 fld.d $fs5, $s8, 496 fld.d $fs0, $s8, 504 - vld $vr3, $sp, 832 # 16-byte Folded Reload fst.d $fa1, $sp, 216 # 8-byte Folded Spill + vld $vr3, $sp, 832 # 16-byte Folded Reload fmadd.d $fa0, $fa1, $fa3, $fa0 - vld $vr1, $sp, 816 # 16-byte Folded Reload fst.d $fa2, $sp, 208 # 8-byte Folded Spill + vld $vr1, $sp, 816 # 16-byte Folded Reload fmadd.d $fa0, $fa2, $fa1, $fa0 vld $vr1, $sp, 800 # 16-byte Folded Reload fmadd.d $fa0, $fs5, $fa1, $fa0 diff --git a/results/MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s b/results/MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s index 9bf8ae17..a1e774e8 100644 --- a/results/MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s +++ b/results/MultiSource/Benchmarks/sim/CMakeFiles/sim.dir/sim.s @@ -320,13 +320,10 @@ main: # @main vld $vr0, $sp, 128 # 16-byte Folded Reload movfr2gr.d $a1, $fa0 vld $vr0, $sp, 80 # 16-byte Folded Reload - vst $vr0, $sp, 80 # 16-byte Folded Spill movfr2gr.d $a2, $fa0 vld $vr0, $sp, 96 # 16-byte Folded Reload - vst $vr0, $sp, 96 # 16-byte Folded Spill movfr2gr.d $a3, $fa0 vld $vr0, $sp, 112 # 16-byte Folded Reload - vst $vr0, $sp, 112 # 16-byte Folded Spill movfr2gr.d $a4, $fa0 movfr2gr.d $a5, $fs0 pcalau12i $a0, %pc_hi20(.L.str.12) @@ -747,6 +744,7 @@ SIM: # @SIM st.d $a1, $sp, 8 # 8-byte Folded Spill ld.d $s4, $sp, 104 # 8-byte Folded Reload st.d $s0, $sp, 72 # 8-byte Folded Spill + ld.d $s8, $sp, 24 # 8-byte Folded Reload pcalau12i $s1, %pc_hi20(no_mis) b .LBB1_13 .p2align 4, , 16 @@ -840,7 +838,6 @@ SIM: # @SIM st.w $a2, $a3, %pc_lo12(rl) sub.d $a3, $a4, $s6 addi.w $a3, $a3, 1 - ld.d $s8, $sp, 24 # 8-byte Folded Reload st.w $a3, $s8, %pc_lo12(cl) ld.d $a4, $sp, 16 # 8-byte Folded Reload st.w $a0, $a4, %pc_lo12(I) diff --git a/results/MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s b/results/MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s index 3808bf6d..9603b696 100644 --- a/results/MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s +++ b/results/MultiSource/Benchmarks/tramp3d-v4/CMakeFiles/tramp3d-v4.dir/tramp3d-v4.s @@ -42435,12 +42435,12 @@ _ZNK13GridPartitionILi3EE9partitionI8IntervalILi3EEEEiRKT_RSt6vectorIP4NodeIS3_S move $a4, $s1 ld.d $a5, $sp, 32 # 8-byte Folded Reload ld.d $a6, $sp, 48 # 8-byte Folded Reload - ld.d $a0, $sp, 80 # 8-byte Folded Reload - ld.d $a1, $sp, 88 # 8-byte Folded Reload ld.d $t2, $sp, 40 # 8-byte Folded Reload ld.d $t0, $sp, 24 # 8-byte Folded Reload + ld.d $a0, $sp, 80 # 8-byte Folded Reload ld.d $s1, $a0, 0 - ld.d $a0, $a1, 8 + ld.d $a0, $sp, 88 # 8-byte Folded Reload + ld.d $a0, $a0, 8 .LBB216_55: # %_ZN6PooledI4NodeI8IntervalILi3EES2_EEnwEm.exit82 # in Loop: Header=BB216_10 Depth=1 ld.d $a1, $s1, 0 @@ -207343,7 +207343,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR ld.w $a5, $a1, 20 add.d $a3, $a2, $a5 addi.w $a3, $a3, -1 - st.d $a2, $sp, 256 # 8-byte Folded Spill + st.d $a2, $sp, 280 # 8-byte Folded Spill bge $a3, $a2, .LBB995_2 .LBB995_1: # %._crit_edge42 ld.d $s8, $sp, 616 # 8-byte Folded Reload @@ -207368,10 +207368,10 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR blt $a2, $a4, .LBB995_1 # %bb.3: # %.preheader27.lr.ph ld.wu $a2, $a1, 0 - ld.w $a3, $a1, 4 + ld.w $s2, $a1, 4 st.d $a2, $sp, 608 # 8-byte Folded Spill addi.w $a4, $a2, 0 - add.d $a1, $a4, $a3 + add.d $a1, $a4, $s2 addi.w $a1, $a1, -1 blt $a1, $a4, .LBB995_1 # %bb.4: # %.preheader27.lr.ph.split.split @@ -207418,25 +207418,25 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR add.d $t5, $a6, $t2 mul.d $a6, $t6, $t4 add.d $t6, $t0, $a6 - st.d $a3, $sp, 592 # 8-byte Folded Spill - ld.d $a3, $sp, 256 # 8-byte Folded Reload + ld.d $s5, $sp, 280 # 8-byte Folded Reload st.d $s0, $sp, 208 # 8-byte Folded Spill - mul.d $a6, $a3, $s0 + mul.d $a6, $s5, $s0 ld.d $s0, $sp, 104 # 8-byte Folded Reload st.d $s4, $sp, 488 # 8-byte Folded Spill mul.d $t0, $s0, $s4 st.d $a1, $sp, 224 # 8-byte Folded Spill - mul.d $t2, $a3, $a1 + mul.d $t2, $s5, $a1 st.d $t7, $sp, 480 # 8-byte Folded Spill mul.d $t4, $s0, $t7 - add.d $s5, $t2, $t4 + add.d $a1, $t2, $t4 + st.d $a1, $sp, 272 # 8-byte Folded Spill st.d $a2, $sp, 216 # 8-byte Folded Spill - mul.d $t7, $a3, $a2 + mul.d $t7, $s5, $a2 st.d $t8, $sp, 456 # 8-byte Folded Spill mul.d $t8, $s0, $t8 add.d $t4, $a4, $t4 add.d $a1, $t4, $t2 - st.d $a1, $sp, 288 # 8-byte Folded Spill + st.d $a1, $sp, 264 # 8-byte Folded Spill add.d $a1, $t7, $t8 st.d $a1, $sp, 248 # 8-byte Folded Spill add.d $t2, $a4, $t8 @@ -207447,22 +207447,23 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR add.d $a1, $t0, $a6 st.d $a1, $sp, 232 # 8-byte Folded Spill st.d $fp, $sp, 200 # 8-byte Folded Spill - mul.d $a6, $a3, $fp + mul.d $a6, $s5, $fp st.d $s6, $sp, 448 # 8-byte Folded Spill mul.d $t0, $s0, $s6 - add.d $s6, $a6, $t0 + add.d $a3, $a6, $t0 add.d $t0, $a4, $t0 ld.w $t8, $a5, 208 ld.w $t2, $a5, 204 + move $s6, $s2 add.d $ra, $t0, $a6 - addi.d $a6, $a3, 1 + addi.d $a6, $s5, 1 mul.d $a6, $t8, $a6 st.d $t2, $sp, 464 # 8-byte Folded Spill mul.d $t0, $s0, $t2 add.d $t2, $a4, $t0 add.d $a1, $t2, $a6 st.d $a1, $sp, 96 # 8-byte Folded Spill - mul.d $t4, $a3, $t8 + mul.d $t4, $s5, $t8 add.d $a1, $t2, $t4 st.d $a1, $sp, 88 # 8-byte Folded Spill add.d $a2, $t4, $t0 @@ -207471,7 +207472,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR add.d $fp, $t0, $a6 addi.d $a6, $s0, 1 mul.d $a6, $t4, $a6 - mul.d $t0, $a3, $a1 + mul.d $t0, $s5, $a1 add.d $t2, $a4, $t0 add.d $s2, $t2, $a6 st.d $s2, $sp, 80 # 8-byte Folded Spill @@ -207497,20 +207498,19 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR move $s0, $a1 ld.d $s8, $sp, 248 # 8-byte Folded Reload ld.d $a1, $sp, 600 # 8-byte Folded Reload - add.w $a1, $a1, $a3 + add.w $a1, $a1, $s5 st.d $a1, $sp, 48 # 8-byte Folded Spill - ld.d $a2, $sp, 592 # 8-byte Folded Reload - add.d $a1, $a2, $a4 + add.d $a1, $s6, $a4 st.d $a1, $sp, 432 # 8-byte Folded Spill - addi.w $a1, $a2, -1 + addi.w $a1, $s6, -1 add.d $a2, $s7, $a4 st.d $a2, $sp, 40 # 8-byte Folded Spill - st.d $s5, $sp, 296 # 8-byte Folded Spill - add.d $a3, $s5, $a4 + ld.d $a2, $sp, 272 # 8-byte Folded Reload + add.d $a5, $a2, $a4 add.d $a2, $s8, $a4 st.d $a2, $sp, 24 # 8-byte Folded Spill - st.d $s6, $sp, 280 # 8-byte Folded Spill - add.d $a2, $s6, $a4 + st.d $a3, $sp, 256 # 8-byte Folded Spill + add.d $a2, $a3, $a4 st.d $a2, $sp, 16 # 8-byte Folded Spill st.d $a1, $sp, 600 # 8-byte Folded Spill bstrpick.d $a1, $a1, 31, 0 @@ -207529,17 +207529,17 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR add.d $a2, $t8, $a2 st.d $a2, $sp, 304 # 8-byte Folded Spill addi.d $a1, $a1, 1 - st.d $a1, $sp, 272 # 8-byte Folded Spill + st.d $a1, $sp, 296 # 8-byte Folded Spill bstrpick.d $a1, $a1, 32, 1 slli.d $a2, $a1, 1 st.d $a2, $sp, 320 # 8-byte Folded Spill ld.d $a2, $sp, 608 # 8-byte Folded Reload alsl.d $a1, $a1, $a2, 1 - st.d $a1, $sp, 264 # 8-byte Folded Spill + st.d $a1, $sp, 288 # 8-byte Folded Spill ld.d $a2, $sp, 240 # 8-byte Folded Reload ld.d $a4, $sp, 232 # 8-byte Folded Reload - st.d $a3, $sp, 32 # 8-byte Folded Spill - addi.d $a1, $a3, 1 + st.d $a5, $sp, 32 # 8-byte Folded Spill + addi.d $a1, $a5, 1 st.d $a1, $sp, 8 # 8-byte Folded Spill ld.d $a5, $sp, 96 # 8-byte Folded Reload ld.d $t1, $sp, 88 # 8-byte Folded Reload @@ -207554,9 +207554,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR ld.d $s1, $sp, 192 # 8-byte Folded Reload addi.d $s1, $s1, 1 ld.d $a1, $sp, 224 # 8-byte Folded Reload - ld.d $a2, $sp, 288 # 8-byte Folded Reload + ld.d $a2, $sp, 264 # 8-byte Folded Reload add.d $a2, $a2, $a1 - st.d $a2, $sp, 288 # 8-byte Folded Spill + st.d $a2, $sp, 264 # 8-byte Folded Spill ld.d $s0, $sp, 56 # 8-byte Folded Reload ld.d $a3, $sp, 112 # 8-byte Folded Reload add.d $a3, $a3, $s0 @@ -207576,9 +207576,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR ld.d $fp, $sp, 200 # 8-byte Folded Reload ld.d $ra, $sp, 176 # 8-byte Folded Reload add.d $ra, $ra, $fp - ld.d $s3, $sp, 280 # 8-byte Folded Reload + ld.d $s3, $sp, 256 # 8-byte Folded Reload add.d $s3, $s3, $fp - st.d $s3, $sp, 280 # 8-byte Folded Spill + st.d $s3, $sp, 256 # 8-byte Folded Spill ld.d $s7, $sp, 184 # 8-byte Folded Reload add.d $s7, $s7, $s2 ld.d $s8, $sp, 248 # 8-byte Folded Reload @@ -207591,11 +207591,11 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR add.d $s2, $s2, $s0 ld.d $s3, $sp, 144 # 8-byte Folded Reload add.d $s3, $s3, $s0 - ld.d $s5, $sp, 296 # 8-byte Folded Reload + ld.d $s5, $sp, 272 # 8-byte Folded Reload add.d $s5, $s5, $a1 - st.d $s5, $sp, 296 # 8-byte Folded Spill - ld.d $s5, $sp, 256 # 8-byte Folded Reload + st.d $s5, $sp, 272 # 8-byte Folded Spill ld.d $a1, $sp, 48 # 8-byte Folded Reload + ld.d $s5, $sp, 280 # 8-byte Folded Reload beq $s5, $a1, .LBB995_1 .LBB995_6: # %.preheader27 # =>This Loop Header: Depth=1 @@ -207641,11 +207641,10 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR ld.d $a7, $sp, 16 # 8-byte Folded Reload add.d $a1, $a7, $a1 st.d $a1, $sp, 336 # 8-byte Folded Spill - ld.d $a1, $sp, 256 # 8-byte Folded Reload + ld.d $a1, $sp, 280 # 8-byte Folded Reload addi.w $a1, $a1, 1 - st.d $a1, $sp, 256 # 8-byte Folded Spill - ld.d $a1, $sp, 296 # 8-byte Folded Reload - st.d $a1, $sp, 296 # 8-byte Folded Spill + st.d $a1, $sp, 280 # 8-byte Folded Spill + ld.d $a1, $sp, 272 # 8-byte Folded Reload st.d $a1, $sp, 584 # 8-byte Folded Spill st.d $s3, $sp, 144 # 8-byte Folded Spill st.d $s3, $sp, 576 # 8-byte Folded Spill @@ -207659,8 +207658,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR st.d $s8, $sp, 544 # 8-byte Folded Spill st.d $s7, $sp, 184 # 8-byte Folded Spill st.d $s7, $sp, 536 # 8-byte Folded Spill - ld.d $a1, $sp, 280 # 8-byte Folded Reload - st.d $a1, $sp, 280 # 8-byte Folded Spill + ld.d $a1, $sp, 256 # 8-byte Folded Reload st.d $a1, $sp, 528 # 8-byte Folded Spill st.d $ra, $sp, 176 # 8-byte Folded Spill st.d $a4, $sp, 232 # 8-byte Folded Spill @@ -207672,8 +207670,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR st.d $s6, $sp, 120 # 8-byte Folded Spill move $s5, $s6 st.d $a3, $sp, 112 # 8-byte Folded Spill - ld.d $s2, $sp, 288 # 8-byte Folded Reload - st.d $s2, $sp, 288 # 8-byte Folded Spill + ld.d $s2, $sp, 264 # 8-byte Folded Reload ld.d $s6, $sp, 104 # 8-byte Folded Reload .p2align 4, , 16 .LBB995_7: # %.preheader @@ -208089,8 +208086,8 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg7I5FieldI22UniformR bnez $a2, .LBB995_33 # %bb.34: # %middle.block # in Loop: Header=BB995_7 Depth=2 - ld.d $s3, $sp, 264 # 8-byte Folded Reload - ld.d $a1, $sp, 272 # 8-byte Folded Reload + ld.d $s3, $sp, 288 # 8-byte Folded Reload + ld.d $a1, $sp, 296 # 8-byte Folded Reload ld.d $a2, $sp, 320 # 8-byte Folded Reload bne $a1, $a2, .LBB995_8 b .LBB995_10 @@ -217653,7 +217650,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR mul.d $a6, $fp, $s5 add.d $t0, $a4, $t6 add.d $a1, $t0, $t4 - st.d $a1, $sp, 296 # 8-byte Folded Spill + st.d $a1, $sp, 280 # 8-byte Folded Spill add.d $a1, $t7, $a6 st.d $a1, $sp, 264 # 8-byte Folded Spill add.d $a6, $a4, $a6 @@ -217688,7 +217685,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.w $a1, $a7, 28 ld.w $t1, $a7, 32 add.d $a2, $t0, $t7 - st.d $a2, $sp, 288 # 8-byte Folded Spill + st.d $a2, $sp, 272 # 8-byte Folded Spill add.d $a2, $t0, $t6 mul.d $a6, $a1, $a6 mul.d $t0, $t8, $t1 @@ -217721,10 +217718,10 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $a0, $a1, $a4 st.d $a0, $sp, 456 # 8-byte Folded Spill addi.w $a0, $a1, -1 - st.d $s6, $sp, 312 # 8-byte Folded Spill + st.d $s6, $sp, 296 # 8-byte Folded Spill add.d $a1, $s6, $a4 st.d $a1, $sp, 24 # 8-byte Folded Spill - st.d $ra, $sp, 304 # 8-byte Folded Spill + st.d $ra, $sp, 288 # 8-byte Folded Spill add.d $a1, $ra, $a4 st.d $a1, $sp, 16 # 8-byte Folded Spill add.d $a1, $a2, $a4 @@ -217750,13 +217747,13 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $a0, $a3, $a1 st.d $a0, $sp, 320 # 8-byte Folded Spill addi.d $a0, $a4, 1 - st.d $a0, $sp, 280 # 8-byte Folded Spill + st.d $a0, $sp, 312 # 8-byte Folded Spill bstrpick.d $a4, $a0, 32, 1 slli.d $a0, $a4, 1 st.d $a0, $sp, 344 # 8-byte Folded Spill ld.d $a1, $sp, 640 # 8-byte Folded Reload alsl.d $a0, $a4, $a1, 1 - st.d $a0, $sp, 272 # 8-byte Folded Spill + st.d $a0, $sp, 304 # 8-byte Folded Spill ld.d $a1, $sp, 256 # 8-byte Folded Reload vldi $vr0, -928 ld.d $s2, $sp, 96 # 8-byte Folded Reload @@ -217785,9 +217782,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.d $s5, $sp, 120 # 8-byte Folded Reload add.d $s5, $s5, $t1 ld.d $fp, $sp, 232 # 8-byte Folded Reload - ld.d $a1, $sp, 296 # 8-byte Folded Reload + ld.d $a1, $sp, 280 # 8-byte Folded Reload add.d $a1, $a1, $fp - st.d $a1, $sp, 296 # 8-byte Folded Spill + st.d $a1, $sp, 280 # 8-byte Folded Spill ld.d $a4, $sp, 80 # 8-byte Folded Reload ld.d $a7, $sp, 128 # 8-byte Folded Reload add.d $a7, $a7, $a4 @@ -217807,21 +217804,21 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $t5, $t5, $t3 ld.d $s8, $sp, 184 # 8-byte Folded Reload add.d $s8, $s8, $t3 - ld.d $t3, $sp, 288 # 8-byte Folded Reload + ld.d $t3, $sp, 272 # 8-byte Folded Reload add.d $t3, $t3, $a4 - st.d $t3, $sp, 288 # 8-byte Folded Spill + st.d $t3, $sp, 272 # 8-byte Folded Spill ld.d $t3, $sp, 176 # 8-byte Folded Reload add.d $t3, $t3, $a4 - ld.d $s1, $sp, 304 # 8-byte Folded Reload + ld.d $s1, $sp, 288 # 8-byte Folded Reload add.d $s1, $s1, $fp - st.d $s1, $sp, 304 # 8-byte Folded Spill + st.d $s1, $sp, 288 # 8-byte Folded Spill ld.d $fp, $sp, 168 # 8-byte Folded Reload add.d $fp, $fp, $t1 ld.d $s1, $sp, 160 # 8-byte Folded Reload add.d $s1, $s1, $t1 - ld.d $t8, $sp, 312 # 8-byte Folded Reload + ld.d $t8, $sp, 296 # 8-byte Folded Reload add.d $t8, $t8, $a0 - st.d $t8, $sp, 312 # 8-byte Folded Spill + st.d $t8, $sp, 296 # 8-byte Folded Spill move $t8, $s4 ld.d $a0, $sp, 32 # 8-byte Folded Reload beq $s4, $a0, .LBB1038_1 @@ -217870,20 +217867,17 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.d $a4, $sp, 8 # 8-byte Folded Reload add.d $a0, $a4, $a0 st.d $a0, $sp, 360 # 8-byte Folded Spill - ld.d $a0, $sp, 312 # 8-byte Folded Reload - st.d $a0, $sp, 312 # 8-byte Folded Spill + ld.d $a0, $sp, 296 # 8-byte Folded Reload st.d $a0, $sp, 616 # 8-byte Folded Spill st.d $s1, $sp, 160 # 8-byte Folded Spill st.d $s1, $sp, 608 # 8-byte Folded Spill st.d $fp, $sp, 168 # 8-byte Folded Spill st.d $fp, $sp, 600 # 8-byte Folded Spill - ld.d $a0, $sp, 304 # 8-byte Folded Reload - st.d $a0, $sp, 304 # 8-byte Folded Spill + ld.d $a0, $sp, 288 # 8-byte Folded Reload st.d $a0, $sp, 592 # 8-byte Folded Spill st.d $t3, $sp, 176 # 8-byte Folded Spill st.d $t3, $sp, 584 # 8-byte Folded Spill - ld.d $a0, $sp, 288 # 8-byte Folded Reload - st.d $a0, $sp, 288 # 8-byte Folded Spill + ld.d $a0, $sp, 272 # 8-byte Folded Reload st.d $a0, $sp, 576 # 8-byte Folded Spill st.d $s8, $sp, 184 # 8-byte Folded Spill st.d $s8, $sp, 568 # 8-byte Folded Spill @@ -217897,8 +217891,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR st.d $s6, $sp, 144 # 8-byte Folded Spill st.d $a5, $sp, 136 # 8-byte Folded Spill st.d $a7, $sp, 128 # 8-byte Folded Spill - ld.d $t1, $sp, 296 # 8-byte Folded Reload - st.d $t1, $sp, 296 # 8-byte Folded Spill + ld.d $t1, $sp, 280 # 8-byte Folded Reload st.d $s5, $sp, 120 # 8-byte Folded Spill st.d $ra, $sp, 112 # 8-byte Folded Spill st.d $t6, $sp, 192 # 8-byte Folded Spill @@ -218292,8 +218285,8 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR bnez $a1, .LBB1038_31 # %bb.32: # %middle.block # in Loop: Header=BB1038_7 Depth=2 - ld.d $s8, $sp, 272 # 8-byte Folded Reload - ld.d $a0, $sp, 280 # 8-byte Folded Reload + ld.d $s8, $sp, 304 # 8-byte Folded Reload + ld.d $a0, $sp, 312 # 8-byte Folded Reload ld.d $a1, $sp, 344 # 8-byte Folded Reload bne $a0, $a1, .LBB1038_8 b .LBB1038_10 @@ -236240,7 +236233,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.w $s2, $a1, 20 add.d $a2, $a3, $s2 addi.w $a2, $a2, -1 - st.d $a3, $sp, 272 # 8-byte Folded Spill + st.d $a3, $sp, 288 # 8-byte Folded Spill bge $a2, $a3, .LBB1108_2 .LBB1108_1: # %._crit_edge42 ld.d $s8, $sp, 616 # 8-byte Folded Reload @@ -236310,7 +236303,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ori $t0, $zero, 56 mul.d $a2, $a2, $t0 add.d $t5, $a6, $a2 - ld.d $a7, $sp, 272 # 8-byte Folded Reload + ld.d $a7, $sp, 288 # 8-byte Folded Reload st.d $fp, $sp, 232 # 8-byte Folded Spill mul.d $a2, $a7, $fp ld.d $fp, $sp, 112 # 8-byte Folded Reload @@ -236328,7 +236321,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR mul.d $t7, $fp, $s3 add.d $t2, $a1, $t2 add.d $t0, $t2, $t0 - st.d $t0, $sp, 296 # 8-byte Folded Spill + st.d $t0, $sp, 272 # 8-byte Folded Spill add.d $s3, $t4, $t7 add.d $a6, $a1, $a6 add.d $a2, $a6, $a2 @@ -236392,7 +236385,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $a0, $a5, $a1 st.d $a0, $sp, 440 # 8-byte Folded Spill addi.w $a0, $a5, -1 - st.d $ra, $sp, 304 # 8-byte Folded Spill + st.d $ra, $sp, 280 # 8-byte Folded Spill add.d $a7, $ra, $a1 st.d $a7, $sp, 48 # 8-byte Folded Spill add.d $a5, $s8, $a1 @@ -236417,13 +236410,13 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $a1, $t6, $a1 st.d $a1, $sp, 312 # 8-byte Folded Spill addi.d $a0, $a0, 1 - st.d $a0, $sp, 288 # 8-byte Folded Spill + st.d $a0, $sp, 304 # 8-byte Folded Spill bstrpick.d $a0, $a0, 32, 1 slli.d $a1, $a0, 1 st.d $a1, $sp, 328 # 8-byte Folded Spill ld.d $a1, $sp, 608 # 8-byte Folded Reload alsl.d $a0, $a0, $a1, 1 - st.d $a0, $sp, 280 # 8-byte Folded Spill + st.d $a0, $sp, 296 # 8-byte Folded Spill move $a1, $s4 ld.d $a7, $sp, 248 # 8-byte Folded Reload st.d $a5, $sp, 40 # 8-byte Folded Spill @@ -236442,9 +236435,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.d $s0, $sp, 208 # 8-byte Folded Reload addi.d $s0, $s0, 1 ld.d $a0, $sp, 240 # 8-byte Folded Reload - ld.d $a1, $sp, 296 # 8-byte Folded Reload + ld.d $a1, $sp, 272 # 8-byte Folded Reload add.d $a1, $a1, $a0 - st.d $a1, $sp, 296 # 8-byte Folded Spill + st.d $a1, $sp, 272 # 8-byte Folded Spill ld.d $t1, $sp, 72 # 8-byte Folded Reload ld.d $s7, $sp, 120 # 8-byte Folded Reload add.d $s7, $s7, $t1 @@ -236468,9 +236461,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $s5, $s5, $a4 ld.d $a4, $sp, 192 # 8-byte Folded Reload add.d $a4, $a4, $a7 - ld.d $a7, $sp, 304 # 8-byte Folded Reload + ld.d $a7, $sp, 280 # 8-byte Folded Reload add.d $a7, $a7, $t8 - st.d $a7, $sp, 304 # 8-byte Folded Spill + st.d $a7, $sp, 280 # 8-byte Folded Spill ld.d $a7, $sp, 248 # 8-byte Folded Reload add.d $a7, $a7, $a1 ld.d $fp, $sp, 168 # 8-byte Folded Reload @@ -236481,8 +236474,8 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR add.d $s1, $s1, $t1 ld.d $s8, $sp, 200 # 8-byte Folded Reload add.d $s8, $s8, $a0 - ld.d $s2, $sp, 272 # 8-byte Folded Reload ld.d $a0, $sp, 56 # 8-byte Folded Reload + ld.d $s2, $sp, 288 # 8-byte Folded Reload beq $s2, $a0, .LBB1108_1 .LBB1108_6: # %.preheader27 # =>This Loop Header: Depth=1 @@ -236528,9 +236521,9 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR ld.d $a1, $sp, 24 # 8-byte Folded Reload add.d $a0, $a1, $a0 st.d $a0, $sp, 344 # 8-byte Folded Spill - ld.d $a0, $sp, 272 # 8-byte Folded Reload + ld.d $a0, $sp, 288 # 8-byte Folded Reload addi.w $a0, $a0, 1 - st.d $a0, $sp, 272 # 8-byte Folded Spill + st.d $a0, $sp, 288 # 8-byte Folded Spill st.d $s8, $sp, 200 # 8-byte Folded Spill st.d $s8, $sp, 584 # 8-byte Folded Spill st.d $s1, $sp, 152 # 8-byte Folded Spill @@ -236541,8 +236534,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR st.d $fp, $sp, 560 # 8-byte Folded Spill st.d $a7, $sp, 248 # 8-byte Folded Spill st.d $a7, $sp, 552 # 8-byte Folded Spill - ld.d $a0, $sp, 304 # 8-byte Folded Reload - st.d $a0, $sp, 304 # 8-byte Folded Spill + ld.d $a0, $sp, 280 # 8-byte Folded Reload st.d $a0, $sp, 544 # 8-byte Folded Spill st.d $a4, $sp, 192 # 8-byte Folded Spill st.d $a4, $sp, 536 # 8-byte Folded Spill @@ -236559,8 +236551,7 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR move $a7, $ra st.d $s7, $sp, 120 # 8-byte Folded Spill move $s4, $s7 - ld.d $ra, $sp, 296 # 8-byte Folded Reload - st.d $ra, $sp, 296 # 8-byte Folded Spill + ld.d $ra, $sp, 272 # 8-byte Folded Reload ld.d $s2, $sp, 112 # 8-byte Folded Reload .p2align 4, , 16 .LBB1108_7: # %.preheader @@ -236959,8 +236950,8 @@ _ZN18LoopApplyEvaluator8evaluateI16ApplyMultiArgLocI9MultiArg6I5FieldI22UniformR bnez $a1, .LBB1108_32 # %bb.33: # %middle.block # in Loop: Header=BB1108_7 Depth=2 - ld.d $a4, $sp, 280 # 8-byte Folded Reload - ld.d $a0, $sp, 288 # 8-byte Folded Reload + ld.d $a4, $sp, 296 # 8-byte Folded Reload + ld.d $a0, $sp, 304 # 8-byte Folded Reload ld.d $a1, $sp, 328 # 8-byte Folded Reload bne $a0, $a1, .LBB1108_8 b .LBB1108_10 diff --git a/results/SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s b/results/SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s index 40da409b..7aa73c98 100644 --- a/results/SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s +++ b/results/SingleSource/Benchmarks/Adobe-C++/CMakeFiles/simple_types_loop_invariant.dir/simple_types_loop_invariant.s @@ -523,7 +523,6 @@ main: # @main pcaddu18i $ra, %call36(memset) jirl $ra, $ra, 0 vld $vr0, $sp, 16 # 16-byte Folded Reload - vst $vr0, $sp, 16 # 16-byte Folded Spill ftintrz.l.d $fa0, $fa0 movfr2gr.d $fp, $fa0 slli.d $s0, $fp, 1 @@ -2122,6 +2121,7 @@ main: # @main fdiv.d $fa0, $fs0, $fs1 fadd.d $fs2, $fa1, $fa0 vori.b $vr0, $vr1, 0 + vst $vr1, $sp, 16 # 16-byte Folded Spill pcalau12i $a0, %pc_hi20(dataDouble) addi.d $fp, $a0, %pc_lo12(dataDouble) pcalau12i $a0, %pc_hi20(.L.str.167) diff --git a/results/SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/partialsums.dir/partialsums.s b/results/SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/partialsums.dir/partialsums.s index 5a174275..a604cc12 100644 --- a/results/SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/partialsums.dir/partialsums.s +++ b/results/SingleSource/Benchmarks/BenchmarkGame/CMakeFiles/partialsums.dir/partialsums.s @@ -87,7 +87,6 @@ main: # @main frecip.d $fa0, $fa1 fadd.d $fs4, $fs4, $fa0 vld $vr0, $sp, 80 # 16-byte Folded Reload - vst $vr0, $sp, 80 # 16-byte Folded Spill fmul.d $fa1, $fa0, $fa0 fmul.d $fs6, $fa1, $fa0 # kill: def $f0_64 killed $f0_64 killed $vr0 diff --git a/results/SingleSource/Benchmarks/Misc/CMakeFiles/whetstone.dir/whetstone.s b/results/SingleSource/Benchmarks/Misc/CMakeFiles/whetstone.dir/whetstone.s index 2aa93e19..e5da0ab1 100644 --- a/results/SingleSource/Benchmarks/Misc/CMakeFiles/whetstone.dir/whetstone.s +++ b/results/SingleSource/Benchmarks/Misc/CMakeFiles/whetstone.dir/whetstone.s @@ -473,7 +473,6 @@ main: # @main # => This Inner Loop Header: Depth=2 vst $vr0, $sp, 176 # 16-byte Folded Spill vld $vr0, $sp, 192 # 16-byte Folded Reload - vst $vr0, $sp, 192 # 16-byte Folded Spill # kill: def $f0_64 killed $f0_64 killed $vr0 pcaddu18i $ra, %call36(sin) jirl $ra, $ra, 0 @@ -518,8 +517,8 @@ main: # @main pcaddu18i $ra, %call36(cos) jirl $ra, $ra, 0 fmov.d $fs0, $fa0 - vld $vr1, $sp, 192 # 16-byte Folded Reload vld $vr0, $sp, 176 # 16-byte Folded Reload + vld $vr1, $sp, 192 # 16-byte Folded Reload fsub.d $fa0, $fa1, $fa0 pcaddu18i $ra, %call36(cos) jirl $ra, $ra, 0 diff --git a/results/SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s b/results/SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s index 6c983977..81e1f179 100644 --- a/results/SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s +++ b/results/SingleSource/Benchmarks/Shootout-C++/CMakeFiles/Shootout-C++-matrix.dir/matrix.s @@ -678,7 +678,6 @@ main: # @main ld.d $a0, $sp, 608 # 8-byte Folded Reload addi.d $a0, $a0, 120 st.d $a0, $sp, 176 # 8-byte Folded Spill - ld.d $a0, $sp, 376 # 8-byte Folded Reload st.d $s0, $sp, 320 # 8-byte Folded Spill addi.d $a3, $s0, 120 st.d $a3, $sp, 168 # 8-byte Folded Spill @@ -718,12 +717,13 @@ main: # @main st.d $ra, $sp, 384 # 8-byte Folded Spill addi.d $a1, $ra, 120 st.d $a1, $sp, 72 # 8-byte Folded Spill + ld.d $a0, $sp, 376 # 8-byte Folded Reload addi.d $a0, $a0, 120 st.d $a0, $sp, 64 # 8-byte Folded Spill - ld.d $a0, $sp, 360 # 8-byte Folded Reload ld.d $a1, $sp, 368 # 8-byte Folded Reload addi.d $a1, $a1, 120 st.d $a1, $sp, 56 # 8-byte Folded Spill + ld.d $a0, $sp, 360 # 8-byte Folded Reload addi.d $a0, $a0, 120 st.d $a0, $sp, 48 # 8-byte Folded Spill ld.d $a0, $sp, 352 # 8-byte Folded Reload diff --git a/results/SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s b/results/SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s index 02cd7393..f2b98e54 100644 --- a/results/SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s +++ b/results/SingleSource/UnitTests/CMakeFiles/matrix-types-spec.dir/matrix-types-spec.s @@ -7879,43 +7879,43 @@ _Z12testMultiplyIdLj10ELj21ELj23EEvv: # @_Z12testMultiplyIdLj10ELj21ELj23EEvv ori $a0, $a0, 1896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 + ori $a0, $zero, 3440 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 # 16-byte Folded Spill vfmul.d $vr1, $vr1, $vr11 vfadd.d $vr1, $vr2, $vr1 lu12i.w $a0, 3 ori $a0, $a0, 1976 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 - vfmul.d $vr2, $vr0, $vr10 - ori $a0, $zero, 3440 + ori $a0, $zero, 3424 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 # 16-byte Folded Spill + vst $vr3, $a0, 0 # 16-byte Folded Spill + vfmul.d $vr2, $vr0, $vr10 vfadd.d $vr1, $vr1, $vr2 lu12i.w $a0, 3 ori $a0, $a0, 2056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 - vfmul.d $vr2, $vr3, $vr5 - ori $a0, $zero, 3424 + ori $a0, $zero, 3408 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 # 16-byte Folded Spill + vst $vr0, $a0, 0 # 16-byte Folded Spill + vfmul.d $vr2, $vr3, $vr5 vfadd.d $vr1, $vr1, $vr2 lu12i.w $a0, 3 ori $a0, $a0, 2136 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 - vfmul.d $vr2, $vr0, $vr6 - ori $a0, $zero, 3408 + ori $a0, $zero, 3392 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 # 16-byte Folded Spill + vst $vr3, $a0, 0 # 16-byte Folded Spill + vfmul.d $vr2, $vr0, $vr6 vfadd.d $vr1, $vr1, $vr2 lu12i.w $a0, 3 ori $a0, $a0, 2216 add.d $a0, $sp, $a0 vld $vr31, $a0, 0 vfmul.d $vr2, $vr3, $vr7 - ori $a0, $zero, 3392 - add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 952 add.d $a0, $sp, $a0 @@ -22704,6 +22704,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a1, $zero, 2848 vldx $vr0, $a1, $fp + ori $a1, $zero, 3392 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr3 vfadd.d $vr20, $vr20, $vr21 ori $a1, $zero, 3048 @@ -22713,9 +22716,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr4 - ori $a1, $zero, 3392 - add.d $a1, $sp, $a1 - vst $vr0, $a1, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a1, $zero, 3248 vldx $vr0, $a1, $fp @@ -22867,6 +22867,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a2, $zero, 2664 vldx $vr1, $a2, $fp + ori $a2, $zero, 3376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr6 vfadd.d $vr20, $vr20, $vr21 ori $a2, $zero, 2864 @@ -22876,9 +22879,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr3 - ori $a2, $zero, 3376 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a2, $zero, 3064 vldx $vr1, $a2, $fp @@ -23022,6 +23022,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a3, $zero, 2280 vldx $vr1, $a3, $fp + ori $a3, $zero, 3360 + add.d $a3, $sp, $a3 + vst $vr1, $a3, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr8 vfadd.d $vr20, $vr20, $vr21 ori $a3, $zero, 2480 @@ -23031,9 +23034,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a3, $sp, $a3 vst $vr0, $a3, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr7 - ori $a3, $zero, 3360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a3, $zero, 2680 vldx $vr1, $a3, $fp @@ -23177,6 +23177,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv ori $a3, $a3, 3792 add.d $a3, $sp, $a3 vld $vr1, $a3, 0 + ori $a3, $zero, 3344 + add.d $a3, $sp, $a3 + vst $vr1, $a3, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr11 vfadd.d $vr20, $vr20, $vr21 ori $a3, $zero, 2096 @@ -23186,9 +23189,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a4, $sp, $a4 vst $vr0, $a4, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr9 - ori $a4, $zero, 3344 - add.d $a4, $sp, $a4 - vst $vr1, $a4, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a4, $zero, 2296 vldx $vr1, $a4, $fp @@ -23308,6 +23308,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv ori $a4, $a4, 3008 add.d $a4, $sp, $a4 vld $vr1, $a4, 0 + ori $a4, $zero, 3328 + add.d $a4, $sp, $a4 + vst $vr1, $a4, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr14 vfadd.d $vr20, $vr20, $vr21 lu12i.w $a4, 3 @@ -23319,9 +23322,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a4, $sp, $a4 vst $vr0, $a4, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr13 - ori $a4, $zero, 3328 - add.d $a4, $sp, $a4 - vst $vr1, $a4, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 lu12i.w $a4, 3 ori $a4, $a4, 3408 @@ -23419,6 +23419,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a5, $zero, 3712 vldx $vr0, $a5, $fp + ori $a5, $zero, 3312 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr23 vfadd.d $vr20, $vr20, $vr21 lu12i.w $a5, 3 @@ -23438,9 +23441,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a5, $sp, $a5 vst $vr2, $a5, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr19 - ori $a5, $zero, 3312 - add.d $a5, $sp, $a5 - vst $vr0, $a5, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 vst $vr20, $sp, 1952 # 16-byte Folded Spill lu12i.w $a5, 3 @@ -23566,6 +23566,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a6, $zero, 3128 vldx $vr1, $a6, $fp + ori $a6, $zero, 3296 + add.d $a6, $sp, $a6 + vst $vr1, $a6, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr4 vfadd.d $vr20, $vr20, $vr21 ori $a6, $zero, 3328 @@ -23575,9 +23578,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a6, $sp, $a6 vst $vr0, $a6, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr24 - ori $a6, $zero, 3296 - add.d $a6, $sp, $a6 - vst $vr1, $a6, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a6, $zero, 3528 vldx $vr1, $a6, $fp @@ -23713,6 +23713,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $a7, $zero, 2544 vldx $vr0, $a7, $fp + ori $a7, $zero, 3280 + add.d $a7, $sp, $a7 + vst $vr0, $a7, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr7 vfadd.d $vr20, $vr20, $vr21 ori $a7, $zero, 2744 @@ -23722,9 +23725,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a7, $sp, $a7 vst $vr1, $a7, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr6 - ori $a7, $zero, 3280 - add.d $a7, $sp, $a7 - vst $vr0, $a7, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a7, $zero, 2944 vldx $vr0, $a7, $fp @@ -23842,6 +23842,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv ori $a7, $a7, 3656 add.d $a7, $sp, $a7 vld $vr0, $a7, 0 + ori $a7, $zero, 3264 + add.d $a7, $sp, $a7 + vst $vr0, $a7, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr10 vfadd.d $vr20, $vr20, $vr21 lu12i.w $a7, 3 @@ -23852,9 +23855,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $a7, $sp, $a7 vst $vr1, $a7, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr11 - ori $a7, $zero, 3264 - add.d $a7, $sp, $a7 - vst $vr0, $a7, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $a7, $zero, 2160 vldx $vr0, $a7, $fp @@ -23914,6 +23914,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $t0, $zero, 3760 vldx $vr0, $t0, $fp + ori $t0, $zero, 3248 + add.d $t0, $sp, $t0 + vst $vr0, $t0, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr23 vfadd.d $vr20, $vr20, $vr21 lu12i.w $t0, 3 @@ -23931,9 +23934,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $t0, $sp, $t0 vst $vr2, $t0, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr19 - ori $t0, $zero, 3248 - add.d $t0, $sp, $t0 - vst $vr0, $t0, 0 # 16-byte Folded Spill vfadd.d $vr0, $vr20, $vr21 vst $vr0, $sp, 1904 # 16-byte Folded Spill lu12i.w $t0, 3 @@ -24039,6 +24039,9 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv vfadd.d $vr20, $vr20, $vr21 ori $t1, $zero, 2976 vldx $vr0, $t1, $fp + ori $t1, $zero, 3232 + add.d $t1, $sp, $t1 + vst $vr0, $t1, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr1, $vr3 vfadd.d $vr20, $vr20, $vr21 ori $t1, $zero, 3176 @@ -24047,9 +24050,6 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv add.d $t1, $sp, $t1 vst $vr1, $t1, 0 # 16-byte Folded Spill vfmul.d $vr21, $vr0, $vr4 - ori $t1, $zero, 3232 - add.d $t1, $sp, $t1 - vst $vr0, $t1, 0 # 16-byte Folded Spill vfadd.d $vr20, $vr20, $vr21 ori $t1, $zero, 3376 vldx $vr0, $t1, $fp @@ -24164,13 +24164,13 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv fadd.d $ft2, $ft2, $ft3 ori $t1, $zero, 2192 fldx.d $fa1, $t1, $fp + ori $t2, $zero, 3224 + add.d $t2, $sp, $t2 + fst.d $fa1, $t2, 0 # 8-byte Folded Spill fmul.d $ft1, $fa0, $ft1 fadd.d $ft1, $ft2, $ft1 ori $t2, $zero, 2392 fmul.d $ft0, $fa1, $ft0 - ori $t3, $zero, 3224 - add.d $t3, $sp, $t3 - fst.d $fa1, $t3, 0 # 8-byte Folded Spill fldx.d $fa0, $t2, $fp ori $t2, $zero, 3464 add.d $t2, $sp, $t2 @@ -24206,13 +24206,13 @@ _Z12testMultiplyIdLj25ELj19ELj11EEvv: # @_Z12testMultiplyIdLj25ELj19ELj11EEvv fadd.d $fa3, $fa3, $fa4 ori $t2, $zero, 3392 fldx.d $fa1, $t2, $fp + ori $t2, $zero, 3216 + add.d $t2, $sp, $t2 + fst.d $fa1, $t2, 0 # 8-byte Folded Spill fmul.d $fa2, $fa0, $fs0 fadd.d $fa2, $fa3, $fa2 ori $t2, $zero, 3592 fmul.d $fa0, $fa1, $ft14 - ori $t3, $zero, 3216 - add.d $t3, $sp, $t3 - fst.d $fa1, $t3, 0 # 8-byte Folded Spill fldx.d $fa1, $t2, $fp ori $t2, $zero, 3424 add.d $t2, $sp, $t2 @@ -40530,383 +40530,374 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2928 + ori $a0, $zero, 2944 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3136 + ori $a0, $zero, 3152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3232 + ori $a0, $zero, 3248 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3264 + ori $a0, $zero, 3280 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3216 + ori $a0, $zero, 3232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3184 + ori $a0, $zero, 3200 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3200 + ori $a0, $zero, 3216 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3504 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3168 + ori $a0, $zero, 3184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3104 + ori $a0, $zero, 3120 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3152 + ori $a0, $zero, 3168 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3088 + ori $a0, $zero, 3104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3120 + ori $a0, $zero, 3136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2384 + ori $a0, $zero, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2448 + ori $a0, $zero, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2368 + ori $a0, $zero, 2384 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2416 + ori $a0, $zero, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2464 + ori $a0, $zero, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2656 + ori $a0, $zero, 2672 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2704 + ori $a0, $zero, 2720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2688 + ori $a0, $zero, 2704 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2672 + ori $a0, $zero, 2688 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2752 + ori $a0, $zero, 2768 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2736 + ori $a0, $zero, 2752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2720 + ori $a0, $zero, 2736 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2816 + ori $a0, $zero, 2832 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f13 # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2768 + ori $a0, $zero, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2832 + ori $a0, $zero, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2096 + ori $a0, $zero, 2112 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2160 + ori $a0, $zero, 2176 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2112 + ori $a0, $zero, 2128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2128 + ori $a0, $zero, 2144 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2192 + ori $a0, $zero, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2144 + ori $a0, $zero, 2160 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2176 + ori $a0, $zero, 2192 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2208 + ori $a0, $zero, 2224 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2240 + ori $a0, $zero, 2256 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2288 + ori $a0, $zero, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2336 + ori $a0, $zero, 2352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2272 + ori $a0, $zero, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2320 + ori $a0, $zero, 2336 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2352 + ori $a0, $zero, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2304 + ori $a0, $zero, 2320 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1840 # 16-byte Folded Spill + vst $vr0, $sp, 1856 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3008 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1872 # 16-byte Folded Spill + vst $vr0, $sp, 1888 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1856 # 16-byte Folded Spill + vst $vr0, $sp, 1872 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1888 # 16-byte Folded Spill + vst $vr0, $sp, 1904 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1920 # 16-byte Folded Spill + vst $vr0, $sp, 1936 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1904 # 16-byte Folded Spill + vst $vr0, $sp, 1920 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1936 # 16-byte Folded Spill + vst $vr0, $sp, 1952 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1968 # 16-byte Folded Spill + vst $vr0, $sp, 1984 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1952 # 16-byte Folded Spill + vst $vr0, $sp, 1968 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1984 # 16-byte Folded Spill + vst $vr0, $sp, 2000 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3952 + ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 2016 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 2032 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2064 + ori $a0, $zero, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $zero, 2080 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2048 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1600 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1648 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1632 # 16-byte Folded Spill - # implicit-def: $f0 - lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $zero, 2064 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 1616 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1696 # 16-byte Folded Spill + vst $vr0, $sp, 1664 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1680 # 16-byte Folded Spill + vst $vr0, $sp, 1648 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1664 # 16-byte Folded Spill + vst $vr0, $sp, 1632 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1744 # 16-byte Folded Spill + vst $vr0, $sp, 1712 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1728 # 16-byte Folded Spill + vst $vr0, $sp, 1696 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1712 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1776 # 16-byte Folded Spill + vst $vr0, $sp, 1680 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 1760 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3632 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 # 16-byte Folded Spill + vst $vr0, $sp, 1744 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1824 # 16-byte Folded Spill + vst $vr0, $sp, 1728 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1808 # 16-byte Folded Spill + vst $vr0, $sp, 1792 # 16-byte Folded Spill # implicit-def: $f0 - lu12i.w $a0, 1 - ori $a0, $a0, 2864 + vst $vr0, $sp, 1776 # 16-byte Folded Spill + # implicit-def: $f0 + ori $a0, $zero, 3648 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1376 # 16-byte Folded Spill + lu12i.w $a0, 1 + ori $a0, $a0, 3008 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1424 # 16-byte Folded Spill + vst $vr0, $sp, 1840 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1488 # 16-byte Folded Spill + vst $vr0, $sp, 1824 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2880 @@ -40915,231 +40906,232 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ # implicit-def: $f0 vst $vr0, $sp, 1392 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1456 # 16-byte Folded Spill + vst $vr0, $sp, 1440 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1520 # 16-byte Folded Spill + vst $vr0, $sp, 1504 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1440 # 16-byte Folded Spill + vst $vr0, $sp, 1408 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1504 # 16-byte Folded Spill + vst $vr0, $sp, 1472 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1552 # 16-byte Folded Spill + vst $vr0, $sp, 1536 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1472 # 16-byte Folded Spill + vst $vr0, $sp, 1456 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1536 # 16-byte Folded Spill + vst $vr0, $sp, 1520 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 1568 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 3280 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - lu12i.w $a0, 1 - ori $a0, $a0, 2928 + vst $vr0, $sp, 1488 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 1552 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 1584 # 16-byte Folded Spill + # implicit-def: $f0 + ori $a0, $zero, 3296 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1184 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1200 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1264 # 16-byte Folded Spill - # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1216 # 16-byte Folded Spill + vst $vr0, $sp, 1200 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1232 # 16-byte Folded Spill + vst $vr0, $sp, 1216 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1312 # 16-byte Folded Spill + vst $vr0, $sp, 1280 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1248 # 16-byte Folded Spill + vst $vr0, $sp, 1232 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1280 # 16-byte Folded Spill + vst $vr0, $sp, 1248 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1344 # 16-byte Folded Spill + vst $vr0, $sp, 1328 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1296 # 16-byte Folded Spill + vst $vr0, $sp, 1264 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1328 # 16-byte Folded Spill + vst $vr0, $sp, 1296 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 1360 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2960 + lu12i.w $a0, 1 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 208 # 16-byte Folded Spill + vst $vr0, $sp, 1312 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1056 # 16-byte Folded Spill + vst $vr0, $sp, 1344 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 1376 # 16-byte Folded Spill + # implicit-def: $f0 + ori $a0, $zero, 2976 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 208 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 1072 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 1088 # 16-byte Folded Spill + # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f15 # implicit-def: $f0 - vst $vr0, $sp, 1088 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 1104 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 1120 # 16-byte Folded Spill + # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f16 # implicit-def: $f0 - vst $vr0, $sp, 1120 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 1136 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 1152 # 16-byte Folded Spill + # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f18 # implicit-def: $f0 - vst $vr0, $sp, 1152 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 1168 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2512 + vst $vr0, $sp, 1184 # 16-byte Folded Spill + # implicit-def: $f0 + ori $a0, $zero, 2528 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 960 # 16-byte Folded Spill + vst $vr0, $sp, 976 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 944 # 16-byte Folded Spill + vst $vr0, $sp, 960 # 16-byte Folded Spill # implicit-def: $f20 # implicit-def: $f0 - vst $vr0, $sp, 992 # 16-byte Folded Spill + vst $vr0, $sp, 1008 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 976 # 16-byte Folded Spill + vst $vr0, $sp, 992 # 16-byte Folded Spill # implicit-def: $f17 # implicit-def: $f0 - vst $vr0, $sp, 1024 # 16-byte Folded Spill + vst $vr0, $sp, 1040 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1008 # 16-byte Folded Spill + vst $vr0, $sp, 1024 # 16-byte Folded Spill # implicit-def: $f21 # implicit-def: $f0 - vst $vr0, $sp, 1040 # 16-byte Folded Spill + vst $vr0, $sp, 1056 # 16-byte Folded Spill # implicit-def: $f0 - ori $a0, $zero, 2256 + ori $a0, $zero, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 864 # 16-byte Folded Spill + vst $vr0, $sp, 880 # 16-byte Folded Spill # implicit-def: $f25 # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 848 # 16-byte Folded Spill + vst $vr0, $sp, 864 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 896 # 16-byte Folded Spill + vst $vr0, $sp, 912 # 16-byte Folded Spill # implicit-def: $f24 # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 880 # 16-byte Folded Spill + vst $vr0, $sp, 896 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 912 # 16-byte Folded Spill + vst $vr0, $sp, 928 # 16-byte Folded Spill # implicit-def: $f23 # implicit-def: $f0 - ori $a0, $zero, 2080 + ori $a0, $zero, 2096 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 928 # 16-byte Folded Spill + vst $vr0, $sp, 944 # 16-byte Folded Spill # implicit-def: $f22 # implicit-def: $f0 - vst $vr0, $sp, 720 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 768 # 16-byte Folded Spill - # implicit-def: $f0 - lu12i.w $a0, 1 - ori $a0, $a0, 2592 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 736 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 752 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 784 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 2000 # 16-byte Folded Spill - # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 752 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 768 # 16-byte Folded Spill + # implicit-def: $f0 vst $vr0, $sp, 800 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 832 # 16-byte Folded Spill - # implicit-def: $f27 + vst $vr0, $sp, 2016 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2624 @@ -41148,29 +41140,28 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ # implicit-def: $f0 vst $vr0, $sp, 816 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 592 # 16-byte Folded Spill - # implicit-def: $f0 - vst $vr0, $sp, 1792 # 16-byte Folded Spill + vst $vr0, $sp, 848 # 16-byte Folded Spill + # implicit-def: $f27 # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 608 # 16-byte Folded Spill + vst $vr0, $sp, 832 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 624 # 16-byte Folded Spill + vst $vr0, $sp, 608 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 688 # 16-byte Folded Spill + vst $vr0, $sp, 1808 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 640 # 16-byte Folded Spill + vst $vr0, $sp, 624 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 656 # 16-byte Folded Spill + vst $vr0, $sp, 640 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 704 # 16-byte Folded Spill # implicit-def: $f0 @@ -41179,102 +41170,113 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 656 # 16-byte Folded Spill + # implicit-def: $f0 vst $vr0, $sp, 672 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 720 # 16-byte Folded Spill + # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f29 - # implicit-def: $f0 - vst $vr0, $sp, 512 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 528 # 16-byte Folded Spill + vst $vr0, $sp, 688 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f26 + # implicit-def: $f29 + # implicit-def: $f0 + vst $vr0, $sp, 528 # 16-byte Folded Spill # implicit-def: $f0 vst $vr0, $sp, 544 # 16-byte Folded Spill # implicit-def: $f0 + lu12i.w $a0, 1 + ori $a0, $a0, 2528 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f26 + # implicit-def: $f0 vst $vr0, $sp, 560 # 16-byte Folded Spill # implicit-def: $f0 + vst $vr0, $sp, 576 # 16-byte Folded Spill + # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f28 # implicit-def: $f0 - vst $vr0, $sp, 576 # 16-byte Folded Spill + vst $vr0, $sp, 592 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 448 # 16-byte Folded Spill + vst $vr0, $sp, 464 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 432 # 16-byte Folded Spill + vst $vr0, $sp, 448 # 16-byte Folded Spill # implicit-def: $f4 # implicit-def: $f0 - vst $vr0, $sp, 464 # 16-byte Folded Spill + vst $vr0, $sp, 480 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 1584 # 16-byte Folded Spill + vst $vr0, $sp, 1600 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f30 # implicit-def: $f0 - vst $vr0, $sp, 480 # 16-byte Folded Spill - # implicit-def: $f0 vst $vr0, $sp, 496 # 16-byte Folded Spill + # implicit-def: $f0 + vst $vr0, $sp, 512 # 16-byte Folded Spill # implicit-def: $f1 # implicit-def: $f0 - vst $vr0, $sp, 384 # 16-byte Folded Spill + vst $vr0, $sp, 400 # 16-byte Folded Spill # implicit-def: $f0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0 - vst $vr0, $sp, 368 # 16-byte Folded Spill + vst $vr0, $sp, 384 # 16-byte Folded Spill # implicit-def: $f0 # implicit-def: $f2 - vst $vr2, $sp, 416 # 16-byte Folded Spill + vst $vr2, $sp, 432 # 16-byte Folded Spill # implicit-def: $f2 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill # implicit-def: $f2 - vst $vr2, $sp, 400 # 16-byte Folded Spill + vst $vr2, $sp, 416 # 16-byte Folded Spill # implicit-def: $f31 # implicit-def: $f3 # implicit-def: $f2 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill # implicit-def: $f8 # implicit-def: $f2 - vst $vr2, $sp, 336 # 16-byte Folded Spill + vst $vr2, $sp, 352 # 16-byte Folded Spill # implicit-def: $f2 # implicit-def: $f5 - vst $vr5, $sp, 1408 # 16-byte Folded Spill + vst $vr5, $sp, 1424 # 16-byte Folded Spill # implicit-def: $f5 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill # implicit-def: $f5 - vst $vr5, $sp, 352 # 16-byte Folded Spill + vst $vr5, $sp, 368 # 16-byte Folded Spill # implicit-def: $f5 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill # implicit-def: $f5 @@ -41284,7 +41286,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ # implicit-def: $f5 # implicit-def: $f6 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr6, $a0, 0 # 16-byte Folded Spill # implicit-def: $f6 @@ -41296,7 +41298,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ # implicit-def: $f10 # implicit-def: $f6 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr6, $a0, 0 # 16-byte Folded Spill # implicit-def: $f6 @@ -41331,37 +41333,33 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $sp, 48 # 16-byte Folded Spill # implicit-def: $f19 # implicit-def: $f7 - ori $a0, $zero, 2224 + ori $a0, $zero, 2240 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 4048 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2400 + ori $a0, $zero, 2416 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2432 + ori $a0, $zero, 2448 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2544 + ori $a0, $zero, 2560 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3168 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f7 - ori $a0, $zero, 2480 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41369,24 +41367,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2592 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3200 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f7 - ori $a0, $zero, 2528 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f7 - ori $a0, $zero, 2560 + ori $a0, $zero, 2512 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2624 + ori $a0, $zero, 2608 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41395,11 +41380,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2576 + ori $a0, $zero, 2544 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2608 + ori $a0, $zero, 2576 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41408,29 +41393,29 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $zero, 2592 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2848 + ori $a0, $zero, 2624 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2896 + ori $a0, $zero, 2656 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2992 + lu12i.w $a0, 1 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41438,41 +41423,41 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2944 + ori $a0, $zero, 2912 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3024 + ori $a0, $zero, 3008 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2912 + ori $a0, $zero, 2880 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3008 + ori $a0, $zero, 2960 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3056 + ori $a0, $zero, 3040 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2976 + ori $a0, $zero, 2928 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3040 + ori $a0, $zero, 3024 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41481,41 +41466,41 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $zero, 2992 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3248 + ori $a0, $zero, 3056 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3328 + ori $a0, $zero, 3088 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3312 + lu12i.w $a0, 1 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3296 + ori $a0, $zero, 3264 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3376 + ori $a0, $zero, 3344 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3360 + ori $a0, $zero, 3328 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41524,16 +41509,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3344 + ori $a0, $zero, 3312 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + ori $a0, $zero, 3392 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3424 + ori $a0, $zero, 3376 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41542,37 +41526,35 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3392 + ori $a0, $zero, 3360 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3536 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill + vst $vr7, $sp, 336 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3504 + ori $a0, $zero, 3440 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $zero, 3408 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3600 + ori $a0, $zero, 3552 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3584 + ori $a0, $zero, 3520 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3616 + lu12i.w $a0, 1 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41581,32 +41563,32 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3664 + ori $a0, $zero, 3616 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3648 + ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3680 + ori $a0, $zero, 3632 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3712 + ori $a0, $zero, 3680 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3696 + ori $a0, $zero, 3664 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3728 + ori $a0, $zero, 3696 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41615,37 +41597,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3760 + ori $a0, $zero, 3728 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3744 + ori $a0, $zero, 3712 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3776 + ori $a0, $zero, 3744 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $zero, 3776 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3840 + ori $a0, $zero, 3760 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3856 + ori $a0, $zero, 3792 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3920 + lu12i.w $a0, 1 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41654,15 +41636,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3872 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3888 + ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3984 + ori $a0, $zero, 3936 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41671,15 +41653,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3904 + ori $a0, $zero, 3888 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3936 + ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 4016 + ori $a0, $zero, 4000 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41688,11 +41670,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3968 + ori $a0, $zero, 3920 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 4000 + ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41701,25 +41683,24 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 4064 + ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - lu12i.w $a0, 1 + ori $a0, $zero, 4048 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41733,12 +41714,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41748,17 +41729,16 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 16 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 80 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41768,12 +41748,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41783,27 +41763,27 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41813,17 +41793,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41833,17 +41813,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41853,42 +41833,42 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41898,17 +41878,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41918,17 +41898,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -41938,82 +41918,82 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42023,12 +42003,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42038,32 +42018,32 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42073,47 +42053,47 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42123,27 +42103,27 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42158,12 +42138,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42173,17 +42153,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42193,82 +42173,82 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42278,42 +42258,42 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2176 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42323,17 +42303,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42343,17 +42323,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42363,47 +42343,47 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42413,12 +42393,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42428,17 +42408,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42448,12 +42428,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42468,48 +42448,52 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2800 + lu12i.w $a0, 1 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2784 + lu12i.w $a0, 1 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 2880 + lu12i.w $a0, 1 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3472 + lu12i.w $a0, 1 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3440 + ori $a0, $zero, 2816 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3792 + ori $a0, $zero, 2800 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3408 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3456 + ori $a0, $zero, 3488 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3520 + ori $a0, $zero, 3456 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 @@ -42517,55 +42501,63 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3488 + ori $a0, $zero, 3424 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3568 + ori $a0, $zero, 3472 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 - ori $a0, $zero, 3552 + ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 ori $a0, $zero, 3824 add.d $a0, $sp, $a0 + vst $vr7, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f7 + ori $a0, $zero, 3504 + add.d $a0, $sp, $a0 + vst $vr7, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f7 + ori $a0, $zero, 3584 + add.d $a0, $sp, $a0 + vst $vr7, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f7 + ori $a0, $zero, 3568 + add.d $a0, $sp, $a0 + vst $vr7, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f7 + ori $a0, $zero, 3840 + add.d $a0, $sp, $a0 vst $vr7, $a0, 0 # 16-byte Folded Spill # implicit-def: $f7 .p2align 4, , 16 .LBB11_1: # %.preheader # =>This Inner Loop Header: Depth=1 vst $vr13, $sp, 16 # 16-byte Folded Spill - lu12i.w $a0, 2 - ori $a0, $a0, 1896 - add.d $a0, $sp, $a0 - ld.d $s7, $a0, 0 # 8-byte Folded Reload - lu12i.w $a0, 2 - ori $a0, $a0, 1896 - add.d $a0, $sp, $a0 - st.d $s7, $a0, 0 # 8-byte Folded Spill - ori $a0, $zero, 2800 + ori $a0, $zero, 2816 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr7, $vr9, 16 - ori $a0, $zero, 2784 + ori $a0, $zero, 2800 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr7, $vr9, 32 - ori $a0, $zero, 2880 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr7, $vr9, 48 ori $s7, $zero, 2048 + lu12i.w $a0, 63 + ori $a0, $a0, 1904 + add.d $s8, $sp, $a0 vori.b $vr9, $vr7, 0 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 63 - ori $a0, $a0, 1904 - add.d $s8, $sp, $a0 vstx $vr7, $s7, $s8 ori $a2, $zero, 2048 ori $s7, $zero, 2064 @@ -42582,11 +42574,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr7, $a0, 0 # 16-byte Folded Reload vstx $vr7, $s7, $s8 ori $a4, $zero, 2080 + ori $s7, $zero, 2096 lu12i.w $a0, 2 ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2096 vstx $vr7, $s7, $s8 ori $a5, $zero, 2096 lu12i.w $a0, 2 @@ -43619,63 +43611,55 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ andi $s7, $s7, 1023 slli.d $s7, $s7, 2 fldx.s $fa7, $s7, $s8 - ori $a0, $zero, 2880 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 fst.s $fa7, $a0, 0 # 4-byte Folded Spill lu12i.w $a0, 32 ori $a0, $a0, 1904 add.d $s8, $sp, $a0 vstx $vr9, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 3856 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 # 16-byte Folded Spill vld $vr13, $sp, 208 # 16-byte Folded Reload vori.b $vr9, $vr8, 0 - ori $a0, $zero, 3472 + ori $a0, $zero, 3488 add.d $a0, $sp, $a0 vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3440 + ori $a0, $zero, 3456 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 16 - ori $a0, $zero, 3792 + ori $a0, $zero, 3808 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 32 - ori $a0, $zero, 3408 + ori $a0, $zero, 3424 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 48 vstx $vr8, $a3, $s8 - ori $a0, $zero, 3520 + ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3456 + ori $a0, $zero, 3472 add.d $a0, $sp, $a0 vld $vr8, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 16 - ori $a0, $zero, 3808 + ori $a0, $zero, 3824 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 32 - ori $a0, $zero, 3488 + ori $a0, $zero, 3504 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 48 vstx $vr8, $a4, $s8 - ori $a0, $zero, 3568 + ori $a0, $zero, 3584 add.d $a0, $sp, $a0 vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3552 + ori $a0, $zero, 3568 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 16 - ori $a0, $zero, 3824 + ori $a0, $zero, 3840 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr7, 32 @@ -43721,7 +43705,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr11, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr10, $vr7, 16 @@ -43734,7 +43718,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr10, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr6, $vr7, 16 @@ -43747,7 +43731,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vld $vr6, $a0, 0 # 16-byte Folded Reload vextrins.w $vr5, $vr6, 16 @@ -43760,75 +43744,75 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload vextrins.w $vr3, $vr5, 16 vextrins.w $vr3, $vr9, 32 - vld $vr5, $sp, 336 # 16-byte Folded Reload + vld $vr5, $sp, 352 # 16-byte Folded Reload vextrins.w $vr3, $vr5, 48 lu12i.w $a0, 32 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 - vld $vr3, $sp, 1408 # 16-byte Folded Reload + vld $vr3, $sp, 1424 # 16-byte Folded Reload vextrins.w $vr2, $vr3, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload vextrins.w $vr2, $vr3, 32 - vld $vr3, $sp, 352 # 16-byte Folded Reload + vld $vr3, $sp, 368 # 16-byte Folded Reload vextrins.w $vr2, $vr3, 48 lu12i.w $a0, 32 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 - vld $vr2, $sp, 384 # 16-byte Folded Reload + vld $vr2, $sp, 400 # 16-byte Folded Reload vextrins.w $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr2, 32 - vld $vr2, $sp, 368 # 16-byte Folded Reload + vld $vr2, $sp, 384 # 16-byte Folded Reload vextrins.w $vr1, $vr2, 48 lu12i.w $a0, 32 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload + vld $vr1, $sp, 432 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 400 # 16-byte Folded Reload + vld $vr1, $sp, 416 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - vld $vr0, $sp, 448 # 16-byte Folded Reload + vld $vr0, $sp, 464 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 32 - vld $vr0, $sp, 432 # 16-byte Folded Reload + vld $vr0, $sp, 448 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vst $vr31, $a0, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload + vld $vr0, $sp, 480 # 16-byte Folded Reload vextrins.w $vr4, $vr0, 16 - vld $vr0, $sp, 1584 # 16-byte Folded Reload + vld $vr0, $sp, 1600 # 16-byte Folded Reload vextrins.w $vr4, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr4, $vr0, 48 @@ -43836,12 +43820,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr4, $a0, 0 - vld $vr0, $sp, 480 # 16-byte Folded Reload - vextrins.w $vr30, $vr0, 16 vld $vr0, $sp, 496 # 16-byte Folded Reload + vextrins.w $vr30, $vr0, 16 + vld $vr0, $sp, 512 # 16-byte Folded Reload vextrins.w $vr30, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr30, $vr0, 48 @@ -43849,12 +43833,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr30, $a0, 0 - vld $vr0, $sp, 512 # 16-byte Folded Reload - vextrins.w $vr29, $vr0, 16 vld $vr0, $sp, 528 # 16-byte Folded Reload + vextrins.w $vr29, $vr0, 16 + vld $vr0, $sp, 544 # 16-byte Folded Reload vextrins.w $vr29, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr29, $vr0, 48 @@ -43862,12 +43846,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr29, $a0, 0 - vld $vr0, $sp, 544 # 16-byte Folded Reload - vextrins.w $vr26, $vr0, 16 vld $vr0, $sp, 560 # 16-byte Folded Reload + vextrins.w $vr26, $vr0, 16 + vld $vr0, $sp, 576 # 16-byte Folded Reload vextrins.w $vr26, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr26, $vr0, 48 @@ -43875,187 +43859,187 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vst $vr26, $a0, 0 - vld $vr0, $sp, 576 # 16-byte Folded Reload - vextrins.w $vr28, $vr0, 16 vld $vr0, $sp, 592 # 16-byte Folded Reload + vextrins.w $vr28, $vr0, 16 + vld $vr0, $sp, 608 # 16-byte Folded Reload vextrins.w $vr28, $vr0, 32 - vld $vr0, $sp, 1792 # 16-byte Folded Reload + vld $vr0, $sp, 1808 # 16-byte Folded Reload vextrins.w $vr28, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 608 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 624 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + vld $vr1, $sp, 640 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 688 # 16-byte Folded Reload + vld $vr1, $sp, 704 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 640 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 656 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + vld $vr1, $sp, 672 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 704 # 16-byte Folded Reload + vld $vr1, $sp, 720 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 672 # 16-byte Folded Reload + vld $vr1, $sp, 688 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - vld $vr1, $sp, 720 # 16-byte Folded Reload + vld $vr1, $sp, 736 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 768 # 16-byte Folded Reload + vld $vr1, $sp, 784 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 736 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 752 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + vld $vr1, $sp, 768 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 784 # 16-byte Folded Reload + vld $vr1, $sp, 800 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - vld $vr0, $sp, 2000 # 16-byte Folded Reload + vld $vr0, $sp, 2016 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - vld $vr1, $sp, 800 # 16-byte Folded Reload + vld $vr1, $sp, 816 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 832 # 16-byte Folded Reload + vld $vr1, $sp, 848 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 16 - vld $vr0, $sp, 816 # 16-byte Folded Reload + vld $vr0, $sp, 832 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 32 - vld $vr0, $sp, 864 # 16-byte Folded Reload + vld $vr0, $sp, 880 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr27, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 16 - vld $vr0, $sp, 848 # 16-byte Folded Reload + vld $vr0, $sp, 864 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 32 - vld $vr0, $sp, 896 # 16-byte Folded Reload + vld $vr0, $sp, 912 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr25, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 16 - vld $vr0, $sp, 880 # 16-byte Folded Reload + vld $vr0, $sp, 896 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 32 - vld $vr0, $sp, 912 # 16-byte Folded Reload + vld $vr0, $sp, 928 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr24, $a0, 0 - ori $a0, $zero, 2080 + ori $a0, $zero, 2096 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 32 - vld $vr0, $sp, 928 # 16-byte Folded Reload + vld $vr0, $sp, 944 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr23, $a0, 0 - vld $vr0, $sp, 960 # 16-byte Folded Reload + vld $vr0, $sp, 976 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 32 - vld $vr0, $sp, 944 # 16-byte Folded Reload + vld $vr0, $sp, 960 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr22, $a0, 0 - vld $vr0, $sp, 992 # 16-byte Folded Reload + vld $vr0, $sp, 1008 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 32 - vld $vr0, $sp, 976 # 16-byte Folded Reload + vld $vr0, $sp, 992 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr20, $a0, 0 - vld $vr0, $sp, 1024 # 16-byte Folded Reload + vld $vr0, $sp, 1040 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 32 - vld $vr0, $sp, 1008 # 16-byte Folded Reload + vld $vr0, $sp, 1024 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr17, $a0, 0 - vld $vr0, $sp, 1040 # 16-byte Folded Reload + vld $vr0, $sp, 1056 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 16 - ori $a0, $zero, 2256 + ori $a0, $zero, 2272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 48 @@ -44063,12 +44047,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr21, $a0, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - vextrins.w $vr13, $vr0, 16 vld $vr0, $sp, 1072 # 16-byte Folded Reload + vextrins.w $vr13, $vr0, 16 + vld $vr0, $sp, 1088 # 16-byte Folded Reload vextrins.w $vr13, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr13, $vr0, 48 @@ -44076,12 +44060,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr13, $a0, 0 - vld $vr0, $sp, 1088 # 16-byte Folded Reload - vextrins.w $vr15, $vr0, 16 vld $vr0, $sp, 1104 # 16-byte Folded Reload + vextrins.w $vr15, $vr0, 16 + vld $vr0, $sp, 1120 # 16-byte Folded Reload vextrins.w $vr15, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr15, $vr0, 48 @@ -44089,12 +44073,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr15, $a0, 0 - vld $vr0, $sp, 1120 # 16-byte Folded Reload - vextrins.w $vr16, $vr0, 16 vld $vr0, $sp, 1136 # 16-byte Folded Reload + vextrins.w $vr16, $vr0, 16 + vld $vr0, $sp, 1152 # 16-byte Folded Reload vextrins.w $vr16, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr16, $vr0, 48 @@ -44102,11 +44086,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr16, $a0, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - vextrins.w $vr18, $vr0, 16 vld $vr0, $sp, 1168 # 16-byte Folded Reload + vextrins.w $vr18, $vr0, 16 + vld $vr0, $sp, 1184 # 16-byte Folded Reload vextrins.w $vr18, $vr0, 32 - ori $a0, $zero, 2512 + ori $a0, $zero, 2528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr18, $vr0, 48 @@ -44115,186 +44099,186 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1184 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 1200 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + vld $vr1, $sp, 1216 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 1264 # 16-byte Folded Reload + vld $vr1, $sp, 1280 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1216 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 1232 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + vld $vr1, $sp, 1248 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 1312 # 16-byte Folded Reload + vld $vr1, $sp, 1328 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1248 # 16-byte Folded Reload + vld $vr1, $sp, 1264 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - vld $vr1, $sp, 1280 # 16-byte Folded Reload + vld $vr1, $sp, 1296 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 1344 # 16-byte Folded Reload + vld $vr1, $sp, 1360 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1296 # 16-byte Folded Reload + vld $vr1, $sp, 1312 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - vld $vr1, $sp, 1328 # 16-byte Folded Reload + vld $vr1, $sp, 1344 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - vld $vr1, $sp, 1360 # 16-byte Folded Reload + vld $vr1, $sp, 1376 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 lu12i.w $a0, 32 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2960 + ori $a0, $zero, 2976 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1376 # 16-byte Folded Reload + vld $vr0, $sp, 1392 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1424 # 16-byte Folded Reload + vld $vr0, $sp, 1440 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1488 # 16-byte Folded Reload + vld $vr1, $sp, 1504 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1392 # 16-byte Folded Reload + vld $vr0, $sp, 1408 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1456 # 16-byte Folded Reload + vld $vr0, $sp, 1472 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1520 # 16-byte Folded Reload + vld $vr1, $sp, 1536 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1440 # 16-byte Folded Reload + vld $vr0, $sp, 1456 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1504 # 16-byte Folded Reload + vld $vr0, $sp, 1520 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1552 # 16-byte Folded Reload + vld $vr1, $sp, 1568 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1472 # 16-byte Folded Reload + vld $vr0, $sp, 1488 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1536 # 16-byte Folded Reload + vld $vr0, $sp, 1552 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3280 + ori $a0, $zero, 3296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 1568 # 16-byte Folded Reload + vld $vr1, $sp, 1584 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1600 # 16-byte Folded Reload + vld $vr0, $sp, 1616 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - vld $vr0, $sp, 1632 # 16-byte Folded Reload + vld $vr1, $sp, 1664 # 16-byte Folded Reload + vld $vr0, $sp, 1648 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1616 # 16-byte Folded Reload + vld $vr0, $sp, 1632 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1696 # 16-byte Folded Reload - vld $vr0, $sp, 1680 # 16-byte Folded Reload + vld $vr1, $sp, 1712 # 16-byte Folded Reload + vld $vr0, $sp, 1696 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1664 # 16-byte Folded Reload + vld $vr0, $sp, 1680 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1744 # 16-byte Folded Reload - vld $vr0, $sp, 1728 # 16-byte Folded Reload + vld $vr1, $sp, 1760 # 16-byte Folded Reload + vld $vr0, $sp, 1744 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1712 # 16-byte Folded Reload + vld $vr0, $sp, 1728 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 32 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1776 # 16-byte Folded Reload - vld $vr0, $sp, 1760 # 16-byte Folded Reload + vld $vr1, $sp, 1792 # 16-byte Folded Reload + vld $vr0, $sp, 1776 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3632 + ori $a0, $zero, 3648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44302,13 +44286,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1824 # 16-byte Folded Reload - vld $vr0, $sp, 1808 # 16-byte Folded Reload + vld $vr1, $sp, 1840 # 16-byte Folded Reload + vld $vr0, $sp, 1824 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1840 # 16-byte Folded Reload + vld $vr0, $sp, 1856 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3008 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44316,13 +44300,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1872 # 16-byte Folded Reload - vld $vr0, $sp, 1856 # 16-byte Folded Reload + vld $vr1, $sp, 1888 # 16-byte Folded Reload + vld $vr0, $sp, 1872 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1888 # 16-byte Folded Reload + vld $vr0, $sp, 1904 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44330,13 +44314,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1920 # 16-byte Folded Reload - vld $vr0, $sp, 1904 # 16-byte Folded Reload + vld $vr1, $sp, 1936 # 16-byte Folded Reload + vld $vr0, $sp, 1920 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1936 # 16-byte Folded Reload + vld $vr0, $sp, 1952 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44344,12 +44328,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - vld $vr1, $sp, 1968 # 16-byte Folded Reload - vld $vr0, $sp, 1952 # 16-byte Folded Reload + vld $vr1, $sp, 1984 # 16-byte Folded Reload + vld $vr0, $sp, 1968 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1984 # 16-byte Folded Reload + vld $vr0, $sp, 2000 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3952 + ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44358,14 +44342,16 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vld $vr1, $sp, 2016 # 16-byte Folded Reload - vextrins.w $vr0, $vr1, 16 vld $vr1, $sp, 2032 # 16-byte Folded Reload + vextrins.w $vr0, $vr1, 16 + ori $a0, $zero, 2048 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2064 + ori $a0, $zero, 2080 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44374,18 +44360,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2048 + ori $a0, $zero, 2064 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2096 + ori $a0, $zero, 2112 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2160 + ori $a0, $zero, 2176 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44394,18 +44380,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2112 + ori $a0, $zero, 2128 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2128 + ori $a0, $zero, 2144 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2192 + ori $a0, $zero, 2208 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44414,18 +44400,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2144 + ori $a0, $zero, 2160 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2176 + ori $a0, $zero, 2192 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2208 + ori $a0, $zero, 2224 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44434,19 +44420,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2240 + ori $a0, $zero, 2256 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2288 + ori $a0, $zero, 2304 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44455,18 +44441,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2336 + ori $a0, $zero, 2352 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2272 + ori $a0, $zero, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2320 + ori $a0, $zero, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44475,18 +44461,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2352 + ori $a0, $zero, 2368 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2304 + ori $a0, $zero, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2384 + ori $a0, $zero, 2400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44495,18 +44481,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2448 + ori $a0, $zero, 2464 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2368 + ori $a0, $zero, 2384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2416 + ori $a0, $zero, 2432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44515,19 +44501,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2464 + ori $a0, $zero, 2480 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2656 + ori $a0, $zero, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44535,19 +44521,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 2704 + ori $a0, $zero, 2720 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2688 + ori $a0, $zero, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2672 + ori $a0, $zero, 2688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44555,19 +44541,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 2752 + ori $a0, $zero, 2768 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2736 + ori $a0, $zero, 2752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2720 + ori $a0, $zero, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44575,17 +44561,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 2816 + ori $a0, $zero, 2832 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vld $vr0, $sp, 16 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2768 + ori $a0, $zero, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44593,20 +44579,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 2928 + ori $a0, $zero, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2832 + ori $a0, $zero, 2848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44614,19 +44600,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3232 + ori $a0, $zero, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3136 + ori $a0, $zero, 3152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3264 + ori $a0, $zero, 3280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44634,19 +44620,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3216 + ori $a0, $zero, 3232 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3184 + ori $a0, $zero, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3200 + ori $a0, $zero, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3504 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44654,19 +44640,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3168 + ori $a0, $zero, 3184 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3104 + ori $a0, $zero, 3120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3152 + ori $a0, $zero, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44674,18 +44660,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3120 + ori $a0, $zero, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3088 + ori $a0, $zero, 3104 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2224 + ori $a0, $zero, 2240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 4048 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44694,18 +44680,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2400 + ori $a0, $zero, 2416 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2432 + ori $a0, $zero, 2448 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2544 + ori $a0, $zero, 2560 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44714,18 +44700,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2480 + ori $a0, $zero, 2496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2496 + ori $a0, $zero, 2512 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2592 + ori $a0, $zero, 2608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44734,18 +44720,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2528 + ori $a0, $zero, 2544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2560 + ori $a0, $zero, 2576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2624 + ori $a0, $zero, 2640 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44754,18 +44740,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2576 + ori $a0, $zero, 2592 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2608 + ori $a0, $zero, 2624 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2640 + ori $a0, $zero, 2656 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44774,19 +44760,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 2848 + ori $a0, $zero, 2864 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 2896 + ori $a0, $zero, 2912 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -44795,18 +44781,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2992 + ori $a0, $zero, 3008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2864 + ori $a0, $zero, 2880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2944 + ori $a0, $zero, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44815,18 +44801,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3024 + ori $a0, $zero, 3040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2912 + ori $a0, $zero, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3008 + ori $a0, $zero, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44835,18 +44821,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3056 + ori $a0, $zero, 3072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2976 + ori $a0, $zero, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3040 + ori $a0, $zero, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44855,19 +44841,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3072 + ori $a0, $zero, 3088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3248 + ori $a0, $zero, 3264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44875,19 +44861,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3328 + ori $a0, $zero, 3344 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3312 + ori $a0, $zero, 3328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3296 + ori $a0, $zero, 3312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44895,19 +44881,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3376 + ori $a0, $zero, 3392 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3360 + ori $a0, $zero, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3344 + ori $a0, $zero, 3360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44915,20 +44901,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3424 + ori $a0, $zero, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 3856 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr1, $sp, 336 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3392 + ori $a0, $zero, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44936,20 +44919,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3536 + ori $a0, $zero, 3552 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3504 + ori $a0, $zero, 3520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44957,19 +44940,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3600 + ori $a0, $zero, 3616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3584 + ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3616 + ori $a0, $zero, 3632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44977,19 +44960,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3664 + ori $a0, $zero, 3680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3648 + ori $a0, $zero, 3664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3680 + ori $a0, $zero, 3696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -44997,19 +44980,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3712 + ori $a0, $zero, 3728 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3696 + ori $a0, $zero, 3712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3728 + ori $a0, $zero, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45017,19 +45000,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - ori $a0, $zero, 3760 + ori $a0, $zero, 3776 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3744 + ori $a0, $zero, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3776 + ori $a0, $zero, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45038,18 +45021,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3840 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 3856 + ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 3920 + ori $a0, $zero, 3936 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45058,18 +45041,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3872 + ori $a0, $zero, 3888 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 3888 + ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 3984 + ori $a0, $zero, 4000 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45078,18 +45061,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3904 + ori $a0, $zero, 3920 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 3936 + ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 4016 + ori $a0, $zero, 4032 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45098,18 +45081,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3968 + ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 4000 + ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 - ori $a0, $zero, 4032 + ori $a0, $zero, 4048 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45118,19 +45101,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 - ori $a0, $zero, 4064 + ori $a0, $zero, 4080 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45139,20 +45123,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 4080 + lu12i.w $a0, 1 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45161,21 +45145,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 16 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 80 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45184,21 +45168,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45207,21 +45191,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 160 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45230,21 +45214,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3712 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45253,21 +45237,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45276,21 +45260,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45299,21 +45283,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45322,21 +45306,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45345,21 +45329,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45368,21 +45352,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45391,21 +45375,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45414,21 +45398,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45437,21 +45421,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45460,21 +45444,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45483,21 +45467,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3840 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45506,21 +45490,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45529,21 +45513,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45552,21 +45536,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45575,21 +45559,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45598,21 +45582,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1040 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45621,21 +45605,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45644,21 +45628,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45667,21 +45651,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45690,21 +45674,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45713,21 +45697,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45736,21 +45720,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45759,21 +45743,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45782,21 +45766,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2176 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45805,21 +45789,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45828,21 +45812,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45851,21 +45835,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45874,21 +45858,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45897,21 +45881,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr1, 48 @@ -45920,21 +45904,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45943,21 +45927,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45966,21 +45950,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2320 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -45989,21 +45973,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2336 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -46015,13 +45999,9 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 1888 add.d $a0, $sp, $a0 ld.d $a0, $a0, 0 # 8-byte Folded Reload - lu12i.w $a1, 2 - ori $a1, $a1, 1888 - add.d $a1, $sp, $a1 - st.d $a0, $a1, 0 # 8-byte Folded Spill andi $s7, $a0, 1023 slli.d $s7, $s7, 2 - ori $a0, $zero, 2880 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 fld.s $fa0, $a0, 0 # 4-byte Folded Reload fstx.s $fa0, $s7, $s8 @@ -176745,60 +176725,56 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a5, $sp, $a5 vst $vr1, $a5, 0 fstx.s $fa0, $s7, $s8 - lu12i.w $a5, 2 - ori $a5, $a5, 1896 - add.d $a5, $sp, $a5 - ld.d $s7, $a5, 0 # 8-byte Folded Reload vldx $vr0, $a3, $s8 vldx $vr1, $a2, $s8 vreplvei.w $vr2, $vr0, 2 - ori $a2, $zero, 3824 + ori $a2, $zero, 3840 add.d $a2, $sp, $a2 vst $vr2, $a2, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a2, $zero, 3552 + ori $a2, $zero, 3568 add.d $a2, $sp, $a2 vst $vr2, $a2, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a2, $zero, 3568 + ori $a2, $zero, 3584 add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a2, $zero, 3488 + ori $a2, $zero, 3504 add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill vldx $vr0, $a0, $s8 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 3808 + ori $a0, $zero, 3824 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3520 + ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3456 + ori $a0, $zero, 3472 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3408 + ori $a0, $zero, 3424 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vldx $vr1, $a4, $s8 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3792 + ori $a0, $zero, 3808 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3440 + ori $a0, $zero, 3456 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3472 + ori $a0, $zero, 3488 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2880 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176806,17 +176782,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2784 + ori $a0, $zero, 2800 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2800 + ori $a0, $zero, 2816 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr7, $vr1, 0 vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176825,22 +176801,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2336 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176849,22 +176825,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2320 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176873,22 +176849,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176897,22 +176873,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176921,22 +176897,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176945,22 +176921,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176969,22 +176945,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -176993,22 +176969,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177017,22 +176993,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2176 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177041,22 +177017,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177065,22 +177041,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177089,22 +177065,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177113,22 +177089,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177137,22 +177113,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177161,22 +177137,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177185,22 +177161,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177209,22 +177185,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177233,22 +177209,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1040 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177257,22 +177233,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177281,22 +177257,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177305,22 +177281,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177329,22 +177305,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177353,22 +177329,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3840 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177377,22 +177353,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177401,22 +177377,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177425,22 +177401,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177449,22 +177425,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177473,22 +177449,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177497,22 +177473,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177521,22 +177497,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177545,22 +177521,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177569,22 +177545,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177593,22 +177569,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177617,22 +177593,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3712 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177641,22 +177617,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 160 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177665,22 +177641,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 80 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177689,22 +177665,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 16 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177712,21 +177688,22 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 4080 + lu12i.w $a0, 1 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177734,21 +177711,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 4064 + ori $a0, $zero, 4080 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 4032 + ori $a0, $zero, 4048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177756,20 +177733,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 4000 + ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3968 + ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 4016 + ori $a0, $zero, 4032 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177777,20 +177754,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3936 + ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3904 + ori $a0, $zero, 3920 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 3984 + ori $a0, $zero, 4000 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177798,20 +177775,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 3888 + ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3872 + ori $a0, $zero, 3888 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3920 + ori $a0, $zero, 3936 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177819,21 +177796,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3856 + ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3840 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177841,20 +177818,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 3776 + ori $a0, $zero, 3792 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3744 + ori $a0, $zero, 3760 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3760 + ori $a0, $zero, 3776 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177862,20 +177839,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3728 + ori $a0, $zero, 3744 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3696 + ori $a0, $zero, 3712 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3712 + ori $a0, $zero, 3728 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177883,20 +177860,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 3680 + ori $a0, $zero, 3696 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3648 + ori $a0, $zero, 3664 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3664 + ori $a0, $zero, 3680 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177904,20 +177881,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3616 + ori $a0, $zero, 3632 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3584 + ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3600 + ori $a0, $zero, 3616 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177926,19 +177903,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3504 + ori $a0, $zero, 3520 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3536 + ori $a0, $zero, 3552 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3392 + ori $a0, $zero, 3408 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177947,20 +177924,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3424 + ori $a0, $zero, 3440 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 # 16-byte Folded Spill + vst $vr0, $sp, 336 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 3344 + ori $a0, $zero, 3360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177969,19 +177943,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 3360 + ori $a0, $zero, 3376 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3376 + ori $a0, $zero, 3392 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3296 + ori $a0, $zero, 3312 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -177990,19 +177964,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3312 + ori $a0, $zero, 3328 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3328 + ori $a0, $zero, 3344 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 3248 + ori $a0, $zero, 3264 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178011,20 +177985,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3072 + ori $a0, $zero, 3088 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3040 + ori $a0, $zero, 3056 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178032,20 +178006,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2976 + ori $a0, $zero, 2992 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3056 + ori $a0, $zero, 3072 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 3008 + ori $a0, $zero, 3024 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178053,20 +178027,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2912 + ori $a0, $zero, 2928 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 3024 + ori $a0, $zero, 3040 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2944 + ori $a0, $zero, 2960 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178074,20 +178048,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2864 + ori $a0, $zero, 2880 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2992 + ori $a0, $zero, 3008 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2896 + ori $a0, $zero, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178095,21 +178069,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2848 + ori $a0, $zero, 2864 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2640 + ori $a0, $zero, 2656 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178117,20 +178091,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2608 + ori $a0, $zero, 2624 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 2576 + ori $a0, $zero, 2592 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2624 + ori $a0, $zero, 2640 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178138,20 +178112,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2560 + ori $a0, $zero, 2576 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2528 + ori $a0, $zero, 2544 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2592 + ori $a0, $zero, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178159,20 +178133,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2496 + ori $a0, $zero, 2512 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 2480 + ori $a0, $zero, 2496 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2544 + ori $a0, $zero, 2560 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178180,20 +178154,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2432 + ori $a0, $zero, 2448 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2400 + ori $a0, $zero, 2416 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 1 - ori $a0, $zero, 3232 + ori $a0, $zero, 3248 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178201,7 +178175,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3264 + ori $a0, $zero, 3280 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178210,15 +178184,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr2, $a0, 0 vreplvei.w $vr3, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr3, $vr1, 0 - ori $a0, $zero, 3216 + ori $a0, $zero, 3232 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr3, $vr1, 1 - ori $a0, $zero, 3184 + ori $a0, $zero, 3200 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178226,37 +178200,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr3, $a0, 0 vreplvei.w $vr4, $vr1, 2 - ori $a0, $zero, 3200 + ori $a0, $zero, 3216 add.d $a0, $sp, $a0 vst $vr4, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr4, $vr2, 1 - ori $a0, $zero, 3120 + ori $a0, $zero, 3136 add.d $a0, $sp, $a0 vst $vr4, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3504 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr3, 0 - ori $a0, $zero, 3168 + ori $a0, $zero, 3184 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr3, 1 - ori $a0, $zero, 3104 + ori $a0, $zero, 3120 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr3, 2 - ori $a0, $zero, 3152 + ori $a0, $zero, 3168 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr3, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr2, 0 - ori $a0, $zero, 3088 + ori $a0, $zero, 3104 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178264,20 +178238,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr3, $vr2, 2 - ori $a0, $zero, 2224 + ori $a0, $zero, 2240 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr2, 3 - ori $a0, $zero, 4048 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 3136 + ori $a0, $zero, 3152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178286,19 +178260,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2928 + ori $a0, $zero, 2944 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 2832 + ori $a0, $zero, 2848 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2768 + ori $a0, $zero, 2784 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178307,16 +178281,16 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr13, $vr0, 1 vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2816 + ori $a0, $zero, 2832 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2720 + ori $a0, $zero, 2736 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178325,19 +178299,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2736 + ori $a0, $zero, 2752 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 2752 + ori $a0, $zero, 2768 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2672 + ori $a0, $zero, 2688 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178346,19 +178320,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 2688 + ori $a0, $zero, 2704 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2704 + ori $a0, $zero, 2720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2656 + ori $a0, $zero, 2672 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178367,20 +178341,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 2464 + ori $a0, $zero, 2480 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2416 + ori $a0, $zero, 2432 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178388,20 +178362,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2368 + ori $a0, $zero, 2384 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2448 + ori $a0, $zero, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2384 + ori $a0, $zero, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178409,20 +178383,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2304 + ori $a0, $zero, 2320 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - ori $a0, $zero, 2352 + ori $a0, $zero, 2368 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2320 + ori $a0, $zero, 2336 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178430,20 +178404,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2272 + ori $a0, $zero, 2288 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2336 + ori $a0, $zero, 2352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2288 + ori $a0, $zero, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178451,21 +178425,21 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2240 + ori $a0, $zero, 2256 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2208 + ori $a0, $zero, 2224 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178473,20 +178447,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2176 + ori $a0, $zero, 2192 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 2144 + ori $a0, $zero, 2160 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2192 + ori $a0, $zero, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178494,20 +178468,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2128 + ori $a0, $zero, 2144 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2112 + ori $a0, $zero, 2128 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 2160 + ori $a0, $zero, 2176 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178515,20 +178489,20 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 2096 + ori $a0, $zero, 2112 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 2048 + ori $a0, $zero, 2064 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2064 + ori $a0, $zero, 2080 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178536,16 +178510,18 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 2032 # 16-byte Folded Spill + ori $a0, $zero, 2048 + add.d $a0, $sp, $a0 + vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 2016 # 16-byte Folded Spill + vst $vr2, $sp, 2032 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - ori $a0, $zero, 3952 + ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178553,14 +178529,14 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1984 # 16-byte Folded Spill + vst $vr2, $sp, 2000 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1952 # 16-byte Folded Spill + vst $vr2, $sp, 1968 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1968 # 16-byte Folded Spill + vst $vr0, $sp, 1984 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178568,14 +178544,14 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1936 # 16-byte Folded Spill + vst $vr2, $sp, 1952 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1904 # 16-byte Folded Spill + vst $vr2, $sp, 1920 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1920 # 16-byte Folded Spill + vst $vr1, $sp, 1936 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178583,14 +178559,14 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1888 # 16-byte Folded Spill + vst $vr2, $sp, 1904 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1856 # 16-byte Folded Spill + vst $vr2, $sp, 1872 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1872 # 16-byte Folded Spill + vst $vr0, $sp, 1888 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 3008 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178598,14 +178574,14 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1840 # 16-byte Folded Spill + vst $vr2, $sp, 1856 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1808 # 16-byte Folded Spill + vst $vr2, $sp, 1824 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1824 # 16-byte Folded Spill + vst $vr1, $sp, 1840 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178613,199 +178589,199 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - ori $a0, $zero, 3632 + ori $a0, $zero, 3648 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1760 # 16-byte Folded Spill + vst $vr2, $sp, 1776 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1776 # 16-byte Folded Spill + vst $vr0, $sp, 1792 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1712 # 16-byte Folded Spill + vst $vr0, $sp, 1728 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1728 # 16-byte Folded Spill + vst $vr2, $sp, 1744 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1744 # 16-byte Folded Spill + vst $vr1, $sp, 1760 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1664 # 16-byte Folded Spill + vst $vr1, $sp, 1680 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1680 # 16-byte Folded Spill + vst $vr2, $sp, 1696 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1696 # 16-byte Folded Spill + vst $vr0, $sp, 1712 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1616 # 16-byte Folded Spill + vst $vr0, $sp, 1632 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1632 # 16-byte Folded Spill + vst $vr2, $sp, 1648 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1648 # 16-byte Folded Spill + vst $vr1, $sp, 1664 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1600 # 16-byte Folded Spill + vst $vr1, $sp, 1616 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - ori $a0, $zero, 3280 + ori $a0, $zero, 3296 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1568 # 16-byte Folded Spill + vst $vr0, $sp, 1584 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1536 # 16-byte Folded Spill + vst $vr0, $sp, 1552 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1472 # 16-byte Folded Spill + vst $vr2, $sp, 1488 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1552 # 16-byte Folded Spill + vst $vr1, $sp, 1568 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1504 # 16-byte Folded Spill + vst $vr1, $sp, 1520 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1440 # 16-byte Folded Spill + vst $vr2, $sp, 1456 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - vst $vr0, $sp, 1520 # 16-byte Folded Spill + vst $vr0, $sp, 1536 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1456 # 16-byte Folded Spill + vst $vr0, $sp, 1472 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1392 # 16-byte Folded Spill + vst $vr2, $sp, 1408 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 1488 # 16-byte Folded Spill + vst $vr1, $sp, 1504 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1424 # 16-byte Folded Spill + vst $vr1, $sp, 1440 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1376 # 16-byte Folded Spill + vst $vr2, $sp, 1392 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 - ori $a0, $zero, 2960 + ori $a0, $zero, 2976 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1360 # 16-byte Folded Spill + vst $vr0, $sp, 1376 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1328 # 16-byte Folded Spill + vst $vr2, $sp, 1344 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1296 # 16-byte Folded Spill + vst $vr2, $sp, 1312 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1344 # 16-byte Folded Spill + vst $vr1, $sp, 1360 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1280 # 16-byte Folded Spill + vst $vr2, $sp, 1296 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1248 # 16-byte Folded Spill + vst $vr2, $sp, 1264 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 1312 # 16-byte Folded Spill + vst $vr0, $sp, 1328 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1232 # 16-byte Folded Spill + vst $vr2, $sp, 1248 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1216 # 16-byte Folded Spill + vst $vr2, $sp, 1232 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1264 # 16-byte Folded Spill + vst $vr1, $sp, 1280 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1200 # 16-byte Folded Spill + vst $vr2, $sp, 1216 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1184 # 16-byte Folded Spill + vst $vr2, $sp, 1200 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - ori $a0, $zero, 2512 + ori $a0, $zero, 2528 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178813,13 +178789,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1168 # 16-byte Folded Spill + vst $vr2, $sp, 1184 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1152 # 16-byte Folded Spill + vst $vr2, $sp, 1168 # 16-byte Folded Spill vreplvei.w $vr18, $vr1, 0 vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178827,13 +178803,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1136 # 16-byte Folded Spill + vst $vr2, $sp, 1152 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1120 # 16-byte Folded Spill + vst $vr2, $sp, 1136 # 16-byte Folded Spill vreplvei.w $vr16, $vr0, 0 vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178841,13 +178817,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 1104 # 16-byte Folded Spill + vst $vr2, $sp, 1120 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1088 # 16-byte Folded Spill + vst $vr2, $sp, 1104 # 16-byte Folded Spill vreplvei.w $vr15, $vr1, 0 vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178855,14 +178831,14 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1072 # 16-byte Folded Spill + vst $vr2, $sp, 1088 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1056 # 16-byte Folded Spill + vst $vr2, $sp, 1072 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 vst $vr0, $sp, 208 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -178870,201 +178846,201 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - ori $a0, $zero, 2256 + ori $a0, $zero, 2272 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 1040 # 16-byte Folded Spill + vst $vr2, $sp, 1056 # 16-byte Folded Spill vreplvei.w $vr21, $vr1, 0 vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1008 # 16-byte Folded Spill + vst $vr1, $sp, 1024 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 1024 # 16-byte Folded Spill + vst $vr2, $sp, 1040 # 16-byte Folded Spill vreplvei.w $vr17, $vr0, 0 vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 976 # 16-byte Folded Spill + vst $vr0, $sp, 992 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 992 # 16-byte Folded Spill + vst $vr2, $sp, 1008 # 16-byte Folded Spill vreplvei.w $vr20, $vr1, 0 vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 944 # 16-byte Folded Spill + vst $vr1, $sp, 960 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 960 # 16-byte Folded Spill + vst $vr2, $sp, 976 # 16-byte Folded Spill vreplvei.w $vr22, $vr0, 0 vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 928 # 16-byte Folded Spill + vst $vr0, $sp, 944 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - ori $a0, $zero, 2080 + ori $a0, $zero, 2096 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr23, $vr1, 0 vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 912 # 16-byte Folded Spill + vst $vr1, $sp, 928 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 880 # 16-byte Folded Spill + vst $vr2, $sp, 896 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr24, $vr0, 0 vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 896 # 16-byte Folded Spill + vst $vr0, $sp, 912 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 848 # 16-byte Folded Spill + vst $vr2, $sp, 864 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr25, $vr1, 0 vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 864 # 16-byte Folded Spill + vst $vr1, $sp, 880 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 816 # 16-byte Folded Spill + vst $vr2, $sp, 832 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr27, $vr0, 0 vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 832 # 16-byte Folded Spill + vst $vr0, $sp, 848 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 800 # 16-byte Folded Spill + vst $vr2, $sp, 816 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 - vst $vr1, $sp, 2000 # 16-byte Folded Spill + vst $vr1, $sp, 2016 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 784 # 16-byte Folded Spill + vst $vr1, $sp, 800 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 752 # 16-byte Folded Spill + vst $vr2, $sp, 768 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 736 # 16-byte Folded Spill + vst $vr2, $sp, 752 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 768 # 16-byte Folded Spill + vst $vr0, $sp, 784 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 720 # 16-byte Folded Spill + vst $vr2, $sp, 736 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 672 # 16-byte Folded Spill + vst $vr2, $sp, 688 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 704 # 16-byte Folded Spill + vst $vr1, $sp, 720 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 656 # 16-byte Folded Spill + vst $vr2, $sp, 672 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 640 # 16-byte Folded Spill + vst $vr2, $sp, 656 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 688 # 16-byte Folded Spill + vst $vr0, $sp, 704 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 624 # 16-byte Folded Spill + vst $vr2, $sp, 640 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 608 # 16-byte Folded Spill + vst $vr2, $sp, 624 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 1792 # 16-byte Folded Spill + vst $vr1, $sp, 1808 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 592 # 16-byte Folded Spill + vst $vr2, $sp, 608 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 576 # 16-byte Folded Spill + vst $vr2, $sp, 592 # 16-byte Folded Spill vreplvei.w $vr28, $vr0, 0 vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -179072,13 +179048,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 560 # 16-byte Folded Spill + vst $vr2, $sp, 576 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 544 # 16-byte Folded Spill + vst $vr2, $sp, 560 # 16-byte Folded Spill vreplvei.w $vr26, $vr1, 0 vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -179086,13 +179062,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 528 # 16-byte Folded Spill + vst $vr2, $sp, 544 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 512 # 16-byte Folded Spill + vst $vr2, $sp, 528 # 16-byte Folded Spill vreplvei.w $vr29, $vr0, 0 vreplvei.w $vr0, $vr1, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -179100,13 +179076,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 - vst $vr2, $sp, 496 # 16-byte Folded Spill + vst $vr2, $sp, 512 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 480 # 16-byte Folded Spill + vst $vr2, $sp, 496 # 16-byte Folded Spill vreplvei.w $vr30, $vr1, 0 vreplvei.w $vr1, $vr0, 3 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -179114,68 +179090,68 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 - vst $vr2, $sp, 1584 # 16-byte Folded Spill + vst $vr2, $sp, 1600 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 464 # 16-byte Folded Spill + vst $vr2, $sp, 480 # 16-byte Folded Spill vreplvei.w $vr4, $vr0, 0 vreplvei.w $vr0, $vr1, 3 - vst $vr0, $sp, 432 # 16-byte Folded Spill + vst $vr0, $sp, 448 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.w $vr2, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr1, 1 - vst $vr2, $sp, 448 # 16-byte Folded Spill + vst $vr2, $sp, 464 # 16-byte Folded Spill vreplvei.w $vr31, $vr1, 0 vreplvei.w $vr1, $vr0, 3 - vst $vr1, $sp, 400 # 16-byte Folded Spill + vst $vr1, $sp, 416 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.w $vr2, $vr0, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr2, $vr0, 1 - vst $vr2, $sp, 416 # 16-byte Folded Spill + vst $vr2, $sp, 432 # 16-byte Folded Spill vreplvei.w $vr0, $vr0, 0 vreplvei.w $vr2, $vr1, 3 - vst $vr2, $sp, 368 # 16-byte Folded Spill + vst $vr2, $sp, 384 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 vreplvei.w $vr3, $vr1, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr3, $vr1, 1 - vst $vr3, $sp, 384 # 16-byte Folded Spill + vst $vr3, $sp, 400 # 16-byte Folded Spill vreplvei.w $vr1, $vr1, 0 vreplvei.w $vr3, $vr2, 3 - vst $vr3, $sp, 352 # 16-byte Folded Spill + vst $vr3, $sp, 368 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 vreplvei.w $vr5, $vr2, 2 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr5, $vr2, 1 - vst $vr5, $sp, 1408 # 16-byte Folded Spill + vst $vr5, $sp, 1424 # 16-byte Folded Spill vreplvei.w $vr2, $vr2, 0 vreplvei.w $vr5, $vr3, 3 - vst $vr5, $sp, 336 # 16-byte Folded Spill + vst $vr5, $sp, 352 # 16-byte Folded Spill lu12i.w $a0, 2 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 @@ -179183,7 +179159,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vreplvei.w $vr8, $vr3, 2 vreplvei.w $vr6, $vr3, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr6, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr3, $vr3, 0 @@ -179197,7 +179173,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr10, $sp, 288 # 16-byte Folded Spill vreplvei.w $vr10, $vr5, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr10, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr5, $vr5, 0 @@ -179211,7 +179187,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr11, $sp, 272 # 16-byte Folded Spill vreplvei.w $vr11, $vr6, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr11, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr6, $vr6, 0 @@ -179225,7 +179201,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr12, $sp, 240 # 16-byte Folded Spill vreplvei.w $vr12, $vr10, 1 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr12, $a0, 0 # 16-byte Folded Spill vreplvei.w $vr10, $vr10, 0 @@ -179270,6 +179246,10 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vreplvei.w $vr9, $vr19, 1 vst $vr9, $sp, 32 # 16-byte Folded Spill vreplvei.w $vr19, $vr19, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1896 + add.d $a0, $sp, $a0 + ld.d $s7, $a0, 0 # 8-byte Folded Reload addi.d $s7, $s7, 31 lu12i.w $a0, 2 ori $a0, $a0, 1896 @@ -179309,19 +179289,19 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr9, $sp, 80 # 16-byte Folded Reload vextrins.w $vr19, $vr9, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr9, $vr8, 16 - vld $vr8, $sp, 336 # 16-byte Folded Reload + vld $vr8, $sp, 352 # 16-byte Folded Reload vextrins.w $vr9, $vr8, 32 vextrins.w $vr9, $vr2, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr9, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vld $vr8, $a0, 0 # 16-byte Folded Reload vld $vr2, $sp, 288 # 16-byte Folded Reload @@ -179330,11 +179310,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vextrins.w $vr8, $vr2, 32 vextrins.w $vr8, $vr3, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr8, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload vld $vr2, $sp, 272 # 16-byte Folded Reload @@ -179343,11 +179323,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vextrins.w $vr3, $vr2, 32 vextrins.w $vr3, $vr5, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload vld $vr2, $sp, 240 # 16-byte Folded Reload @@ -179356,69 +179336,82 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vextrins.w $vr3, $vr2, 32 vextrins.w $vr3, $vr6, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload - vld $vr2, $sp, 432 # 16-byte Folded Reload + vld $vr2, $sp, 448 # 16-byte Folded Reload vextrins.w $vr3, $vr2, 16 vextrins.w $vr3, $vr4, 32 - vld $vr2, $sp, 464 # 16-byte Folded Reload + vld $vr2, $sp, 480 # 16-byte Folded Reload vextrins.w $vr3, $vr2, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload - vld $vr2, $sp, 400 # 16-byte Folded Reload + vld $vr2, $sp, 416 # 16-byte Folded Reload vextrins.w $vr3, $vr2, 16 vextrins.w $vr3, $vr31, 32 - vld $vr2, $sp, 448 # 16-byte Folded Reload + vld $vr2, $sp, 464 # 16-byte Folded Reload vextrins.w $vr3, $vr2, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload - vld $vr2, $sp, 368 # 16-byte Folded Reload + vld $vr2, $sp, 384 # 16-byte Folded Reload vextrins.w $vr3, $vr2, 16 vextrins.w $vr3, $vr0, 32 - vld $vr0, $sp, 416 # 16-byte Folded Reload + vld $vr0, $sp, 432 # 16-byte Folded Reload vextrins.w $vr3, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 352 # 16-byte Folded Reload + vld $vr0, $sp, 368 # 16-byte Folded Reload vextrins.w $vr2, $vr0, 16 vextrins.w $vr2, $vr1, 32 - vld $vr0, $sp, 384 # 16-byte Folded Reload + vld $vr0, $sp, 400 # 16-byte Folded Reload vextrins.w $vr2, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr28, 16 - vld $vr0, $sp, 576 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 592 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 32 + vld $vr0, $sp, 608 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 48 + lu12i.w $a0, 1 + ori $a0, $a0, 2544 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + lu12i.w $a0, 1 + ori $a0, $a0, 2528 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.w $vr1, $vr26, 16 + vld $vr0, $sp, 560 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 32 + vld $vr0, $sp, 576 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2528 @@ -179428,10 +179421,10 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr26, 16 - vld $vr0, $sp, 544 # 16-byte Folded Reload + vextrins.w $vr1, $vr29, 16 + vld $vr0, $sp, 528 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 560 # 16-byte Folded Reload + vld $vr0, $sp, 544 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2512 @@ -179441,35 +179434,36 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr29, 16 - vld $vr0, $sp, 512 # 16-byte Folded Reload + vextrins.w $vr1, $vr30, 16 + vld $vr0, $sp, 496 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 528 # 16-byte Folded Reload + vld $vr0, $sp, 512 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr30, 16 - vld $vr0, $sp, 480 # 16-byte Folded Reload + vld $vr0, $sp, 752 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 16 + vld $vr0, $sp, 768 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 496 # 16-byte Folded Reload + vld $vr0, $sp, 800 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 736 # 16-byte Folded Reload + vld $vr0, $sp, 688 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 752 # 16-byte Folded Reload + vld $vr0, $sp, 736 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 784 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179481,11 +179475,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 672 # 16-byte Folded Reload + vld $vr0, $sp, 656 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 720 # 16-byte Folded Reload + vld $vr0, $sp, 672 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 768 # 16-byte Folded Reload + vld $vr0, $sp, 720 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2576 @@ -179495,9 +179489,9 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 640 # 16-byte Folded Reload + vld $vr0, $sp, 624 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 656 # 16-byte Folded Reload + vld $vr0, $sp, 640 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 704 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179506,28 +179500,27 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 608 # 16-byte Folded Reload + vld $vr0, $sp, 896 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 624 # 16-byte Folded Reload + vld $vr0, $sp, 928 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 688 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 48 + vextrins.w $vr1, $vr23, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 880 # 16-byte Folded Reload + vld $vr0, $sp, 864 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 vld $vr0, $sp, 912 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vextrins.w $vr1, $vr23, 48 + vextrins.w $vr1, $vr24, 48 lu12i.w $a0, 1 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 @@ -179536,11 +179529,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 848 # 16-byte Folded Reload + vld $vr0, $sp, 832 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 896 # 16-byte Folded Reload + vld $vr0, $sp, 880 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vextrins.w $vr1, $vr24, 48 + vextrins.w $vr1, $vr25, 48 lu12i.w $a0, 1 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 @@ -179551,33 +179544,33 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 # 16-byte Folded Reload vld $vr0, $sp, 816 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 864 # 16-byte Folded Reload + vld $vr0, $sp, 848 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vextrins.w $vr1, $vr25, 48 + vextrins.w $vr1, $vr27, 48 lu12i.w $a0, 1 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 800 # 16-byte Folded Reload + vld $vr0, $sp, 1024 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 832 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 32 - vextrins.w $vr1, $vr27, 48 + vextrins.w $vr1, $vr21, 32 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1008 # 16-byte Folded Reload + vld $vr0, $sp, 992 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vextrins.w $vr1, $vr21, 32 + vextrins.w $vr1, $vr17, 32 vld $vr0, $sp, 1040 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 @@ -179588,10 +179581,10 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 976 # 16-byte Folded Reload + vld $vr0, $sp, 960 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vextrins.w $vr1, $vr17, 32 - vld $vr0, $sp, 1024 # 16-byte Folded Reload + vextrins.w $vr1, $vr20, 32 + vld $vr0, $sp, 1008 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2704 @@ -179603,34 +179596,34 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 # 16-byte Folded Reload vld $vr0, $sp, 944 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vextrins.w $vr1, $vr20, 32 - vld $vr0, $sp, 992 # 16-byte Folded Reload + vextrins.w $vr1, $vr22, 32 + vld $vr0, $sp, 976 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 928 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 16 - vextrins.w $vr1, $vr22, 32 - vld $vr0, $sp, 960 # 16-byte Folded Reload + vextrins.w $vr1, $vr18, 16 + vld $vr0, $sp, 1168 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 32 + vld $vr0, $sp, 1184 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr18, 16 - vld $vr0, $sp, 1152 # 16-byte Folded Reload + vextrins.w $vr1, $vr16, 16 + vld $vr0, $sp, 1136 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1168 # 16-byte Folded Reload + vld $vr0, $sp, 1152 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2784 @@ -179640,10 +179633,10 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr16, 16 - vld $vr0, $sp, 1120 # 16-byte Folded Reload + vextrins.w $vr1, $vr15, 16 + vld $vr0, $sp, 1104 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1136 # 16-byte Folded Reload + vld $vr0, $sp, 1120 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2768 @@ -179653,36 +179646,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr15, 16 - vld $vr0, $sp, 1088 # 16-byte Folded Reload + vld $vr0, $sp, 208 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 16 + vld $vr0, $sp, 1072 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1104 # 16-byte Folded Reload + vld $vr0, $sp, 1088 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 208 # 16-byte Folded Reload + vld $vr0, $sp, 1312 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1056 # 16-byte Folded Reload + vld $vr0, $sp, 1344 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1072 # 16-byte Folded Reload + vld $vr0, $sp, 1376 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1296 # 16-byte Folded Reload + vld $vr0, $sp, 1264 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1328 # 16-byte Folded Reload + vld $vr0, $sp, 1296 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 1360 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179694,11 +179688,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1248 # 16-byte Folded Reload + vld $vr0, $sp, 1232 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1280 # 16-byte Folded Reload + vld $vr0, $sp, 1248 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1344 # 16-byte Folded Reload + vld $vr0, $sp, 1328 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2832 @@ -179708,37 +179702,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1216 # 16-byte Folded Reload + vld $vr0, $sp, 1200 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1232 # 16-byte Folded Reload + vld $vr0, $sp, 1216 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1312 # 16-byte Folded Reload + vld $vr0, $sp, 1280 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1184 # 16-byte Folded Reload + vld $vr0, $sp, 1488 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1200 # 16-byte Folded Reload + vld $vr0, $sp, 1552 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1264 # 16-byte Folded Reload + vld $vr0, $sp, 1584 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1472 # 16-byte Folded Reload + vld $vr0, $sp, 1456 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1536 # 16-byte Folded Reload + vld $vr0, $sp, 1520 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 1568 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179750,11 +179744,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1440 # 16-byte Folded Reload + vld $vr0, $sp, 1408 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1504 # 16-byte Folded Reload + vld $vr0, $sp, 1472 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1552 # 16-byte Folded Reload + vld $vr0, $sp, 1536 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2896 @@ -179766,37 +179760,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 # 16-byte Folded Reload vld $vr0, $sp, 1392 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1456 # 16-byte Folded Reload + vld $vr0, $sp, 1440 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1520 # 16-byte Folded Reload + vld $vr0, $sp, 1504 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1376 # 16-byte Folded Reload + vld $vr0, $sp, 1728 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1424 # 16-byte Folded Reload + vld $vr0, $sp, 1792 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1488 # 16-byte Folded Reload + vld $vr0, $sp, 1776 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1712 # 16-byte Folded Reload + vld $vr0, $sp, 1680 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1776 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 32 vld $vr0, $sp, 1760 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 32 + vld $vr0, $sp, 1744 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2976 @@ -179806,11 +179800,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1664 # 16-byte Folded Reload + vld $vr0, $sp, 1632 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1744 # 16-byte Folded Reload + vld $vr0, $sp, 1712 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1728 # 16-byte Folded Reload + vld $vr0, $sp, 1696 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2960 @@ -179822,37 +179816,37 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr1, $a0, 0 # 16-byte Folded Reload vld $vr0, $sp, 1616 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1696 # 16-byte Folded Reload + vld $vr0, $sp, 1664 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1680 # 16-byte Folded Reload + vld $vr0, $sp, 1648 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1600 # 16-byte Folded Reload + vld $vr0, $sp, 1984 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1648 # 16-byte Folded Reload + vld $vr0, $sp, 1968 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1632 # 16-byte Folded Reload + vld $vr0, $sp, 2000 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1968 # 16-byte Folded Reload + vld $vr0, $sp, 1936 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1952 # 16-byte Folded Reload + vld $vr0, $sp, 1920 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1984 # 16-byte Folded Reload + vld $vr0, $sp, 1952 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 3040 @@ -179862,11 +179856,11 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1920 # 16-byte Folded Reload + vld $vr0, $sp, 1888 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1904 # 16-byte Folded Reload + vld $vr0, $sp, 1872 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1936 # 16-byte Folded Reload + vld $vr0, $sp, 1904 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 3024 @@ -179876,39 +179870,45 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1872 # 16-byte Folded Reload + vld $vr0, $sp, 1840 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1856 # 16-byte Folded Reload + vld $vr0, $sp, 1824 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1888 # 16-byte Folded Reload + vld $vr0, $sp, 1856 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1824 # 16-byte Folded Reload + ori $a0, $zero, 2160 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 1808 # 16-byte Folded Reload + ori $a0, $zero, 2192 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vld $vr0, $sp, 1840 # 16-byte Folded Reload + ori $a0, $zero, 2224 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2144 + ori $a0, $zero, 2128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2176 + ori $a0, $zero, 2144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -179924,15 +179924,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2112 + ori $a0, $zero, 2064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2128 + ori $a0, $zero, 2112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2192 + ori $a0, $zero, 2176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179944,15 +179944,13 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2048 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr0, $sp, 2032 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2096 + ori $a0, $zero, 2048 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2160 + ori $a0, $zero, 2080 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -179961,30 +179959,34 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 2016 # 16-byte Folded Reload + ori $a0, $zero, 2384 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - vld $vr0, $sp, 2032 # 16-byte Folded Reload + ori $a0, $zero, 2432 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2064 + ori $a0, $zero, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2368 + ori $a0, $zero, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2416 + ori $a0, $zero, 2400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -179993,38 +179995,38 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2304 + ori $a0, $zero, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2384 + ori $a0, $zero, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2448 + ori $a0, $zero, 2368 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2272 + ori $a0, $zero, 2256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2320 + ori $a0, $zero, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180037,30 +180039,30 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2240 + ori $a0, $zero, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2288 + ori $a0, $zero, 2848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2336 + ori $a0, $zero, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2768 + ori $a0, $zero, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 @@ -180068,76 +180070,76 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2928 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 48 + vextrins.w $vr1, $vr13, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2720 + ori $a0, $zero, 2688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2816 + ori $a0, $zero, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - vextrins.w $vr1, $vr13, 48 + ori $a0, $zero, 2752 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2752 + ori $a0, $zero, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2736 + ori $a0, $zero, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2656 + ori $a0, $zero, 3104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2704 + ori $a0, $zero, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2688 + ori $a0, $zero, 2240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3088 + ori $a0, $zero, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 @@ -180145,7 +180147,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2224 + ori $a0, $zero, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180157,15 +180159,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3168 + ori $a0, $zero, 3232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3104 + ori $a0, $zero, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3152 + ori $a0, $zero, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180174,54 +180176,54 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3216 + ori $a0, $zero, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3184 + ori $a0, $zero, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3200 + ori $a0, $zero, 3280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3136 + ori $a0, $zero, 2592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3232 + ori $a0, $zero, 2624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3264 + ori $a0, $zero, 2656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2576 + ori $a0, $zero, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2608 + ori $a0, $zero, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180234,74 +180236,74 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2528 + ori $a0, $zero, 2496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2560 + ori $a0, $zero, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2624 + ori $a0, $zero, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2480 + ori $a0, $zero, 2416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2496 + ori $a0, $zero, 2448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2592 + ori $a0, $zero, 2560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2400 + ori $a0, $zero, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2432 + ori $a0, $zero, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2544 + ori $a0, $zero, 3088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2976 + ori $a0, $zero, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3040 + ori $a0, $zero, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180310,82 +180312,80 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2912 + ori $a0, $zero, 2880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3008 + ori $a0, $zero, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3056 + ori $a0, $zero, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2864 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2944 + ori $a0, $zero, 2912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3024 + ori $a0, $zero, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2848 + ori $a0, $zero, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 2896 + ori $a0, $zero, 3552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 2992 + ori $a0, $zero, 3520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3392 + ori $a0, $zero, 3360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3536 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr0, $sp, 336 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3504 + ori $a0, $zero, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180397,16 +180397,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3344 + ori $a0, $zero, 3312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + ori $a0, $zero, 3392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3424 + ori $a0, $zero, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180415,58 +180414,58 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3296 + ori $a0, $zero, 3264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3376 + ori $a0, $zero, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3360 + ori $a0, $zero, 3328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3248 + ori $a0, $zero, 3776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3328 + ori $a0, $zero, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3312 + ori $a0, $zero, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3760 + ori $a0, $zero, 3728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3744 + ori $a0, $zero, 3712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3776 + ori $a0, $zero, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180475,38 +180474,38 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3712 + ori $a0, $zero, 3680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3696 + ori $a0, $zero, 3664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3728 + ori $a0, $zero, 3696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3664 + ori $a0, $zero, 3616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3648 + ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3680 + ori $a0, $zero, 3632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180515,34 +180514,34 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3600 + ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3584 + ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3616 + ori $a0, $zero, 4048 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3968 + ori $a0, $zero, 3920 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 4000 + ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180558,15 +180557,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3904 + ori $a0, $zero, 3888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3936 + ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 4016 + ori $a0, $zero, 4000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180578,15 +180577,15 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3872 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3888 + ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3984 + ori $a0, $zero, 3936 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180595,23 +180594,26 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3840 + lu12i.w $a0, 1 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 - ori $a0, $zero, 3856 + lu12i.w $a0, 1 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 - ori $a0, $zero, 3920 + lu12i.w $a0, 1 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 @@ -180619,12 +180621,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180642,17 +180644,16 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 80 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180669,12 +180670,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180683,24 +180684,26 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4064 + lu12i.w $a0, 1 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 @@ -180708,17 +180711,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180731,17 +180734,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180754,17 +180757,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180773,26 +180776,26 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 @@ -180800,17 +180803,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180823,17 +180826,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180846,17 +180849,17 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 @@ -180865,26 +180868,26 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 @@ -180892,12 +180895,12 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr0, 32 @@ -180911,503 +180914,480 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 3824 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 720 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 752 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 32 - lu12i.w $a0, 1 - ori $a0, $a0, 816 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.w $vr1, $vr0, 48 - lu12i.w $a0, 1 - ori $a0, $a0, 3824 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr31, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr30, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr30, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr30, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr28, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr28, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1040 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr28, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr27, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr25, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr26, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr26, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr26, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr26, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr24, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr23, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr21, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr22, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr20, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr18, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr18, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr18, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr16, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr16, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr16, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr17, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr15, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr15, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr15, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr13, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr13, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr13, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr3, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr3, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr3, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr8, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2320 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr6, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr6, $vr0, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.w $vr6, $vr0, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload vextrins.w $vr5, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload vextrins.w $vr5, $vr2, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload vextrins.w $vr5, $vr2, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vld $vr4, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr4, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vld $vr4, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr4, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vld $vr4, $a0, 0 # 16-byte Folded Reload vextrins.w $vr0, $vr4, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr4, $a0, 0 # 16-byte Folded Reload vori.b $vr1, $vr7, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr4, $vr7, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr4, $vr7, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr4, $vr7, 48 - ori $a0, $zero, 2784 + ori $a0, $zero, 2800 add.d $a0, $sp, $a0 vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vld $vr7, $a0, 0 # 16-byte Folded Reload vextrins.w $vr7, $vr9, 16 vextrins.w $vr7, $vr1, 32 - ori $a0, $zero, 2800 + ori $a0, $zero, 2816 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr7, $vr1, 48 - ori $a0, $zero, 3808 + ori $a0, $zero, 3824 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3488 + ori $a0, $zero, 3504 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr2, $vr1, 16 - ori $a0, $zero, 3568 + ori $a0, $zero, 3584 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr2, $vr1, 32 - ori $a0, $zero, 3552 + ori $a0, $zero, 3568 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.w $vr2, $vr1, 48 - ori $a0, $zero, 3792 + ori $a0, $zero, 3808 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3408 + ori $a0, $zero, 3424 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr9, 16 - ori $a0, $zero, 3456 + ori $a0, $zero, 3472 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr9, 32 - ori $a0, $zero, 3520 + ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr1, $vr9, 48 - ori $a0, $zero, 2880 + ori $a0, $zero, 2896 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr29, $vr9, 16 - ori $a0, $zero, 3472 + ori $a0, $zero, 3488 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr29, $vr9, 32 - ori $a0, $zero, 3440 + ori $a0, $zero, 3456 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vextrins.w $vr29, $vr9, 48 @@ -181418,574 +181398,574 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ fst.s $ft2, $a1, 64 vst $vr11, $a1, 48 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 68 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 84 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 100 - vld $vr9, $sp, 1408 # 16-byte Folded Reload + vld $vr9, $sp, 1424 # 16-byte Folded Reload fst.s $ft1, $a1, 132 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 116 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 136 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 152 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 168 - vld $vr9, $sp, 1584 # 16-byte Folded Reload + vld $vr9, $sp, 1600 # 16-byte Folded Reload fst.s $ft1, $a1, 200 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 184 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 204 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 220 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 236 - vld $vr9, $sp, 1792 # 16-byte Folded Reload + vld $vr9, $sp, 1808 # 16-byte Folded Reload fst.s $ft1, $a1, 268 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 252 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 272 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 288 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 304 - vld $vr9, $sp, 2000 # 16-byte Folded Reload + vld $vr9, $sp, 2016 # 16-byte Folded Reload fst.s $ft1, $a1, 336 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 320 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 340 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 356 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 372 - ori $a0, $zero, 2080 + ori $a0, $zero, 2096 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 404 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 388 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 408 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 424 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 440 - ori $a0, $zero, 2256 + ori $a0, $zero, 2272 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 472 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 456 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 476 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 492 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 508 - ori $a0, $zero, 2512 + ori $a0, $zero, 2528 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 540 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 524 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 544 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 560 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 576 - ori $a0, $zero, 2960 + ori $a0, $zero, 2976 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 608 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 592 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 612 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 628 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 644 - ori $a0, $zero, 3280 + ori $a0, $zero, 3296 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 676 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 660 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 680 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 696 lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 712 - ori $a0, $zero, 3632 + ori $a0, $zero, 3648 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 744 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 728 lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 748 lu12i.w $a0, 1 - ori $a0, $a0, 3008 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 764 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 780 - ori $a0, $zero, 3952 + ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 812 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 796 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 816 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 832 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 848 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 880 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 864 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 884 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 900 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 916 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 948 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 932 lu12i.w $a0, 1 - ori $a0, $a0, 3280 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 952 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 968 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 984 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1016 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1000 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1020 lu12i.w $a0, 1 - ori $a0, $a0, 3488 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1036 lu12i.w $a0, 1 - ori $a0, $a0, 3504 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1052 - ori $a0, $zero, 4048 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1084 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1068 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1088 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1104 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1120 lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1152 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1136 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1156 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1172 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1188 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1220 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1204 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1224 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1240 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1256 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1288 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1272 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1292 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1308 lu12i.w $a0, 1 - ori $a0, $a0, 3536 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1324 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1356 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1340 lu12i.w $a0, 1 - ori $a0, $a0, 3568 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1360 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1376 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1392 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1424 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1408 lu12i.w $a0, 1 - ori $a0, $a0, 3632 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1428 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1444 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1460 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1492 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1476 lu12i.w $a0, 1 - ori $a0, $a0, 3696 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1496 lu12i.w $a0, 1 - ori $a0, $a0, 3712 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1512 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1528 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1560 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1544 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1564 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1580 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1596 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1628 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1612 vst $vr30, $a1, 1632 vst $vr31, $a1, 1648 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1664 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1696 lu12i.w $a0, 1 - ori $a0, $a0, 3840 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload vst $vr9, $a1, 1680 @@ -181993,7 +181973,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr25, $a1, 1716 vst $vr27, $a1, 1732 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1764 @@ -182002,7 +181982,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr21, $a1, 1784 vst $vr23, $a1, 1800 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1832 @@ -182011,7 +181991,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr16, $a1, 1852 vst $vr18, $a1, 1868 lu12i.w $a0, 1 - ori $a0, $a0, 2176 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload fst.s $ft1, $a1, 1900 @@ -182020,7 +182000,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr3, $a1, 1920 vst $vr13, $a1, 1936 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload fst.s $fa3, $a1, 1968 @@ -182029,7 +182009,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ vst $vr0, $a1, 1988 vst $vr5, $a1, 2004 lu12i.w $a0, 1 - ori $a0, $a0, 2336 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload fst.s $fa0, $a1, 2036 @@ -182039,7 +182019,7 @@ _Z13transposeSpecIfLj31ELj17EEvPT_S1_: # @_Z13transposeSpecIfLj31ELj17EEvPT_S1_ ori $a0, $zero, 2072 vstx $vr1, $a1, $a0 ori $a0, $zero, 2104 - ori $a2, $zero, 3824 + ori $a2, $zero, 3840 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload fstx.s $fa0, $a1, $a0 @@ -185182,15 +185162,6 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 # implicit-def: $f0_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f1_64 - ori $a0, $zero, 3856 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f1_64 - lu12i.w $a0, 1 ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill @@ -186006,7 +185977,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 @@ -186016,7 +185987,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 @@ -186036,29 +186007,29 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f15_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - # implicit-def: $f14_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f15_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f14_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f1_64 @@ -186080,6 +186051,16 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 lu12i.w $a0, 1 ori $a0, $a0, 1520 add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f1_64 + lu12i.w $a0, 1 + ori $a0, $a0, 1200 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + # implicit-def: $f1_64 + lu12i.w $a0, 1 + ori $a0, $a0, 1536 + add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f18_64 # implicit-def: $f31_64 @@ -186087,79 +186068,78 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 # implicit-def: $f29_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f26_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f25_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f24_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f23_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f21_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f20_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f19_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f16_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f13_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f12_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f11_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f10_64 # implicit-def: $f1_64 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f30_64 @@ -186171,25 +186151,25 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 # implicit-def: $f7_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f6_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f4_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill # implicit-def: $f3_64 # implicit-def: $f1_64 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill .p2align 4, , 16 @@ -186229,14 +186209,6 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 ori $a0, $zero, 3520 add.d $a0, $sp, $a0 vst $vr26, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 2960 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 2960 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vst $vr12, $a0, 0 # 16-byte Folded Spill @@ -186364,65 +186336,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr2, $a1, 0 # 16-byte Folded Reload vstx $vr2, $a2, $a3 + ori $a2, $zero, 2192 lu12i.w $a1, 2 ori $a1, $a1, 128 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2192 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2208 lu12i.w $a1, 1 ori $a1, $a1, 3600 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2208 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2224 lu12i.w $a1, 2 ori $a1, $a1, 112 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2224 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2240 lu12i.w $a1, 2 ori $a1, $a1, 1280 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2240 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2256 lu12i.w $a1, 2 ori $a1, $a1, 608 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2256 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2272 lu12i.w $a1, 2 ori $a1, $a1, 1920 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2272 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2288 lu12i.w $a1, 2 ori $a1, $a1, 1264 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2288 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2304 lu12i.w $a1, 2 ori $a1, $a1, 1248 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2304 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2320 lu12i.w $a1, 2 ori $a1, $a1, 592 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2320 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2336 lu12i.w $a1, 2 ori $a1, $a1, 576 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2336 vstx $vr0, $a2, $a3 ori $a2, $zero, 2352 lu12i.w $a1, 1 @@ -186490,65 +186462,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a3 + ori $a2, $zero, 2528 lu12i.w $a1, 1 ori $a1, $a1, 3504 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2528 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2544 lu12i.w $a1, 2 ori $a1, $a1, 1904 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2544 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2560 lu12i.w $a1, 1 ori $a1, $a1, 3488 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2560 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2576 lu12i.w $a1, 2 ori $a1, $a1, 560 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2576 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2592 lu12i.w $a1, 2 ori $a1, $a1, 1216 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2592 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2608 lu12i.w $a1, 2 ori $a1, $a1, 80 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2608 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2624 lu12i.w $a1, 1 ori $a1, $a1, 3472 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2640 lu12i.w $a1, 2 ori $a1, $a1, 544 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2640 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2656 lu12i.w $a1, 1 ori $a1, $a1, 3456 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2672 lu12i.w $a1, 2 ori $a1, $a1, 64 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2672 vstx $vr0, $a2, $a3 ori $a2, $zero, 2688 lu12i.w $a1, 2 @@ -186615,65 +186587,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a3 + ori $a2, $zero, 2864 lu12i.w $a1, 1 ori $a1, $a1, 4080 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2864 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2880 lu12i.w $a1, 1 ori $a1, $a1, 4064 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2880 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2896 lu12i.w $a1, 1 ori $a1, $a1, 4048 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2912 lu12i.w $a1, 2 ori $a1, $a1, 496 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2912 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2928 lu12i.w $a1, 2 ori $a1, $a1, 480 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2928 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2944 lu12i.w $a1, 2 ori $a1, $a1, 1168 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2944 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2960 lu12i.w $a1, 2 ori $a1, $a1, 464 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2960 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2976 lu12i.w $a1, 2 ori $a1, $a1, 1152 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2976 vstx $vr0, $a2, $a3 + ori $a2, $zero, 2992 lu12i.w $a1, 2 ori $a1, $a1, 448 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 2992 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3008 lu12i.w $a1, 2 ori $a1, $a1, 432 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3008 vstx $vr0, $a2, $a3 ori $a2, $zero, 3024 lu12i.w $a1, 2 @@ -186741,65 +186713,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a3 + ori $a2, $zero, 3200 lu12i.w $a1, 2 ori $a1, $a1, 1104 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3200 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3216 lu12i.w $a1, 2 ori $a1, $a1, 1088 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3216 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3232 lu12i.w $a1, 2 ori $a1, $a1, 1808 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3232 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3248 lu12i.w $a1, 2 ori $a1, $a1, 1792 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3248 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3264 lu12i.w $a1, 2 ori $a1, $a1, 3072 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3264 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3280 lu12i.w $a1, 2 ori $a1, $a1, 3056 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3296 lu12i.w $a1, 2 ori $a1, $a1, 1776 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3296 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3312 lu12i.w $a1, 2 ori $a1, $a1, 1072 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3312 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3328 lu12i.w $a1, 1 ori $a1, $a1, 4000 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3328 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3344 lu12i.w $a1, 2 ori $a1, $a1, 1056 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3344 vstx $vr0, $a2, $a3 ori $a2, $zero, 3360 lu12i.w $a1, 2 @@ -186867,65 +186839,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a3 + ori $a2, $zero, 3536 lu12i.w $a1, 2 ori $a1, $a1, 368 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3536 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3552 lu12i.w $a1, 2 ori $a1, $a1, 976 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3552 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3568 lu12i.w $a1, 2 ori $a1, $a1, 352 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3584 lu12i.w $a1, 1 ori $a1, $a1, 3920 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 vstx $vr0, $a2, $a3 + ori $a2, $zero, 3600 lu12i.w $a1, 1 ori $a1, $a1, 3904 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 vstx $vr0, $a2, $a3 - lu12i.w $a1, 2 - ori $a1, $a1, 336 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3616 + lu12i.w $a2, 2 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a3 - lu12i.w $a1, 1 - ori $a1, $a1, 3888 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3632 + lu12i.w $a2, 1 + ori $a2, $a2, 3888 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a3 - lu12i.w $a1, 2 - ori $a1, $a1, 1760 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3648 + lu12i.w $a2, 2 + ori $a2, $a2, 1760 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a3 - lu12i.w $a1, 1 - ori $a1, $a1, 3872 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3664 + lu12i.w $a2, 1 + ori $a2, $a2, 3872 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a3 + ori $a4, $zero, 3680 lu12i.w $a1, 1 ori $a1, $a1, 3856 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a4, $zero, 3680 vstx $vr0, $a4, $a3 ori $a4, $zero, 3696 lu12i.w $a1, 2 @@ -191513,17 +191485,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr30, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2928 vstx $vr30, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1168 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2944 + lu12i.w $a2, 2 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 464 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2960 + lu12i.w $a2, 2 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 1152 @@ -191554,7 +191526,6 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 ori $a4, $a4, 3424 add.d $a4, $sp, $a4 vld $vr4, $a4, 0 # 16-byte Folded Reload - ld.d $a4, $sp, 0 # 8-byte Folded Reload vstx $vr4, $a0, $a7 lu12i.w $a0, 1 ori $a0, $a0, 3408 @@ -191592,23 +191563,24 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr29, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3136 vstx $vr29, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3152 + lu12i.w $a4, 2 + ori $a4, $a4, 1840 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1824 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3168 + lu12i.w $a4, 2 + ori $a4, $a4, 1824 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1120 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3184 + lu12i.w $a4, 2 + ori $a4, $a4, 1120 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload + ld.d $a4, $sp, 0 # 8-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 1104 @@ -193164,11 +193136,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr28, $a1, $a7 ori $a1, $zero, 2928 vstx $vr30, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1168 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2944 + lu12i.w $a3, 2 + ori $a3, $a3, 1168 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 ori $a1, $zero, 2960 lu12i.w $a3, 2 @@ -193176,11 +193148,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a3, $sp, $a3 vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 + ori $a3, $zero, 2976 lu12i.w $a1, 2 ori $a1, $a1, 1152 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload - ori $a3, $zero, 2976 vstx $vr0, $a3, $a7 lu12i.w $a1, 2 ori $a1, $a1, 448 @@ -193235,65 +193207,65 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1104 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3200 + lu12i.w $a4, 2 + ori $a4, $a4, 1104 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1088 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3216 + lu12i.w $a4, 2 + ori $a4, $a4, 1088 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1808 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3232 + lu12i.w $a4, 2 + ori $a4, $a4, 1808 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1792 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3248 + lu12i.w $a4, 2 + ori $a4, $a4, 1792 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 3072 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3264 + lu12i.w $a4, 2 + ori $a4, $a4, 3072 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 3056 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 + lu12i.w $a4, 2 + ori $a4, $a4, 3056 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1776 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3296 + lu12i.w $a4, 2 + ori $a4, $a4, 1776 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1072 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 + lu12i.w $a4, 2 + ori $a4, $a4, 1072 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 1 - ori $a2, $a2, 4000 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 + lu12i.w $a4, 1 + ori $a4, $a4, 4000 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 + lu12i.w $a4, 2 + ori $a4, $a4, 1056 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 ori $a2, $zero, 3360 lu12i.w $a4, 2 @@ -193361,11 +193333,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr1, $a4, 0 # 16-byte Folded Reload vstx $vr1, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 + lu12i.w $a4, 2 + ori $a4, $a4, 368 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 ori $a2, $zero, 3552 lu12i.w $a4, 2 @@ -194574,11 +194546,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 ori $a0, $zero, 2240 vstx $vr18, $a0, $a7 vstx $vr24, $s1, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1920 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2272 + lu12i.w $a2, 2 + ori $a2, $a2, 1920 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 vstx $vr16, $s0, $a7 vstx $vr17, $fp, $a7 @@ -194642,11 +194614,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2496 vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3648 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2512 + lu12i.w $a2, 1 + ori $a2, $a2, 3648 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 vstx $vr25, $t7, $a7 ori $a0, $zero, 2544 @@ -194719,17 +194691,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a0, $a7 ori $a0, $zero, 2752 vstx $vr15, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1888 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2768 + lu12i.w $a2, 2 + ori $a2, $a2, 1888 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2784 + lu12i.w $a2, 2 + ori $a2, $a2, 1872 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2800 lu12i.w $a2, 2 @@ -194739,11 +194711,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a0, $a7 ori $a0, $zero, 2816 vstx $vr11, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2832 + lu12i.w $a2, 2 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2848 vstx $vr12, $a0, $a7 @@ -194766,29 +194738,29 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr12, $a0, 0 # 16-byte Folded Reload ori $s3, $zero, 2896 vstx $vr12, $s3, $a7 + ori $s4, $zero, 2912 lu12i.w $a0, 2 ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s4, $zero, 2912 vstx $vr0, $s4, $a7 + ori $s5, $zero, 2928 lu12i.w $a0, 2 ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s5, $zero, 2928 vstx $vr0, $s5, $a7 + ori $s6, $zero, 2944 lu12i.w $a0, 2 ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2944 vstx $vr0, $s6, $a7 + ori $s7, $zero, 2960 lu12i.w $a0, 2 ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2960 vstx $vr0, $s7, $a7 lu12i.w $a0, 2 ori $a0, $a0, 1152 @@ -194806,11 +194778,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $s2, $a7 + ori $s0, $zero, 3024 lu12i.w $a0, 2 ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s0, $zero, 3024 vstx $vr0, $s0, $a7 ori $s1, $zero, 3040 lu12i.w $a0, 1 @@ -194951,19 +194923,19 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a0, $a7 ori $a0, $zero, 3440 vstx $vr3, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1008 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3456 + lu12i.w $a1, 2 + ori $a1, $a1, 1008 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $t7, $zero, 3472 vstx $vr5, $t7, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 992 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3488 + lu12i.w $a1, 2 + ori $a1, $a1, 992 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $t5, $zero, 3504 vstx $vr6, $t5, $a7 @@ -194981,11 +194953,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3552 vstx $vr0, $a0, $a7 + ori $a3, $zero, 3568 lu12i.w $a0, 2 ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a3, $zero, 3568 vstx $vr0, $a3, $a7 lu12i.w $a0, 1 ori $a0, $a0, 3920 @@ -194993,11 +194965,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3584 vstx $vr0, $a0, $a7 + ori $a2, $zero, 3600 lu12i.w $a0, 1 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 vstx $vr0, $a2, $a7 lu12i.w $a0, 2 ori $a0, $a0, 336 @@ -195005,11 +194977,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3616 vstx $vr0, $a0, $a7 + ori $a1, $zero, 3632 lu12i.w $a0, 1 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a1, $zero, 3632 vstx $vr0, $a1, $a7 lu12i.w $a0, 2 ori $a0, $a0, 1760 @@ -195065,11 +195037,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $t4, $a7 ori $t8, $zero, 3808 vstx $vr28, $t8, $a7 + ori $t3, $zero, 3824 lu12i.w $a0, 1 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 3824 vstx $vr0, $t3, $a7 ori $t6, $zero, 3856 lu12i.w $a0, 1 @@ -196287,17 +196259,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2624 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 544 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2640 + lu12i.w $s8, 2 + ori $s8, $s8, 544 + add.d $s8, $sp, $s8 + vld $vr0, $s8, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 1 - ori $a4, $a4, 3456 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2656 + lu12i.w $s8, 1 + ori $s8, $s8, 3456 + add.d $s8, $sp, $s8 + vld $vr0, $s8, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 ori $a4, $zero, 2672 vstx $vr21, $a4, $a7 @@ -196387,11 +196359,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $s7, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1152 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2976 + lu12i.w $s3, 2 + ori $s3, $s3, 1152 + add.d $s3, $sp, $s3 + vld $vr0, $s3, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 448 @@ -196465,17 +196437,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3168 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1120 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3184 + lu12i.w $s1, 2 + ori $s1, $s1, 1120 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1104 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3200 + lu12i.w $s1, 2 + ori $s1, $s1, 1104 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 1088 @@ -196525,11 +196497,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $s1, $sp, $s1 vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1056 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3344 + lu12i.w $s1, 2 + ori $s1, $s1, 1056 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 416 @@ -196537,11 +196509,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3360 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1040 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3376 + lu12i.w $s1, 2 + ori $s1, $s1, 1040 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3984 @@ -196613,22 +196585,22 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a3, $a7 - lu12i.w $a3, 1 - ori $a3, $a3, 3920 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload ori $a3, $zero, 3584 + lu12i.w $a4, 1 + ori $a4, $a4, 3920 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a3, $a7 lu12i.w $a3, 1 ori $a3, $a3, 3904 add.d $a3, $sp, $a3 vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 336 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3616 + lu12i.w $a3, 2 + ori $a3, $a3, 336 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 1 ori $a2, $a2, 3888 @@ -196641,17 +196613,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3648 vstx $vr0, $a1, $a7 - lu12i.w $a1, 1 - ori $a1, $a1, 3872 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3664 + lu12i.w $a2, 1 + ori $a2, $a2, 3872 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 1 - ori $a1, $a1, 3856 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3680 + lu12i.w $a2, 1 + ori $a2, $a2, 3856 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 lu12i.w $a1, 2 ori $a1, $a1, 320 @@ -202751,41 +202723,41 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a1, $sp, $a1 vld $vr2, $a1, 0 # 16-byte Folded Reload vstx $vr2, $s7, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1200 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2704 + lu12i.w $a2, 2 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 528 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2720 + lu12i.w $a2, 2 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 32 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2736 + lu12i.w $a2, 2 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 16 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2752 + lu12i.w $a2, 2 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1888 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2768 + lu12i.w $a2, 2 + ori $a2, $a2, 1888 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1872 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2784 + lu12i.w $a2, 2 + ori $a2, $a2, 1872 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 lu12i.w $a1, 2 ori $a1, $a1, 512 @@ -202988,74 +202960,74 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr8, $a2, $a7 ori $a2, $zero, 3344 vstx $vr12, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 416 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 + lu12i.w $a3, 2 + ori $a3, $a3, 416 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1040 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 + lu12i.w $a3, 2 + ori $a3, $a3, 1040 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 1 - ori $a2, $a2, 3984 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3392 + lu12i.w $a3, 1 + ori $a3, $a3, 3984 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 ori $s1, $zero, 3392 - lu12i.w $a2, 2 - ori $a2, $a2, 1024 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 + lu12i.w $a3, 2 + ori $a3, $a3, 1024 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 ori $s0, $zero, 3408 - lu12i.w $a2, 2 - ori $a2, $a2, 400 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3424 + lu12i.w $a3, 2 + ori $a3, $a3, 400 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 1 - ori $a2, $a2, 3968 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3440 + lu12i.w $a3, 1 + ori $a3, $a3, 3968 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1008 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 + lu12i.w $a3, 2 + ori $a3, $a3, 1008 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 + ori $t0, $zero, 3472 lu12i.w $a2, 2 ori $a2, $a2, 384 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $t0, $zero, 3472 vstx $vr0, $t0, $a7 - st.d $t0, $sp, 0 # 8-byte Folded Spill - lu12i.w $a2, 2 - ori $a2, $a2, 992 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3488 + st.d $t0, $sp, 0 # 8-byte Folded Spill + lu12i.w $a3, 2 + ori $a3, $a3, 992 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 + ori $a6, $zero, 3504 lu12i.w $a2, 1 ori $a2, $a2, 3952 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a6, $zero, 3504 vstx $vr0, $a6, $a7 - lu12i.w $a2, 1 - ori $a2, $a2, 3936 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 + lu12i.w $a3, 1 + ori $a3, $a3, 3936 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 ori $t5, $zero, 3520 lu12i.w $a2, 2 @@ -203159,17 +203131,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr31, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 vstx $vr31, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1744 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3792 + lu12i.w $a4, 2 + ori $a4, $a4, 1744 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 912 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3808 + lu12i.w $a4, 2 + ori $a4, $a4, 912 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 1 ori $a2, $a2, 3840 @@ -204265,11 +204237,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2176 vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 128 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2192 + lu12i.w $a2, 2 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2208 lu12i.w $a2, 1 @@ -204331,11 +204303,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2352 vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3584 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2368 + lu12i.w $a2, 1 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 1 ori $a0, $a0, 3328 @@ -204349,11 +204321,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3552 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2416 + lu12i.w $a2, 1 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2432 lu12i.w $a2, 1 @@ -204367,11 +204339,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2448 vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 96 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2464 + lu12i.w $a2, 2 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2480 vstx $vr17, $a0, $a7 @@ -204393,11 +204365,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2528 vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2544 + lu12i.w $a2, 2 + ori $a2, $a2, 1904 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 1 ori $a0, $a0, 3488 @@ -204405,11 +204377,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2560 vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 560 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2576 + lu12i.w $a2, 2 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2592 lu12i.w $a2, 2 @@ -204540,17 +204512,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $ra, $a7 + ori $ra, $zero, 2992 lu12i.w $a0, 2 ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 2992 vstx $vr0, $ra, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 432 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3008 + lu12i.w $a2, 2 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 3024 vstx $vr28, $a0, $a7 @@ -204789,17 +204761,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3824 vstx $vr3, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3680 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3856 + lu12i.w $t6, 1 + ori $t6, $t6, 3680 + add.d $t6, $sp, $t6 + vld $vr0, $t6, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3824 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3840 + lu12i.w $t6, 1 + ori $t6, $t6, 3824 + add.d $t6, $sp, $t6 + vld $vr0, $t6, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 3040 @@ -205844,11 +205816,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2128 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 624 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2144 + lu12i.w $t1, 2 + ori $t1, $t1, 624 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3616 @@ -205960,11 +205932,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr25, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2448 vstx $vr25, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 96 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2464 + lu12i.w $t1, 2 + ori $t1, $t1, 96 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3312 @@ -205986,11 +205958,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr6, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2528 vstx $vr6, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1904 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2544 + lu12i.w $t1, 2 + ori $t1, $t1, 1904 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3488 @@ -206004,17 +205976,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr17, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2576 vstx $vr17, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1216 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2592 + lu12i.w $t1, 2 + ori $t1, $t1, 1216 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 80 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2608 + lu12i.w $t1, 2 + ori $t1, $t1, 80 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3472 @@ -206034,11 +206006,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr22, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2656 vstx $vr22, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 64 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2672 + lu12i.w $t1, 2 + ori $t1, $t1, 64 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 48 @@ -206052,11 +206024,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2704 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 528 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2720 + lu12i.w $t1, 2 + ori $t1, $t1, 528 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 32 @@ -206100,10 +206072,10 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2848 + lu12i.w $t1, 2 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 4080 @@ -206129,17 +206101,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2912 vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 480 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2928 + lu12i.w $t1, 2 + ori $t1, $t1, 480 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1168 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2944 + lu12i.w $t1, 2 + ori $t1, $t1, 1168 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 464 @@ -206176,11 +206148,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr13, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3040 vstx $vr13, $a4, $a7 - lu12i.w $a4, 1 - ori $a4, $a4, 3408 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 3056 + lu12i.w $t1, 1 + ori $t1, $t1, 3408 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 4032 @@ -206405,11 +206377,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3728 vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 960 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3744 + lu12i.w $a3, 2 + ori $a3, $a3, 960 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 944 @@ -206417,11 +206389,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3760 vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 928 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 + lu12i.w $a3, 2 + ori $a3, $a3, 928 + add.d $a3, $sp, $a3 + vld $vr0, $a3, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 1744 @@ -207482,11 +207454,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $s8, $a7 ori $a0, $zero, 2080 vstx $vr8, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2096 + lu12i.w $a2, 1 + ori $a2, $a2, 3632 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 144 @@ -207507,11 +207479,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a0, $a7 ori $a0, $zero, 2160 vstx $vr7, $a0, $a7 + ori $s6, $zero, 2176 lu12i.w $a0, 1 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2176 vstx $vr0, $s6, $a7 ori $a0, $zero, 2192 lu12i.w $a2, 2 @@ -207521,11 +207493,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a0, $a7 ori $a0, $zero, 2208 vstx $vr10, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 112 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2224 + lu12i.w $a2, 2 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2240 lu12i.w $a2, 2 @@ -207598,11 +207570,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr4, $a2, 0 # 16-byte Folded Reload vstx $vr4, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3648 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2512 + lu12i.w $a2, 1 + ori $a2, $a2, 3648 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2528 vstx $vr6, $a0, $a7 @@ -207640,11 +207612,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t7, $a7 + ori $ra, $zero, 2688 lu12i.w $a0, 2 ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 2688 vstx $vr0, $ra, $a7 ori $a0, $zero, 2704 lu12i.w $a2, 2 @@ -207705,47 +207677,47 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 4080 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2864 + lu12i.w $a2, 1 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 4064 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2880 + lu12i.w $a2, 1 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2896 + lu12i.w $a2, 1 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 496 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2912 + lu12i.w $a2, 2 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 480 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2928 + lu12i.w $a2, 2 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1168 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2944 + lu12i.w $a2, 2 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 464 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2960 + lu12i.w $a2, 2 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2976 lu12i.w $a2, 2 @@ -207789,29 +207761,29 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr12, $a0, $a7 ori $a0, $zero, 3104 vstx $vr9, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3120 + lu12i.w $a2, 1 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1856 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3136 + lu12i.w $a2, 2 + ori $a2, $a2, 1856 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3152 + lu12i.w $a2, 2 + ori $a2, $a2, 1840 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1824 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3168 + lu12i.w $a2, 2 + ori $a2, $a2, 1824 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 1120 @@ -207934,11 +207906,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr9, $a4, 0 # 16-byte Folded Reload vstx $vr9, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 976 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3552 + lu12i.w $a4, 2 + ori $a4, $a4, 976 + add.d $a4, $sp, $a4 + vld $vr1, $a4, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 ori $a0, $zero, 3568 lu12i.w $a4, 2 @@ -209114,11 +209086,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $s7, $sp, $s7 vld $vr1, $s7, 0 # 16-byte Folded Reload vstx $vr1, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 144 - add.d $a4, $sp, $a4 - vld $vr1, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2112 + lu12i.w $s7, 2 + ori $s7, $s7, 144 + add.d $s7, $sp, $s7 + vld $vr1, $s7, 0 # 16-byte Folded Reload vstx $vr1, $a4, $a7 lu12i.w $a4, 2 ori $a4, $a4, 640 @@ -209343,11 +209315,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr21, $a4, $a7 ori $a4, $zero, 2816 vstx $vr23, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1184 - add.d $a4, $sp, $a4 - vld $vr1, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2832 + lu12i.w $t3, 2 + ori $t3, $t3, 1184 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vstx $vr1, $a4, $a7 lu12i.w $a4, 2 add.d $a4, $sp, $a4 @@ -209410,11 +209382,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a4, $sp, $a4 vld $vr29, $a4, 0 # 16-byte Folded Reload vstx $vr29, $a3, $a7 - lu12i.w $a3, 2 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload ori $a3, $zero, 3024 + lu12i.w $a4, 2 + ori $a4, $a4, 1136 + add.d $a4, $sp, $a4 + vld $vr1, $a4, 0 # 16-byte Folded Reload vstx $vr1, $a3, $a7 lu12i.w $a3, 1 ori $a3, $a3, 3424 @@ -209532,11 +209504,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr17, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3472 vstx $vr17, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 992 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3488 + lu12i.w $a2, 2 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 ori $ra, $zero, 3488 ori $a1, $zero, 3504 @@ -209591,11 +209563,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3744 vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 944 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3760 + lu12i.w $a4, 2 + ori $a4, $a4, 944 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 928 @@ -209603,11 +209575,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 vstx $vr0, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1744 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3792 + lu12i.w $a4, 2 + ori $a4, $a4, 1744 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 912 @@ -210671,11 +210643,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 lu12i.w $a0, 12 ori $a0, $a0, 3088 add.d $a7, $sp, $a0 - lu12i.w $a0, 2 - ori $a0, $a0, 656 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2048 + lu12i.w $a2, 2 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 ori $a0, $zero, 2064 lu12i.w $a2, 1 @@ -210701,11 +210673,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a6, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 640 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2128 + lu12i.w $a2, 2 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 624 @@ -210947,11 +210919,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2768 vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2784 + lu12i.w $a2, 2 + ori $a2, $a2, 1872 + add.d $a2, $sp, $a2 + vld $vr1, $a2, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 512 @@ -211081,11 +211053,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $s3, $a7 ori $s4, $zero, 3184 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3200 + lu12i.w $s3, 2 + ori $s3, $s3, 1104 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 ori $a0, $zero, 3216 lu12i.w $s3, 2 @@ -211093,61 +211065,61 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $s3, $sp, $s3 vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1808 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3232 + lu12i.w $s3, 2 + ori $s3, $s3, 1808 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1792 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3248 + lu12i.w $s3, 2 + ori $s3, $s3, 1792 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 3072 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3264 + lu12i.w $s3, 2 + ori $s3, $s3, 3072 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 3056 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3280 + lu12i.w $s3, 2 + ori $s3, $s3, 3056 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1776 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3296 + lu12i.w $s3, 2 + ori $s3, $s3, 1776 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1072 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3312 + lu12i.w $s3, 2 + ori $s3, $s3, 1072 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 4000 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3328 + lu12i.w $s3, 1 + ori $s3, $s3, 4000 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1056 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3344 + lu12i.w $s3, 2 + ori $s3, $s3, 1056 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 ori $a0, $zero, 3360 vstx $vr24, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 1040 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3376 + lu12i.w $s3, 2 + ori $s3, $s3, 1040 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 lu12i.w $a0, 1 ori $a0, $a0, 3984 @@ -211195,11 +211167,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr25, $a0, $a7 vstx $vr16, $s2, $a7 ori $s2, $zero, 3520 - lu12i.w $a0, 2 - ori $a0, $a0, 368 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3536 + lu12i.w $s3, 2 + ori $s3, $s3, 368 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 ori $a0, $zero, 3552 lu12i.w $s3, 2 @@ -211219,11 +211191,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $t7, $a7 ori $t7, $zero, 3584 - lu12i.w $a0, 1 - ori $a0, $a0, 3904 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3600 + lu12i.w $s3, 1 + ori $s3, $s3, 3904 + add.d $s3, $sp, $s3 + vld $vr1, $s3, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 336 @@ -211273,17 +211245,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3728 vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 960 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3744 + lu12i.w $s5, 2 + ori $s5, $s5, 960 + add.d $s5, $sp, $s5 + vld $vr1, $s5, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 944 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3760 + lu12i.w $s5, 2 + ori $s5, $s5, 944 + add.d $s5, $sp, $s5 + vld $vr1, $s5, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 lu12i.w $a0, 2 ori $a0, $a0, 928 @@ -211297,11 +211269,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $s5, $sp, $s5 vld $vr1, $s5, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 - lu12i.w $a0, 2 - ori $a0, $a0, 912 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3808 + lu12i.w $s5, 2 + ori $s5, $s5, 912 + add.d $s5, $sp, $s5 + vld $vr1, $s5, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 ori $a0, $zero, 3824 vstx $vr10, $a0, $a7 @@ -212374,11 +212346,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a6, $sp, $a6 vld $vr1, $a6, 0 # 16-byte Folded Reload vstx $vr1, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 624 - add.d $a4, $sp, $a4 - vld $vr1, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2144 + lu12i.w $a6, 2 + ori $a6, $a6, 624 + add.d $a6, $sp, $a6 + vld $vr1, $a6, 0 # 16-byte Folded Reload vstx $vr1, $a4, $a7 ori $a4, $zero, 2160 vstx $vr0, $a4, $a7 @@ -212474,11 +212446,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr9, $a4, $a7 ori $a4, $zero, 2480 vstx $vr12, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1232 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2496 + lu12i.w $a6, 2 + ori $a6, $a6, 1232 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3648 @@ -212488,11 +212460,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr3, $a4, $a7 ori $a4, $zero, 2528 vstx $vr13, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 1904 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2544 + lu12i.w $a6, 2 + ori $a6, $a6, 1904 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 lu12i.w $a4, 1 ori $a4, $a4, 3488 @@ -212512,11 +212484,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr18, $a4, $a7 ori $a4, $zero, 2624 vstx $vr19, $a4, $a7 - lu12i.w $a4, 2 - ori $a4, $a4, 544 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload ori $a4, $zero, 2640 + lu12i.w $a6, 2 + ori $a6, $a6, 544 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a4, $a7 ori $a4, $zero, 2656 vstx $vr20, $a4, $a7 @@ -212801,11 +212773,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr24, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3552 vstx $vr24, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3568 + lu12i.w $a4, 2 + ori $a4, $a4, 352 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 1 ori $a2, $a2, 3920 @@ -212823,11 +212795,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 # 16-byte Folded Reload vstx $vr23, $s3, $a7 - lu12i.w $a2, 1 - ori $a2, $a2, 3888 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 + lu12i.w $a4, 1 + ori $a4, $a4, 3888 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 1760 @@ -212874,17 +212846,17 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 928 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3776 + lu12i.w $a2, 2 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1744 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 3792 + lu12i.w $a2, 2 + ori $a2, $a2, 1744 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 ori $a1, $zero, 3808 lu12i.w $a2, 2 @@ -213938,14 +213910,14 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 fst.d $fa0, $a0, 0 # 8-byte Folded Spill - lu12i.w $a0, 2 - ori $a0, $a0, 656 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3088 add.d $a7, $sp, $a0 ori $a1, $zero, 2048 + lu12i.w $a0, 2 + ori $a0, $a0, 656 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 ori $a2, $zero, 2064 lu12i.w $a0, 1 @@ -214274,11 +214246,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr19, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3072 vstx $vr19, $a0, $a7 - lu12i.w $a0, 1 - ori $a0, $a0, 3392 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3088 + lu12i.w $a4, 1 + ori $a4, $a4, 3392 + add.d $a4, $sp, $a4 + vld $vr1, $a4, 0 # 16-byte Folded Reload vstx $vr1, $a0, $a7 vstx $vr31, $s5, $a7 vstx $vr13, $t0, $a7 @@ -215626,11 +215598,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2256 vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1920 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2272 + lu12i.w $a2, 2 + ori $a2, $a2, 1920 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 lu12i.w $a1, 2 ori $a1, $a1, 1264 @@ -215638,11 +215610,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2288 vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 1248 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2304 + lu12i.w $a2, 2 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 lu12i.w $a1, 2 ori $a1, $a1, 592 @@ -215650,11 +215622,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2320 vstx $vr0, $a1, $a7 - lu12i.w $a1, 2 - ori $a1, $a1, 576 - add.d $a1, $sp, $a1 - vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2336 + lu12i.w $a2, 2 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $a1, $a7 ori $a1, $zero, 2352 vstx $vr22, $a1, $a7 @@ -215971,11 +215943,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vstx $vr0, $a2, $a7 ori $a2, $zero, 3328 vstx $vr15, $a2, $a7 - lu12i.w $a2, 2 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 + lu12i.w $a4, 2 + ori $a4, $a4, 1056 + add.d $a4, $sp, $a4 + vld $vr0, $a4, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a7 lu12i.w $a2, 2 ori $a2, $a2, 416 @@ -217181,11 +217153,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2080 vstx $vr3, $a2, $a0 - lu12i.w $a2, 1 - ori $a2, $a2, 3632 - add.d $a2, $sp, $a2 - vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2096 + lu12i.w $a3, 1 + ori $a3, $a3, 3632 + add.d $a3, $sp, $a3 + vld $vr3, $a3, 0 # 16-byte Folded Reload vstx $vr3, $a2, $a0 ori $a2, $zero, 2112 lu12i.w $a3, 2 @@ -217236,11 +217208,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a3, $zero, 2224 vstx $vr3, $a3, $a0 + ori $a3, $zero, 2240 lu12i.w $a2, 2 ori $a2, $a2, 1280 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 2240 vstx $vr3, $a3, $a0 lu12i.w $a2, 2 ori $a2, $a2, 608 @@ -217254,11 +217226,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload vstx $vr3, $a3, $a0 + ori $a3, $zero, 2288 lu12i.w $a2, 2 ori $a2, $a2, 1264 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 2288 vstx $vr3, $a3, $a0 ori $a3, $zero, 2304 lu12i.w $a2, 2 @@ -217266,11 +217238,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload vstx $vr3, $a3, $a0 + ori $a3, $zero, 2320 lu12i.w $a2, 2 ori $a2, $a2, 592 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 2320 vstx $vr3, $a3, $a0 ori $a3, $zero, 2336 lu12i.w $a2, 2 @@ -217448,11 +217420,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a3, $zero, 2800 vstx $vr3, $a3, $a0 + ori $a3, $zero, 2816 lu12i.w $a2, 1 ori $a2, $a2, 3440 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 2816 vstx $vr3, $a3, $a0 ori $a3, $zero, 2832 lu12i.w $a2, 2 @@ -217460,10 +217432,10 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload vstx $vr3, $a3, $a0 + ori $a3, $zero, 2848 lu12i.w $a2, 2 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 2848 vstx $vr3, $a3, $a0 lu12i.w $a2, 1 ori $a2, $a2, 4080 @@ -217528,11 +217500,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a3, $zero, 3024 vstx $vr3, $a3, $a0 + ori $a3, $zero, 3040 lu12i.w $a2, 1 ori $a2, $a2, 3424 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a3, $zero, 3040 vstx $vr3, $a3, $a0 ori $a3, $zero, 3056 vstx $vr11, $a3, $a0 @@ -217627,11 +217599,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a7, $zero, 3312 vstx $vr3, $a7, $a0 + ori $a7, $zero, 3328 lu12i.w $a2, 1 ori $a2, $a2, 4000 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload - ori $a7, $zero, 3328 vstx $vr3, $a7, $a0 ori $a7, $zero, 3344 lu12i.w $a2, 2 @@ -220340,18 +220312,6 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3856 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr0, $vr1, 16 - lu12i.w $a0, 7 - ori $a0, $a0, 1056 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload @@ -220360,7 +220320,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1072 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220372,7 +220332,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1088 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220384,7 +220344,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1104 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220396,7 +220356,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1120 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220408,7 +220368,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1136 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220420,7 +220380,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1152 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220432,7 +220392,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1168 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220444,7 +220404,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1184 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220456,7 +220416,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1200 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220468,7 +220428,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1216 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220480,7 +220440,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1232 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220492,7 +220452,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1248 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220504,7 +220464,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1264 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220516,7 +220476,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1280 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220528,7 +220488,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1296 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220541,7 +220501,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1312 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220554,7 +220514,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1328 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220567,7 +220527,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1344 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220580,7 +220540,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1360 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220593,7 +220553,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1376 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220606,7 +220566,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1392 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220619,7 +220579,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1408 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220632,7 +220592,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1424 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220645,7 +220605,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1440 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220658,7 +220618,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1456 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220671,7 +220631,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1472 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220684,7 +220644,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1488 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220697,7 +220657,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1504 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220710,7 +220670,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1520 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220723,7 +220683,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1536 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220736,7 +220696,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1552 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220749,7 +220709,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1568 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220762,7 +220722,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1584 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220775,7 +220735,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1600 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220788,7 +220748,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1616 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220801,7 +220761,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1632 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220814,7 +220774,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1648 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220827,7 +220787,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1664 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220840,7 +220800,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1680 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220853,7 +220813,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1696 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220866,7 +220826,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1712 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220879,7 +220839,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1728 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220892,7 +220852,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1744 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220905,7 +220865,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1760 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220918,7 +220878,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1776 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220931,7 +220891,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1792 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220944,7 +220904,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1808 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220957,7 +220917,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1824 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220970,7 +220930,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1840 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220983,7 +220943,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1856 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -220996,7 +220956,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1872 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221009,7 +220969,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1888 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221022,7 +220982,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1904 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221035,7 +220995,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1920 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221048,7 +221008,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1936 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221061,7 +221021,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1952 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221074,7 +221034,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1968 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221087,7 +221047,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 1984 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221100,7 +221060,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2000 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221113,7 +221073,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2016 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221126,7 +221086,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2032 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221139,7 +221099,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2048 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221152,7 +221112,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2064 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221165,7 +221125,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2080 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221178,7 +221138,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2096 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221191,7 +221151,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2112 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221204,7 +221164,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2128 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221217,7 +221177,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2144 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221230,7 +221190,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2160 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221243,7 +221203,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2176 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221256,7 +221216,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2192 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221269,7 +221229,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2208 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221282,7 +221242,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2224 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221295,7 +221255,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2240 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221308,7 +221268,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2256 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221321,7 +221281,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2272 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221334,7 +221294,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2288 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221347,7 +221307,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2304 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221360,7 +221320,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2320 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221373,7 +221333,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2336 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221386,7 +221346,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2352 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221399,7 +221359,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2368 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221412,11 +221372,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2384 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 @@ -221425,11 +221385,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2400 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 @@ -221438,7 +221398,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 - ori $a0, $a0, 2416 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 @@ -221451,11 +221411,24 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $a0, 7 + ori $a0, $a0, 2416 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 1360 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1152 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr0, $vr1, 16 + lu12i.w $a0, 7 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3392 @@ -221467,7 +221440,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3424 @@ -221479,11 +221452,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 @@ -221492,11 +221465,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 @@ -221505,11 +221478,11 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 @@ -221518,7 +221491,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3408 @@ -221541,7 +221514,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3488 @@ -221553,7 +221526,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3520 @@ -221565,7 +221538,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3552 @@ -221577,7 +221550,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3584 @@ -221589,7 +221562,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3616 @@ -221601,7 +221574,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3648 @@ -221613,7 +221586,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3680 @@ -221625,7 +221598,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3456 @@ -221637,7 +221610,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3472 @@ -221649,7 +221622,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3504 @@ -221661,7 +221634,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3536 @@ -221673,7 +221646,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3568 @@ -221687,8 +221660,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 @@ -221899,7 +221871,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3744 @@ -221911,7 +221883,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3760 @@ -221923,7 +221895,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3792 @@ -221935,7 +221907,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3808 @@ -239358,7 +239330,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 0 @@ -239368,7 +239340,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr4, $vr1, 0 @@ -239378,7 +239350,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr6, $vr0, 0 @@ -239388,7 +239360,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr7, $vr1, 0 @@ -239415,8 +239387,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr10, $vr1, 0 @@ -239426,7 +239397,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr11, $vr0, 0 @@ -239436,7 +239407,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr12, $vr1, 0 @@ -239446,7 +239417,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr13, $vr0, 0 @@ -239456,7 +239427,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr16, $vr1, 0 @@ -239466,7 +239437,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr19, $vr0, 0 @@ -239476,7 +239447,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr20, $vr1, 0 @@ -239486,7 +239457,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr21, $vr0, 0 @@ -239496,7 +239467,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr1, 0 @@ -239506,7 +239477,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr24, $vr0, 0 @@ -239516,7 +239487,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr25, $vr1, 0 @@ -239526,7 +239497,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr26, $vr0, 0 @@ -239536,7 +239507,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr29, $vr1, 0 @@ -239553,7 +239524,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vreplvei.d $vr18, $vr1, 1 vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239562,12 +239533,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239576,12 +239547,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239590,12 +239561,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239605,7 +239576,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vreplvei.d $vr14, $vr1, 1 vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239615,7 +239586,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vreplvei.d $vr15, $vr0, 1 vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239624,12 +239595,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239638,12 +239609,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239652,12 +239623,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239666,12 +239637,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239680,12 +239651,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239694,12 +239665,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239708,12 +239679,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1040 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239722,12 +239693,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239736,12 +239707,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239750,12 +239721,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239764,12 +239735,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239778,12 +239749,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239792,12 +239763,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239806,12 +239777,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239820,12 +239791,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239834,12 +239805,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239848,12 +239819,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239862,12 +239833,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239876,12 +239847,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239890,12 +239861,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239904,12 +239875,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239918,12 +239889,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239932,12 +239903,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 3 @@ -239945,12 +239916,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -239959,12 +239930,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -239973,12 +239944,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -239987,12 +239958,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240001,12 +239972,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240015,12 +239986,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240029,12 +240000,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240043,12 +240014,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240057,12 +240028,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240071,12 +240042,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240085,12 +240056,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240099,12 +240070,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240113,12 +240084,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240127,12 +240098,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240141,12 +240112,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240155,12 +240126,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2336 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240169,12 +240140,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2320 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240183,12 +240154,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240197,12 +240168,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240211,12 +240182,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240225,12 +240196,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240239,12 +240210,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240253,12 +240224,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240267,12 +240238,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240281,12 +240252,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240295,12 +240266,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2176 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240309,12 +240280,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240323,12 +240294,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240337,12 +240308,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240351,12 +240322,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240365,12 +240336,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240379,12 +240350,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240393,12 +240364,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240407,12 +240378,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240421,12 +240392,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240435,12 +240406,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240449,12 +240420,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240463,12 +240434,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240477,12 +240448,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 160 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240491,12 +240462,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240505,12 +240476,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240519,12 +240490,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240533,12 +240504,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240547,12 +240518,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 80 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240561,12 +240532,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240575,12 +240546,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240589,12 +240560,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240603,12 +240574,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 lu12i.w $a0, 1 - ori $a0, $a0, 16 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240617,11 +240588,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 lu12i.w $a0, 1 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240629,12 +240601,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 4080 + lu12i.w $a0, 1 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240642,12 +240614,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 4064 + ori $a0, $zero, 4080 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240655,12 +240627,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 4048 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240668,12 +240640,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 4032 + ori $a0, $zero, 4048 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240681,12 +240653,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 4016 + ori $a0, $zero, 4032 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240694,12 +240666,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 4000 + ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240707,12 +240679,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 3984 + ori $a0, $zero, 4000 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240720,12 +240692,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 3968 + ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240733,12 +240705,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 3952 + ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240746,12 +240718,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 3936 + ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240759,12 +240731,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 3920 + ori $a0, $zero, 3936 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240772,12 +240744,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 3904 + ori $a0, $zero, 3920 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240785,12 +240757,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 vreplvei.d $vr2, $vr1, 1 - ori $a0, $zero, 3888 + ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240798,7 +240770,7 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 vreplvei.d $vr2, $vr0, 1 - ori $a0, $zero, 3872 + ori $a0, $zero, 3888 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 2 @@ -240807,16 +240779,16 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr2, $a0, 0 vreplvei.d $vr0, $vr0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 - ori $a0, $zero, 3856 + ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr2, 1 @@ -240827,1248 +240799,1248 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 beq $a1, $a0, .LBB15_2 b .LBB15_1 .LBB15_2: + ori $a0, $zero, 3920 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr5, $vr1, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 1632 + add.d $a0, $sp, $a0 + vst $vr5, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3904 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1616 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload vextrins.d $vr5, $vr1, 16 lu12i.w $a0, 1 ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 3888 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3888 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr5, $vr1, 16 lu12i.w $a0, 1 ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1584 - add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3872 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr5, $vr1, 16 lu12i.w $a0, 1 ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3856 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr5, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill vextrins.d $vr2, $vr0, 16 ori $a0, $zero, 3840 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4000 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 1712 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1696 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 3968 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3968 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 3952 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3952 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 3936 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3936 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4080 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 3920 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4064 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4064 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4048 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4048 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4032 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4032 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 4016 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4016 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1712 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4000 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1824 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1792 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4080 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1936 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1920 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1888 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2016 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1968 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2096 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2048 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2176 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2128 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2256 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2208 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2336 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2320 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2288 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2416 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2368 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2496 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2480 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2448 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2576 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2528 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2656 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 832 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2608 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2736 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2720 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2704 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2688 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2816 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2784 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 2768 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2896 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 2832 - add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 1 - ori $a0, $a0, 1024 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr14, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr15, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr5, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr15, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr14, $vr0, 16 vextrins.d $vr31, $vr17, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr18, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr18, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr17, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr23, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr24, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr25, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr26, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr29, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr13, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr16, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr19, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr20, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr21, $vr0, 16 vextrins.d $vr9, $vr27, 16 vextrins.d $vr30, $vr28, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr10, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr11, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr12, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr3, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr4, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr6, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr7, $vr0, 16 @@ -242079,422 +242051,422 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 0 lu12i.w $a1, 1 - ori $a1, $a1, 1568 + ori $a1, $a1, 1584 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 16 lu12i.w $a1, 1 - ori $a1, $a1, 1584 + ori $a1, $a1, 1600 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 32 lu12i.w $a1, 1 - ori $a1, $a1, 1600 + ori $a1, $a1, 1616 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 48 lu12i.w $a1, 1 - ori $a1, $a1, 1616 + ori $a1, $a1, 1632 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 64 lu12i.w $a1, 1 - ori $a1, $a1, 1632 + ori $a1, $a1, 1648 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 80 lu12i.w $a1, 1 - ori $a1, $a1, 1648 + ori $a1, $a1, 1664 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 96 lu12i.w $a1, 1 - ori $a1, $a1, 1664 + ori $a1, $a1, 1680 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 112 lu12i.w $a1, 1 - ori $a1, $a1, 1680 + ori $a1, $a1, 1696 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 128 lu12i.w $a1, 1 - ori $a1, $a1, 1696 + ori $a1, $a1, 1712 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 144 lu12i.w $a1, 1 - ori $a1, $a1, 1712 + ori $a1, $a1, 1728 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 160 lu12i.w $a1, 1 - ori $a1, $a1, 1728 + ori $a1, $a1, 1744 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 176 lu12i.w $a1, 1 - ori $a1, $a1, 1744 + ori $a1, $a1, 1760 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 192 lu12i.w $a1, 1 - ori $a1, $a1, 1760 + ori $a1, $a1, 1776 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 208 lu12i.w $a1, 1 - ori $a1, $a1, 1776 + ori $a1, $a1, 1792 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 224 lu12i.w $a1, 1 - ori $a1, $a1, 1792 + ori $a1, $a1, 1808 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 240 lu12i.w $a1, 1 - ori $a1, $a1, 1808 + ori $a1, $a1, 1824 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 256 lu12i.w $a1, 1 - ori $a1, $a1, 1824 + ori $a1, $a1, 1840 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 272 lu12i.w $a1, 1 - ori $a1, $a1, 1840 + ori $a1, $a1, 1856 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 288 lu12i.w $a1, 1 - ori $a1, $a1, 1856 + ori $a1, $a1, 1872 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 304 lu12i.w $a1, 1 - ori $a1, $a1, 1872 + ori $a1, $a1, 1888 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 320 lu12i.w $a1, 1 - ori $a1, $a1, 1888 + ori $a1, $a1, 1904 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 336 lu12i.w $a1, 1 - ori $a1, $a1, 1904 + ori $a1, $a1, 1920 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 352 lu12i.w $a1, 1 - ori $a1, $a1, 1920 + ori $a1, $a1, 1936 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 368 lu12i.w $a1, 1 - ori $a1, $a1, 1936 + ori $a1, $a1, 1952 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 384 lu12i.w $a1, 1 - ori $a1, $a1, 1952 + ori $a1, $a1, 1968 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 400 lu12i.w $a1, 1 - ori $a1, $a1, 1968 + ori $a1, $a1, 1984 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 416 lu12i.w $a1, 1 - ori $a1, $a1, 1984 + ori $a1, $a1, 2000 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 432 lu12i.w $a1, 1 - ori $a1, $a1, 2000 + ori $a1, $a1, 2016 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 448 lu12i.w $a1, 1 - ori $a1, $a1, 2016 + ori $a1, $a1, 2032 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 464 lu12i.w $a1, 1 - ori $a1, $a1, 2032 + ori $a1, $a1, 2048 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 480 lu12i.w $a1, 1 - ori $a1, $a1, 2048 + ori $a1, $a1, 2064 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 496 lu12i.w $a1, 1 - ori $a1, $a1, 2064 + ori $a1, $a1, 2080 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 512 lu12i.w $a1, 1 - ori $a1, $a1, 2080 + ori $a1, $a1, 2096 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 528 lu12i.w $a1, 1 - ori $a1, $a1, 2096 + ori $a1, $a1, 2112 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 544 lu12i.w $a1, 1 - ori $a1, $a1, 2112 + ori $a1, $a1, 2128 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 560 lu12i.w $a1, 1 - ori $a1, $a1, 2128 + ori $a1, $a1, 2144 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 576 lu12i.w $a1, 1 - ori $a1, $a1, 2144 + ori $a1, $a1, 2160 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 592 lu12i.w $a1, 1 - ori $a1, $a1, 2160 + ori $a1, $a1, 2176 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 608 lu12i.w $a1, 1 - ori $a1, $a1, 2176 + ori $a1, $a1, 2192 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 624 lu12i.w $a1, 1 - ori $a1, $a1, 2192 + ori $a1, $a1, 2208 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 640 lu12i.w $a1, 1 - ori $a1, $a1, 2208 + ori $a1, $a1, 2224 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 656 lu12i.w $a1, 1 - ori $a1, $a1, 2224 + ori $a1, $a1, 2240 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 672 lu12i.w $a1, 1 - ori $a1, $a1, 2240 + ori $a1, $a1, 2256 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 688 lu12i.w $a1, 1 - ori $a1, $a1, 2256 + ori $a1, $a1, 2272 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 704 lu12i.w $a1, 1 - ori $a1, $a1, 2272 + ori $a1, $a1, 2288 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 720 lu12i.w $a1, 1 - ori $a1, $a1, 2288 + ori $a1, $a1, 2304 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 736 lu12i.w $a1, 1 - ori $a1, $a1, 2304 + ori $a1, $a1, 2320 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 752 lu12i.w $a1, 1 - ori $a1, $a1, 2320 + ori $a1, $a1, 2336 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 768 lu12i.w $a1, 1 - ori $a1, $a1, 2336 + ori $a1, $a1, 2352 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 784 lu12i.w $a1, 1 - ori $a1, $a1, 2352 + ori $a1, $a1, 2368 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 800 lu12i.w $a1, 1 - ori $a1, $a1, 2368 + ori $a1, $a1, 2384 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 816 lu12i.w $a1, 1 - ori $a1, $a1, 2384 + ori $a1, $a1, 2400 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 832 lu12i.w $a1, 1 - ori $a1, $a1, 2400 + ori $a1, $a1, 2416 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 848 lu12i.w $a1, 1 - ori $a1, $a1, 2416 + ori $a1, $a1, 2432 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 864 lu12i.w $a1, 1 - ori $a1, $a1, 2432 + ori $a1, $a1, 2448 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 880 lu12i.w $a1, 1 - ori $a1, $a1, 2448 + ori $a1, $a1, 2464 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 896 lu12i.w $a1, 1 - ori $a1, $a1, 2464 + ori $a1, $a1, 2480 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 912 lu12i.w $a1, 1 - ori $a1, $a1, 2480 + ori $a1, $a1, 2496 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 928 lu12i.w $a1, 1 - ori $a1, $a1, 2496 + ori $a1, $a1, 2512 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 944 lu12i.w $a1, 1 - ori $a1, $a1, 2512 + ori $a1, $a1, 2528 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 960 lu12i.w $a1, 1 - ori $a1, $a1, 2528 + ori $a1, $a1, 2544 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 976 lu12i.w $a1, 1 - ori $a1, $a1, 2544 + ori $a1, $a1, 2560 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 992 lu12i.w $a1, 1 - ori $a1, $a1, 2560 + ori $a1, $a1, 2576 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1008 lu12i.w $a1, 1 - ori $a1, $a1, 2576 + ori $a1, $a1, 2592 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1024 lu12i.w $a1, 1 - ori $a1, $a1, 2592 + ori $a1, $a1, 2608 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1040 lu12i.w $a1, 1 - ori $a1, $a1, 2608 + ori $a1, $a1, 2624 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1056 lu12i.w $a1, 1 - ori $a1, $a1, 2624 + ori $a1, $a1, 2640 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1072 lu12i.w $a1, 1 - ori $a1, $a1, 2640 + ori $a1, $a1, 2656 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1088 lu12i.w $a1, 1 - ori $a1, $a1, 2656 + ori $a1, $a1, 2672 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1104 lu12i.w $a1, 1 - ori $a1, $a1, 2672 + ori $a1, $a1, 2688 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1120 lu12i.w $a1, 1 - ori $a1, $a1, 2688 + ori $a1, $a1, 2704 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1136 lu12i.w $a1, 1 - ori $a1, $a1, 2704 + ori $a1, $a1, 2720 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1152 lu12i.w $a1, 1 - ori $a1, $a1, 2720 + ori $a1, $a1, 2736 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1168 lu12i.w $a1, 1 - ori $a1, $a1, 2736 + ori $a1, $a1, 2752 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1184 lu12i.w $a1, 1 - ori $a1, $a1, 2752 + ori $a1, $a1, 2768 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1200 lu12i.w $a1, 1 - ori $a1, $a1, 2768 + ori $a1, $a1, 2784 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1216 lu12i.w $a1, 1 - ori $a1, $a1, 2784 + ori $a1, $a1, 2800 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1232 lu12i.w $a1, 1 - ori $a1, $a1, 2800 + ori $a1, $a1, 2816 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1248 lu12i.w $a1, 1 - ori $a1, $a1, 2816 + ori $a1, $a1, 2832 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1264 lu12i.w $a1, 1 - ori $a1, $a1, 2832 + ori $a1, $a1, 2848 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1280 lu12i.w $a1, 1 - ori $a1, $a1, 2848 + ori $a1, $a1, 2864 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1296 lu12i.w $a1, 1 - ori $a1, $a1, 2864 + ori $a1, $a1, 2880 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1312 lu12i.w $a1, 1 - ori $a1, $a1, 2880 + ori $a1, $a1, 2896 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1328 lu12i.w $a1, 1 - ori $a1, $a1, 2896 + ori $a1, $a1, 2912 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1344 @@ -242502,12 +242474,12 @@ _Z12multiplySpecIdLj10ELj21ELj23EEvPT_S1_S1_: # @_Z12multiplySpecIdLj10ELj21ELj2 vst $vr15, $a0, 1376 vst $vr5, $a0, 1392 lu12i.w $a1, 1 - ori $a1, $a1, 2912 + ori $a1, $a1, 2928 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1408 lu12i.w $a1, 1 - ori $a1, $a1, 2928 + ori $a1, $a1, 2960 add.d $a1, $sp, $a1 vld $vr0, $a1, 0 # 16-byte Folded Reload vst $vr0, $a0, 1424 @@ -242590,51 +242562,48 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 fst.d $fs6, $sp, 1888 # 8-byte Folded Spill fst.d $fs7, $sp, 1880 # 8-byte Folded Spill lu12i.w $a3, 31 - ori $a3, $a3, 2128 + ori $a3, $a3, 2112 sub.d $sp, $sp, $a3 - move $a7, $a2 + move $a6, $a2 move $a2, $a1 st.d $a0, $sp, 16 # 8-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 2184 - add.d $a0, $sp, $a0 - st.d $zero, $a0, 0 # 8-byte Folded Spill + st.d $zero, $sp, 1864 # 8-byte Folded Spill move $t6, $zero - fld.d $fs6, $a7, 144 - vld $vr12, $a7, 0 - vld $vr13, $a7, 16 - vld $vr14, $a7, 32 - vld $vr15, $a7, 48 - vld $vr16, $a7, 64 - vld $vr17, $a7, 80 - vld $vr18, $a7, 96 - vld $vr19, $a7, 112 - vld $vr20, $a7, 128 - fld.d $fa5, $a7, 296 - vld $vr21, $a7, 152 - vld $vr22, $a7, 168 - vld $vr23, $a7, 184 - vld $vr24, $a7, 200 - vld $vr25, $a7, 216 - vld $vr26, $a7, 232 - vld $vr27, $a7, 248 - vld $vr28, $a7, 264 - vld $vr11, $a7, 280 - fld.d $fs7, $a7, 448 - vld $vr10, $a7, 304 - vld $vr9, $a7, 320 - vld $vr8, $a7, 336 - vld $vr7, $a7, 352 - vld $vr6, $a7, 368 - vld $vr4, $a7, 384 - vld $vr3, $a7, 400 - vld $vr2, $a7, 416 - vld $vr1, $a7, 432 - vld $vr0, $a7, 456 + fld.d $fs6, $a6, 144 + vld $vr12, $a6, 0 + vld $vr13, $a6, 16 + vld $vr14, $a6, 32 + vld $vr15, $a6, 48 + vld $vr16, $a6, 64 + vld $vr17, $a6, 80 + vld $vr18, $a6, 96 + vld $vr19, $a6, 112 + vld $vr20, $a6, 128 + fld.d $fa5, $a6, 296 + vld $vr21, $a6, 152 + vld $vr22, $a6, 168 + vld $vr23, $a6, 184 + vld $vr24, $a6, 200 + vld $vr25, $a6, 216 + vld $vr26, $a6, 232 + vld $vr27, $a6, 248 + vld $vr28, $a6, 264 + vld $vr11, $a6, 280 + fld.d $fs7, $a6, 448 + vld $vr10, $a6, 304 + vld $vr9, $a6, 320 + vld $vr8, $a6, 336 + vld $vr7, $a6, 352 + vld $vr6, $a6, 368 + vld $vr4, $a6, 384 + vld $vr3, $a6, 400 + vld $vr2, $a6, 416 + vld $vr1, $a6, 432 + vld $vr0, $a6, 456 vreplvei.d $vr29, $vr12, 1 vreplvei.d $vr12, $vr12, 0 vextrins.d $vr12, $vr29, 16 - vst $vr12, $sp, 1104 # 16-byte Folded Spill + vst $vr12, $sp, 496 # 16-byte Folded Spill vreplvei.d $vr12, $vr13, 1 vreplvei.d $vr13, $vr13, 0 vextrins.d $vr13, $vr12, 16 @@ -242646,86 +242615,86 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr12, $vr15, 1 vreplvei.d $vr13, $vr15, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1536 # 16-byte Folded Spill + vst $vr13, $sp, 1648 # 16-byte Folded Spill vreplvei.d $vr12, $vr16, 1 vreplvei.d $vr13, $vr16, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1520 # 16-byte Folded Spill + vst $vr13, $sp, 1168 # 16-byte Folded Spill vreplvei.d $vr12, $vr17, 1 vreplvei.d $vr13, $vr17, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 512 # 16-byte Folded Spill + vst $vr13, $sp, 480 # 16-byte Folded Spill vreplvei.d $vr12, $vr18, 1 vreplvei.d $vr13, $vr18, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1504 # 16-byte Folded Spill + vst $vr13, $sp, 1632 # 16-byte Folded Spill vreplvei.d $vr12, $vr19, 1 vreplvei.d $vr13, $vr19, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1088 # 16-byte Folded Spill + vst $vr13, $sp, 1152 # 16-byte Folded Spill vreplvei.d $vr12, $vr20, 1 vreplvei.d $vr13, $vr20, 0 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1488 # 16-byte Folded Spill + vst $vr13, $sp, 1136 # 16-byte Folded Spill vreplvei.d $vr12, $vr21, 0 vextrins.d $vr30, $vr12, 16 - vst $vr30, $sp, 528 # 16-byte Folded Spill + vst $vr30, $sp, 512 # 16-byte Folded Spill vreplvei.d $vr12, $vr22, 0 vreplvei.d $vr13, $vr21, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1072 # 16-byte Folded Spill + vst $vr13, $sp, 1120 # 16-byte Folded Spill vreplvei.d $vr12, $vr23, 0 vreplvei.d $vr13, $vr22, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 496 # 16-byte Folded Spill + vst $vr13, $sp, 464 # 16-byte Folded Spill vreplvei.d $vr12, $vr24, 0 vreplvei.d $vr13, $vr23, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1472 # 16-byte Folded Spill + vst $vr13, $sp, 1488 # 16-byte Folded Spill vreplvei.d $vr12, $vr25, 0 vreplvei.d $vr13, $vr24, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1056 # 16-byte Folded Spill + vst $vr13, $sp, 1104 # 16-byte Folded Spill vreplvei.d $vr12, $vr26, 0 vreplvei.d $vr13, $vr25, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1456 # 16-byte Folded Spill + vst $vr13, $sp, 1472 # 16-byte Folded Spill vreplvei.d $vr12, $vr27, 0 vreplvei.d $vr13, $vr26, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 480 # 16-byte Folded Spill + vst $vr13, $sp, 1088 # 16-byte Folded Spill vreplvei.d $vr12, $vr28, 0 vreplvei.d $vr13, $vr27, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1040 # 16-byte Folded Spill + vst $vr13, $sp, 1456 # 16-byte Folded Spill vreplvei.d $vr12, $vr11, 0 vreplvei.d $vr13, $vr28, 1 vextrins.d $vr13, $vr12, 16 - vst $vr13, $sp, 1024 # 16-byte Folded Spill - vld $vr12, $a7, 472 + vst $vr13, $sp, 1072 # 16-byte Folded Spill + vld $vr12, $a6, 472 vreplvei.d $vr11, $vr11, 1 vextrins.d $vr11, $vr5, 16 - vst $vr11, $sp, 1008 # 16-byte Folded Spill + vst $vr11, $sp, 1056 # 16-byte Folded Spill vreplvei.d $vr5, $vr10, 1 vreplvei.d $vr10, $vr10, 0 vextrins.d $vr10, $vr5, 16 - vst $vr10, $sp, 1440 # 16-byte Folded Spill + vst $vr10, $sp, 1040 # 16-byte Folded Spill vreplvei.d $vr5, $vr9, 1 vreplvei.d $vr9, $vr9, 0 vextrins.d $vr9, $vr5, 16 - vst $vr9, $sp, 1424 # 16-byte Folded Spill + vst $vr9, $sp, 1024 # 16-byte Folded Spill vreplvei.d $vr5, $vr8, 1 vreplvei.d $vr8, $vr8, 0 vextrins.d $vr8, $vr5, 16 - vst $vr8, $sp, 1408 # 16-byte Folded Spill + vst $vr8, $sp, 1008 # 16-byte Folded Spill vreplvei.d $vr5, $vr7, 1 vreplvei.d $vr7, $vr7, 0 vextrins.d $vr7, $vr5, 16 - vst $vr7, $sp, 1392 # 16-byte Folded Spill + vst $vr7, $sp, 1440 # 16-byte Folded Spill vreplvei.d $vr5, $vr6, 1 vreplvei.d $vr6, $vr6, 0 vextrins.d $vr6, $vr5, 16 - vst $vr6, $sp, 1376 # 16-byte Folded Spill + vst $vr6, $sp, 1424 # 16-byte Folded Spill vreplvei.d $vr5, $vr4, 1 vreplvei.d $vr4, $vr4, 0 vextrins.d $vr4, $vr5, 16 @@ -242737,378 +242706,378 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr2, 1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr3, 16 - vst $vr2, $sp, 1648 # 16-byte Folded Spill + vst $vr2, $sp, 1616 # 16-byte Folded Spill vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 1632 # 16-byte Folded Spill + vst $vr1, $sp, 1600 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 0 vextrins.d $vr31, $vr1, 16 - vst $vr31, $sp, 1552 # 16-byte Folded Spill - vld $vr1, $a7, 488 + vst $vr31, $sp, 1504 # 16-byte Folded Spill + vld $vr1, $a6, 488 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr12, 0 vextrins.d $vr2, $vr0, 16 - vst $vr2, $sp, 1360 # 16-byte Folded Spill + vst $vr2, $sp, 1584 # 16-byte Folded Spill vreplvei.d $vr3, $vr12, 1 - vld $vr0, $a7, 504 + vld $vr0, $a6, 504 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 1664 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 520 + vld $vr1, $a6, 520 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1616 # 16-byte Folded Spill + vst $vr3, $sp, 1568 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 536 + vld $vr0, $a6, 536 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1600 # 16-byte Folded Spill + vst $vr3, $sp, 1408 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 552 + vld $vr1, $a6, 552 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1344 # 16-byte Folded Spill + vst $vr3, $sp, 1392 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 568 + vld $vr0, $a6, 568 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 144 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 584 + vld $vr1, $a6, 584 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 128 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - fld.d $fa0, $a7, 600 + fld.d $fa0, $a6, 600 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 992 # 16-byte Folded Spill - vld $vr2, $a7, 608 + vld $vr2, $a6, 608 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr0, 16 - vst $vr1, $sp, 464 # 16-byte Folded Spill - vld $vr0, $a7, 624 + vst $vr1, $sp, 448 # 16-byte Folded Spill + vld $vr0, $a6, 624 vreplvei.d $vr1, $vr2, 1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 - vst $vr2, $sp, 1584 # 16-byte Folded Spill - vld $vr1, $a7, 640 + vst $vr2, $sp, 1552 # 16-byte Folded Spill + vld $vr1, $a6, 640 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 vst $vr0, $sp, 976 # 16-byte Folded Spill - vld $vr0, $a7, 656 + vld $vr0, $a6, 656 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 1328 # 16-byte Folded Spill - vld $vr1, $a7, 672 + vst $vr1, $sp, 960 # 16-byte Folded Spill + vld $vr1, $a6, 672 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 960 # 16-byte Folded Spill - vld $vr0, $a7, 688 + vst $vr0, $sp, 944 # 16-byte Folded Spill + vld $vr0, $a6, 688 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 1312 # 16-byte Folded Spill - vld $vr1, $a7, 704 + vst $vr1, $sp, 1376 # 16-byte Folded Spill + vld $vr1, $a6, 704 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 448 # 16-byte Folded Spill - vld $vr0, $a7, 720 + vst $vr0, $sp, 432 # 16-byte Folded Spill + vld $vr0, $a6, 720 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 432 # 16-byte Folded Spill - vld $vr1, $a7, 736 + vst $vr1, $sp, 416 # 16-byte Folded Spill + vld $vr1, $a6, 736 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 vst $vr0, $sp, 48 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr2, $vr1, 0 - vld $vr1, $a7, 760 - fld.d $fa3, $a7, 752 + vld $vr1, $a6, 760 + fld.d $fa3, $a6, 752 vextrins.d $vr2, $vr0, 16 vst $vr2, $sp, 112 # 16-byte Folded Spill - vld $vr0, $a7, 776 + vld $vr0, $a6, 776 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 96 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 792 + vld $vr1, $a6, 792 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 416 # 16-byte Folded Spill + vst $vr3, $sp, 400 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 808 + vld $vr0, $a6, 808 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 400 # 16-byte Folded Spill + vst $vr3, $sp, 384 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 824 + vld $vr1, $a6, 824 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 384 # 16-byte Folded Spill + vst $vr3, $sp, 368 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 840 + vld $vr0, $a6, 840 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 944 # 16-byte Folded Spill + vst $vr3, $sp, 928 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 856 + vld $vr1, $a6, 856 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 368 # 16-byte Folded Spill + vst $vr3, $sp, 352 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 872 + vld $vr0, $a6, 872 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 352 # 16-byte Folded Spill + vst $vr3, $sp, 336 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 888 + vld $vr1, $a6, 888 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 928 # 16-byte Folded Spill + vst $vr3, $sp, 912 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - fld.d $fa0, $a7, 904 + fld.d $fa0, $a6, 904 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 912 # 16-byte Folded Spill - vld $vr2, $a7, 912 + vst $vr3, $sp, 896 # 16-byte Folded Spill + vld $vr2, $a6, 912 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr0, 16 - vst $vr1, $sp, 336 # 16-byte Folded Spill - vld $vr0, $a7, 928 + vst $vr1, $sp, 320 # 16-byte Folded Spill + vld $vr0, $a6, 928 vreplvei.d $vr1, $vr2, 1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 - vst $vr2, $sp, 1296 # 16-byte Folded Spill - vld $vr1, $a7, 944 + vst $vr2, $sp, 1360 # 16-byte Folded Spill + vld $vr1, $a6, 944 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 1280 # 16-byte Folded Spill - vld $vr0, $a7, 960 + vst $vr0, $sp, 1344 # 16-byte Folded Spill + vld $vr0, $a6, 960 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 896 # 16-byte Folded Spill - vld $vr1, $a7, 976 + vst $vr1, $sp, 1328 # 16-byte Folded Spill + vld $vr1, $a6, 976 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 320 # 16-byte Folded Spill - vld $vr0, $a7, 992 + vst $vr0, $sp, 304 # 16-byte Folded Spill + vld $vr0, $a6, 992 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 1264 # 16-byte Folded Spill - vld $vr1, $a7, 1008 + vst $vr1, $sp, 1312 # 16-byte Folded Spill + vld $vr1, $a6, 1008 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 1568 # 16-byte Folded Spill - vld $vr0, $a7, 1024 + vst $vr0, $sp, 1536 # 16-byte Folded Spill + vld $vr0, $a6, 1024 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 1248 # 16-byte Folded Spill - vld $vr1, $a7, 1040 + vst $vr1, $sp, 1296 # 16-byte Folded Spill + vld $vr1, $a6, 1040 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 1232 # 16-byte Folded Spill + vst $vr0, $sp, 1520 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr2, $vr1, 0 - vld $vr1, $a7, 1064 - fld.d $fa3, $a7, 1056 + vld $vr1, $a6, 1064 + fld.d $fa3, $a6, 1056 vextrins.d $vr2, $vr0, 16 - vst $vr2, $sp, 1216 # 16-byte Folded Spill - vld $vr0, $a7, 1080 + vst $vr2, $sp, 1280 # 16-byte Folded Spill + vld $vr0, $a6, 1080 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1200 # 16-byte Folded Spill + vst $vr3, $sp, 1264 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1096 + vld $vr1, $a6, 1096 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 880 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1112 + vld $vr0, $a6, 1112 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 864 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1128 + vld $vr1, $a6, 1128 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 848 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1144 + vld $vr0, $a6, 1144 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 832 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1160 + vld $vr1, $a6, 1160 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 816 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1176 + vld $vr0, $a6, 1176 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 800 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1192 + vld $vr1, $a6, 1192 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1184 # 16-byte Folded Spill + vst $vr3, $sp, 1248 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - fld.d $fa0, $a7, 1208 + fld.d $fa0, $a6, 1208 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 784 # 16-byte Folded Spill - vld $vr2, $a7, 1216 + vld $vr2, $a6, 1216 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr0, 16 - vst $vr1, $sp, 1168 # 16-byte Folded Spill - vld $vr0, $a7, 1232 + vst $vr1, $sp, 1232 # 16-byte Folded Spill + vld $vr0, $a6, 1232 vreplvei.d $vr1, $vr2, 1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 - vst $vr2, $sp, 304 # 16-byte Folded Spill - vld $vr1, $a7, 1248 + vst $vr2, $sp, 288 # 16-byte Folded Spill + vld $vr1, $a6, 1248 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 vst $vr0, $sp, 32 # 16-byte Folded Spill - vld $vr0, $a7, 1264 + vld $vr0, $a6, 1264 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 vst $vr1, $sp, 768 # 16-byte Folded Spill - vld $vr1, $a7, 1280 + vld $vr1, $a6, 1280 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 vst $vr0, $sp, 752 # 16-byte Folded Spill - vld $vr0, $a7, 1296 + vld $vr0, $a6, 1296 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 80 # 16-byte Folded Spill - vld $vr1, $a7, 1312 + vst $vr1, $sp, 272 # 16-byte Folded Spill + vld $vr1, $a6, 1312 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 vst $vr0, $sp, 736 # 16-byte Folded Spill - vld $vr0, $a7, 1328 + vld $vr0, $a6, 1328 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - vst $vr1, $sp, 288 # 16-byte Folded Spill - vld $vr1, $a7, 1344 + vst $vr1, $sp, 80 # 16-byte Folded Spill + vld $vr1, $a6, 1344 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 1152 # 16-byte Folded Spill + vst $vr0, $sp, 1216 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr2, $vr1, 0 - vld $vr1, $a7, 1368 - fld.d $fa3, $a7, 1360 + vld $vr1, $a6, 1368 + fld.d $fa3, $a6, 1360 vextrins.d $vr2, $vr0, 16 - vst $vr2, $sp, 272 # 16-byte Folded Spill - vld $vr0, $a7, 1384 + vst $vr2, $sp, 256 # 16-byte Folded Spill + vld $vr0, $a6, 1384 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 720 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1400 + vld $vr1, $a6, 1400 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - vst $vr3, $sp, 1136 # 16-byte Folded Spill + vst $vr3, $sp, 1200 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1416 + vld $vr0, $a6, 1416 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 704 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1432 + vld $vr1, $a6, 1432 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 688 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1448 + vld $vr0, $a6, 1448 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 672 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1464 + vld $vr1, $a6, 1464 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 656 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - vld $vr0, $a7, 1480 + vld $vr0, $a6, 1480 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 640 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 - vld $vr1, $a7, 1496 + vld $vr1, $a6, 1496 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 624 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 - fld.d $fa0, $a7, 1512 + fld.d $fa0, $a6, 1512 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 vst $vr3, $sp, 608 # 16-byte Folded Spill - vld $vr2, $a7, 1520 + vld $vr2, $a6, 1520 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr0, 16 vst $vr1, $sp, 592 # 16-byte Folded Spill - vld $vr0, $a7, 1536 + vld $vr0, $a6, 1536 vreplvei.d $vr1, $vr2, 1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 vst $vr2, $sp, 576 # 16-byte Folded Spill - vld $vr1, $a7, 1552 + vld $vr1, $a6, 1552 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 256 # 16-byte Folded Spill - vld $vr0, $a7, 1568 + vst $vr0, $sp, 240 # 16-byte Folded Spill + vld $vr0, $a6, 1568 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 vst $vr1, $sp, 560 # 16-byte Folded Spill - vld $vr1, $a7, 1584 + vld $vr1, $a6, 1584 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 240 # 16-byte Folded Spill - vld $vr0, $a7, 1600 + vst $vr0, $sp, 544 # 16-byte Folded Spill + vld $vr0, $a6, 1600 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 vst $vr1, $sp, 224 # 16-byte Folded Spill - vld $vr1, $a7, 1616 + vld $vr1, $a6, 1616 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 1120 # 16-byte Folded Spill - vld $vr0, $a7, 1632 + vst $vr0, $sp, 1184 # 16-byte Folded Spill + vld $vr0, $a6, 1632 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 vst $vr1, $sp, 208 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 vreplvei.d $vr2, $vr0, 0 - vld $vr0, $a7, 1648 + vld $vr0, $a6, 1648 vextrins.d $vr2, $vr1, 16 vst $vr2, $sp, 192 # 16-byte Folded Spill ori $a0, $zero, 2048 @@ -243116,15 +243085,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - vst $vr0, $sp, 544 # 16-byte Folded Spill + vst $vr0, $sp, 528 # 16-byte Folded Spill ori $a0, $zero, 2064 vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr2, $vr1, 0 - ori $a6, $zero, 2064 vldx $vr1, $a1, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2080 @@ -243134,7 +243102,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2096 @@ -243144,7 +243112,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a1, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2112 @@ -243153,7 +243121,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2128 @@ -243162,7 +243130,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a1, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2144 @@ -243171,7 +243139,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2160 @@ -243180,7 +243148,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a1, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2176 @@ -243189,14 +243157,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a1, $zero, 2192 @@ -243215,7 +243183,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2232 @@ -243225,15 +243193,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2264 @@ -243243,15 +243211,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2296 @@ -243262,14 +243230,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2328 @@ -243280,14 +243248,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2360 @@ -243298,14 +243266,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2392 @@ -243315,7 +243283,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2416 @@ -243324,7 +243292,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2432 @@ -243332,8 +243300,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2448 @@ -243342,7 +243310,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2464 @@ -243350,8 +243318,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 0 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2480 @@ -243360,7 +243328,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2496 @@ -243369,7 +243337,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2512 @@ -243377,8 +243345,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2528 @@ -243387,7 +243355,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2544 @@ -243396,7 +243364,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2560 @@ -243404,8 +243372,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + lu12i.w $a0, 2 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2576 @@ -243413,15 +243381,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 1856 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr0, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a1, $zero, 2592 @@ -243433,14 +243401,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2632 @@ -243451,14 +243419,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 976 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2664 @@ -243469,14 +243437,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2696 @@ -243486,15 +243454,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2728 @@ -243504,15 +243472,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2760 @@ -243523,14 +243491,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2792 @@ -243540,7 +243508,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2816 @@ -243549,7 +243517,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243558,7 +243526,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2848 @@ -243567,7 +243535,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -243576,7 +243544,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2880 @@ -243585,7 +243553,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243594,7 +243562,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2912 @@ -243603,7 +243571,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -243612,7 +243580,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2944 @@ -243620,8 +243588,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243630,7 +243598,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2976 @@ -243638,15 +243606,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a1, $zero, 2992 @@ -243658,14 +243626,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3032 @@ -243676,14 +243644,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3064 @@ -243694,14 +243662,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3096 @@ -243712,14 +243680,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3128 @@ -243730,14 +243698,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3160 @@ -243748,14 +243716,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3192 @@ -243765,7 +243733,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3216 @@ -243774,7 +243742,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243783,7 +243751,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3248 @@ -243792,7 +243760,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -243801,7 +243769,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3280 @@ -243809,7 +243777,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - lu12i.w $a0, 2 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243818,7 +243787,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3312 @@ -243827,7 +243796,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -243836,7 +243805,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3344 @@ -243845,7 +243814,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -243854,7 +243823,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3376 @@ -243863,14 +243832,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a1, $zero, 3392 @@ -243882,14 +243851,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3432 @@ -243900,14 +243869,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3464 @@ -243918,14 +243887,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3496 @@ -243936,14 +243905,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3528 @@ -243954,14 +243923,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3560 @@ -243972,14 +243941,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr1, 0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3592 @@ -243989,7 +243958,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3616 @@ -243998,7 +243967,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -244007,7 +243976,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3648 @@ -244016,7 +243985,6 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -244024,8 +243992,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 ori $a0, $zero, 3664 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3680 @@ -244033,8 +244001,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -244043,7 +244011,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3712 @@ -244051,8 +244019,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -244060,8 +244028,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 ori $a0, $zero, 3728 vldx $vr1, $a2, $a0 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3744 @@ -244070,7 +244038,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -244079,7 +244047,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vldx $vr0, $a2, $a0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3776 @@ -244088,7 +244056,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 0 @@ -244096,15 +244064,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 16 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 704 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 32 @@ -244112,15 +244080,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1472 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 48 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 688 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 64 @@ -244128,31 +244096,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1456 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 80 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 672 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 96 vreplvei.d $vr2, $vr1, 1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3888 + lu12i.w $a0, 2 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 112 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 656 + lu12i.w $a0, 1 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 128 @@ -244160,15 +244128,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 640 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 144 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 624 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 160 @@ -244176,7 +244144,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 176 @@ -244184,7 +244152,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 592 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 1 @@ -244192,23 +244160,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $a2, 200 fld.d $fa3, $a2, 192 vextrins.d $vr2, $vr0, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 576 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 216 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 560 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 vld $vr1, $a2, 232 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 544 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 @@ -244216,7 +244184,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244224,7 +244192,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 @@ -244232,7 +244200,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244240,15 +244208,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1424 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 vld $vr0, $a2, 312 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 496 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244256,7 +244224,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 480 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 @@ -244264,7 +244232,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244272,7 +244240,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1408 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 @@ -244280,7 +244248,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr1, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244288,14 +244256,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr0, 0 vextrins.d $vr3, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill vld $vr2, $a2, 400 vreplvei.d $vr0, $vr0, 1 vextrins.d $vr0, $vr1, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + lu12i.w $a0, 2 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 416 @@ -244303,15 +244271,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 432 vreplvei.d $vr2, $vr0, 1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + lu12i.w $a0, 2 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 448 @@ -244319,7 +244287,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1360 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 464 @@ -244327,7 +244295,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 480 @@ -244335,7 +244303,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1344 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 496 @@ -244343,7 +244311,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 512 @@ -244351,7 +244319,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1328 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 528 @@ -244359,7 +244327,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 544 @@ -244367,7 +244335,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1312 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 560 @@ -244375,7 +244343,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2496 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr0, $a2, 576 @@ -244383,19 +244351,19 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 600 vreplvei.d $vr2, $vr0, 1 # implicit-def: $f3_64 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill # implicit-def: $f3_64 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill # implicit-def: $f3_64 @@ -244405,7 +244373,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 # implicit-def: $f3_64 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill # implicit-def: $f3_64 @@ -244418,8 +244386,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr4, $a0, 0 # 16-byte Folded Spill vextrins.d $vr0, $vr2, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + lu12i.w $a0, 2 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 @@ -244428,7 +244396,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 @@ -244438,12 +244406,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr2, $a2, 616 # implicit-def: $f0_64 lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 0 @@ -244453,7 +244421,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr4, $a0, 0 # 16-byte Folded Spill vextrins.d $vr3, $vr0, 16 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 @@ -244462,20 +244430,20 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr0, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 # implicit-def: $f0_64 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 # 16-byte Folded Spill vld $vr1, $a2, 1816 vreplvei.d $vr0, $vr2, 0 vextrins.d $vr3, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + lu12i.w $a0, 2 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 # 16-byte Folded Spill # implicit-def: $f0_64 @@ -244488,8 +244456,8 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr20, $a2, 648 vreplvei.d $vr5, $vr0, 1 vextrins.d $vr5, $vr3, 16 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + lu12i.w $a0, 1 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 # 16-byte Folded Spill vld $vr3, $a2, 2032 @@ -244497,41 +244465,41 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr20, 0 vreplvei.d $vr2, $vr2, 1 vextrins.d $vr2, $vr5, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr4, 1 vextrins.d $vr2, $vr6, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 # 16-byte Folded Spill vld $vr2, $a2, 2016 vreplvei.d $vr4, $vr3, 1 lu12i.w $a0, 20 - ori $a0, $a0, 1952 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vreplvei.d $vr5, $vr2, 1 vld $vr6, $a2, 2000 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr5, 16 lu12i.w $a1, 2 - ori $a1, $a1, 448 + ori $a1, $a1, 688 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr3, 0 vextrins.d $vr2, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 2944 + ori $a1, $a1, 2432 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr6, 1 vld $vr3, $a2, 1976 vreplvei.d $vr4, $vr6, 0 vextrins.d $vr4, $vr2, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 2464 + lu12i.w $a1, 2 + ori $a1, $a1, 672 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill fld.d $fa2, $a2, 1992 @@ -244540,7 +244508,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr3, 1 vextrins.d $vr3, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3840 + ori $a1, $a1, 3888 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr4, 0 @@ -244549,13 +244517,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr4, $vr4, 1 vextrins.d $vr4, $vr5, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3824 + ori $a1, $a1, 3872 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr4, $vr3, 1 vextrins.d $vr4, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3808 + ori $a1, $a1, 3856 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 1928 @@ -244565,14 +244533,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr7, $vr2, 1 vextrins.d $vr7, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3792 + ori $a1, $a1, 3840 add.d $a1, $sp, $a1 vst $vr7, $a1, 0 # 16-byte Folded Spill vld $vr3, $a2, 1912 vreplvei.d $vr7, $vr5, 1 vextrins.d $vr7, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3776 + ori $a1, $a1, 3824 add.d $a1, $sp, $a1 vst $vr7, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr2, 0 @@ -244580,13 +244548,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr3, 1 vextrins.d $vr3, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3760 + ori $a1, $a1, 3808 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr6, 1 vextrins.d $vr2, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3744 + ori $a1, $a1, 3792 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 1864 @@ -244596,7 +244564,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr2, 1 vextrins.d $vr6, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3728 + ori $a1, $a1, 3776 add.d $a1, $sp, $a1 vst $vr6, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr4, 0 @@ -244604,14 +244572,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr5, 0 vreplvei.d $vr5, $vr5, 1 vextrins.d $vr5, $vr2, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 2448 + lu12i.w $a1, 2 + ori $a1, $a1, 656 add.d $a1, $sp, $a1 vst $vr5, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr4, 1 vextrins.d $vr2, $vr6, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3712 + lu12i.w $a1, 2 + ori $a1, $a1, 640 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 1744 @@ -244619,15 +244587,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3696 + ori $a1, $a1, 3760 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr2, 1 vld $vr3, $a2, 1760 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 2432 + lu12i.w $a1, 2 + ori $a1, $a1, 624 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill fld.d $fa5, $a2, 1792 @@ -244636,21 +244604,21 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr5, $vr0, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3680 + ori $a1, $a1, 3744 add.d $a1, $sp, $a1 vst $vr5, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr4, 0 vextrins.d $vr0, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3664 + ori $a1, $a1, 3728 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr0, $a2, 1696 vld $vr2, $a2, 1728 vreplvei.d $vr3, $vr3, 0 vextrins.d $vr3, $vr1, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 432 + lu12i.w $a1, 1 + ori $a1, $a1, 3712 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr0, 1 @@ -244658,7 +244626,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3648 + ori $a1, $a1, 3696 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr0, $a2, 1680 @@ -244667,13 +244635,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3632 + ori $a1, $a1, 2912 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr3, 0 vextrins.d $vr1, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3616 + ori $a1, $a1, 2896 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1664 @@ -244684,13 +244652,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 2416 + ori $a1, $a1, 2880 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr1, 0 vextrins.d $vr0, $vr5, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3600 + ori $a1, $a1, 2864 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1632 @@ -244700,22 +244668,22 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr1, 1 vreplvei.d $vr3, $vr3, 0 vextrins.d $vr3, $vr5, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3584 + lu12i.w $a1, 2 + ori $a1, $a1, 608 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr6, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3568 + ori $a1, $a1, 2848 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1600 fld.d $fa3, $a2, 1592 vreplvei.d $vr2, $vr2, 0 vextrins.d $vr2, $vr4, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3552 + lu12i.w $a1, 2 + ori $a1, $a1, 592 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr1, 1 @@ -244723,14 +244691,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3536 + ori $a1, $a1, 3680 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1560 vreplvei.d $vr2, $vr4, 1 vextrins.d $vr2, $vr3, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3520 + lu12i.w $a1, 2 + ori $a1, $a1, 576 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 1528 @@ -244741,13 +244709,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3504 + ori $a1, $a1, 3664 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr5, 1 vextrins.d $vr1, $vr3, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 2928 + lu12i.w $a1, 2 + ori $a1, $a1, 560 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr5, 0 @@ -244755,14 +244723,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr2, $vr2, 1 vextrins.d $vr2, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3488 + ori $a1, $a1, 3648 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1496 vreplvei.d $vr2, $vr3, 1 vextrins.d $vr2, $vr6, 16 lu12i.w $a1, 1 - ori $a1, $a1, 2224 + ori $a1, $a1, 3632 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr2, $vr3, 0 @@ -244771,7 +244739,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 1 vextrins.d $vr1, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3472 + ori $a1, $a1, 3616 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr3, 0 @@ -244780,13 +244748,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr3, 1 vextrins.d $vr3, $vr4, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3456 + ori $a1, $a1, 3600 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr2, 1 vextrins.d $vr3, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3440 + ori $a1, $a1, 3584 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1448 @@ -244796,28 +244764,28 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr1, 1 vextrins.d $vr6, $vr2, 16 lu12i.w $a1, 1 - ori $a1, $a1, 2912 + ori $a1, $a1, 3568 add.d $a1, $sp, $a1 vst $vr6, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 1432 vreplvei.d $vr6, $vr4, 1 vextrins.d $vr6, $vr3, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 416 + lu12i.w $a1, 1 + ori $a1, $a1, 3552 add.d $a1, $sp, $a1 vst $vr6, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr1, 0 vreplvei.d $vr3, $vr2, 0 vreplvei.d $vr2, $vr2, 1 vextrins.d $vr2, $vr1, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 400 + lu12i.w $a1, 1 + ori $a1, $a1, 3536 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr5, 1 vextrins.d $vr1, $vr3, 16 lu12i.w $a1, 2 - ori $a1, $a1, 384 + ori $a1, $a1, 544 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill fld.d $fa5, $a2, 1392 @@ -244826,7 +244794,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr4, 0 vextrins.d $vr5, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3424 + ori $a1, $a1, 3520 add.d $a1, $sp, $a1 vst $vr5, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr1, 1 @@ -244835,21 +244803,21 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr1, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3408 + ori $a1, $a1, 3504 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr4, 1 vld $vr3, $a2, 1328 vreplvei.d $vr4, $vr4, 0 vextrins.d $vr4, $vr1, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3392 + lu12i.w $a1, 2 + ori $a1, $a1, 528 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr2, 0 vextrins.d $vr1, $vr5, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3376 + ori $a1, $a1, 2832 add.d $a1, $sp, $a1 vst $vr1, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr1, $vr3, 1 @@ -244857,7 +244825,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr3, $vr3, 0 vextrins.d $vr3, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 2400 + ori $a1, $a1, 3488 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr1, $a2, 1000 @@ -244867,7 +244835,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr6, $vr1, 1 vextrins.d $vr6, $vr3, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1264 + ori $a1, $a1, 512 add.d $a1, $sp, $a1 vst $vr6, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr0, 1 @@ -244876,13 +244844,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr4, $vr4, 0 vextrins.d $vr4, $vr6, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3360 + ori $a1, $a1, 3472 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr4, $vr5, 0 vextrins.d $vr4, $vr7, 16 lu12i.w $a1, 2 - ori $a1, $a1, 368 + ori $a1, $a1, 1312 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vld $vr4, $a2, 1264 @@ -244890,7 +244858,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3344 + ori $a1, $a1, 3456 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr4, 1 @@ -244898,7 +244866,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr4, $vr4, 0 vextrins.d $vr4, $vr0, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3328 + ori $a1, $a1, 3440 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr5, 1 @@ -244907,21 +244875,21 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr5, $vr5, 0 vextrins.d $vr5, $vr0, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1248 + ori $a1, $a1, 1296 add.d $a1, $sp, $a1 vst $vr5, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr4, 1 vld $vr5, $a2, 1200 vreplvei.d $vr4, $vr4, 0 vextrins.d $vr4, $vr0, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 352 + lu12i.w $a1, 1 + ori $a1, $a1, 3424 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr3, 0 vextrins.d $vr0, $vr6, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3312 + ori $a1, $a1, 3408 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr5, 1 @@ -244929,7 +244897,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr4, $vr5, 0 vextrins.d $vr4, $vr0, 16 lu12i.w $a1, 2 - ori $a1, $a1, 336 + ori $a1, $a1, 1280 add.d $a1, $sp, $a1 vst $vr4, $a1, 0 # 16-byte Folded Spill fld.d $fa0, $a2, 1192 @@ -244937,15 +244905,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr5, $a2, 1160 vreplvei.d $vr3, $vr3, 1 vextrins.d $vr3, $vr0, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 320 + lu12i.w $a1, 1 + ori $a1, $a1, 3392 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr0, $a2, 1144 vreplvei.d $vr3, $vr5, 1 vextrins.d $vr3, $vr4, 16 lu12i.w $a1, 2 - ori $a1, $a1, 304 + ori $a1, $a1, 496 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr3, $a2, 1112 @@ -244956,28 +244924,28 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr0, 1 vextrins.d $vr0, $vr5, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1232 + ori $a1, $a1, 1264 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr6, 1 vextrins.d $vr0, $vr4, 16 lu12i.w $a1, 2 - ori $a1, $a1, 288 + ori $a1, $a1, 480 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr6, 0 vld $vr4, $a2, 1096 vreplvei.d $vr3, $vr3, 1 vextrins.d $vr3, $vr0, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 272 + lu12i.w $a1, 1 + ori $a1, $a1, 3376 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr0, $a2, 1080 vreplvei.d $vr3, $vr4, 1 vextrins.d $vr3, $vr7, 16 lu12i.w $a1, 2 - ori $a1, $a1, 256 + ori $a1, $a1, 464 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vld $vr3, $a2, 1064 @@ -244986,36 +244954,36 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr6, $a2, 1032 vreplvei.d $vr7, $vr3, 1 vextrins.d $vr7, $vr5, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1216 + lu12i.w $a1, 1 + ori $a1, $a1, 2416 add.d $a1, $sp, $a1 vst $vr7, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 1 vextrins.d $vr0, $vr4, 16 lu12i.w $a1, 2 - ori $a1, $a1, 240 + ori $a1, $a1, 448 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr6, 0 vld $vr4, $a2, 1048 vreplvei.d $vr2, $vr2, 1 vextrins.d $vr2, $vr0, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3296 + lu12i.w $a1, 2 + ori $a1, $a1, 432 add.d $a1, $sp, $a1 vst $vr2, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr3, 0 vreplvei.d $vr2, $vr4, 0 vreplvei.d $vr3, $vr4, 1 vextrins.d $vr3, $vr0, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 224 + lu12i.w $a1, 1 + ori $a1, $a1, 2400 add.d $a1, $sp, $a1 vst $vr3, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr6, 1 vextrins.d $vr0, $vr2, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 208 + lu12i.w $a1, 1 + ori $a1, $a1, 3360 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr2, $a2, 960 @@ -245027,13 +244995,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr1, $vr1, 0 vextrins.d $vr6, $vr1, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3280 + ori $a1, $a1, 2384 add.d $a1, $sp, $a1 vst $vr6, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr0, 0 vextrins.d $vr0, $vr4, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1200 + ori $a1, $a1, 416 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr4, $a2, 896 @@ -245041,15 +245009,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr2, 0 vextrins.d $vr0, $vr3, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3264 + ori $a1, $a1, 3344 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr3, $vr4, 1 vld $vr7, $a2, 928 vreplvei.d $vr0, $vr4, 0 vextrins.d $vr0, $vr3, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1184 + lu12i.w $a1, 1 + ori $a1, $a1, 2208 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr8, $vr5, 1 @@ -245058,21 +245026,21 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr6, 0 vextrins.d $vr0, $vr4, 16 lu12i.w $a1, 2 - ori $a1, $a1, 192 + ori $a1, $a1, 400 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr7, 0 vextrins.d $vr0, $vr9, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1168 + lu12i.w $a1, 1 + ori $a1, $a1, 2368 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr6, $a2, 848 vld $vr7, $a2, 880 vreplvei.d $vr0, $vr5, 0 vextrins.d $vr0, $vr8, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1152 + lu12i.w $a1, 1 + ori $a1, $a1, 3328 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr8, $vr6, 1 @@ -245080,7 +245048,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr6, 0 vextrins.d $vr0, $vr8, 16 lu12i.w $a1, 2 - ori $a1, $a1, 176 + ori $a1, $a1, 384 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr10, $a2, 832 @@ -245088,14 +245056,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr11, $vr9, 1 vreplvei.d $vr0, $vr7, 0 vextrins.d $vr0, $vr8, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 160 + lu12i.w $a1, 1 + ori $a1, $a1, 2816 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr9, 0 vextrins.d $vr0, $vr11, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1136 + lu12i.w $a1, 1 + ori $a1, $a1, 3312 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr11, $a2, 816 @@ -245104,14 +245072,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr14, $vr11, 1 vreplvei.d $vr0, $vr10, 0 vextrins.d $vr0, $vr13, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1120 + lu12i.w $a1, 1 + ori $a1, $a1, 3296 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr11, 0 vextrins.d $vr0, $vr14, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 1104 + lu12i.w $a1, 1 + ori $a1, $a1, 2800 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr13, $a2, 760 @@ -245122,13 +245090,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr12, 0 vextrins.d $vr0, $vr15, 16 lu12i.w $a1, 1 - ori $a1, $a1, 3248 + ori $a1, $a1, 3280 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr16, 1 vextrins.d $vr0, $vr14, 16 - lu12i.w $a1, 1 - ori $a1, $a1, 3232 + lu12i.w $a1, 2 + ori $a1, $a1, 368 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr14, $vr16, 0 @@ -245136,14 +245104,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr13, 1 vextrins.d $vr0, $vr14, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1088 + ori $a1, $a1, 352 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr16, $a2, 728 vreplvei.d $vr0, $vr15, 1 vextrins.d $vr0, $vr17, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1072 + ori $a1, $a1, 336 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr17, $a2, 696 @@ -245153,14 +245121,14 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr22, $vr17, 0 vreplvei.d $vr0, $vr16, 1 vextrins.d $vr0, $vr19, 16 - lu12i.w $a1, 2 - ori $a1, $a1, 144 + lu12i.w $a1, 1 + ori $a1, $a1, 3264 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr21, 1 vextrins.d $vr0, $vr18, 16 lu12i.w $a1, 2 - ori $a1, $a1, 128 + ori $a1, $a1, 320 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr18, $vr21, 0 @@ -245168,16848 +245136,15173 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vreplvei.d $vr0, $vr17, 1 vextrins.d $vr0, $vr18, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1056 + ori $a1, $a1, 304 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vld $vr21, $a2, 664 vreplvei.d $vr0, $vr19, 1 vextrins.d $vr0, $vr22, 16 lu12i.w $a1, 2 - ori $a1, $a1, 112 + ori $a1, $a1, 288 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill - fld.d $fa0, $a7, 1664 + fld.d $fa0, $a6, 1664 vst $vr0, $sp, 176 # 16-byte Folded Spill vreplvei.d $vr22, $vr19, 0 vreplvei.d $vr23, $vr21, 0 vreplvei.d $vr0, $vr21, 1 vextrins.d $vr0, $vr22, 16 lu12i.w $a1, 2 - ori $a1, $a1, 96 + ori $a1, $a1, 1248 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr20, 1 vextrins.d $vr0, $vr23, 16 lu12i.w $a1, 2 - ori $a1, $a1, 1040 + ori $a1, $a1, 1232 add.d $a1, $sp, $a1 vst $vr0, $a1, 0 # 16-byte Folded Spill ori $t0, $zero, 3792 lu12i.w $a1, 21 - ori $a1, $a1, 1952 - add.d $a1, $sp, $a1 + ori $a1, $a1, 1936 + add.d $a3, $sp, $a1 fldx.d $fa0, $a2, $t0 - lu12i.w $a2, 1 - ori $a2, $a2, 3216 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 2 + ori $a1, $a1, 272 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 592 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 144 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1904 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 608 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 160 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1920 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 624 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1936 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 640 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 192 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1952 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2688 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2688 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 656 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 208 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1968 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 672 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 224 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 1984 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 688 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 240 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 2000 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 704 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 256 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 2016 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 720 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 272 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 vst $vr0, $sp, 2032 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 736 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - # implicit-def: $f0_64 - ori $a2, $zero, 2048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 288 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 752 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2048 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2064 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 304 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 768 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2064 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 320 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 784 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2080 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2096 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 336 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 800 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2096 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2112 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 352 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 816 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2112 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 368 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 832 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2128 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2144 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 384 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2848 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2144 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 848 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2848 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 400 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 864 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2160 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2192 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 416 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 880 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2192 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2208 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 432 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 896 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2208 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2224 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 448 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 912 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2224 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2240 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 464 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 928 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2240 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2256 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 480 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 944 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2256 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2272 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 496 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 960 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2272 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2288 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 512 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 976 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2288 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2304 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 528 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 992 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2304 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2320 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 544 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1008 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2320 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2336 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 560 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1024 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2336 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2352 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 576 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2976 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2352 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1040 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2976 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2496 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 592 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2496 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2512 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 608 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1072 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2512 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2528 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 624 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1104 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2528 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2544 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 656 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1120 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2544 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2560 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 672 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1136 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2560 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2576 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 688 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1168 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2576 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2592 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 720 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1184 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2592 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2608 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 752 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1216 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2608 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2624 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 784 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1232 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2624 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2640 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 800 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1264 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2640 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2656 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 832 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1296 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2656 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2672 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 864 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3120 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2672 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1328 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3120 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2704 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 896 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1344 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2704 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2720 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 912 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1360 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2720 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2736 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 928 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1376 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2736 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2752 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 944 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1392 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2752 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2768 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 960 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1408 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2768 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2784 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 976 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1424 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2784 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2800 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 992 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1440 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2800 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2816 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1008 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1456 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2816 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2832 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1024 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1472 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2832 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2864 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1040 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1488 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2864 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2880 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1056 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1504 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2880 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2896 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1072 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3472 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2896 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1520 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3472 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2912 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1088 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1536 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2912 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2928 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1104 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1552 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2928 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2944 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1120 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1568 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2944 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2960 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1136 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1584 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2960 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2992 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1152 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1600 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 2992 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3008 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1168 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1616 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3008 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3024 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1184 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1632 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3024 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3040 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1200 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1648 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3040 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3056 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1216 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1664 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3056 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3072 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1232 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1680 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3072 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3088 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1248 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1696 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3088 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3104 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1264 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3808 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3104 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1712 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3808 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3136 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1280 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1728 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3136 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3152 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1296 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1744 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3152 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3168 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1312 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1760 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3168 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3184 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1328 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1776 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3184 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3200 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1344 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1792 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3200 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3216 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1360 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1808 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3216 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3248 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1376 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1824 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3248 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3280 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1392 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1840 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3280 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3312 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1408 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1856 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3312 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3344 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1424 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1872 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3344 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3376 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1440 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1888 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3376 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3408 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1456 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4000 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3408 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1904 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4000 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3504 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1472 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1920 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3504 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3536 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1488 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1936 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3536 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3552 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1504 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3552 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3584 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1520 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3584 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3600 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1536 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 1984 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3600 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3632 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1552 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2000 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3632 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3648 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1568 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2016 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3648 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3680 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1584 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2032 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3680 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3696 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1600 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3696 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3728 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1616 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2064 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3728 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3744 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1632 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3744 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3776 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1648 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3776 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 32 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4064 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3840 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4080 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 80 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3840 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3856 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3856 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3872 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 16 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3872 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3888 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 32 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 208 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3888 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3904 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 48 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 240 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3904 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3920 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 64 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 256 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3920 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3936 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 80 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2096 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3936 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1664 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2112 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3952 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1680 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3968 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3984 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1696 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2144 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3984 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4016 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1712 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 2160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4016 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4032 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1728 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 336 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4032 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 320 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 112 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 96 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 4048 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 4064 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1744 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 384 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1760 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 16 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 400 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1776 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 48 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 128 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 416 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1792 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 64 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 432 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1808 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 96 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 448 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1824 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 112 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 464 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1840 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 144 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 480 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1856 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 176 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 496 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1872 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 192 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 512 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1888 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 224 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 528 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 544 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 272 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 560 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1920 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 288 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 576 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - lu12i.w $a2, 1 - ori $a2, $a2, 304 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3488 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3232 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3488 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3520 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3232 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3264 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3520 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3568 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3264 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3296 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3568 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3616 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3296 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3328 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3616 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3664 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3328 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3360 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3664 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3712 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3360 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3392 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3712 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3760 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3392 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3424 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3760 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3792 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3424 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3440 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3792 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3824 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3440 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 3456 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3824 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill # implicit-def: $f0_64 - ori $a2, $zero, 2176 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + ori $a1, $zero, 3456 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill + # implicit-def: $f0_64 + ori $a1, $zero, 2176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill .p2align 4, , 16 .LBB16_1: # %.preheader27 # =>This Loop Header: Depth=1 # Child Loop BB16_2 Depth 2 alsl.d $t0, $t6, $t6, 3 st.d $t6, $sp, 24 # 8-byte Folded Spill - alsl.d $a2, $t0, $t6, 1 - andi $t0, $a2, 255 + alsl.d $a1, $t0, $t6, 1 + andi $t0, $a1, 255 slli.d $t0, $t0, 3 - vld $vr0, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr4, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr12, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr15, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr0, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr5, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr9, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 + vld $vr3, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr21, $sp, 160 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr0, $sp, 64 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr17, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr4, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr0, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr9, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr6, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr13, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr8, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr7, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr22, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 vld $vr0, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr6, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr7, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr0, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr8, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr27, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr0, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr17, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr13, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr15, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr14, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr0, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr22, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr5, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr0, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr31, $sp, 144 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr0, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr11, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr28, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr31, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr19, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr23, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr10, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr26, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr0, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr16, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr24, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr20, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr29, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr0, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr30, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr0, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr21, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr28, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr26, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr12, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr23, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vld $vr19, $sp, 48 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr14, $sp, 112 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr25, $sp, 96 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + vld $vr0, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr16, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr18, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr20, $sp, 928 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr29, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr0, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr30, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr0, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr27, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr0, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr24, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + vld $vr0, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr25, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr18, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr3, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr2, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr10, $sp, 224 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr2, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr0, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 31 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 176 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1864 # 8-byte Folded Spill - addi.d $t0, $a2, 1 + fst.d $fa1, $sp, 1856 # 8-byte Folded Spill + addi.d $t0, $a1, 1 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr0, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr15, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 31 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr4, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr5, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr6, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr8, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr9, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vori.b $vr0, $vr21, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr21, $sp, 64 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr3, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 31 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr4, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr6, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr1, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr7, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr8, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr9, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr17, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr7, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr15, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr5, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr1, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + vld $vr12, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr18, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr19, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr16, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr12, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr19, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr20, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr16, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr21, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr22, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr23, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr22, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr23, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr24, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr25, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 vld $vr27, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 vld $vr28, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 vld $vr29, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr30, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr30, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr31, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr13, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr13, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 vld $vr14, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr10, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr11, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 31 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr2, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 31 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 31 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 31 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 31 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1856 # 8-byte Folded Spill - addi.d $t0, $a2, 2 + fst.d $fa1, $sp, 1848 # 8-byte Folded Spill + addi.d $t0, $a1, 2 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - lu12i.w $a3, 30 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr11, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr3, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr0, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr15, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr0, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr0, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr5, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr0, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr18, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr0, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + vld $vr10, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr0, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr20, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr0, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr0, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr21, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr0, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr17, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr0, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr7, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 vld $vr0, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr8, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr17, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr0, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr6, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr15, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr0, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr0, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr6, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr4, $sp, 128 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 vld $vr0, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr9, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 vld $vr0, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr0, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr4, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr0, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr3, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr7, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr8, $sp, 768 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr11, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr10, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr13, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr16, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 30 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1848 # 8-byte Folded Spill - addi.d $t0, $a2, 3 + fst.d $fa1, $sp, 1840 # 8-byte Folded Spill + addi.d $t0, $a1, 3 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 30 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr20, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr1, $sp, 160 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr5, $sp, 64 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr20, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 30 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr18, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr30, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr19, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr30, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr19, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr5, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr21, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr13, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr22, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr23, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr24, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr25, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - vld $vr26, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr27, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr28, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr29, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr21, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr1, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr22, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr23, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vori.b $vr24, $vr7, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr25, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + vld $vr26, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr27, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr28, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr29, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr31, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr12, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr31, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr12, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr2, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr7, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr8, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr18, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr4, $sp, 992 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr2, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr6, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr11, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr10, $sp, 112 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr1, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr15, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr0, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr15, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr0, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr17, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr0, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr4, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr17, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vld $vr0, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr7, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 vld $vr0, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr3, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 30 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr0, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 30 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr0, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 30 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 30 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 30 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1840 # 8-byte Folded Spill - addi.d $t0, $a2, 4 + fst.d $fa1, $sp, 1832 # 8-byte Folded Spill + addi.d $t0, $a1, 4 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr0, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + vld $vr0, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr14, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr1, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr1, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr1, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr5, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr5, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr12, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr9, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr8, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr2, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr9, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr8, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr2, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr13, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr10, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr10, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr11, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr4, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr16, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr15, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr17, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr15, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr17, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 vld $vr18, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr19, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 vld $vr20, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 vld $vr21, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 vld $vr22, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 vld $vr23, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr24, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr25, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 vld $vr27, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr28, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr28, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 vld $vr29, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr30, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr30, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr31, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr7, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr7, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 29 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1832 # 8-byte Folded Spill - addi.d $t0, $a2, 5 + fst.d $fa1, $sp, 1824 # 8-byte Folded Spill + addi.d $t0, $a1, 5 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - lu12i.w $a3, 28 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr14, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr0, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr0, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 29 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 29 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr3, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr0, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr3, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr6, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 vld $vr0, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr5, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr0, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vori.b $vr12, $vr2, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr0, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr2, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr9, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr13, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr1, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr9, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr13, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr8, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr8, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr16, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr18, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 29 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr16, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr18, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 vld $vr1, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 29 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 29 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 29 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 29 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1824 # 8-byte Folded Spill - addi.d $t0, $a2, 6 + fst.d $fa1, $sp, 1816 # 8-byte Folded Spill + addi.d $t0, $a1, 6 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr7, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr3, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr14, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr3, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr14, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr0, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr17, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr15, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr19, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr20, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr21, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr22, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr23, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr24, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr25, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - vld $vr26, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr27, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr28, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr29, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr30, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr31, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr2, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr17, $sp, 928 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr15, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr19, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr20, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr21, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr22, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr23, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vld $vr24, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + vld $vr25, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + vld $vr26, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr27, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr28, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr29, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr30, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr31, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr2, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr4, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 vld $vr5, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr6, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr9, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 vld $vr10, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr11, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr13, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr0, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr0, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr0, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr0, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 28 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1816 # 8-byte Folded Spill - addi.d $t0, $a2, 7 + fst.d $fa1, $sp, 1808 # 8-byte Folded Spill + addi.d $t0, $a1, 7 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr0, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + vld $vr0, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 28 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr12, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr18, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr0, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 28 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr12, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr18, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr0, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 vld $vr8, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr0, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vld $vr0, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 976 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr0, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr16, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 vld $vr0, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 28 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr0, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr3, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr0, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 28 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr0, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 28 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 28 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 28 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1808 # 8-byte Folded Spill - addi.d $t0, $a2, 8 + fst.d $fa1, $sp, 1800 # 8-byte Folded Spill + addi.d $t0, $a1, 8 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr25, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + vld $vr25, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 vld $vr27, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr4, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr5, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr6, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr7, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr23, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr9, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr10, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr11, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr12, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr13, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr17, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr18, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr19, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr20, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr21, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr22, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr4, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr5, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr6, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr7, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr23, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vld $vr9, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr10, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr11, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr12, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr13, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr17, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr18, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr19, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr20, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr21, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr22, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 vld $vr28, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 vld $vr29, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr30, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr31, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr24, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr30, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr31, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr24, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr2, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr2, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr8, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr8, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 vld $vr14, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr15, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr16, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr16, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 27 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1800 # 8-byte Folded Spill - addi.d $t0, $a2, 9 + fst.d $fa1, $sp, 1792 # 8-byte Folded Spill + addi.d $t0, $a1, 9 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - lu12i.w $a3, 26 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr4, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr5, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 27 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr0, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr9, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr0, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr4, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr5, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 27 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr0, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr9, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr0, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr6, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr7, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr11, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr6, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr7, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr11, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 27 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr12, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr12, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 vld $vr13, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 vld $vr14, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr15, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr8, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr8, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vld $vr16, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr17, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr18, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr17, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr18, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 vld $vr19, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr20, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 vld $vr21, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 vld $vr22, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 vld $vr23, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr24, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr25, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 vld $vr27, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 vld $vr28, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr29, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr29, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr30, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr31, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr31, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr10, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 27 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 27 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr3, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 27 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 27 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1792 # 8-byte Folded Spill - addi.d $t0, $a2, 10 + fst.d $fa1, $sp, 1784 # 8-byte Folded Spill + addi.d $t0, $a1, 10 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr2, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr1, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr0, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr11, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 976 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr11, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr0, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr6, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr7, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr0, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr6, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr7, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 vld $vr0, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr4, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr9, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr5, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr4, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr9, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr5, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr0, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 26 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1784 # 8-byte Folded Spill - addi.d $t0, $a2, 11 + fst.d $fa1, $sp, 1776 # 8-byte Folded Spill + addi.d $t0, $a1, 11 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr3, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr12, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 26 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr12, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 26 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr31, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr1, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr1, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr8, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr30, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr10, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr30, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr10, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr2, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr6, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr7, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr11, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr1, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr13, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr14, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr15, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr16, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr17, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr18, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr19, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr20, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr21, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr2, $sp, 928 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr6, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr7, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr11, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr1, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr13, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr14, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr15, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr16, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr17, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr18, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr19, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr20, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr21, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 vld $vr22, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 vld $vr23, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr24, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr25, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 vld $vr27, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr28, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr28, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 vld $vr29, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr4, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr5, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 26 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 26 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 26 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 26 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 26 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1776 # 8-byte Folded Spill - addi.d $t0, $a2, 12 + fst.d $fa1, $sp, 1768 # 8-byte Folded Spill + addi.d $t0, $a1, 12 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr0, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + vld $vr0, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr0, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr0, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr0, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr0, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr3, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr0, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr12, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr0, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr9, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr12, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr0, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr9, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 vld $vr0, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr30, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr1, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr31, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr31, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr10, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr11, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr29, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr10, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr11, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr29, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr1, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr23, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr23, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr25, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr4, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr5, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr5, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr20, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 25 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1768 # 8-byte Folded Spill - addi.d $t0, $a2, 13 + fst.d $fa1, $sp, 1760 # 8-byte Folded Spill + addi.d $t0, $a1, 13 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr21, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 vld $vr22, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr27, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr27, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr28, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr7, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 25 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr28, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 25 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr7, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr13, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr2, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr13, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr2, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr14, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr14, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr15, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr16, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr17, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr18, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr15, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr16, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr17, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr1, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr18, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr24, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr19, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr24, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr8, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr19, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr26, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + vld $vr8, $sp, 128 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr1, $sp, 992 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 976 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr26, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr30, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr0, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 vld $vr0, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr0, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 + vld $vr0, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr11, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr0, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr10, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr23, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr12, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr23, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr12, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 vld $vr1, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr1, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr29, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr29, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr0, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 25 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 25 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 25 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 25 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 25 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1760 # 8-byte Folded Spill - addi.d $t0, $a2, 14 + fst.d $fa1, $sp, 1752 # 8-byte Folded Spill + addi.d $t0, $a1, 14 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr31, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr9, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr7, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr1, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr5, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr13, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr0, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr14, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr15, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr16, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr17, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr31, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + vld $vr9, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr7, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr1, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr5, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + vld $vr13, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr0, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr14, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr15, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr16, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr17, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2384 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 vld $vr1, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2432 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2448 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2496 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr1, $sp, 992 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2512 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2528 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr1, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr28, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2560 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr28, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2576 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2592 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2608 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2624 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2640 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr6, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2656 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr1, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2672 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2688 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2704 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr2, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2720 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2736 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr2, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2768 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr1, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2784 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr4, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr4, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2832 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 2960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 2992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3104 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3120 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3136 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3152 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3168 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr11, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3184 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr1, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr8, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr1, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr19, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr20, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr21, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr22, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr23, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3200 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr8, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3216 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3232 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3248 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3264 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3280 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr1, $sp, 720 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3296 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3312 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 704 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3328 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr19, $sp, 688 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3344 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + vld $vr20, $sp, 672 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3360 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + vld $vr21, $sp, 656 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3376 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + vld $vr22, $sp, 640 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3392 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + vld $vr23, $sp, 624 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3408 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 vld $vr24, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3424 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 vld $vr25, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3440 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 vld $vr26, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr27, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr29, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3456 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + vld $vr27, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3472 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3488 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr29, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3504 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 vld $vr30, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3520 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3536 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3552 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 3568 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 3584 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 + lu12i.w $a2, 24 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1752 # 8-byte Folded Spill - addi.d $t0, $a2, 15 + fst.d $fa1, $sp, 1744 # 8-byte Folded Spill + addi.d $t0, $a1, 15 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 3984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 4000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr10, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 24 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 4016 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 4032 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 4048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 4064 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 4080 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 24 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 16 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + vld $vr18, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 32 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 48 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr7, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 64 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 80 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 96 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr1, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 112 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr18, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 144 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr7, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 176 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr1, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 192 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 208 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + vld $vr1, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 224 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + vld $vr1, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 368 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 384 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 400 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 416 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 432 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr5, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 448 + add.d $a2, $sp, $a2 + vst $vr5, $a2, 0 vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr3, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 464 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 480 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr3, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 496 + add.d $a2, $sp, $a2 + vst $vr3, $a2, 0 vld $vr16, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr15, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 512 + add.d $a2, $sp, $a2 + vst $vr16, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 528 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 544 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr0, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 560 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr15, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 576 + add.d $a2, $sp, $a2 + vst $vr15, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 592 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 608 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 vld $vr1, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 624 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr6, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr12, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr13, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr17, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr28, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr1, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr31, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 640 + add.d $a2, $sp, $a2 + vst $vr6, $a2, 0 + vld $vr1, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 656 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr12, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 672 + add.d $a2, $sp, $a2 + vst $vr12, $a2, 0 + vld $vr13, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 688 + add.d $a2, $sp, $a2 + vst $vr13, $a2, 0 + vld $vr17, $sp, 928 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 704 + add.d $a2, $sp, $a2 + vst $vr17, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 720 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + vld $vr28, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 736 + add.d $a2, $sp, $a2 + vst $vr28, $a2, 0 + vld $vr1, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 752 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr31, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 768 + add.d $a2, $sp, $a2 + vst $vr31, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 784 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 800 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 816 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 832 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 848 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 864 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 880 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 896 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 912 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 928 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 944 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 960 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 976 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 992 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1024 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1040 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1056 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr14, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1072 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr14, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1088 + add.d $a2, $sp, $a2 + vst $vr14, $a2, 0 + vld $vr1, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr4, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1120 + add.d $a2, $sp, $a2 + vst $vr4, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1136 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr9, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1152 + add.d $a2, $sp, $a2 + vst $vr9, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1168 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 vld $vr0, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr8, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr0, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1184 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr8, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vst $vr8, $a2, 0 + vld $vr0, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1232 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1248 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1264 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1280 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1296 + add.d $a2, $sp, $a2 + vst $vr19, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1312 + add.d $a2, $sp, $a2 + vst $vr20, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1328 + add.d $a2, $sp, $a2 + vst $vr21, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1344 + add.d $a2, $sp, $a2 + vst $vr22, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1360 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1376 + add.d $a2, $sp, $a2 + vst $vr24, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1392 + add.d $a2, $sp, $a2 + vst $vr25, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1408 + add.d $a2, $sp, $a2 + vst $vr26, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1424 + add.d $a2, $sp, $a2 + vst $vr27, $a2, 0 vld $vr2, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 24 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - vld $vr11, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1440 + add.d $a2, $sp, $a2 + vst $vr2, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1456 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1472 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + vld $vr11, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1488 + add.d $a2, $sp, $a2 + vst $vr11, $a2, 0 vld $vr0, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1504 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 vld $vr29, $sp, 192 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr30, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 + lu12i.w $a2, 24 + ori $a2, $a2, 1520 + add.d $a2, $sp, $a2 + vst $vr29, $a2, 0 + vld $vr30, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 24 + ori $a2, $a2, 1536 + add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 vld $vr0, $sp, 176 # 16-byte Folded Reload - lu12i.w $a3, 24 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 + lu12i.w $a2, 24 + ori $a2, $a2, 1552 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1744 # 8-byte Folded Spill - addi.d $t0, $a2, 16 + fst.d $fa1, $sp, 1736 # 8-byte Folded Spill + addi.d $t0, $a1, 16 andi $t0, $t0, 255 slli.d $t0, $t0, 3 - vld $vr1, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1952 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + vld $vr1, $sp, 496 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1968 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1984 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2000 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2016 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2032 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2048 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2064 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1952 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1968 + add.d $a2, $sp, $a2 + vst $vr10, $a2, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1984 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2000 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2016 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2032 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2048 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2064 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2080 + add.d $a2, $sp, $a2 + vst $vr18, $a2, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2096 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2112 + add.d $a2, $sp, $a2 + vst $vr7, $a2, 0 vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2080 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2096 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2112 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2128 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2128 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2144 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2144 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2160 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2160 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2176 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2176 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2192 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2192 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2208 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 2224 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2208 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2240 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2224 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2256 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2240 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2272 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2256 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2288 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2272 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2288 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2304 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2320 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2304 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2336 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2320 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2352 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2368 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2384 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2400 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2416 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2432 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2336 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2448 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 2352 + add.d $a2, $sp, $a2 + vst $vr1, $a2, 0 vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2464 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2480 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr7, $sp, 144 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2496 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2512 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr20, $sp, 992 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2528 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - vld $vr22, $sp, 464 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2544 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2560 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2576 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2608 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2624 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2640 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr1, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2656 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr27, $sp, 48 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2672 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr1, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2688 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2704 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2720 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2736 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2752 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2768 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr3, $sp, 368 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2784 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2800 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr28, $sp, 928 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2816 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 2832 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr5, $sp, 336 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2848 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr31, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2864 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr23, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2880 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr24, $sp, 896 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2896 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr25, $sp, 320 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2912 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - vld $vr26, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2928 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr6, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2960 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2976 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 2992 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3008 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr10, $sp, 880 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3024 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - vld $vr12, $sp, 864 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3040 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr13, $sp, 848 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3056 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr15, $sp, 832 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3072 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr16, $sp, 816 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3088 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr17, $sp, 800 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3104 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr18, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3120 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr19, $sp, 784 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3152 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3168 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3184 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3200 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3216 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr1, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3248 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr4, $sp, 288 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3264 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3280 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr8, $sp, 272 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3296 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - vld $vr14, $sp, 720 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3312 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr1, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3328 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr21, $sp, 704 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3344 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr1, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3360 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3376 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3392 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3408 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3424 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3440 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3472 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3488 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3504 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - vld $vr1, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3520 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3536 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3552 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr1, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 3568 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3584 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3600 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 3616 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vori.b $vr2, $vr0, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1952 - add.d $t6, $sp, $a3 - fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1736 # 8-byte Folded Spill - addi.d $t0, $a2, 17 - andi $t0, $t0, 255 - slli.d $t0, $t0, 3 - vld $vr9, $sp, 1104 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4000 - add.d $a3, $sp, $a3 - vst $vr9, $a3, 0 - vld $vr0, $sp, 160 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4016 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 64 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4032 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4048 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4064 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 512 # 16-byte Folded Reload - lu12i.w $a3, 22 - ori $a3, $a3, 4080 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a3, 23 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 16 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 32 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr11, $sp, 528 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vst $vr11, $a3, 0 - vld $vr0, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 64 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 496 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 80 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 96 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 112 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 128 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 480 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 144 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 160 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 176 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 192 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 208 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 224 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 240 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 256 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 272 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 288 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 304 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 320 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 336 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 352 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 368 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 384 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 400 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 416 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr0, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 432 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 448 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr30, $sp, 128 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 464 - add.d $a3, $sp, $a3 - vst $vr30, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 480 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 496 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr0, $sp, 1584 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 512 - add.d $a3, $sp, $a3 - vst $vr0, $a3, 0 - vld $vr1, $sp, 976 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 528 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 544 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 960 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 560 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 576 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 448 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 592 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr20, $sp, 432 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 608 - add.d $a3, $sp, $a3 - vst $vr20, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 624 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr7, $sp, 112 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 640 - add.d $a3, $sp, $a3 - vst $vr7, $a3, 0 - vld $vr27, $sp, 96 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 656 - add.d $a3, $sp, $a3 - vst $vr27, $a3, 0 - vld $vr22, $sp, 416 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 672 - add.d $a3, $sp, $a3 - vst $vr22, $a3, 0 - vld $vr1, $sp, 400 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 688 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 384 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 704 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 944 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 720 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 736 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr1, $sp, 352 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 752 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 768 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr1, $sp, 912 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 784 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 800 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 816 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 832 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 848 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 864 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 880 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr1, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 896 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 912 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vld $vr1, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 928 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 944 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr1, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 960 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 976 - add.d $a3, $sp, $a3 - vst $vr10, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 992 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1008 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1024 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1040 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1056 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1072 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1088 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr1, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1104 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr26, $sp, 304 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1120 - add.d $a3, $sp, $a3 - vst $vr26, $a3, 0 - vld $vr12, $sp, 32 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1136 - add.d $a3, $sp, $a3 - vst $vr12, $a3, 0 - vld $vr28, $sp, 768 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1152 - add.d $a3, $sp, $a3 - vst $vr28, $a3, 0 - vld $vr5, $sp, 752 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1168 - add.d $a3, $sp, $a3 - vst $vr5, $a3, 0 - vld $vr31, $sp, 80 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1184 - add.d $a3, $sp, $a3 - vst $vr31, $a3, 0 - vld $vr6, $sp, 736 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1200 - add.d $a3, $sp, $a3 - vst $vr6, $a3, 0 - vori.b $vr10, $vr4, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1216 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - vld $vr1, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1232 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1248 - add.d $a3, $sp, $a3 - vst $vr8, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1264 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr4, $sp, 1136 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1280 - add.d $a3, $sp, $a3 - vst $vr4, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1296 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr3, $sp, 688 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1312 - add.d $a3, $sp, $a3 - vst $vr3, $a3, 0 - vld $vr13, $sp, 672 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1328 - add.d $a3, $sp, $a3 - vst $vr13, $a3, 0 - vld $vr14, $sp, 656 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1344 - add.d $a3, $sp, $a3 - vst $vr14, $a3, 0 - vld $vr15, $sp, 640 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1360 - add.d $a3, $sp, $a3 - vst $vr15, $a3, 0 - vld $vr16, $sp, 624 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1376 - add.d $a3, $sp, $a3 - vst $vr16, $a3, 0 - vld $vr17, $sp, 608 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1392 - add.d $a3, $sp, $a3 - vst $vr17, $a3, 0 - vld $vr18, $sp, 592 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1408 - add.d $a3, $sp, $a3 - vst $vr18, $a3, 0 - vld $vr19, $sp, 576 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1424 - add.d $a3, $sp, $a3 - vst $vr19, $a3, 0 - vld $vr21, $sp, 256 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1440 - add.d $a3, $sp, $a3 - vst $vr21, $a3, 0 - vld $vr1, $sp, 560 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1456 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr23, $sp, 240 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1472 - add.d $a3, $sp, $a3 - vst $vr23, $a3, 0 - vld $vr24, $sp, 224 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1488 - add.d $a3, $sp, $a3 - vst $vr24, $a3, 0 - vld $vr1, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1504 - add.d $a3, $sp, $a3 - vst $vr1, $a3, 0 - vld $vr25, $sp, 208 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1520 - add.d $a3, $sp, $a3 - vst $vr25, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1536 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - vld $vr29, $sp, 544 # 16-byte Folded Reload - lu12i.w $a3, 23 - ori $a3, $a3, 1552 - add.d $a3, $sp, $a3 - vst $vr29, $a3, 0 - lu12i.w $a3, 23 - ori $a3, $a3, 1568 - add.d $a3, $sp, $a3 - vst $vr2, $a3, 0 - lu12i.w $a3, 22 - ori $a3, $a3, 4000 - add.d $t6, $sp, $a3 - fldx.d $fa1, $t0, $t6 - fst.d $fa1, $sp, 1728 # 8-byte Folded Spill - addi.d $t0, $a2, 18 - andi $t0, $t0, 255 - slli.d $t0, $t0, 3 - lu12i.w $a2, 22 - ori $a2, $a2, 1952 - add.d $a2, $sp, $a2 - vst $vr9, $a2, 0 - vld $vr1, $sp, 160 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 1968 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 64 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 1984 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1536 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2000 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1520 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2016 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 512 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2032 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1504 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2048 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1088 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2064 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1488 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2080 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - lu12i.w $a2, 22 - ori $a2, $a2, 2096 - add.d $a2, $sp, $a2 - vst $vr11, $a2, 0 - vld $vr1, $sp, 1072 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2112 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 496 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2128 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1472 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2144 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1056 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2160 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1456 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2176 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 480 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2192 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1040 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1024 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2224 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1008 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2240 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1440 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2256 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1424 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2272 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1408 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2288 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1392 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2304 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1376 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2320 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1696 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2336 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1680 # 16-byte Folded Reload - lu12i.w $a2, 22 - ori $a2, $a2, 2352 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 1648 # 16-byte Folded Reload - lu12i.w $a2, 22 + lu12i.w $a2, 23 ori $a2, $a2, 2368 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1632 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2384 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1552 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2400 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1360 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2416 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1664 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2432 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1616 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2448 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1600 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2464 add.d $a2, $sp, $a2 vst $vr1, $a2, 0 - vld $vr1, $sp, 1344 # 16-byte Folded Reload - lu12i.w $a2, 22 + vld $vr7, $sp, 144 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2480 add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 144 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr7, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2496 add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - lu12i.w $a2, 22 + vst $vr5, $a2, 0 + vld $vr20, $sp, 992 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2512 add.d $a2, $sp, $a2 - vst $vr30, $a2, 0 - vld $vr1, $sp, 992 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr20, $a2, 0 + vld $vr22, $sp, 448 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2528 add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - vld $vr1, $sp, 464 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr22, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2544 add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 - lu12i.w $a2, 22 + vst $vr3, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2560 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 976 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr16, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2576 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1328 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2592 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 960 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2608 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1312 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2624 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 448 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr15, $a2, 0 + vld $vr1, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2640 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr27, $sp, 48 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2656 add.d $a2, $sp, $a2 - vst $vr20, $a2, 0 - vld $vr0, $sp, 48 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr27, $a2, 0 + vld $vr1, $sp, 112 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2672 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2688 add.d $a2, $sp, $a2 - vst $vr7, $a2, 0 - lu12i.w $a2, 22 + vst $vr6, $a2, 0 + vld $vr1, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2704 add.d $a2, $sp, $a2 - vst $vr27, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2720 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - vld $vr0, $sp, 400 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr12, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2736 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 384 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr13, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2752 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 944 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr17, $a2, 0 + vld $vr3, $sp, 352 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2768 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 368 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr3, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2784 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 352 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr28, $a2, 0 + vld $vr28, $sp, 912 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2800 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 928 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr28, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 2816 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 912 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr31, $a2, 0 + vld $vr5, $sp, 320 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2832 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 336 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr5, $a2, 0 + vld $vr31, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2848 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1296 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr31, $a2, 0 + vld $vr23, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2864 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1280 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr23, $a2, 0 + vld $vr24, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2880 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 896 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr24, $a2, 0 + vld $vr25, $sp, 304 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2896 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 320 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr25, $a2, 0 + vld $vr26, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2912 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1264 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr26, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2928 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1568 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr6, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2944 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1248 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr6, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2960 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1232 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2976 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1216 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 2992 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1200 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr10, $sp, 880 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3008 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 880 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr10, $a2, 0 + vld $vr12, $sp, 864 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3024 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 864 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr12, $a2, 0 + vld $vr13, $sp, 848 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3040 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 848 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr13, $a2, 0 + vld $vr15, $sp, 832 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3056 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 832 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr15, $a2, 0 + vld $vr16, $sp, 816 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3072 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 816 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr16, $a2, 0 + vld $vr17, $sp, 800 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3088 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 800 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr17, $a2, 0 + vld $vr18, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3104 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1184 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr18, $a2, 0 + vld $vr19, $sp, 784 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3120 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 784 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr19, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3136 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - vld $vr0, $sp, 1168 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr14, $a2, 0 + vld $vr1, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3152 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3168 add.d $a2, $sp, $a2 - vst $vr26, $a2, 0 - lu12i.w $a2, 22 + vst $vr4, $a2, 0 + vld $vr1, $sp, 768 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3184 add.d $a2, $sp, $a2 - vst $vr12, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3200 add.d $a2, $sp, $a2 - vst $vr28, $a2, 0 - lu12i.w $a2, 22 + vst $vr9, $a2, 0 + vld $vr1, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3216 add.d $a2, $sp, $a2 - vst $vr5, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3232 add.d $a2, $sp, $a2 - vst $vr31, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr4, $sp, 80 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3248 add.d $a2, $sp, $a2 - vst $vr6, $a2, 0 - lu12i.w $a2, 22 + vst $vr4, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3264 add.d $a2, $sp, $a2 - vst $vr10, $a2, 0 - vld $vr0, $sp, 1152 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr8, $a2, 0 + vld $vr8, $sp, 256 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3280 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr8, $a2, 0 + vld $vr14, $sp, 720 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3296 add.d $a2, $sp, $a2 - vst $vr8, $a2, 0 - vld $vr0, $sp, 720 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr14, $a2, 0 + vld $vr1, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3312 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr21, $sp, 704 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3328 add.d $a2, $sp, $a2 - vst $vr4, $a2, 0 - vld $vr0, $sp, 704 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr21, $a2, 0 + vld $vr1, $sp, 688 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3344 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 672 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3360 add.d $a2, $sp, $a2 - vst $vr3, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 656 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3376 add.d $a2, $sp, $a2 - vst $vr13, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 640 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3392 add.d $a2, $sp, $a2 - vst $vr14, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 624 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3408 add.d $a2, $sp, $a2 - vst $vr15, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 608 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3424 add.d $a2, $sp, $a2 - vst $vr16, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 592 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3440 add.d $a2, $sp, $a2 - vst $vr17, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 576 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3456 add.d $a2, $sp, $a2 - vst $vr18, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3472 add.d $a2, $sp, $a2 - vst $vr19, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3488 add.d $a2, $sp, $a2 - vst $vr21, $a2, 0 - vld $vr0, $sp, 560 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr2, $a2, 0 + vld $vr1, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3504 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + vld $vr1, $sp, 224 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3520 add.d $a2, $sp, $a2 - vst $vr23, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3536 add.d $a2, $sp, $a2 - vst $vr24, $a2, 0 - vld $vr0, $sp, 1120 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr11, $a2, 0 + vld $vr1, $sp, 208 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 3552 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 22 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3568 add.d $a2, $sp, $a2 - vst $vr25, $a2, 0 - vld $vr0, $sp, 192 # 16-byte Folded Reload - lu12i.w $a2, 22 + vst $vr29, $a2, 0 + lu12i.w $a2, 23 ori $a2, $a2, 3584 add.d $a2, $sp, $a2 + vst $vr30, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 3600 + add.d $a2, $sp, $a2 vst $vr0, $a2, 0 + vori.b $vr2, $vr0, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1936 + add.d $t6, $sp, $a2 + fldx.d $fa1, $t0, $t6 + fst.d $fa1, $sp, 1728 # 8-byte Folded Spill + addi.d $t0, $a1, 17 + andi $t0, $t0, 255 + slli.d $t0, $t0, 3 + vld $vr9, $sp, 496 # 16-byte Folded Reload lu12i.w $a2, 22 - ori $a2, $a2, 3600 + ori $a2, $a2, 3984 add.d $a2, $sp, $a2 - vst $vr29, $a2, 0 + vst $vr9, $a2, 0 + vld $vr0, $sp, 160 # 16-byte Folded Reload lu12i.w $a2, 22 - ori $a2, $a2, 3616 + ori $a2, $a2, 4000 add.d $a2, $sp, $a2 - vst $vr2, $a2, 0 + vst $vr0, $a2, 0 + vld $vr0, $sp, 64 # 16-byte Folded Reload lu12i.w $a2, 22 - ori $a2, $a2, 1952 - add.d $t6, $sp, $a2 - fldx.d $fa0, $t0, $t6 - fst.d $fa0, $sp, 1720 # 8-byte Folded Spill - ori $t0, $zero, 2048 - move $t1, $zero - lu12i.w $a2, 1 - ori $a2, $a2, 576 + ori $a2, $a2, 4016 add.d $a2, $sp, $a2 - vld $vr1, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 560 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a2, 22 + ori $a2, $a2, 4032 add.d $a2, $sp, $a2 - vld $vr3, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 544 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a2, 22 + ori $a2, $a2, 4048 add.d $a2, $sp, $a2 - vld $vr5, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 528 + vst $vr0, $a2, 0 + vld $vr0, $sp, 480 # 16-byte Folded Reload + lu12i.w $a2, 22 + ori $a2, $a2, 4064 add.d $a2, $sp, $a2 - vld $vr7, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 512 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a2, 22 + ori $a2, $a2, 4080 add.d $a2, $sp, $a2 - vld $vr9, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 496 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a2, 23 add.d $a2, $sp, $a2 - vld $vr11, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 480 - add.d $a2, $sp, $a2 - vld $vr13, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 464 - add.d $a2, $sp, $a2 - vld $vr15, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 448 - add.d $a2, $sp, $a2 - vld $vr17, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 432 - add.d $a2, $sp, $a2 - vld $vr19, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 416 - add.d $a2, $sp, $a2 - vld $vr21, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 400 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 400 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 384 - add.d $a2, $sp, $a2 - vld $vr28, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vld $vr30, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 336 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 336 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 320 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 320 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 304 - add.d $a2, $sp, $a2 - vld $vr2, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2160 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 288 - add.d $a2, $sp, $a2 - vld $vr4, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 272 - add.d $a2, $sp, $a2 - vld $vr6, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2144 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2144 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2128 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2112 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2112 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2096 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2096 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 256 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 256 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 240 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 240 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 224 - add.d $a2, $sp, $a2 - vld $vr8, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 208 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 208 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 192 - add.d $a2, $sp, $a2 - vld $vr10, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 176 - add.d $a2, $sp, $a2 - vld $vr12, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 160 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 144 - add.d $a2, $sp, $a2 - vld $vr14, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 128 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 112 - add.d $a2, $sp, $a2 - vld $vr16, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 96 - add.d $a2, $sp, $a2 - vld $vr18, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 80 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 80 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 64 - add.d $a2, $sp, $a2 - vld $vr20, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 48 - add.d $a2, $sp, $a2 - vld $vr25, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 32 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 32 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 16 add.d $a2, $sp, $a2 - vld $vr27, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - add.d $a2, $sp, $a2 - vld $vr29, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4080 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4064 - add.d $a2, $sp, $a2 - vld $vr31, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4048 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2080 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2064 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2064 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2048 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2032 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2032 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2016 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2016 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2000 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2000 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1984 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1984 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1968 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1952 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1936 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1936 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1920 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1920 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4032 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4032 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4016 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4016 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1904 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1904 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4000 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 4000 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3984 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3984 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1888 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1888 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3968 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3952 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1872 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1872 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3936 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3936 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3920 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3920 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1856 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1856 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3904 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3904 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3888 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3888 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1840 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1840 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3872 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3872 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3856 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3856 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1824 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1824 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3840 + vst $vr0, $a2, 0 + vld $vr11, $sp, 512 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 32 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3840 + vst $vr11, $a2, 0 + vld $vr0, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 48 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1808 + vst $vr0, $a2, 0 + vld $vr0, $sp, 464 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 64 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1808 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 80 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1792 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 96 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1792 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 112 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1776 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 128 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1776 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 144 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1760 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 160 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1760 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 176 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1744 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 192 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1744 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 208 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1728 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 224 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1728 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 240 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1712 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 256 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1712 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1696 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 272 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3824 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1680 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 288 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3824 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 304 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3808 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 320 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3808 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 336 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3792 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 352 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 368 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1696 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 384 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1696 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 400 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3776 + vst $vr0, $a2, 0 + vld $vr0, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 416 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 + vst $vr0, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 432 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 + vst $vr7, $a2, 0 + vld $vr30, $sp, 128 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 448 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3744 + vst $vr30, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 464 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3744 + vst $vr20, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 480 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1680 + vst $vr22, $a2, 0 + vld $vr0, $sp, 1552 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 496 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1680 + vst $vr0, $a2, 0 + vld $vr1, $sp, 976 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 512 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3728 + vst $vr1, $a2, 0 + vld $vr1, $sp, 960 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 528 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 + vst $vr1, $a2, 0 + vld $vr1, $sp, 944 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 544 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3712 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 560 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3712 + vst $vr1, $a2, 0 + vld $vr1, $sp, 432 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 576 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1664 + vst $vr1, $a2, 0 + vld $vr20, $sp, 416 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 592 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1664 + vst $vr20, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 608 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3696 + vst $vr27, $a2, 0 + vld $vr7, $sp, 112 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 624 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3696 + vst $vr7, $a2, 0 + vld $vr27, $sp, 96 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 640 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3680 + vst $vr27, $a2, 0 + vld $vr22, $sp, 400 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 656 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3680 + vst $vr22, $a2, 0 + vld $vr1, $sp, 384 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 672 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1648 + vst $vr1, $a2, 0 + vld $vr1, $sp, 368 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 688 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1648 + vst $vr1, $a2, 0 + vld $vr1, $sp, 928 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 704 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3664 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 720 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3664 + vst $vr3, $a2, 0 + vld $vr1, $sp, 336 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 736 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3648 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 752 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 + vst $vr28, $a2, 0 + vld $vr1, $sp, 896 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 768 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3632 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 784 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3632 + vst $vr5, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 800 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1632 + vst $vr31, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 816 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1632 + vst $vr23, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 832 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3616 + vst $vr24, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 848 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3616 + vst $vr25, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 864 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3600 + vst $vr26, $a2, 0 + vld $vr1, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 880 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 896 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3584 + vst $vr6, $a2, 0 + vld $vr1, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 912 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 928 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1616 + vst $vr1, $a2, 0 + vld $vr1, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 944 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1616 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 960 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3568 + vst $vr10, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 976 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 + vst $vr12, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 992 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3552 + vst $vr13, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1008 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3552 + vst $vr15, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1024 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3536 + vst $vr16, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1040 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3536 + vst $vr17, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1056 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1600 + vst $vr18, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1072 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1600 + vst $vr19, $a2, 0 + vld $vr1, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1088 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3520 + vst $vr1, $a2, 0 + vld $vr26, $sp, 288 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1104 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3520 + vst $vr26, $a2, 0 + vld $vr12, $sp, 32 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1120 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3504 + vst $vr12, $a2, 0 + vld $vr28, $sp, 768 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1136 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 + vst $vr28, $a2, 0 + vld $vr5, $sp, 752 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1152 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1584 + vst $vr5, $a2, 0 + vld $vr31, $sp, 272 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1168 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1584 + vst $vr31, $a2, 0 + vld $vr6, $sp, 736 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1184 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3488 + vst $vr6, $a2, 0 + vori.b $vr10, $vr4, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1200 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3488 + vst $vr4, $a2, 0 + vld $vr1, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1216 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1568 + vst $vr1, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1232 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1568 + vst $vr8, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1248 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1552 + vst $vr14, $a2, 0 + vld $vr4, $sp, 1200 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1264 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1552 + vst $vr4, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1280 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1536 + vst $vr21, $a2, 0 + vld $vr3, $sp, 688 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1296 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1536 + vst $vr3, $a2, 0 + vld $vr13, $sp, 672 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1312 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1520 + vst $vr13, $a2, 0 + vld $vr14, $sp, 656 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1328 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1520 + vst $vr14, $a2, 0 + vld $vr15, $sp, 640 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1344 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3472 + vst $vr15, $a2, 0 + vld $vr16, $sp, 624 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1360 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3472 + vst $vr16, $a2, 0 + vld $vr17, $sp, 608 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1376 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1504 + vst $vr17, $a2, 0 + vld $vr18, $sp, 592 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1392 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1504 + vst $vr18, $a2, 0 + vld $vr19, $sp, 576 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1408 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1488 + vst $vr19, $a2, 0 + vld $vr21, $sp, 240 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1424 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1488 + vst $vr21, $a2, 0 + vld $vr1, $sp, 560 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1440 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1472 + vst $vr1, $a2, 0 + vld $vr23, $sp, 544 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1456 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 + vst $vr23, $a2, 0 + vld $vr24, $sp, 224 # 16-byte Folded Reload + lu12i.w $a2, 23 ori $a2, $a2, 1472 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3456 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3456 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1456 + vst $vr24, $a2, 0 + vld $vr1, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1488 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1456 + vst $vr1, $a2, 0 + vld $vr25, $sp, 208 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1504 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3440 + vst $vr25, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1520 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 + vst $vr29, $a2, 0 + vld $vr29, $sp, 528 # 16-byte Folded Reload + lu12i.w $a2, 23 + ori $a2, $a2, 1536 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1440 + vst $vr29, $a2, 0 + lu12i.w $a2, 23 + ori $a2, $a2, 1552 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1440 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3424 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3424 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3408 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3408 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3392 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3392 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1424 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1424 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3376 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3376 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3360 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3360 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3344 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3344 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3328 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3328 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1408 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1408 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3312 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3312 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3296 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3296 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3280 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3264 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3264 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1392 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1392 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3248 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3248 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3232 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3232 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3216 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3216 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1376 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1376 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3200 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3200 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1360 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1360 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3184 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3168 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3168 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1344 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1344 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3152 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3152 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3136 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3136 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1328 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1328 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1312 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1312 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3120 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3120 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1296 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1296 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1280 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1280 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1264 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1264 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1248 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1248 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1232 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1232 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1216 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1216 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1200 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1200 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1184 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1184 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1168 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1168 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1152 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1152 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1136 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1136 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3104 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3104 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1120 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1120 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3088 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3088 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3072 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3072 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1104 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1104 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1088 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1088 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2192 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2192 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3056 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3056 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3040 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3040 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1072 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1072 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3024 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3024 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3008 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3008 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2992 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2992 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1040 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1040 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2976 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2976 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2960 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2960 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2944 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2944 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1024 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1024 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2928 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2928 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2912 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2912 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 1008 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 1008 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 992 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 992 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 976 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 976 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 960 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 960 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 944 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 944 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 928 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 928 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 912 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 912 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 896 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 896 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 880 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 880 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 864 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 864 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 848 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 848 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2896 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2880 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2880 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2864 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2864 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2848 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2848 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2832 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2832 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 832 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 832 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2816 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2816 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2800 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2800 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 816 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 816 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2784 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2784 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2768 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2768 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 800 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 800 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2752 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2736 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2736 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 784 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 784 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2720 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2720 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2704 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2704 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 768 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 768 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 752 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 752 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 736 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 736 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 720 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 720 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 704 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 704 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 688 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 688 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 672 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 672 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 656 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 656 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2688 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2688 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 640 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 640 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 624 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 624 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2672 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2672 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2656 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 608 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 608 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2640 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2640 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2624 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 592 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 592 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2608 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2608 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2592 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2592 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2576 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2576 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2560 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2560 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2544 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2544 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2528 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2528 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2512 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2512 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2496 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2480 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2464 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2464 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2448 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2448 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2432 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2432 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2416 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2416 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2400 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2400 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2384 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2384 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2368 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2368 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2352 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2352 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2336 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2336 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2320 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2320 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2304 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2304 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2288 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2288 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2272 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2272 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2256 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2256 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2240 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2240 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2224 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2224 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2208 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2208 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2192 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2192 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2176 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2176 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2160 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2160 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2144 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2144 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2128 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2128 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2112 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2112 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2096 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2096 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2080 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2080 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2064 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2064 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 2048 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2048 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - vld $vr22, $sp, 2032 # 16-byte Folded Reload - vst $vr22, $sp, 2032 # 16-byte Folded Spill - vld $vr22, $sp, 2016 # 16-byte Folded Reload - vst $vr22, $sp, 2016 # 16-byte Folded Spill - vld $vr22, $sp, 2000 # 16-byte Folded Reload - vst $vr22, $sp, 2000 # 16-byte Folded Spill - vld $vr22, $sp, 1984 # 16-byte Folded Reload - vst $vr22, $sp, 1984 # 16-byte Folded Spill - vld $vr22, $sp, 1968 # 16-byte Folded Reload - vst $vr22, $sp, 1968 # 16-byte Folded Spill - vld $vr22, $sp, 1952 # 16-byte Folded Reload - vst $vr22, $sp, 1952 # 16-byte Folded Spill - vld $vr22, $sp, 1936 # 16-byte Folded Reload - vst $vr22, $sp, 1936 # 16-byte Folded Spill - vld $vr22, $sp, 1920 # 16-byte Folded Reload - vst $vr22, $sp, 1920 # 16-byte Folded Spill - vld $vr22, $sp, 1904 # 16-byte Folded Reload - vst $vr22, $sp, 1904 # 16-byte Folded Spill + vst $vr2, $a2, 0 + lu12i.w $a2, 22 + ori $a2, $a2, 3984 + add.d $t6, $sp, $a2 + fldx.d $fa1, $t0, $t6 + fst.d $fa1, $sp, 1720 # 8-byte Folded Spill + addi.d $t0, $a1, 18 + andi $t0, $t0, 255 + slli.d $t0, $t0, 3 + lu12i.w $a1, 22 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vst $vr9, $a1, 0 + vld $vr1, $sp, 160 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 64 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1648 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1168 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 480 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1632 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1152 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1136 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vst $vr11, $a1, 0 + vld $vr1, $sp, 1120 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 464 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1488 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1104 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1472 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1088 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1456 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2192 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1072 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2208 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1056 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2224 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1040 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2240 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1024 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2256 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1008 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2272 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1440 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2288 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1424 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2304 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1696 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2320 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1680 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2336 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1616 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2352 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1600 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2368 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1504 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2384 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1584 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2400 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1664 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2416 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1568 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2432 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1408 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2448 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 1392 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2464 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 144 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2480 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2496 + add.d $a1, $sp, $a1 + vst $vr30, $a1, 0 + vld $vr1, $sp, 992 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2512 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + vld $vr1, $sp, 448 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2528 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2544 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 976 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2560 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 960 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2576 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 944 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2592 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1376 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2608 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 432 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2624 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2640 + add.d $a1, $sp, $a1 + vst $vr20, $a1, 0 + vld $vr0, $sp, 48 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2656 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2672 + add.d $a1, $sp, $a1 + vst $vr7, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2688 + add.d $a1, $sp, $a1 + vst $vr27, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 2704 + add.d $a1, $sp, $a1 + vst $vr22, $a1, 0 + vld $vr0, $sp, 384 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2720 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 368 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2736 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 928 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2752 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 352 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2768 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 336 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2784 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 912 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2800 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 896 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2816 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 320 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2832 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1360 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2848 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1344 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2864 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1328 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2880 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 304 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2896 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1312 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2912 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1536 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2928 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1296 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2944 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1520 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2960 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1280 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2976 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1264 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 2992 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 880 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3008 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 864 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3024 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 848 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3040 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 832 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3056 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 816 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3072 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 800 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3088 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1248 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3104 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 784 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3120 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + vld $vr0, $sp, 1232 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3136 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3152 + add.d $a1, $sp, $a1 + vst $vr26, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3168 + add.d $a1, $sp, $a1 + vst $vr12, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3184 + add.d $a1, $sp, $a1 + vst $vr28, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3200 + add.d $a1, $sp, $a1 + vst $vr5, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3216 + add.d $a1, $sp, $a1 + vst $vr31, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3232 + add.d $a1, $sp, $a1 + vst $vr6, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3248 + add.d $a1, $sp, $a1 + vst $vr10, $a1, 0 + vld $vr0, $sp, 1216 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3264 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3280 + add.d $a1, $sp, $a1 + vst $vr8, $a1, 0 + vld $vr0, $sp, 720 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3296 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3312 + add.d $a1, $sp, $a1 + vst $vr4, $a1, 0 + vld $vr0, $sp, 704 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3328 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3344 + add.d $a1, $sp, $a1 + vst $vr3, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3360 + add.d $a1, $sp, $a1 + vst $vr13, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3376 + add.d $a1, $sp, $a1 + vst $vr14, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3392 + add.d $a1, $sp, $a1 + vst $vr15, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3408 + add.d $a1, $sp, $a1 + vst $vr16, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3424 + add.d $a1, $sp, $a1 + vst $vr17, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3440 + add.d $a1, $sp, $a1 + vst $vr18, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3456 + add.d $a1, $sp, $a1 + vst $vr19, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3472 + add.d $a1, $sp, $a1 + vst $vr21, $a1, 0 + vld $vr0, $sp, 560 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3488 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3504 + add.d $a1, $sp, $a1 + vst $vr23, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3520 + add.d $a1, $sp, $a1 + vst $vr24, $a1, 0 + vld $vr0, $sp, 1184 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3536 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3552 + add.d $a1, $sp, $a1 + vst $vr25, $a1, 0 + vld $vr0, $sp, 192 # 16-byte Folded Reload + lu12i.w $a1, 22 + ori $a1, $a1, 3568 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3584 + add.d $a1, $sp, $a1 + vst $vr29, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 3600 + add.d $a1, $sp, $a1 + vst $vr2, $a1, 0 + lu12i.w $a1, 22 + ori $a1, $a1, 1936 + add.d $t6, $sp, $a1 + fldx.d $fa0, $t0, $t6 + fst.d $fa0, $sp, 1712 # 8-byte Folded Spill + ori $t0, $zero, 2048 + move $t4, $zero + lu12i.w $a1, 1 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vld $vr2, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vld $vr4, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vld $vr6, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vld $vr8, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vld $vr12, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vld $vr14, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vld $vr16, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vld $vr18, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vld $vr20, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vld $vr27, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vld $vr29, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vld $vr31, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vld $vr1, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vld $vr3, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1920 + add.d $a1, $sp, $a1 + vld $vr5, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vld $vr7, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1888 + add.d $a1, $sp, $a1 + vld $vr9, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1872 + add.d $a1, $sp, $a1 + vld $vr11, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1856 + add.d $a1, $sp, $a1 + vld $vr13, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1840 + add.d $a1, $sp, $a1 + vld $vr15, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1824 + add.d $a1, $sp, $a1 + vld $vr17, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1808 + add.d $a1, $sp, $a1 + vld $vr19, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1792 + add.d $a1, $sp, $a1 + vld $vr21, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1776 + add.d $a1, $sp, $a1 + vld $vr26, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1760 + add.d $a1, $sp, $a1 + vld $vr28, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 1744 + add.d $a1, $sp, $a1 + vld $vr30, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2192 + add.d $a1, $sp, $a1 + vld $vr22, $a1, 0 # 16-byte Folded Reload .p2align 4, , 16 .LBB16_2: # %.preheader # Parent Loop BB16_1 Depth=1 # => This Inner Loop Header: Depth=2 - lu12i.w $a2, 2 - ori $a2, $a2, 1944 - add.d $a2, $sp, $a2 - st.d $t1, $a2, 0 # 8-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 48 - add.d $a2, $sp, $a2 - vst $vr25, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 3776 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 448 - add.d $a2, $sp, $a2 - vst $vr17, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 112 - add.d $a2, $sp, $a2 - vst $vr16, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 144 - add.d $a2, $sp, $a2 - vst $vr14, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 464 - add.d $a2, $sp, $a2 - vst $vr15, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 480 - add.d $a2, $sp, $a2 - vst $vr13, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 176 - add.d $a2, $sp, $a2 - vst $vr12, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 496 - add.d $a2, $sp, $a2 - vst $vr11, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 192 - add.d $a2, $sp, $a2 - vst $vr10, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 512 - add.d $a2, $sp, $a2 - vst $vr9, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 224 - add.d $a2, $sp, $a2 - vst $vr8, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vst $vr30, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 528 - add.d $a2, $sp, $a2 - vst $vr7, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 272 - add.d $a2, $sp, $a2 - vst $vr6, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - add.d $a2, $sp, $a2 - vst $vr29, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 384 - add.d $a2, $sp, $a2 - vst $vr28, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 16 - add.d $a2, $sp, $a2 - vst $vr27, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 544 - add.d $a2, $sp, $a2 - vst $vr5, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 416 - add.d $a2, $sp, $a2 - vst $vr21, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 64 - add.d $a2, $sp, $a2 - vst $vr20, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 432 - add.d $a2, $sp, $a2 - vst $vr19, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4064 - add.d $a2, $sp, $a2 - vst $vr31, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 288 - add.d $a2, $sp, $a2 - vst $vr4, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 560 - add.d $a2, $sp, $a2 - vst $vr3, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 96 - add.d $a2, $sp, $a2 - vst $vr18, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 304 - add.d $a2, $sp, $a2 - vst $vr2, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 576 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2184 - add.d $a2, $sp, $a2 - ld.d $a2, $a2, 0 # 8-byte Folded Reload - lu12i.w $a3, 1 - ori $a3, $a3, 2184 - add.d $a3, $sp, $a3 - st.d $a2, $a3, 0 # 8-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 2896 - add.d $a2, $sp, $a2 - vld $vr20, $a2, 0 # 16-byte Folded Reload - vstx $vr20, $t0, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2880 - add.d $a2, $sp, $a2 - vld $vr4, $a2, 0 # 16-byte Folded Reload - vstx $vr4, $a6, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2864 - add.d $a2, $sp, $a2 - vld $vr7, $a2, 0 # 16-byte Folded Reload - vstx $vr7, $a4, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2848 - add.d $a2, $sp, $a2 - vld $vr19, $a2, 0 # 16-byte Folded Reload - vstx $vr19, $t3, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2832 - add.d $a2, $sp, $a2 - vld $vr24, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1928 + add.d $a1, $sp, $a1 + st.d $t4, $a1, 0 # 8-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2192 + add.d $a1, $sp, $a1 + vst $vr22, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1776 + add.d $a1, $sp, $a1 + vst $vr26, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1824 + add.d $a1, $sp, $a1 + vst $vr17, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vst $vr16, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1840 + add.d $a1, $sp, $a1 + vst $vr15, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vst $vr14, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1856 + add.d $a1, $sp, $a1 + vst $vr13, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vst $vr12, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1872 + add.d $a1, $sp, $a1 + vst $vr11, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vst $vr10, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1888 + add.d $a1, $sp, $a1 + vst $vr9, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vst $vr8, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1744 + add.d $a1, $sp, $a1 + vst $vr30, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vst $vr7, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vst $vr6, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vst $vr29, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1760 + add.d $a1, $sp, $a1 + vst $vr28, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vst $vr27, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1792 + add.d $a1, $sp, $a1 + vst $vr21, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vst $vr20, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1920 + add.d $a1, $sp, $a1 + vst $vr5, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vst $vr31, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vst $vr4, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1808 + add.d $a1, $sp, $a1 + vst $vr19, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vst $vr18, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vst $vr3, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vst $vr2, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2352 + add.d $a1, $sp, $a1 + vld $vr20, $a1, 0 # 16-byte Folded Reload + vstx $vr20, $t0, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2784 + add.d $a1, $sp, $a1 + vld $vr13, $a1, 0 # 16-byte Folded Reload + ori $t0, $zero, 2064 + vstx $vr13, $t0, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2768 + add.d $a1, $sp, $a1 + vld $vr11, $a1, 0 # 16-byte Folded Reload + vstx $vr11, $a4, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2336 + add.d $a1, $sp, $a1 + vld $vr19, $a1, 0 # 16-byte Folded Reload + vstx $vr19, $t3, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 3248 + add.d $a1, $sp, $a1 + vld $vr24, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2112 - vstx $vr24, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2384 - add.d $a2, $sp, $a2 - vld $vr26, $a2, 0 # 16-byte Folded Reload + vstx $vr24, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 3232 + add.d $a1, $sp, $a1 + vld $vr25, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2128 - vstx $vr26, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2368 - add.d $a2, $sp, $a2 - vld $vr23, $a2, 0 # 16-byte Folded Reload + vstx $vr25, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 3216 + add.d $a1, $sp, $a1 + vld $vr23, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2144 - vstx $vr23, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2816 - add.d $a2, $sp, $a2 - vld $vr18, $a2, 0 # 16-byte Folded Reload + vstx $vr23, $a2, $a3 ori $a2, $zero, 2160 - vstx $vr18, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3200 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3200 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2752 + add.d $a1, $sp, $a1 + vld $vr14, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2176 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3184 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + vstx $vr14, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 3184 + add.d $a1, $sp, $a1 + vld $vr15, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2800 - add.d $a2, $sp, $a2 - vld $vr8, $a2, 0 # 16-byte Folded Reload + vstx $vr15, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2736 + add.d $a1, $sp, $a1 + vld $vr16, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 - vstx $vr8, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2352 - add.d $a2, $sp, $a2 - vld $vr10, $a2, 0 # 16-byte Folded Reload + vstx $vr16, $a2, $a3 ori $a2, $zero, 2224 - vstx $vr10, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2336 - add.d $a2, $sp, $a2 - vld $vr11, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 256 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2240 - vstx $vr11, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2320 - add.d $a2, $sp, $a2 - vld $vr14, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $t2, $zero, 2240 + lu12i.w $a1, 2 + ori $a1, $a1, 1216 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2256 - vstx $vr14, $a2, $a1 - ori $t3, $zero, 2256 - lu12i.w $a2, 1 - ori $a2, $a2, 2784 - add.d $a2, $sp, $a2 - vld $vr15, $a2, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2272 - vstx $vr15, $a2, $a1 - ori $a3, $zero, 2272 - lu12i.w $a2, 2 - ori $a2, $a2, 80 - add.d $a2, $sp, $a2 - vld $vr16, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1200 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2288 - vstx $vr16, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2304 - add.d $a2, $sp, $a2 - vld $vr17, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 240 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2304 - vstx $vr17, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1024 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1888 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2320 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2768 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 224 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 3168 + add.d $a1, $sp, $a1 + vld $vr17, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1008 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + vstx $vr17, $a2, $a3 ori $a2, $zero, 2352 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2752 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 208 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2368 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1920 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 192 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2384 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3168 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1872 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2400 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3152 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3152 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2416 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2736 - add.d $a2, $sp, $a2 - vld $vr27, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 176 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2432 - vstx $vr27, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2720 - add.d $a2, $sp, $a2 - vld $vr21, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 2720 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a4, $zero, 2432 ori $a2, $zero, 2448 - vstx $vr21, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2704 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 160 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a7, $zero, 2448 ori $a2, $zero, 2464 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3136 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3136 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $t3, $zero, 2464 ori $a2, $zero, 2480 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1904 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3120 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $t5, $zero, 2480 ori $a2, $zero, 2496 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1888 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3104 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $t6, $zero, 2496 ori $a2, $zero, 2512 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1872 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1184 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1168 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2688 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2544 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1856 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1856 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2560 - vstx $vr0, $a2, $a1 + lu12i.w $a1, 1 + ori $a1, $a1, 3088 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2576 - lu12i.w $a4, 2 - ori $a4, $a4, 992 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1840 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3072 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2592 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1824 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 144 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1152 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload ori $a2, $zero, 2608 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1808 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2624 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 976 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1136 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2640 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 64 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 1 + ori $a1, $a1, 3056 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2656 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2672 - add.d $a2, $sp, $a2 - vld $vr29, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 128 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2672 - vstx $vr29, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2656 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1120 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2688 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1792 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 1104 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2704 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3120 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a1, 2 + ori $a1, $a1, 112 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 ori $a2, $zero, 2720 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2736 - lu12i.w $a4, 1 - ori $a4, $a4, 3104 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1776 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2640 - add.d $a2, $sp, $a2 - vld $vr25, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2768 - vstx $vr25, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1760 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2784 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2800 - lu12i.w $a4, 1 - ori $a4, $a4, 2624 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2816 - lu12i.w $a4, 2 - ori $a4, $a4, 960 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2832 - lu12i.w $a4, 1 - ori $a4, $a4, 2288 - add.d $a4, $sp, $a4 - vld $vr1, $a4, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $a1 - ori $a2, $zero, 2848 - lu12i.w $a4, 2 - ori $a4, $a4, 48 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2864 - lu12i.w $a4, 1 - ori $a4, $a4, 2272 - add.d $a4, $sp, $a4 - vld $vr2, $a4, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $a1 - ori $a2, $zero, 2880 - lu12i.w $a4, 2 - ori $a4, $a4, 1744 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2896 - lu12i.w $a4, 1 - ori $a4, $a4, 2256 - add.d $a4, $sp, $a4 - vld $vr3, $a4, 0 # 16-byte Folded Reload - vstx $vr3, $a2, $a1 - ori $a2, $zero, 2912 - lu12i.w $a4, 2 - ori $a4, $a4, 944 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2928 - lu12i.w $a4, 2 - ori $a4, $a4, 32 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2944 - lu12i.w $a4, 2 - ori $a4, $a4, 1728 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2960 - lu12i.w $a4, 2 - ori $a4, $a4, 16 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 2976 - lu12i.w $a4, 2 - ori $a4, $a4, 928 - add.d $a4, $sp, $a4 - vld $vr5, $a4, 0 # 16-byte Folded Reload - vstx $vr5, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1712 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2992 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3088 - add.d $a2, $sp, $a2 - vld $vr9, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3008 - vstx $vr9, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1696 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3024 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3072 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3040 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 912 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3056 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3056 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3072 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1680 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3088 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 2608 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3104 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 896 - add.d $a2, $sp, $a2 - vld $vr31, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3120 - vstx $vr31, $a2, $a1 - ori $s4, $zero, 3120 - ori $a2, $zero, 3136 - lu12i.w $a4, 1 - ori $a4, $a4, 2592 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 880 - add.d $a2, $sp, $a2 - vld $vr30, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3152 - vstx $vr30, $a2, $a1 - ori $a2, $zero, 3168 - lu12i.w $a4, 1 - ori $a4, $a4, 3040 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1664 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3200 - lu12i.w $a4, 1 - ori $a4, $a4, 2576 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3216 - lu12i.w $a4, 2 - ori $a4, $a4, 1648 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a5, $zero, 3216 - ori $a2, $zero, 3232 - lu12i.w $a4, 1 - ori $a4, $a4, 2560 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3248 - lu12i.w $a4, 2 - ori $a4, $a4, 1632 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a7, $zero, 3248 - ori $a2, $zero, 3264 - lu12i.w $a4, 2 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3280 - lu12i.w $a4, 2 - ori $a4, $a4, 1616 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $t2, $zero, 3280 - ori $a2, $zero, 3296 - lu12i.w $a4, 1 - ori $a4, $a4, 4080 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3312 - lu12i.w $a4, 2 - ori $a4, $a4, 864 - add.d $a4, $sp, $a4 - vld $vr28, $a4, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a1 - ori $a4, $zero, 3312 - ori $a2, $zero, 3328 - lu12i.w $a6, 1 - ori $a6, $a6, 4064 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3344 - lu12i.w $a6, 2 - ori $a6, $a6, 1600 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3360 - lu12i.w $a6, 1 - ori $a6, $a6, 4048 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3376 - lu12i.w $a6, 2 - ori $a6, $a6, 1584 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1568 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3392 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3408 - lu12i.w $a6, 1 - ori $a6, $a6, 4032 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1552 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3424 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3440 - lu12i.w $a6, 1 - ori $a6, $a6, 4016 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1536 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3456 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 4000 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3472 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1520 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3488 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3984 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1504 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3520 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3968 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3536 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 848 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3552 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 832 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 - vstx $vr0, $a2, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 816 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3600 - lu12i.w $a6, 1 - ori $a6, $a6, 3952 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3616 - lu12i.w $a6, 2 - ori $a6, $a6, 800 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3632 - lu12i.w $a6, 2 - ori $a6, $a6, 784 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3648 - lu12i.w $a6, 2 - ori $a6, $a6, 768 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3664 - lu12i.w $a6, 2 - ori $a6, $a6, 752 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3680 - lu12i.w $a6, 2 - ori $a6, $a6, 1488 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3696 - lu12i.w $a6, 2 - ori $a6, $a6, 736 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3712 - lu12i.w $a6, 1 - ori $a6, $a6, 3936 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3728 - lu12i.w $a6, 2 - ori $a6, $a6, 720 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3744 - lu12i.w $a6, 1 - ori $a6, $a6, 3920 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3760 - lu12i.w $a6, 1 - ori $a6, $a6, 3904 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - lu12i.w $a2, 1 - ori $a2, $a2, 3216 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 - vstx $vr0, $a2, $a1 - ori $a2, $zero, 3776 - lu12i.w $a6, 1 - ori $a6, $a6, 2544 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a1 - ori $a6, $zero, 3776 - lu12i.w $a2, 2 - ori $a2, $a2, 704 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 1952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1472 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 1968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 688 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 1984 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1456 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2000 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 672 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2016 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3888 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2032 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 656 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2048 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 640 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2064 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 624 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2080 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 608 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2096 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 592 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2112 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 576 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2128 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 560 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2144 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 544 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2160 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 528 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2176 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1440 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2192 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 512 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1424 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2224 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 496 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2240 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 480 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2256 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2528 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2272 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1408 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2288 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3024 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2304 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1392 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2320 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3008 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2336 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1376 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2352 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2992 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2368 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1360 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2384 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2512 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2400 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1344 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2416 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2240 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2432 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1328 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2448 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2976 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2464 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1312 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2480 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2496 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2496 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1296 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2512 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3872 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2528 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1280 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2544 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2960 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2560 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2480 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2576 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3856 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2592 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1040 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2608 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 96 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2624 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 112 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2640 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1056 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2656 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 128 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2672 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 144 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2688 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1072 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2704 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1088 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2720 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3232 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2736 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3248 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2752 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1104 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2768 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1120 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2784 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 176 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2800 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1136 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2816 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 160 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2832 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1184 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2848 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1152 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2864 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1168 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2880 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 192 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2896 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3264 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2912 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1200 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2928 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3280 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2944 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1264 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2960 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3296 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2976 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 208 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 2992 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 224 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3008 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1216 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3024 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 240 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3040 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 256 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3056 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 272 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3072 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 288 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3088 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1232 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3104 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 304 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3120 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 320 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3136 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 336 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3152 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3168 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3312 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3184 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1248 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3200 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3328 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3216 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3344 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3232 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3248 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3360 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3264 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2400 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3280 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3392 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3296 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3376 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3312 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3408 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3328 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3424 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3344 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1088 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 2736 + lu12i.w $a1, 2 + ori $a1, $a1, 96 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 2752 + lu12i.w $a1, 2 + ori $a1, $a1, 80 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 2768 + lu12i.w $a1, 2 + ori $a1, $a1, 64 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1072 + add.d $a1, $sp, $a1 + vld $vr26, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 2784 + vstx $vr26, $a1, $a3 + ori $a2, $zero, 2800 + lu12i.w $a1, 1 + ori $a1, $a1, 3040 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 2816 lu12i.w $a2, 2 - ori $a2, $a2, 416 + ori $a2, $a2, 1840 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3360 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 2832 + lu12i.w $a1, 1 + ori $a1, $a1, 2704 + add.d $a1, $sp, $a1 + vld $vr1, $a1, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $a3 + ori $a1, $zero, 2848 lu12i.w $a2, 2 - ori $a2, $a2, 384 + ori $a2, $a2, 1824 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3376 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 2864 + lu12i.w $a1, 1 + ori $a1, $a1, 2320 + add.d $a1, $sp, $a1 + vld $vr2, $a1, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $a3 + ori $a1, $zero, 2880 lu12i.w $a2, 2 - ori $a2, $a2, 400 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3392 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2912 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3408 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3440 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3424 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3456 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3440 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3472 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3456 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2224 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3472 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3488 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3488 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2928 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3504 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3504 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3520 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3520 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3536 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3536 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3552 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3552 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3568 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3568 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3584 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3584 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3600 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3600 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3616 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2416 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3632 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3648 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3648 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3616 + ori $a2, $a2, 1808 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3664 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3632 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 2896 + lu12i.w $a1, 1 + ori $a1, $a1, 3024 + add.d $a1, $sp, $a1 + vld $vr3, $a1, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $a3 + ori $a1, $zero, 2912 + lu12i.w $a2, 2 + ori $a2, $a2, 1792 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3680 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2432 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 2928 + lu12i.w $a1, 1 + ori $a1, $a1, 2304 + add.d $a1, $sp, $a1 + vld $vr4, $a1, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $a3 + ori $a1, $zero, 2944 + lu12i.w $a2, 2 + ori $a2, $a2, 1776 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3696 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 2960 + lu12i.w $a1, 1 + ori $a1, $a1, 2288 + add.d $a1, $sp, $a1 + vld $vr5, $a1, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $a3 + ori $a1, $zero, 2976 + lu12i.w $a2, 2 + ori $a2, $a2, 1056 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vld $vr21, $a2, 0 # 16-byte Folded Reload + vstx $vr21, $a1, $a3 + ori $a2, $zero, 2992 + lu12i.w $a1, 2 + ori $a1, $a1, 1760 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3008 + lu12i.w $a1, 1 + ori $a1, $a1, 2688 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3024 lu12i.w $a2, 2 - ori $a2, $a2, 432 + ori $a2, $a2, 1744 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3712 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + lu12i.w $a1, 1 + ori $a1, $a1, 2272 + add.d $a1, $sp, $a1 + vld $vr12, $a1, 0 # 16-byte Folded Reload + ori $a2, $zero, 3040 + vstx $vr12, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1728 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3056 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3072 + lu12i.w $a1, 1 + ori $a1, $a1, 2672 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 48 + add.d $a1, $sp, $a1 + vld $vr27, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3088 + vstx $vr27, $a1, $a3 + ori $a2, $zero, 3104 + lu12i.w $a1, 1 + ori $a1, $a1, 3008 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1712 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3120 + vstx $vr0, $a1, $a3 + ori $a1, $zero, 3136 lu12i.w $a2, 1 - ori $a2, $a2, 3664 + ori $a2, $a2, 2992 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3728 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1040 + add.d $a1, $sp, $a1 + vld $vr31, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3152 + vstx $vr31, $a1, $a3 + ori $a1, $zero, 3168 lu12i.w $a2, 1 - ori $a2, $a2, 3680 + ori $a2, $a2, 2656 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3744 + vstx $vr0, $a1, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1024 + add.d $a1, $sp, $a1 + vld $vr30, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3184 + vstx $vr30, $a1, $a3 + ori $a2, $zero, 3200 + lu12i.w $a1, 1 + ori $a1, $a1, 2640 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3216 + lu12i.w $a2, 2 + ori $a2, $a2, 1008 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vld $vr29, $a2, 0 # 16-byte Folded Reload + vstx $vr29, $a1, $a3 + ori $a2, $zero, 3232 + lu12i.w $a1, 1 + ori $a1, $a1, 2624 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3248 lu12i.w $a2, 2 - ori $a2, $a2, 464 + ori $a2, $a2, 992 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3760 + vld $vr28, $a2, 0 # 16-byte Folded Reload + vstx $vr28, $a1, $a3 + ori $a2, $zero, 3264 + lu12i.w $a1, 1 + ori $a1, $a1, 2608 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3280 + lu12i.w $a2, 2 + ori $a2, $a2, 976 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3696 + vld $vr8, $a2, 0 # 16-byte Folded Reload + vstx $vr8, $a1, $a3 + ori $a2, $zero, 3296 + lu12i.w $a1, 1 + ori $a1, $a1, 2592 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3312 + lu12i.w $a2, 2 + ori $a2, $a2, 960 add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3776 + vld $vr7, $a2, 0 # 16-byte Folded Reload + vstx $vr7, $a1, $a3 + ori $a2, $zero, 3328 + lu12i.w $a1, 1 + ori $a1, $a1, 2256 + add.d $a1, $sp, $a1 + vld $vr9, $a1, 0 # 16-byte Folded Reload + vstx $vr9, $a2, $a3 + ori $a1, $zero, 3344 + lu12i.w $a2, 2 + ori $a2, $a2, 944 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3712 + vld $vr6, $a2, 0 # 16-byte Folded Reload + vstx $vr6, $a1, $a3 + ori $a2, $zero, 3360 + lu12i.w $a1, 1 + ori $a1, $a1, 2240 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3376 + lu12i.w $a2, 2 + ori $a2, $a2, 1696 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3792 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2448 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3392 + lu12i.w $a1, 2 + ori $a1, $a1, 1680 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3408 + lu12i.w $a2, 2 + ori $a2, $a2, 32 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3808 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3728 + vstx $vr0, $a1, $a3 + ori $a1, $zero, 3424 + lu12i.w $a2, 2 + ori $a2, $a2, 1664 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3824 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3776 + vstx $vr0, $a1, $a3 + ori $a1, $zero, 3440 + lu12i.w $a2, 2 + ori $a2, $a2, 928 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3840 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3744 + vstx $vr0, $a1, $a3 + ori $a1, $zero, 3456 + lu12i.w $a2, 2 + ori $a2, $a2, 912 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3856 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3760 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3472 + lu12i.w $a1, 1 + ori $a1, $a1, 2576 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + lu12i.w $a1, 2 + ori $a1, $a1, 1648 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + ori $a1, $zero, 3488 + vstx $vr0, $a1, $a3 + ori $a5, $zero, 3488 + ori $a2, $zero, 3504 + lu12i.w $a1, 1 + ori $a1, $a1, 2560 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3520 + lu12i.w $a1, 2 + ori $a1, $a1, 1632 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3536 + lu12i.w $a1, 1 + ori $a1, $a1, 2544 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3552 + lu12i.w $a1, 2 + ori $a1, $a1, 1616 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3568 + lu12i.w $a1, 1 + ori $a1, $a1, 2976 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3584 + lu12i.w $a1, 2 + ori $a1, $a1, 1600 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3600 + lu12i.w $a1, 1 + ori $a1, $a1, 2528 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3616 + lu12i.w $a2, 2 + ori $a2, $a2, 16 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3872 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3632 + lu12i.w $a1, 2 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3648 lu12i.w $a2, 1 - ori $a2, $a2, 3792 + ori $a2, $a2, 4080 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3888 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3808 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3664 + lu12i.w $a1, 1 + ori $a1, $a1, 4064 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3680 + lu12i.w $a2, 2 + ori $a2, $a2, 1584 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3904 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3824 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3696 + lu12i.w $a1, 1 + ori $a1, $a1, 2512 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3712 + lu12i.w $a2, 2 + ori $a2, $a2, 1568 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3920 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3728 + lu12i.w $a1, 2 + ori $a1, $a1, 896 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3744 lu12i.w $a2, 1 - ori $a2, $a2, 3840 + ori $a2, $a2, 4048 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3936 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 + vstx $vr0, $a1, $a3 + ori $a2, $zero, 3760 + lu12i.w $a1, 1 + ori $a1, $a1, 2496 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a2, $zero, 3792 + lu12i.w $a1, 2 + ori $a1, $a1, 272 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a3 + ori $a1, $zero, 3776 lu12i.w $a2, 1 - ori $a2, $a2, 2464 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3952 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 448 + ori $a2, $a2, 4032 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3968 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2944 - add.d $a2, $sp, $a2 - vld $vr13, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 21 - ori $a2, $a2, 3984 - add.d $a2, $sp, $a2 - vst $vr13, $a2, 0 - andi $t0, $t1, 511 + vstx $vr0, $a1, $a3 + ori $a6, $zero, 3776 + st.d $a6, $sp, 0 # 8-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2480 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1552 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2464 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1536 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2960 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1520 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2448 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1504 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 4016 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1488 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 880 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 4000 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 864 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2944 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 848 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 832 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 816 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2192 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1472 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2208 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3984 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2224 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 800 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2240 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2928 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2256 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1456 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2272 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2224 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2288 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1440 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2304 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 784 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2320 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1424 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2336 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 768 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2352 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1408 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2368 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3968 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2384 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1392 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2400 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3952 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2416 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1376 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2432 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3936 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2448 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1360 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2464 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3920 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2480 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1344 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2496 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 752 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2512 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1328 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2528 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 736 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2544 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 720 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2560 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 704 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2576 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1232 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2592 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1248 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2608 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 288 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2624 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 304 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2640 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 320 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2656 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3264 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2672 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 336 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2688 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 352 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2704 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 368 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2720 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3280 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2736 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2800 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2752 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3296 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2768 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 384 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2784 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3312 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2800 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2816 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2816 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2208 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2832 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3328 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2848 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2368 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2864 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 400 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2880 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3344 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2896 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 416 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2912 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2384 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2928 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 512 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2944 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 432 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2960 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3360 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2976 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2400 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 2992 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2416 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3008 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 448 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3024 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 464 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3040 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3376 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3056 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 480 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3072 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1264 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3088 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 496 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3104 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3392 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3120 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1280 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3136 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3424 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3152 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3408 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3168 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1296 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3184 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3440 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3200 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3456 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3216 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 1312 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3232 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3472 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3248 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3488 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3264 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 528 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3280 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2832 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3296 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3504 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3312 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3520 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3328 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3552 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3344 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 544 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3360 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3536 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3376 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3568 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3392 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3584 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3408 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3600 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3424 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3616 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3440 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3632 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3456 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3648 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3472 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 560 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3488 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3664 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3504 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 576 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3520 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3680 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3536 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 592 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3552 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2848 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3568 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 608 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3584 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2864 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3600 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2880 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3616 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3696 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3632 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2896 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3648 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2912 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3664 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 624 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3680 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3712 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3696 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3728 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3712 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3744 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3728 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3904 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3744 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3760 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3760 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 640 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3776 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 656 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3792 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3776 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3808 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3824 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3824 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3792 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3840 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3808 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3856 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3840 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3872 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3856 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3888 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3872 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3904 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 3888 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3920 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 672 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3936 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 2 + ori $a1, $a1, 688 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3952 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 2432 + add.d $a1, $sp, $a1 + vld $vr0, $a1, 0 # 16-byte Folded Reload + lu12i.w $a1, 21 + ori $a1, $a1, 3968 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 + andi $t0, $t4, 511 slli.d $t1, $t0, 3 - lu12i.w $a2, 2 - ori $a2, $a2, 1944 - add.d $a2, $sp, $a2 - ld.d $t0, $a2, 0 # 8-byte Folded Reload - addi.d $t0, $t0, 25 + addi.d $t0, $t4, 25 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa0, $t1, $a1 + fldx.d $fa0, $t1, $a3 fst.d $fa0, $sp, 1896 # 8-byte Folded Spill ori $t1, $zero, 2048 vstx $vr20, $t1, $a0 ori $t1, $zero, 2064 - vori.b $vr0, $vr4, 0 - vstx $vr4, $t1, $a0 + vori.b $vr0, $vr13, 0 + vstx $vr13, $t1, $a0 ori $t1, $zero, 2080 - vori.b $vr4, $vr7, 0 - vstx $vr7, $t1, $a0 + vstx $vr11, $t1, $a0 ori $t1, $zero, 2096 vstx $vr19, $t1, $a0 ori $a1, $zero, 2112 vstx $vr24, $a1, $a0 ori $a1, $zero, 2128 - vstx $vr26, $a1, $a0 + vstx $vr25, $a1, $a0 ori $a1, $zero, 2144 vstx $vr23, $a1, $a0 ori $a1, $zero, 2160 - vstx $vr18, $a1, $a0 - ori $a1, $zero, 2176 - st.d $a6, $sp, 0 # 8-byte Folded Spill lu12i.w $a2, 1 ori $a2, $a2, 3200 add.d $a2, $sp, $a2 - vld $vr6, $a2, 0 # 16-byte Folded Reload - vstx $vr6, $a1, $a0 - ori $a2, $zero, 2192 - lu12i.w $a1, 1 - ori $a1, $a1, 3184 - add.d $a1, $sp, $a1 - vld $vr6, $a1, 0 # 16-byte Folded Reload - vstx $vr6, $a2, $a0 - vori.b $vr6, $vr8, 0 - ori $s2, $zero, 2208 - vstx $vr8, $s2, $a0 - vori.b $vr8, $vr10, 0 - ori $s7, $zero, 2224 - vstx $vr10, $s7, $a0 - vori.b $vr10, $vr11, 0 - ori $s6, $zero, 2240 - vstx $vr11, $s6, $a0 + vld $vr18, $a2, 0 # 16-byte Folded Reload + vstx $vr18, $a1, $a0 + ori $a1, $zero, 2176 vori.b $vr11, $vr14, 0 - vstx $vr14, $t3, $a0 - vori.b $vr12, $vr15, 0 - vstx $vr15, $a3, $a0 - vori.b $vr22, $vr16, 0 + vstx $vr14, $a1, $a0 + vori.b $vr14, $vr15, 0 + ori $a1, $zero, 2192 + vstx $vr15, $a1, $a0 + ori $a2, $zero, 2208 + vstx $vr16, $a2, $a0 + ori $a1, $zero, 2224 + lu12i.w $a3, 2 + ori $a3, $a3, 256 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + lu12i.w $a1, 2 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $t2, $a0 + ori $a1, $zero, 2256 + lu12i.w $a3, 2 + ori $a3, $a3, 1216 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $a1, $zero, 2272 + lu12i.w $a3, 2 + ori $a3, $a3, 1200 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2288 - vstx $vr16, $a1, $a0 - vori.b $vr14, $vr17, 0 - ori $t3, $zero, 2304 - vstx $vr17, $t3, $a0 + lu12i.w $a3, 2 + ori $a3, $a3, 240 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $a1, $zero, 2304 + lu12i.w $a3, 2 + ori $a3, $a3, 1888 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2320 lu12i.w $a3, 2 - ori $a3, $a3, 1024 + ori $a3, $a3, 224 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - lu12i.w $a1, 1 - ori $a1, $a1, 2768 - add.d $a1, $sp, $a1 - vld $vr15, $a1, 0 # 16-byte Folded Reload + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2336 - vstx $vr15, $a1, $a0 + vstx $vr17, $a1, $a0 ori $a1, $zero, 2352 lu12i.w $a3, 2 - ori $a3, $a3, 1008 + ori $a3, $a3, 208 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - lu12i.w $a1, 1 - ori $a1, $a1, 2752 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + lu12i.w $a1, 2 + ori $a1, $a1, 192 add.d $a1, $sp, $a1 - vld $vr17, $a1, 0 # 16-byte Folded Reload + vld $vr22, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2368 - vstx $vr17, $a1, $a0 + vstx $vr22, $a1, $a0 ori $a1, $zero, 2384 lu12i.w $a3, 2 - ori $a3, $a3, 1920 + ori $a3, $a3, 1872 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2400 lu12i.w $a3, 1 - ori $a3, $a3, 3168 + ori $a3, $a3, 3152 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2416 - lu12i.w $a3, 1 - ori $a3, $a3, 3152 + lu12i.w $a3, 2 + ori $a3, $a3, 176 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $a1, $zero, 2432 - vstx $vr27, $a1, $a0 - ori $a1, $zero, 2448 - vstx $vr21, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 lu12i.w $a1, 1 - ori $a1, $a1, 2704 + ori $a1, $a1, 2720 add.d $a1, $sp, $a1 - vld $vr27, $a1, 0 # 16-byte Folded Reload - ori $a1, $zero, 2464 - vstx $vr27, $a1, $a0 - ori $a1, $zero, 2480 - lu12i.w $a3, 1 - ori $a3, $a3, 3136 - add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $a1, $zero, 2496 - lu12i.w $a3, 2 - ori $a3, $a3, 1904 - add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $a4, $a0 + lu12i.w $a1, 2 + ori $a1, $a1, 160 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $a7, $a0 + lu12i.w $a1, 1 + ori $a1, $a1, 3136 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $t3, $a0 + lu12i.w $a1, 1 + ori $a1, $a1, 3120 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $t5, $a0 + lu12i.w $a1, 1 + ori $a1, $a1, 3104 + add.d $a1, $sp, $a1 + vld $vr10, $a1, 0 # 16-byte Folded Reload + vstx $vr10, $t6, $a0 + lu12i.w $a1, 2 + ori $a1, $a1, 1184 + add.d $a1, $sp, $a1 + vld $vr17, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2512 - lu12i.w $a3, 2 - ori $a3, $a3, 1888 - add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vstx $vr17, $a1, $a0 ori $a1, $zero, 2528 lu12i.w $a3, 2 - ori $a3, $a3, 1872 + ori $a3, $a3, 1168 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - lu12i.w $a1, 1 - ori $a1, $a1, 2688 - add.d $a1, $sp, $a1 - vld $vr21, $a1, 0 # 16-byte Folded Reload + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2544 - vstx $vr21, $a1, $a0 - ori $a1, $zero, 2560 lu12i.w $a3, 2 ori $a3, $a3, 1856 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $a1, $zero, 2560 + lu12i.w $a3, 1 + ori $a3, $a3, 3088 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2576 - lu12i.w $a3, 2 - ori $a3, $a3, 992 + lu12i.w $a3, 1 + ori $a3, $a3, 3072 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2592 lu12i.w $a3, 2 - ori $a3, $a3, 1840 + ori $a3, $a3, 144 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2608 lu12i.w $a3, 2 - ori $a3, $a3, 1824 + ori $a3, $a3, 1152 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2624 lu12i.w $a3, 2 - ori $a3, $a3, 1808 + ori $a3, $a3, 1136 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2640 - lu12i.w $a3, 2 - ori $a3, $a3, 976 + lu12i.w $a3, 1 + ori $a3, $a3, 3056 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2656 lu12i.w $a3, 2 - ori $a3, $a3, 64 + ori $a3, $a3, 128 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2672 - vstx $vr29, $a1, $a0 - lu12i.w $a1, 1 - ori $a1, $a1, 2656 - add.d $a1, $sp, $a1 - vld $vr29, $a1, 0 # 16-byte Folded Reload + lu12i.w $a3, 2 + ori $a3, $a3, 1120 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2688 - vstx $vr29, $a1, $a0 + lu12i.w $a3, 2 + ori $a3, $a3, 1104 + add.d $a3, $sp, $a3 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2704 lu12i.w $a3, 2 - ori $a3, $a3, 1792 + ori $a3, $a3, 112 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2720 - lu12i.w $a3, 1 - ori $a3, $a3, 3120 + lu12i.w $a3, 2 + ori $a3, $a3, 1088 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2736 - lu12i.w $a3, 1 - ori $a3, $a3, 3104 + lu12i.w $a3, 2 + ori $a3, $a3, 96 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2752 lu12i.w $a3, 2 - ori $a3, $a3, 1776 + ori $a3, $a3, 80 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 ori $a1, $zero, 2768 - vstx $vr25, $a1, $a0 - ori $a1, $zero, 2784 lu12i.w $a3, 2 - ori $a3, $a3, 1760 + ori $a3, $a3, 64 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $a1, $zero, 2784 + vstx $vr26, $a1, $a0 lu12i.w $a1, 1 - ori $a1, $a1, 2624 + ori $a1, $a1, 3040 add.d $a1, $sp, $a1 - vld $vr25, $a1, 0 # 16-byte Folded Reload + vld $vr26, $a1, 0 # 16-byte Folded Reload ori $a1, $zero, 2800 - vstx $vr25, $a1, $a0 + vstx $vr26, $a1, $a0 ori $a1, $zero, 2816 lu12i.w $a3, 2 - ori $a3, $a3, 960 + ori $a3, $a3, 1840 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $t5, $zero, 2832 - vstx $vr1, $t5, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $t7, $zero, 2832 + vstx $vr1, $t7, $a0 ori $a1, $zero, 2848 lu12i.w $a3, 2 - ori $a3, $a3, 48 - add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $t4, $zero, 2864 - vstx $vr2, $t4, $a0 - ori $a1, $zero, 2880 - lu12i.w $a3, 2 - ori $a3, $a3, 1744 + ori $a3, $a3, 1824 add.d $a3, $sp, $a3 - vld $vr7, $a3, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 + vld $vr10, $a3, 0 # 16-byte Folded Reload + vstx $vr10, $a1, $a0 + ori $a1, $zero, 2864 + vstx $vr2, $a1, $a0 + ori $a3, $zero, 2880 + lu12i.w $a4, 2 + ori $a4, $a4, 1808 + add.d $a4, $sp, $a4 + vld $vr10, $a4, 0 # 16-byte Folded Reload + vstx $vr10, $a3, $a0 ori $a3, $zero, 2896 vstx $vr3, $a3, $a0 - ori $a1, $zero, 2912 + ori $a4, $zero, 2912 lu12i.w $a6, 2 - ori $a6, $a6, 944 + ori $a6, $a6, 1792 add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $a1, $zero, 2928 + vld $vr10, $a6, 0 # 16-byte Folded Reload + vstx $vr10, $a4, $a0 + ori $t5, $zero, 2928 + vstx $vr4, $t5, $a0 + ori $a4, $zero, 2944 lu12i.w $a6, 2 - ori $a6, $a6, 32 + ori $a6, $a6, 1776 add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $a1, $a0 - ori $t1, $zero, 2944 + vld $vr10, $a6, 0 # 16-byte Folded Reload + vstx $vr10, $a4, $a0 + ori $t4, $zero, 2960 + vstx $vr5, $t4, $a0 + ori $t2, $zero, 2976 + vstx $vr21, $t2, $a0 + ori $fp, $zero, 2992 + lu12i.w $a4, 2 + ori $a4, $a4, 1760 + add.d $a4, $sp, $a4 + vld $vr10, $a4, 0 # 16-byte Folded Reload + vstx $vr10, $fp, $a0 + ori $t8, $zero, 3008 + lu12i.w $a4, 1 + ori $a4, $a4, 2688 + add.d $a4, $sp, $a4 + vld $vr21, $a4, 0 # 16-byte Folded Reload + vstx $vr21, $t8, $a0 + ori $t6, $zero, 3024 + lu12i.w $a4, 2 + ori $a4, $a4, 1744 + add.d $a4, $sp, $a4 + vld $vr10, $a4, 0 # 16-byte Folded Reload + vstx $vr10, $t6, $a0 + ori $s0, $zero, 3040 + vori.b $vr10, $vr12, 0 + vstx $vr12, $s0, $a0 + ori $a4, $zero, 3056 lu12i.w $a6, 2 ori $a6, $a6, 1728 add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $t1, $a0 - ori $t7, $zero, 2960 - lu12i.w $a6, 2 - ori $a6, $a6, 16 - add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $t7, $a0 - ori $t1, $zero, 2976 - vstx $vr5, $t1, $a0 - ori $fp, $zero, 2992 + vld $vr12, $a6, 0 # 16-byte Folded Reload + vstx $vr12, $a4, $a0 + ori $s1, $zero, 3072 + lu12i.w $a4, 1 + ori $a4, $a4, 2672 + add.d $a4, $sp, $a4 + vld $vr12, $a4, 0 # 16-byte Folded Reload + vstx $vr12, $s1, $a0 + ori $a4, $zero, 3088 + vstx $vr27, $a4, $a0 + ori $s3, $zero, 3104 + lu12i.w $a4, 1 + ori $a4, $a4, 3008 + add.d $a4, $sp, $a4 + vld $vr15, $a4, 0 # 16-byte Folded Reload + vstx $vr15, $s3, $a0 + ori $a4, $zero, 3120 lu12i.w $a6, 2 ori $a6, $a6, 1712 add.d $a6, $sp, $a6 - vld $vr5, $a6, 0 # 16-byte Folded Reload - vstx $vr5, $fp, $a0 - ori $t8, $zero, 3008 - vori.b $vr5, $vr9, 0 - vstx $vr9, $t8, $a0 - ori $t1, $zero, 3024 + vld $vr12, $a6, 0 # 16-byte Folded Reload + vstx $vr12, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2992 + add.d $a4, $sp, $a4 + vld $vr13, $a4, 0 # 16-byte Folded Reload + ori $t3, $zero, 3136 + vstx $vr13, $t3, $a0 + ori $a4, $zero, 3152 + vstx $vr31, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2656 + add.d $a4, $sp, $a4 + vld $vr12, $a4, 0 # 16-byte Folded Reload + ori $a4, $zero, 3168 + vstx $vr12, $a4, $a0 + ori $a4, $zero, 3184 + vstx $vr30, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2640 + add.d $a4, $sp, $a4 + vld $vr31, $a4, 0 # 16-byte Folded Reload + ori $ra, $zero, 3200 + vstx $vr31, $ra, $a0 + ori $a4, $zero, 3216 + vstx $vr29, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2624 + add.d $a4, $sp, $a4 + vld $vr30, $a4, 0 # 16-byte Folded Reload + ori $s8, $zero, 3232 + vstx $vr30, $s8, $a0 + ori $a4, $zero, 3248 + vstx $vr28, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2608 + add.d $a4, $sp, $a4 + vld $vr29, $a4, 0 # 16-byte Folded Reload + ori $s7, $zero, 3264 + vstx $vr29, $s7, $a0 + ori $a4, $zero, 3280 + vstx $vr8, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2592 + add.d $a4, $sp, $a4 + vld $vr28, $a4, 0 # 16-byte Folded Reload + ori $s6, $zero, 3296 + vstx $vr28, $s6, $a0 + ori $a4, $zero, 3312 + vstx $vr7, $a4, $a0 + ori $s5, $zero, 3328 + vstx $vr9, $s5, $a0 + ori $a4, $zero, 3344 + vstx $vr6, $a4, $a0 + lu12i.w $a4, 1 + ori $a4, $a4, 2240 + add.d $a4, $sp, $a4 + vld $vr8, $a4, 0 # 16-byte Folded Reload + ori $s4, $zero, 3360 + vstx $vr8, $s4, $a0 + ori $a4, $zero, 3376 lu12i.w $a6, 2 ori $a6, $a6, 1696 add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $t1, $a0 - ori $s0, $zero, 3040 - lu12i.w $a6, 1 - ori $a6, $a6, 3072 - add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $s0, $a0 - ori $t6, $zero, 3056 - lu12i.w $a6, 2 - ori $a6, $a6, 912 - add.d $a6, $sp, $a6 - vld $vr9, $a6, 0 # 16-byte Folded Reload - vstx $vr9, $t6, $a0 - ori $s1, $zero, 3072 - lu12i.w $a6, 1 - ori $a6, $a6, 3056 - add.d $a6, $sp, $a6 - vld $vr9, $a6, 0 # 16-byte Folded Reload - vstx $vr9, $s1, $a0 - ori $t1, $zero, 3088 + vld $vr6, $a6, 0 # 16-byte Folded Reload + vstx $vr6, $a4, $a0 + ori $s2, $zero, 3392 + lu12i.w $a4, 2 + ori $a4, $a4, 1680 + add.d $a4, $sp, $a4 + vld $vr6, $a4, 0 # 16-byte Folded Reload + vstx $vr6, $s2, $a0 + lu12i.w $a4, 2 + ori $a4, $a4, 32 + add.d $a4, $sp, $a4 + vld $vr7, $a4, 0 # 16-byte Folded Reload + ori $a4, $zero, 3408 + vstx $vr7, $a4, $a0 + ori $a4, $zero, 3424 lu12i.w $a6, 2 - ori $a6, $a6, 1680 - add.d $a6, $sp, $a6 - vld $vr9, $a6, 0 # 16-byte Folded Reload - vstx $vr9, $t1, $a0 - ori $s3, $zero, 3104 - lu12i.w $a6, 1 - ori $a6, $a6, 2608 - add.d $a6, $sp, $a6 - vld $vr9, $a6, 0 # 16-byte Folded Reload - vstx $vr9, $s3, $a0 - vstx $vr31, $s4, $a0 - lu12i.w $a6, 1 - ori $a6, $a6, 2592 - add.d $a6, $sp, $a6 - vld $vr9, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3136 - vstx $vr9, $t1, $a0 - ori $t1, $zero, 3152 - vstx $vr30, $t1, $a0 - lu12i.w $a6, 1 - ori $a6, $a6, 3040 + ori $a6, $a6, 1664 add.d $a6, $sp, $a6 - vld $vr31, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3168 - vstx $vr31, $t1, $a0 - ori $t1, $zero, 3184 + vld $vr6, $a6, 0 # 16-byte Folded Reload + vstx $vr6, $a4, $a0 + lu12i.w $a4, 2 + ori $a4, $a4, 928 + add.d $a4, $sp, $a4 + vld $vr6, $a4, 0 # 16-byte Folded Reload + ori $a4, $zero, 3440 + vstx $vr6, $a4, $a0 + ori $a4, $zero, 3456 lu12i.w $a6, 2 - ori $a6, $a6, 1664 + ori $a6, $a6, 912 add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - vstx $vr16, $t1, $a0 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $a4, $a0 + ori $a4, $zero, 3472 lu12i.w $a6, 1 ori $a6, $a6, 2576 add.d $a6, $sp, $a6 - vld $vr30, $a6, 0 # 16-byte Folded Reload - ori $s4, $zero, 3200 - vstx $vr30, $s4, $a0 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $a4, $a0 lu12i.w $a6, 2 ori $a6, $a6, 1648 add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - vstx $vr16, $a5, $a0 - ori $s5, $zero, 3232 - lu12i.w $a5, 1 - ori $a5, $a5, 2560 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $s5, $a0 - lu12i.w $a5, 2 - ori $a5, $a5, 1632 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $a7, $a0 - ori $s8, $zero, 3264 - lu12i.w $a5, 2 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $s8, $a0 - lu12i.w $a5, 2 - ori $a5, $a5, 1616 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $t2, $a0 - ori $ra, $zero, 3296 - lu12i.w $a5, 1 - ori $a5, $a5, 4080 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $ra, $a0 - vstx $vr28, $a4, $a0 - ori $a4, $zero, 3328 - lu12i.w $a5, 1 - ori $a5, $a5, 4064 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - vstx $vr16, $a4, $a0 - lu12i.w $a5, 2 - ori $a5, $a5, 1600 - add.d $a5, $sp, $a5 - vld $vr16, $a5, 0 # 16-byte Folded Reload - ori $a5, $zero, 3344 - vstx $vr16, $a5, $a0 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $a5, $a0 lu12i.w $a0, 3 - ori $a0, $a0, 1952 + ori $a0, $a0, 1936 add.d $a5, $sp, $a0 lu12i.w $a0, 20 - ori $a0, $a0, 1952 + ori $a0, $a0, 1936 add.d $a7, $sp, $a0 - ori $a0, $zero, 3360 - lu12i.w $a6, 1 - ori $a6, $a6, 4048 - add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - vstx $vr16, $a0, $a7 - ori $t1, $zero, 3376 - lu12i.w $a6, 2 - ori $a6, $a6, 1584 - add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - vstx $vr16, $t1, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 1568 - add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3392 - vstx $vr16, $t1, $a7 - lu12i.w $a6, 1 - ori $a6, $a6, 4032 - add.d $a6, $sp, $a6 - vld $vr16, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3408 - vstx $vr16, $t1, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 1552 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3424 - vstx $vr28, $t1, $a7 - lu12i.w $a6, 1 - ori $a6, $a6, 4016 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3440 - vstx $vr28, $t1, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 1536 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3456 - vstx $vr28, $t1, $a7 - ori $t2, $zero, 3472 - lu12i.w $a6, 1 - ori $a6, $a6, 4000 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t2, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 1520 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3488 - vstx $vr28, $t1, $a7 + ori $a0, $zero, 3504 lu12i.w $a6, 1 - ori $a6, $a6, 3984 + ori $a6, $a6, 2560 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3504 - vstx $vr28, $t1, $a7 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $a0, $a7 lu12i.w $a6, 2 - ori $a6, $a6, 1504 + ori $a6, $a6, 1632 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload ori $t1, $zero, 3520 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 lu12i.w $a6, 1 - ori $a6, $a6, 3968 + ori $a6, $a6, 2544 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload ori $t1, $zero, 3536 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 lu12i.w $a6, 2 - ori $a6, $a6, 848 + ori $a6, $a6, 1616 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload ori $t1, $zero, 3552 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 + lu12i.w $a6, 1 + ori $a6, $a6, 2976 + add.d $a6, $sp, $a6 + vld $vr27, $a6, 0 # 16-byte Folded Reload ori $t1, $zero, 3568 + vstx $vr27, $t1, $a7 lu12i.w $a6, 2 - ori $a6, $a6, 832 + ori $a6, $a6, 1600 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 + vld $vr27, $a6, 0 # 16-byte Folded Reload ori $t1, $zero, 3584 - lu12i.w $a6, 2 - ori $a6, $a6, 816 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 ori $t1, $zero, 3600 lu12i.w $a6, 1 - ori $a6, $a6, 3952 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 800 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3616 - vstx $vr28, $t1, $a7 - ori $t1, $zero, 3632 - lu12i.w $a6, 2 - ori $a6, $a6, 784 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 - lu12i.w $a6, 2 - ori $a6, $a6, 768 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ori $t1, $zero, 3648 - vstx $vr28, $t1, $a7 - ori $t1, $zero, 3664 + ori $a6, $a6, 2528 + add.d $a6, $sp, $a6 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $t1, $a7 lu12i.w $a6, 2 - ori $a6, $a6, 752 + ori $a6, $a6, 16 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 + vld $vr27, $a6, 0 # 16-byte Folded Reload + ori $t1, $zero, 3616 + vstx $vr27, $t1, $a7 + ori $t1, $zero, 3632 lu12i.w $a6, 2 - ori $a6, $a6, 1488 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload + ld.d $a6, $sp, 0 # 8-byte Folded Reload + vstx $vr27, $t1, $a7 + lu12i.w $t1, 1 + ori $t1, $t1, 4080 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3648 + vstx $vr27, $t1, $a7 + lu12i.w $t1, 1 + ori $t1, $t1, 4064 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3664 + vstx $vr27, $t1, $a7 + lu12i.w $t1, 2 + ori $t1, $t1, 1584 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3680 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 + lu12i.w $t1, 1 + ori $t1, $t1, 2512 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3696 - lu12i.w $a6, 2 - ori $a6, $a6, 736 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 - lu12i.w $a6, 1 - ori $a6, $a6, 3936 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $t1, $a7 + lu12i.w $t1, 2 + ori $t1, $t1, 1568 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3712 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 + lu12i.w $t1, 2 + ori $t1, $t1, 896 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3728 - lu12i.w $a6, 2 - ori $a6, $a6, 720 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $t1, $a7 - lu12i.w $a6, 1 - ori $a6, $a6, 3920 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $t1, $a7 + lu12i.w $t1, 1 + ori $t1, $t1, 4048 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3744 - vstx $vr28, $t1, $a7 - lu12i.w $a6, 1 - ori $a6, $a6, 3904 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $t1, $a7 + lu12i.w $t1, 1 + ori $t1, $t1, 2496 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3760 - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 + lu12i.w $t1, 2 + ori $t1, $t1, 272 + add.d $t1, $sp, $t1 + vld $vr27, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3792 - lu12i.w $a6, 1 - ori $a6, $a6, 3216 - add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - ld.d $a6, $sp, 0 # 8-byte Folded Reload - vstx $vr28, $t1, $a7 + vstx $vr27, $t1, $a7 lu12i.w $t1, 1 - ori $t1, $t1, 2544 + ori $t1, $t1, 4032 add.d $t1, $sp, $t1 - vld $vr28, $t1, 0 # 16-byte Folded Reload - vstx $vr28, $a6, $a7 + vld $vr27, $t1, 0 # 16-byte Folded Reload + vstx $vr27, $a6, $a7 + lu12i.w $a6, 1 + ori $a6, $a6, 2480 + add.d $a6, $sp, $a6 + vld $vr27, $a6, 0 # 16-byte Folded Reload + lu12i.w $a6, 20 + ori $a6, $a6, 1936 + add.d $a6, $sp, $a6 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 704 + ori $a6, $a6, 1552 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 1952 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1472 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2464 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 1968 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 688 + ori $a6, $a6, 1536 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 1984 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1456 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2960 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2000 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 672 + ori $a6, $a6, 1520 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2016 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3888 + ori $a6, $a6, 2448 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2032 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 656 + ori $a6, $a6, 1504 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2048 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 640 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 4016 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2064 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 624 + ori $a6, $a6, 1488 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2080 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 608 + ori $a6, $a6, 880 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2096 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 592 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 4000 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2112 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 576 + ori $a6, $a6, 864 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2128 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 560 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2944 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2144 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 544 + ori $a6, $a6, 848 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2160 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 528 + ori $a6, $a6, 832 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2176 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1440 + ori $a6, $a6, 816 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2192 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 512 + ori $a6, $a6, 1472 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2208 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1424 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3984 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2224 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 496 + ori $a6, $a6, 800 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2240 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 480 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2928 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2256 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2528 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1456 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2272 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1408 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2224 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2288 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3024 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1440 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2304 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1392 + ori $a6, $a6, 784 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2320 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3008 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1424 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2336 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1376 + ori $a6, $a6, 768 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2352 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2992 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1408 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2368 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1360 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3968 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2384 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2512 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1392 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2400 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1344 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3952 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2416 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2240 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1376 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2432 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1328 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3936 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2448 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2976 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1360 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2464 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1312 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3920 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2480 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2496 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1344 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2496 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1296 + ori $a6, $a6, 752 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2512 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3872 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1328 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2528 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1280 + ori $a6, $a6, 736 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2544 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2960 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 720 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2560 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2480 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 704 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2576 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3856 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1232 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2592 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1040 + ori $a6, $a6, 1248 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2608 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 96 + ori $a6, $a6, 288 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2624 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 112 + ori $a6, $a6, 304 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2640 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1056 + ori $a6, $a6, 320 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2656 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 128 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3264 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2672 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 144 + ori $a6, $a6, 336 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2688 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1072 + ori $a6, $a6, 352 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2704 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1088 + ori $a6, $a6, 368 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2720 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3232 + ori $a6, $a6, 3280 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2736 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3248 + ori $a6, $a6, 2800 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2752 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1104 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3296 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2768 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1120 + ori $a6, $a6, 384 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2784 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 176 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3312 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2800 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1136 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2816 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2816 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 160 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2208 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2832 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1184 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3328 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2848 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1152 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2368 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2864 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1168 + ori $a6, $a6, 400 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2880 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 192 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3344 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2896 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3264 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 416 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2912 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1200 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2384 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2928 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3280 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 512 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2944 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1264 + ori $a6, $a6, 432 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2960 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3296 + ori $a6, $a6, 3360 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2976 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 208 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2400 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 2992 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 224 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2416 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3008 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1216 + ori $a6, $a6, 448 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3024 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 240 + ori $a6, $a6, 464 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3040 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 256 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3376 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3056 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 272 + ori $a6, $a6, 480 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3072 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 288 + ori $a6, $a6, 1264 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3088 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1232 + ori $a6, $a6, 496 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3104 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 304 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3392 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3120 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 320 + ori $a6, $a6, 1280 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3136 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 336 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3424 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3152 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 352 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3408 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3168 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3312 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1296 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3184 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 1248 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3440 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3200 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3328 + ori $a6, $a6, 3456 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3216 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3344 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 1312 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3232 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 368 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3472 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3248 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3360 + ori $a6, $a6, 3488 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3264 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2400 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 528 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3280 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3392 + ori $a6, $a6, 2832 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3296 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3376 + ori $a6, $a6, 3504 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3312 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3408 + ori $a6, $a6, 3520 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3328 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3424 + ori $a6, $a6, 3552 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3344 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 416 + ori $a6, $a6, 544 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3360 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 384 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3536 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3376 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 400 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3568 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3392 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2912 + ori $a6, $a6, 3584 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3408 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3440 + ori $a6, $a6, 3600 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3424 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3456 + ori $a6, $a6, 3616 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3440 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3472 + ori $a6, $a6, 3632 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3456 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2224 + ori $a6, $a6, 3648 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3472 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3488 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 560 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3488 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2928 + ori $a6, $a6, 3664 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3504 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3504 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 576 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3520 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3520 + ori $a6, $a6, 3680 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3536 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3536 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 592 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3552 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3552 + ori $a6, $a6, 2848 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3568 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3568 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 608 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3584 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3584 + ori $a6, $a6, 2864 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3600 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3600 + ori $a6, $a6, 2880 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3616 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2416 + ori $a6, $a6, 3696 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3632 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3648 + ori $a6, $a6, 2896 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3648 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3616 + ori $a6, $a6, 2912 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3664 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3632 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 624 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3680 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2432 + ori $a6, $a6, 3712 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3696 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 432 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3728 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3712 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3664 + ori $a6, $a6, 3744 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3728 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3680 + ori $a6, $a6, 3904 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3744 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 464 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 3760 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3760 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3696 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 640 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3776 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3712 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 656 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3792 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 2448 + ori $a6, $a6, 3776 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3808 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3728 + ori $a6, $a6, 3824 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3824 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3776 + ori $a6, $a6, 3792 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3840 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3744 + ori $a6, $a6, 3808 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3856 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3760 + ori $a6, $a6, 3840 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3872 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3792 + ori $a6, $a6, 3856 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3888 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3808 + ori $a6, $a6, 3872 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3904 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 1 - ori $a6, $a6, 3824 + ori $a6, $a6, 3888 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3920 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 3840 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 672 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3936 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 1 - ori $a6, $a6, 2464 + vst $vr27, $a6, 0 + lu12i.w $a6, 2 + ori $a6, $a6, 688 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3952 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 2 - ori $a6, $a6, 448 + vst $vr27, $a6, 0 + lu12i.w $a6, 1 + ori $a6, $a6, 2432 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload + vld $vr27, $a6, 0 # 16-byte Folded Reload lu12i.w $a6, 20 ori $a6, $a6, 3968 add.d $a6, $sp, $a6 - vst $vr28, $a6, 0 - lu12i.w $a6, 20 - ori $a6, $a6, 3984 - add.d $a6, $sp, $a6 - vst $vr13, $a6, 0 + vst $vr27, $a6, 0 lu12i.w $a6, 2 - ori $a6, $a6, 1944 + ori $a6, $a6, 1928 add.d $a6, $sp, $a6 ld.d $t1, $a6, 0 # 8-byte Folded Reload addi.d $t1, $t1, 50 andi $t1, $t1, 511 slli.d $a6, $t1, 3 - st.d $a6, $sp, 1888 # 8-byte Folded Spill - lu12i.w $a6, 1 - ori $a6, $a6, 2192 - add.d $a6, $sp, $a6 - vld $vr13, $a6, 0 # 16-byte Folded Reload - lu12i.w $a6, 1 - ori $a6, $a6, 2192 - add.d $a6, $sp, $a6 - vst $vr13, $a6, 0 # 16-byte Folded Spill - fldx.d $ft5, $t0, $a7 - fst.d $ft5, $sp, 1880 # 8-byte Folded Spill + st.d $a6, $sp, 1880 # 8-byte Folded Spill + fldx.d $fs3, $t0, $a7 + fst.d $fs3, $sp, 1888 # 8-byte Folded Spill ori $t0, $zero, 2048 vstx $vr20, $t0, $a5 ori $t0, $zero, 2064 vstx $vr0, $t0, $a5 ori $t0, $zero, 2080 - vstx $vr4, $t0, $a5 + lu12i.w $a6, 1 + ori $a6, $a6, 2768 + add.d $a6, $sp, $a6 + vld $vr27, $a6, 0 # 16-byte Folded Reload + vstx $vr27, $t0, $a5 ori $t0, $zero, 2096 vstx $vr19, $t0, $a5 ori $a6, $zero, 2112 vstx $vr24, $a6, $a5 ori $a6, $zero, 2128 - vstx $vr26, $a6, $a5 + vstx $vr25, $a6, $a5 ori $a6, $zero, 2144 vstx $vr23, $a6, $a5 ori $a6, $zero, 2160 vstx $vr18, $a6, $a5 - lu12i.w $a6, 1 - ori $a6, $a6, 3200 - add.d $a6, $sp, $a6 - vld $vr13, $a6, 0 # 16-byte Folded Reload ori $a6, $zero, 2176 - vstx $vr13, $a6, $a5 - lu12i.w $a6, 1 - ori $a6, $a6, 3184 + vstx $vr11, $a6, $a5 + ori $a6, $zero, 2192 + vstx $vr14, $a6, $a5 + vstx $vr16, $a2, $a5 + ori $a2, $zero, 2224 + lu12i.w $a6, 2 + ori $a6, $a6, 256 add.d $a6, $sp, $a6 - vld $vr28, $a6, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a5 - vstx $vr6, $s2, $a5 - lu12i.w $a2, 12 - ori $a2, $a2, 1952 - add.d $s2, $sp, $a2 - vstx $vr8, $s7, $a5 - lu12i.w $a2, 7 - ori $a2, $a2, 1952 - add.d $s7, $sp, $a2 - vstx $vr10, $s6, $a5 - lu12i.w $a2, 8 - ori $a2, $a2, 1952 - add.d $s6, $sp, $a2 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 1904 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload + ori $a2, $zero, 2240 + vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 1216 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2256 - vstx $vr11, $a2, $a5 + vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 1200 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2272 - vstx $vr12, $a2, $a5 + vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 240 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2288 - vstx $vr22, $a2, $a5 - vstx $vr14, $t3, $a5 + vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1024 + ori $a2, $a2, 1888 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload + ori $a2, $zero, 2304 + vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 224 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 vstx $vr0, $a2, $a5 ori $a2, $zero, 2336 - vstx $vr15, $a2, $a5 + lu12i.w $a6, 1 + ori $a6, $a6, 3168 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1008 + ori $a2, $a2, 208 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2352 vstx $vr0, $a2, $a5 ori $a2, $zero, 2368 - vstx $vr17, $a2, $a5 + vstx $vr22, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1920 + ori $a2, $a2, 1872 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2384 vstx $vr0, $a2, $a5 lu12i.w $a2, 1 - ori $a2, $a2, 3168 + ori $a2, $a2, 3152 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2400 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 3152 + lu12i.w $a2, 2 + ori $a2, $a2, 176 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 vstx $vr0, $a2, $a5 lu12i.w $a2, 1 - ori $a2, $a2, 2736 + ori $a2, $a2, 2720 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2432 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 2720 + lu12i.w $a2, 2 + ori $a2, $a2, 160 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 vstx $vr0, $a2, $a5 - ori $a2, $zero, 2464 - vstx $vr27, $a2, $a5 lu12i.w $a2, 1 ori $a2, $a2, 3136 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 + ori $a2, $zero, 2464 vstx $vr0, $a2, $a5 - lu12i.w $a2, 2 - ori $a2, $a2, 1904 + lu12i.w $a2, 1 + ori $a2, $a2, 3120 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 + ori $a2, $zero, 2480 vstx $vr0, $a2, $a5 - lu12i.w $a2, 2 - ori $a2, $a2, 1888 + lu12i.w $a2, 1 + ori $a2, $a2, 3104 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2512 + ori $a2, $zero, 2496 vstx $vr0, $a2, $a5 + ori $a2, $zero, 2512 + vstx $vr17, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1872 + ori $a2, $a2, 1168 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 vstx $vr0, $a2, $a5 - ori $a2, $zero, 2544 - vstx $vr21, $a2, $a5 lu12i.w $a2, 2 ori $a2, $a2, 1856 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr0, $a2, $a5 + lu12i.w $a2, 1 + ori $a2, $a2, 3088 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2560 vstx $vr0, $a2, $a5 - lu12i.w $a2, 2 - ori $a2, $a2, 992 + lu12i.w $a2, 1 + ori $a2, $a2, 3072 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2576 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1840 + ori $a2, $a2, 144 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2592 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1824 + ori $a2, $a2, 1152 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2608 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1808 + ori $a2, $a2, 1136 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2624 vstx $vr0, $a2, $a5 - lu12i.w $a2, 2 - ori $a2, $a2, 976 + lu12i.w $a2, 1 + ori $a2, $a2, 3056 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2640 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 64 + ori $a2, $a2, 128 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2656 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 2672 + lu12i.w $a2, 2 + ori $a2, $a2, 1120 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2672 vstx $vr0, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 1104 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - vstx $vr29, $a2, $a5 + vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1792 + ori $a2, $a2, 112 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 3120 + lu12i.w $a2, 2 + ori $a2, $a2, 1088 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 3104 + lu12i.w $a2, 2 + ori $a2, $a2, 96 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2736 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1776 + ori $a2, $a2, 80 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2752 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 2640 + lu12i.w $a2, 2 + ori $a2, $a2, 64 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2768 vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1760 + ori $a2, $a2, 1072 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 vstx $vr0, $a2, $a5 ori $a2, $zero, 2800 - vstx $vr25, $a2, $a5 + vstx $vr26, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 960 + ori $a2, $a2, 1840 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 vstx $vr0, $a2, $a5 - vstx $vr1, $t5, $a5 + vstx $vr1, $t7, $a5 + lu12i.w $a2, 17 + ori $a2, $a2, 1936 + add.d $t7, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 48 + ori $a2, $a2, 1824 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 vstx $vr0, $a2, $a5 - vstx $vr2, $t4, $a5 + vstx $vr2, $a1, $a5 + lu12i.w $a1, 18 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 lu12i.w $a2, 2 - ori $a2, $a2, 1744 + ori $a2, $a2, 1808 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 vstx $vr0, $a2, $a5 vstx $vr3, $a3, $a5 lu12i.w $a2, 19 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $a3, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 944 + ori $a2, $a2, 1792 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 vstx $vr0, $a2, $a5 + vstx $vr4, $t5, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 32 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - vstx $vr0, $a1, $a5 - lu12i.w $a1, 18 - ori $a1, $a1, 1952 - add.d $a1, $sp, $a1 - lu12i.w $a2, 2 - ori $a2, $a2, 1728 + ori $a2, $a2, 1776 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 2944 vstx $vr0, $a2, $a5 + vstx $vr5, $t4, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 16 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - vstx $vr0, $t7, $a5 - lu12i.w $a2, 17 - ori $a2, $a2, 1952 - add.d $t7, $sp, $a2 - lu12i.w $a2, 2 - ori $a2, $a2, 928 + ori $a2, $a2, 1056 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 2976 - vstx $vr0, $a2, $a5 + vstx $vr0, $t2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1712 + ori $a2, $a2, 1760 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload vstx $vr0, $fp, $a5 lu12i.w $a2, 15 - ori $a2, $a2, 1952 - add.d $t5, $sp, $a2 - vstx $vr5, $t8, $a5 + ori $a2, $a2, 1936 + add.d $t4, $sp, $a2 + vstx $vr21, $t8, $a5 lu12i.w $a2, 16 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $t8, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 1696 + ori $a2, $a2, 1744 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3024 - vstx $vr0, $a2, $a5 - vstx $vr7, $s0, $a5 + vstx $vr0, $t6, $a5 + vstx $vr10, $s0, $a5 lu12i.w $a2, 14 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $s0, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 912 + ori $a2, $a2, 1728 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $a5 + ori $a2, $zero, 3056 + vstx $vr0, $a2, $a5 lu12i.w $a2, 1 - ori $a2, $a2, 3056 + ori $a2, $a2, 2672 add.d $a2, $sp, $a2 - vld $vr11, $a2, 0 # 16-byte Folded Reload - vstx $vr11, $s1, $a5 + vld $vr18, $a2, 0 # 16-byte Folded Reload + vstx $vr18, $s1, $a5 lu12i.w $a2, 13 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $s1, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 1680 + ori $a2, $a2, 48 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3088 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 2608 - add.d $a2, $sp, $a2 - vld $vr14, $a2, 0 # 16-byte Folded Reload - vstx $vr14, $s3, $a5 + vstx $vr15, $s3, $a5 lu12i.w $a2, 11 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $s3, $sp, $a2 + lu12i.w $a2, 2 + ori $a2, $a2, 1712 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 - lu12i.w $a6, 2 - ori $a6, $a6, 896 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a5 - ori $a2, $zero, 3136 - vstx $vr9, $a2, $a5 + vstx $vr13, $t3, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 880 + ori $a2, $a2, 1040 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3152 vstx $vr0, $a2, $a5 ori $a2, $zero, 3168 - vstx $vr31, $a2, $a5 + vstx $vr12, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1664 + ori $a2, $a2, 1024 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3184 vstx $vr0, $a2, $a5 - vstx $vr30, $s4, $a5 - lu12i.w $a2, 10 - ori $a2, $a2, 1952 - add.d $s4, $sp, $a2 + vstx $vr31, $ra, $a5 + lu12i.w $a2, 5 + ori $a2, $a2, 1936 + add.d $ra, $sp, $a2 + lu12i.w $a2, 2 + ori $a2, $a2, 1008 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3216 - lu12i.w $a6, 2 - ori $a6, $a6, 1648 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 2560 + vstx $vr30, $s8, $a5 + lu12i.w $a2, 6 + ori $a2, $a2, 1936 + add.d $s8, $sp, $a2 + lu12i.w $a2, 2 + ori $a2, $a2, 992 add.d $a2, $sp, $a2 - vld $vr31, $a2, 0 # 16-byte Folded Reload - vstx $vr31, $s5, $a5 - lu12i.w $a2, 9 - ori $a2, $a2, 1952 - add.d $s5, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3248 - lu12i.w $a6, 2 - ori $a6, $a6, 1632 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a5 + vstx $vr29, $s7, $a5 + lu12i.w $a2, 7 + ori $a2, $a2, 1936 + add.d $s7, $sp, $a2 lu12i.w $a2, 2 + ori $a2, $a2, 976 add.d $a2, $sp, $a2 - vld $vr10, $a2, 0 # 16-byte Folded Reload - vstx $vr10, $s8, $a5 - lu12i.w $a2, 6 - ori $a2, $a2, 1952 - add.d $s8, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 - lu12i.w $a6, 2 - ori $a6, $a6, 1616 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 4080 + vstx $vr28, $s6, $a5 + lu12i.w $a2, 8 + ori $a2, $a2, 1936 + add.d $s6, $sp, $a2 + lu12i.w $a2, 2 + ori $a2, $a2, 960 add.d $a2, $sp, $a2 - vld $vr12, $a2, 0 # 16-byte Folded Reload - vstx $vr12, $ra, $a5 - lu12i.w $a2, 5 - ori $a2, $a2, 1952 - add.d $ra, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 - lu12i.w $a6, 2 - ori $a6, $a6, 864 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 4064 - add.d $a2, $sp, $a2 - vld $vr29, $a2, 0 # 16-byte Folded Reload - vstx $vr29, $a4, $a5 - lu12i.w $a2, 4 - ori $a2, $a2, 1952 - add.d $a4, $sp, $a2 + vstx $vr9, $s5, $a5 + lu12i.w $a2, 9 + ori $a2, $a2, 1936 + add.d $s5, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 1600 + ori $a2, $a2, 944 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 vstx $vr0, $a2, $a5 - lu12i.w $a2, 1 - ori $a2, $a2, 4048 - add.d $a2, $sp, $a2 - vld $vr15, $a2, 0 # 16-byte Folded Reload - vstx $vr15, $a0, $a5 - lu12i.w $a0, 3 - ori $a0, $a0, 1952 - add.d $a0, $sp, $a0 + vstx $vr8, $s4, $a5 + lu12i.w $a2, 10 + ori $a2, $a2, 1936 + add.d $s4, $sp, $a2 lu12i.w $a2, 2 - ori $a2, $a2, 1584 + ori $a2, $a2, 1696 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 - vstx $vr0, $a2, $a0 - ori $a5, $zero, 3392 + vstx $vr0, $a2, $a5 lu12i.w $a2, 2 - ori $a2, $a2, 1568 + ori $a2, $a2, 1680 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $a0 + vstx $vr0, $s2, $a5 + lu12i.w $a2, 12 + ori $a2, $a2, 1936 + add.d $s2, $sp, $a2 ori $a2, $zero, 3408 - vstx $vr16, $a2, $a0 + vstx $vr7, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 1664 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3424 - lu12i.w $a6, 2 - ori $a6, $a6, 1552 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a0 - lu12i.w $a2, 1 - ori $a2, $a2, 4016 + vstx $vr0, $a2, $a5 + ori $a2, $zero, 3440 + vstx $vr6, $a2, $a5 + lu12i.w $a2, 2 + ori $a2, $a2, 912 add.d $a2, $sp, $a2 - vld $vr16, $a2, 0 # 16-byte Folded Reload - ori $t3, $zero, 3440 - vstx $vr16, $t3, $a0 + vld $vr0, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 - lu12i.w $a6, 2 - ori $a6, $a6, 1536 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a0 + vstx $vr0, $a2, $a5 lu12i.w $a2, 1 - ori $a2, $a2, 4000 + ori $a2, $a2, 2576 add.d $a2, $sp, $a2 - vld $vr17, $a2, 0 # 16-byte Folded Reload - vstx $vr17, $t2, $a0 + vld $vr13, $a2, 0 # 16-byte Folded Reload + vstx $vr13, $a4, $a5 + lu12i.w $a2, 4 + ori $a2, $a2, 1936 + add.d $a4, $sp, $a2 ori $a2, $zero, 3488 lu12i.w $a6, 2 - ori $a6, $a6, 1520 + ori $a6, $a6, 1648 add.d $a6, $sp, $a6 vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a0 - ori $t2, $zero, 3504 + vstx $vr0, $a2, $a5 lu12i.w $a2, 1 - ori $a2, $a2, 3984 + ori $a2, $a2, 2560 add.d $a2, $sp, $a2 - vld $vr9, $a2, 0 # 16-byte Folded Reload - vstx $vr9, $t2, $a0 - ori $a7, $zero, 3520 + vld $vr15, $a2, 0 # 16-byte Folded Reload + vstx $vr15, $a0, $a5 + lu12i.w $a0, 3 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + ori $a5, $zero, 3520 lu12i.w $a2, 2 - ori $a2, $a2, 1504 + ori $a2, $a2, 1632 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $a0 - ori $t1, $zero, 3536 + vstx $vr0, $a5, $a0 + ori $a7, $zero, 3536 lu12i.w $a2, 1 - ori $a2, $a2, 3968 + ori $a2, $a2, 2544 add.d $a2, $sp, $a2 - vld $vr1, $a2, 0 # 16-byte Folded Reload - vstx $vr1, $t1, $a0 + vld $vr7, $a2, 0 # 16-byte Folded Reload + vstx $vr7, $a7, $a0 + ori $t2, $zero, 3552 lu12i.w $a2, 2 - ori $a2, $a2, 848 + ori $a2, $a2, 1616 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3552 - vstx $vr0, $a2, $a0 - lu12i.w $a2, 2 - ori $a2, $a2, 832 + vstx $vr0, $t2, $a0 + ori $t1, $zero, 3568 + lu12i.w $a2, 1 + ori $a2, $a2, 2976 add.d $a2, $sp, $a2 - vld $vr6, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 - vstx $vr6, $a2, $a0 + vld $vr8, $a2, 0 # 16-byte Folded Reload + vstx $vr8, $t1, $a0 + ori $t3, $zero, 3584 lu12i.w $a2, 2 - ori $a2, $a2, 816 + ori $a2, $a2, 1600 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 - vstx $vr0, $a2, $a0 + vstx $vr0, $t3, $a0 lu12i.w $a2, 1 - ori $a2, $a2, 3952 + ori $a2, $a2, 2528 add.d $a2, $sp, $a2 - vld $vr18, $a2, 0 # 16-byte Folded Reload + vld $vr11, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3600 - vstx $vr18, $a2, $a0 - ori $a2, $zero, 3616 - lu12i.w $a6, 2 - ori $a6, $a6, 800 - add.d $a6, $sp, $a6 - vld $vr0, $a6, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a0 + vstx $vr11, $a2, $a0 + ori $fp, $zero, 3616 lu12i.w $a2, 2 - ori $a2, $a2, 784 + ori $a2, $a2, 16 add.d $a2, $sp, $a2 vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3632 - vstx $vr0, $a2, $a0 - ori $fp, $zero, 3648 + vstx $vr0, $fp, $a0 lu12i.w $a2, 2 - ori $a2, $a2, 768 add.d $a2, $sp, $a2 - vld $vr2, $a2, 0 # 16-byte Folded Reload - vstx $vr2, $fp, $a0 - lu12i.w $a2, 2 - ori $a2, $a2, 752 + vld $vr6, $a2, 0 # 16-byte Folded Reload + ori $a2, $zero, 3632 + vstx $vr6, $a2, $a0 + ori $a2, $zero, 3648 + lu12i.w $a6, 1 + ori $a6, $a6, 4080 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a0 + lu12i.w $a2, 1 + ori $a2, $a2, 4064 add.d $a2, $sp, $a2 - vld $vr2, $a2, 0 # 16-byte Folded Reload + vld $vr4, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3664 - vstx $vr2, $a2, $a0 + vstx $vr4, $a2, $a0 ori $a2, $zero, 3680 lu12i.w $a6, 2 - ori $a6, $a6, 1488 + ori $a6, $a6, 1584 add.d $a6, $sp, $a6 - vld $vr3, $a6, 0 # 16-byte Folded Reload - vstx $vr3, $a2, $a0 - lu12i.w $a2, 2 - ori $a2, $a2, 736 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a0 + lu12i.w $a2, 1 + ori $a2, $a2, 2512 add.d $a2, $sp, $a2 vld $vr3, $a2, 0 # 16-byte Folded Reload ori $a2, $zero, 3696 vstx $vr3, $a2, $a0 - ori $t4, $zero, 3712 - lu12i.w $a2, 1 - ori $a2, $a2, 3936 - add.d $a2, $sp, $a2 - vld $vr4, $a2, 0 # 16-byte Folded Reload - vstx $vr4, $t4, $a0 + ori $a2, $zero, 3712 + lu12i.w $a6, 2 + ori $a6, $a6, 1568 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a0 lu12i.w $a2, 2 - ori $a2, $a2, 720 - add.d $a2, $sp, $a2 - vld $vr4, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 - vstx $vr4, $a2, $a0 - ori $t6, $zero, 3744 - lu12i.w $a2, 1 - ori $a2, $a2, 3920 - add.d $a2, $sp, $a2 - vld $vr5, $a2, 0 # 16-byte Folded Reload - vstx $vr5, $t6, $a0 - lu12i.w $a2, 1 - ori $a2, $a2, 3904 + ori $a2, $a2, 896 add.d $a2, $sp, $a2 vld $vr5, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 + ori $a2, $zero, 3728 vstx $vr5, $a2, $a0 + ori $a2, $zero, 3744 + lu12i.w $a6, 1 + ori $a6, $a6, 4048 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a0 lu12i.w $a2, 1 - ori $a2, $a2, 3216 + ori $a2, $a2, 2496 add.d $a2, $sp, $a2 - vld $vr7, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 - vstx $vr7, $a2, $a0 + vld $vr1, $a2, 0 # 16-byte Folded Reload + ori $t6, $zero, 3760 + vstx $vr1, $t6, $a0 + ori $t5, $zero, 3792 + lu12i.w $a2, 2 + ori $a2, $a2, 272 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload + vstx $vr0, $t5, $a0 ori $a2, $zero, 3776 lu12i.w $a6, 1 - ori $a6, $a6, 2544 + ori $a6, $a6, 4032 add.d $a6, $sp, $a6 - vld $vr7, $a6, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $a0 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $a0 + lu12i.w $a2, 1 + ori $a2, $a2, 2480 + add.d $a2, $sp, $a2 + vld $vr0, $a2, 0 # 16-byte Folded Reload + lu12i.w $a2, 3 + ori $a2, $a2, 1936 + add.d $a2, $sp, $a2 + vst $vr0, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 704 + ori $a2, $a2, 1552 add.d $a2, $sp, $a2 - vld $vr7, $a2, 0 # 16-byte Folded Reload + vld $vr2, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 1952 add.d $a2, $sp, $a2 - vst $vr7, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1472 + vst $vr2, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 2464 add.d $a2, $sp, $a2 - vld $vr8, $a2, 0 # 16-byte Folded Reload + vld $vr2, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 1968 add.d $a2, $sp, $a2 - vst $vr8, $a2, 0 + vst $vr2, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 688 + ori $a2, $a2, 1536 add.d $a2, $sp, $a2 - vld $vr8, $a2, 0 # 16-byte Folded Reload + vld $vr9, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 1984 add.d $a2, $sp, $a2 - vst $vr8, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1456 + vst $vr9, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 2960 add.d $a2, $sp, $a2 - vld $vr19, $a2, 0 # 16-byte Folded Reload + vld $vr9, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2000 add.d $a2, $sp, $a2 - vst $vr19, $a2, 0 + vst $vr9, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 672 + ori $a2, $a2, 1520 add.d $a2, $sp, $a2 - vld $vr19, $a2, 0 # 16-byte Folded Reload + vld $vr10, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2016 add.d $a2, $sp, $a2 - vst $vr19, $a2, 0 + vst $vr10, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3888 + ori $a2, $a2, 2448 add.d $a2, $sp, $a2 - vld $vr20, $a2, 0 # 16-byte Folded Reload + vld $vr10, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2032 add.d $a2, $sp, $a2 - vst $vr20, $a2, 0 + vst $vr10, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 656 + ori $a2, $a2, 1504 add.d $a2, $sp, $a2 - vld $vr20, $a2, 0 # 16-byte Folded Reload + vld $vr12, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2048 add.d $a2, $sp, $a2 - vst $vr20, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 640 + vst $vr12, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 4016 add.d $a2, $sp, $a2 - vld $vr21, $a2, 0 # 16-byte Folded Reload + vld $vr12, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2064 add.d $a2, $sp, $a2 - vst $vr21, $a2, 0 + vst $vr12, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 624 + ori $a2, $a2, 1488 add.d $a2, $sp, $a2 - vld $vr21, $a2, 0 # 16-byte Folded Reload + vld $vr14, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2080 add.d $a2, $sp, $a2 - vst $vr21, $a2, 0 + vst $vr14, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 608 + ori $a2, $a2, 880 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr14, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2096 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 592 + vst $vr14, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 4000 add.d $a2, $sp, $a2 - vld $vr27, $a2, 0 # 16-byte Folded Reload + vld $vr16, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2112 add.d $a2, $sp, $a2 - vst $vr27, $a2, 0 + vst $vr16, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 576 + ori $a2, $a2, 864 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr16, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2128 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 560 + vst $vr16, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 2944 add.d $a2, $sp, $a2 - vld $vr30, $a2, 0 # 16-byte Folded Reload + vld $vr17, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2144 add.d $a2, $sp, $a2 - vst $vr30, $a2, 0 + vst $vr17, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 544 + ori $a2, $a2, 848 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr17, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2160 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 + vst $vr17, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 528 + ori $a2, $a2, 832 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr19, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2176 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 + vst $vr19, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1440 + ori $a2, $a2, 816 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr19, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2192 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 + vst $vr19, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 512 + ori $a2, $a2, 1472 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr20, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2208 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1424 + vst $vr20, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 3984 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr20, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2224 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 + vst $vr20, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 496 + ori $a2, $a2, 800 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr21, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2240 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 480 + vst $vr21, $a2, 0 + lu12i.w $a2, 1 + ori $a2, $a2, 2928 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr21, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2256 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2528 + vst $vr21, $a2, 0 + lu12i.w $a2, 2 + ori $a2, $a2, 1456 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2272 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1408 + lu12i.w $a2, 1 + ori $a2, $a2, 2224 add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload + vld $vr28, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2288 add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3024 + vst $vr28, $a2, 0 + lu12i.w $a2, 2 + ori $a2, $a2, 1440 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262017,15 +260310,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1392 + ori $a2, $a2, 784 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2320 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3008 + lu12i.w $a2, 2 + ori $a2, $a2, 1424 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262033,79 +260326,79 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1376 + ori $a2, $a2, 768 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2352 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2992 + lu12i.w $a2, 2 + ori $a2, $a2, 1408 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2368 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1360 + lu12i.w $a2, 1 + ori $a2, $a2, 3968 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2384 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2512 + lu12i.w $a2, 2 + ori $a2, $a2, 1392 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2400 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1344 + lu12i.w $a2, 1 + ori $a2, $a2, 3952 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2416 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2240 + lu12i.w $a2, 2 + ori $a2, $a2, 1376 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2432 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1328 + lu12i.w $a2, 1 + ori $a2, $a2, 3936 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2448 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2976 + lu12i.w $a2, 2 + ori $a2, $a2, 1360 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2464 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1312 + lu12i.w $a2, 1 + ori $a2, $a2, 3920 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2480 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2496 + lu12i.w $a2, 2 + ori $a2, $a2, 1344 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262113,15 +260406,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1296 + ori $a2, $a2, 752 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2512 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3872 + lu12i.w $a2, 2 + ori $a2, $a2, 1328 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262129,31 +260422,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1280 + ori $a2, $a2, 736 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2544 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2960 + lu12i.w $a2, 2 + ori $a2, $a2, 720 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2560 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2480 + lu12i.w $a2, 2 + ori $a2, $a2, 704 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2576 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3856 + lu12i.w $a2, 2 + ori $a2, $a2, 1232 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262161,7 +260454,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1040 + ori $a2, $a2, 1248 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262169,7 +260462,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 96 + ori $a2, $a2, 288 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262177,7 +260470,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 112 + ori $a2, $a2, 304 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262185,15 +260478,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1056 + ori $a2, $a2, 320 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2656 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 128 + lu12i.w $a2, 1 + ori $a2, $a2, 3264 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262201,7 +260494,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 144 + ori $a2, $a2, 336 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262209,7 +260502,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1072 + ori $a2, $a2, 352 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262217,7 +260510,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1088 + ori $a2, $a2, 368 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262225,7 +260518,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3232 + ori $a2, $a2, 3280 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262233,15 +260526,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3248 + ori $a2, $a2, 2800 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2752 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1104 + lu12i.w $a2, 1 + ori $a2, $a2, 3296 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262249,47 +260542,47 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1120 + ori $a2, $a2, 384 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2784 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 176 + lu12i.w $a2, 1 + ori $a2, $a2, 3312 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2800 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1136 + lu12i.w $a2, 1 + ori $a2, $a2, 2816 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2816 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 160 + lu12i.w $a2, 1 + ori $a2, $a2, 2208 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2832 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1184 + lu12i.w $a2, 1 + ori $a2, $a2, 3328 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2848 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1152 + lu12i.w $a2, 1 + ori $a2, $a2, 2368 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262297,39 +260590,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1168 + ori $a2, $a2, 400 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2880 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 192 + lu12i.w $a2, 1 + ori $a2, $a2, 3344 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2896 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3264 + lu12i.w $a2, 2 + ori $a2, $a2, 416 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2912 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1200 + lu12i.w $a2, 1 + ori $a2, $a2, 2384 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2928 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3280 + lu12i.w $a2, 2 + ori $a2, $a2, 512 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262337,7 +260630,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1264 + ori $a2, $a2, 432 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262345,23 +260638,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3296 + ori $a2, $a2, 3360 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2976 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 208 + lu12i.w $a2, 1 + ori $a2, $a2, 2400 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 2992 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 224 + lu12i.w $a2, 1 + ori $a2, $a2, 2416 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262369,7 +260662,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1216 + ori $a2, $a2, 448 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262377,15 +260670,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 240 + ori $a2, $a2, 464 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3040 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 256 + lu12i.w $a2, 1 + ori $a2, $a2, 3376 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262393,7 +260686,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 272 + ori $a2, $a2, 480 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262401,7 +260694,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 288 + ori $a2, $a2, 1264 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262409,15 +260702,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 1232 + ori $a2, $a2, 496 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3104 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 304 + lu12i.w $a2, 1 + ori $a2, $a2, 3392 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262425,39 +260718,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 320 + ori $a2, $a2, 1280 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3136 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 336 + lu12i.w $a2, 1 + ori $a2, $a2, 3424 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3152 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 352 + lu12i.w $a2, 1 + ori $a2, $a2, 3408 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3168 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3312 + lu12i.w $a2, 2 + ori $a2, $a2, 1296 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3184 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 1248 + lu12i.w $a2, 1 + ori $a2, $a2, 3440 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262465,23 +260758,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3328 + ori $a2, $a2, 3456 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3216 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3344 + lu12i.w $a2, 2 + ori $a2, $a2, 1312 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3232 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 368 + lu12i.w $a2, 1 + ori $a2, $a2, 3472 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262489,15 +260782,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3360 + ori $a2, $a2, 3488 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3264 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2400 + lu12i.w $a2, 2 + ori $a2, $a2, 528 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262505,7 +260798,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3392 + ori $a2, $a2, 2832 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262513,7 +260806,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3376 + ori $a2, $a2, 3504 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262521,7 +260814,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3408 + ori $a2, $a2, 3520 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262529,7 +260822,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3424 + ori $a2, $a2, 3552 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262537,23 +260830,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 416 + ori $a2, $a2, 544 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3360 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 384 + lu12i.w $a2, 1 + ori $a2, $a2, 3536 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3376 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 400 + lu12i.w $a2, 1 + ori $a2, $a2, 3568 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262561,7 +260854,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2912 + ori $a2, $a2, 3584 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262569,7 +260862,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3440 + ori $a2, $a2, 3600 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262577,7 +260870,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3456 + ori $a2, $a2, 3616 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262585,7 +260878,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3472 + ori $a2, $a2, 3632 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262593,15 +260886,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2224 + ori $a2, $a2, 3648 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3472 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3488 + lu12i.w $a2, 2 + ori $a2, $a2, 560 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262609,15 +260902,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2928 + ori $a2, $a2, 3664 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3504 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3504 + lu12i.w $a2, 2 + ori $a2, $a2, 576 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262625,15 +260918,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3520 + ori $a2, $a2, 3680 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3536 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3536 + lu12i.w $a2, 2 + ori $a2, $a2, 592 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262641,15 +260934,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3552 + ori $a2, $a2, 2848 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3568 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3568 + lu12i.w $a2, 2 + ori $a2, $a2, 608 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262657,7 +260950,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3584 + ori $a2, $a2, 2864 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262665,7 +260958,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3600 + ori $a2, $a2, 2880 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262673,7 +260966,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2416 + ori $a2, $a2, 3696 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262681,7 +260974,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3648 + ori $a2, $a2, 2896 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262689,15 +260982,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3616 + ori $a2, $a2, 2912 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3664 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3632 + lu12i.w $a2, 2 + ori $a2, $a2, 624 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262705,15 +260998,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2432 + ori $a2, $a2, 3712 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3696 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 432 + lu12i.w $a2, 1 + ori $a2, $a2, 3728 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262721,7 +261014,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3664 + ori $a2, $a2, 3744 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262729,31 +261022,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3680 + ori $a2, $a2, 3904 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3744 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 2 - ori $a2, $a2, 464 + lu12i.w $a2, 1 + ori $a2, $a2, 3760 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3760 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3696 + lu12i.w $a2, 2 + ori $a2, $a2, 640 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3776 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3712 + lu12i.w $a2, 2 + ori $a2, $a2, 656 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262761,7 +261054,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2448 + ori $a2, $a2, 3776 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262769,7 +261062,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3728 + ori $a2, $a2, 3824 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262777,7 +261070,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3776 + ori $a2, $a2, 3792 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262785,7 +261078,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3744 + ori $a2, $a2, 3808 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262793,7 +261086,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3760 + ori $a2, $a2, 3840 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262801,7 +261094,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3792 + ori $a2, $a2, 3856 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262809,7 +261102,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3808 + ori $a2, $a2, 3872 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 @@ -262817,71 +261110,55 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 3824 + ori $a2, $a2, 3888 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3920 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 3840 + lu12i.w $a2, 2 + ori $a2, $a2, 672 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 ori $a2, $a2, 3936 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2464 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 3 - ori $a2, $a2, 3952 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 lu12i.w $a2, 2 - ori $a2, $a2, 448 + ori $a2, $a2, 688 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 - ori $a2, $a2, 3968 + ori $a2, $a2, 3952 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2944 + ori $a2, $a2, 2432 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 # 16-byte Folded Reload lu12i.w $a2, 3 - ori $a2, $a2, 3984 + ori $a2, $a2, 3968 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 # 16-byte Folded Reload - lu12i.w $a2, 1 - ori $a2, $a2, 2208 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ld.d $a2, $sp, 1888 # 8-byte Folded Reload + ld.d $a2, $sp, 1880 # 8-byte Folded Reload fldx.d $fs0, $a2, $a0 lu12i.w $a0, 20 - ori $a0, $a0, 1952 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 movgr2fr.d $fs1, $zero - fld.d $fs2, $sp, 1864 # 8-byte Folded Reload + fld.d $fs2, $sp, 1856 # 8-byte Folded Reload fld.d $ft14, $sp, 1896 # 8-byte Folded Reload fmadd.d $ft14, $ft14, $fs2, $fs1 - fld.d $fs1, $sp, 1856 # 8-byte Folded Reload - fld.d $ft15, $sp, 1880 # 8-byte Folded Reload + fld.d $fs1, $sp, 1848 # 8-byte Folded Reload + fld.d $ft15, $sp, 1888 # 8-byte Folded Reload fmadd.d $ft14, $ft15, $fs1, $ft14 - fld.d $ft15, $sp, 1848 # 8-byte Folded Reload + fld.d $ft15, $sp, 1840 # 8-byte Folded Reload fmadd.d $ft14, $fs0, $ft15, $ft14 fst.d $ft14, $sp, 1896 # 8-byte Folded Spill st.d $a0, $sp, 0 # 8-byte Folded Spill lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 75 @@ -262890,1374 +261167,1397 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 st.d $a2, $sp, 1888 # 8-byte Folded Spill ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload vstx $vr22, $t0, $a4 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $t0, $a4 + vld $vr25, $a0, 0 # 16-byte Folded Reload + vstx $vr25, $t0, $a4 ori $t0, $zero, 2080 - lu12i.w $a0, 1 - ori $a0, $a0, 2864 - add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $t0, $a4 + vstx $vr27, $t0, $a4 ori $t0, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload vstx $vr22, $t0, $a4 ori $a6, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload vstx $vr22, $a6, $a4 - ori $a2, $zero, 2128 + ori $a6, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $a2, $a4 + vstx $vr22, $a6, $a4 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload vstx $vr22, $a2, $a4 ori $a2, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload vstx $vr22, $a2, $a4 ori $a2, $zero, 2176 - vstx $vr13, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 2752 + add.d $a0, $sp, $a0 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2192 - vstx $vr28, $a2, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2208 - vstx $vr13, $a2, $a4 - ori $a2, $zero, 2224 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 + ori $a2, $zero, 2224 + lu12i.w $a0, 2 + ori $a0, $a0, 256 + add.d $a0, $sp, $a0 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2240 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2256 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2272 - vstx $vr13, $a2, $a4 - ori $a2, $zero, 2288 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 240 + add.d $a0, $sp, $a0 + vld $vr27, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2288 + vstx $vr27, $a2, $a4 ori $a2, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 - vstx $vr25, $a2, $a4 + vstx $vr29, $a2, $a4 + ori $a2, $zero, 2336 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2336 - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2352 - vstx $vr26, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr30, $a2, $a4 ori $a2, $zero, 2368 - vstx $vr13, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 ori $a2, $zero, 2384 - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + lu12i.w $a0, 2 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2400 - vstx $vr13, $a2, $a4 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $a2, $a4 lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2400 + vstx $vr22, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 176 + add.d $a0, $sp, $a0 + vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 - vstx $vr24, $a2, $a4 - ori $a2, $zero, 2432 + vstx $vr23, $a2, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr24, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2432 + vstx $vr24, $a2, $a4 ori $a2, $zero, 2448 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr26, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a2, $a4 ori $a2, $zero, 2464 lu12i.w $a0, 1 - ori $a0, $a0, 2704 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a2, $a4 ori $a2, $zero, 2480 - vstx $vr23, $a2, $a4 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + lu12i.w $a0, 1 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - vstx $vr13, $a2, $a4 - lu12i.w $a0, 2 - ori $a0, $a0, 1888 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a6, $zero, 2496 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a6, $a4 ori $a2, $zero, 2512 - vstx $vr13, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2528 - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + lu12i.w $a0, 2 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2544 - vstx $vr13, $a2, $a4 - ori $a2, $zero, 2560 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 - ori $a2, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 2560 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 2576 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2592 - vstx $vr13, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2608 - vstx $vr13, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2624 - vstx $vr13, $a2, $a4 - ori $a2, $zero, 2640 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 2640 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2672 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $a4 + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 - vstx $vr13, $a2, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2736 - vstx $vr22, $a2, $a4 + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 80 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2752 + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2768 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 - add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2784 + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2784 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 2800 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2800 - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2816 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2832 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2816 + vstx $vr31, $a2, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2848 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2832 + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2848 + vstx $vr31, $a2, $a4 ori $a2, $zero, 2864 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2880 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2880 + vstx $vr31, $a2, $a4 ori $a2, $zero, 2896 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2912 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2912 + vstx $vr31, $a2, $a4 ori $a2, $zero, 2928 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2944 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2944 + vstx $vr31, $a2, $a4 ori $a2, $zero, 2960 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr28, $a2, $a4 - ori $a2, $zero, 2992 + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 3008 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2992 + vstx $vr31, $a2, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3008 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3024 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3024 - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3040 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 - ori $a2, $zero, 3056 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - vstx $vr28, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3056 + vstx $vr31, $a2, $a4 ori $a2, $zero, 3072 - vstx $vr11, $a2, $a4 - ori $a2, $zero, 3088 + vstx $vr18, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $a4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3088 + vstx $vr18, $a2, $a4 ori $a2, $zero, 3104 - vstx $vr14, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 3008 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 - vstx $vr11, $a2, $a4 + vstx $vr31, $a2, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 - vstx $vr14, $a2, $a4 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3152 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3152 - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3168 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3184 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3200 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3216 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3216 - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3232 + lu12i.w $a0, 1 + ori $a0, $a0, 2624 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload vstx $vr31, $a2, $a4 + ori $a2, $zero, 3248 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3248 - vstx $vr11, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3264 - vstx $vr10, $a2, $a4 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3280 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 - vstx $vr10, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 2592 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3296 - vstx $vr12, $a2, $a4 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3312 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3312 - vstx $vr10, $a2, $a4 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 2256 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 - vstx $vr29, $a2, $a4 - ori $a6, $zero, 3344 + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3344 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - vstx $vr10, $a6, $a4 - ori $a2, $zero, 3360 - vstx $vr15, $a2, $a4 - lu12i.w $a0, 2 - ori $a0, $a0, 1584 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3360 + vstx $vr31, $a2, $a4 ori $a2, $zero, 3376 - vstx $vr10, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - vstx $vr10, $a5, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + ori $a2, $zero, 3392 + lu12i.w $a0, 2 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3408 - vstx $vr10, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 ori $a2, $zero, 3424 - vstx $vr10, $a2, $a4 - vstx $vr16, $t3, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 928 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3440 + vstx $vr31, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 912 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 - vstx $vr10, $a2, $a4 + vstx $vr31, $a2, $a4 ori $a2, $zero, 3472 - vstx $vr17, $a2, $a4 + vstx $vr13, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3488 - vstx $vr10, $a2, $a4 - vstx $vr9, $t2, $a4 + vstx $vr13, $a2, $a4 + ori $a2, $zero, 3504 + vstx $vr15, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload - vstx $vr9, $a7, $a4 - vstx $vr1, $t1, $a4 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a5, $a4 + vstx $vr7, $a7, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3552 - vstx $vr1, $a2, $a4 - ori $a2, $zero, 3568 - vstx $vr6, $a2, $a4 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $t2, $a4 + vstx $vr8, $t1, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 - vstx $vr1, $a2, $a4 - ori $t3, $zero, 3600 - vstx $vr18, $t3, $a4 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $t3, $a4 + ori $a2, $zero, 3600 + vstx $vr11, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3616 - vstx $vr1, $a2, $a4 - ori $t2, $zero, 3632 - vstx $vr0, $t2, $a4 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $fp, $a4 + ori $a7, $zero, 3616 + ori $fp, $zero, 3632 + vstx $vr6, $fp, $a4 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $a4 + vld $vr6, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3648 + vstx $vr6, $a2, $a4 + ori $a5, $zero, 3648 ori $a2, $zero, 3664 - vstx $vr2, $a2, $a4 + vstx $vr4, $a2, $a4 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3680 - vstx $vr0, $a2, $a4 - ori $a7, $zero, 3696 - vstx $vr3, $a7, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 - add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $t4, $a4 - ori $a5, $zero, 3728 - vstx $vr4, $a5, $a4 - lu12i.w $a0, 1 - ori $a0, $a0, 3920 + vstx $vr4, $a2, $a4 + ori $a2, $zero, 3696 + vstx $vr3, $a2, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $a4 - ori $a2, $zero, 3760 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3712 + vstx $vr3, $a2, $a4 + ori $a2, $zero, 3728 vstx $vr5, $a2, $a4 - ori $t6, $zero, 3792 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $a4 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3744 + vstx $vr3, $a2, $a4 + vstx $vr1, $t6, $a4 + lu12i.w $a0, 2 + ori $a0, $a0, 272 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t5, $a4 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3776 + vstx $vr1, $a2, $a4 + ori $t5, $zero, 3776 + lu12i.w $a0, 4 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3776 - vstx $vr0, $a2, $a4 lu12i.w $a0, 4 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1536 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr9, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1520 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3888 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr10, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1504 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1488 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 608 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr14, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 576 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr16, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 544 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1440 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr21, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 4 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr8, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 @@ -264265,1287 +262565,1305 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr11, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr10, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 4 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 4 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 100 andi $t0, $t0, 511 slli.d $t0, $t0, 3 ld.d $a2, $sp, 1888 # 8-byte Folded Reload - fldx.d $ft3, $a2, $a4 - fst.d $ft3, $sp, 1888 # 8-byte Folded Spill + fldx.d $fa5, $a2, $a4 + fst.d $fa5, $sp, 1888 # 8-byte Folded Spill ori $t1, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $t1, $ra + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $t1, $ra ori $t1, $zero, 2064 - lu12i.w $a0, 1 - ori $a0, $a0, 2880 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $t1, $ra + vstx $vr25, $t1, $ra ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $t1, $ra + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $t1, $ra ori $t1, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $t1, $ra + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $t1, $ra ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a4, $ra - ori $a2, $zero, 2128 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a4, $ra + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a4, $ra ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2160 - vstx $vr11, $a2, $ra + vstx $vr16, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2176 - vstx $vr11, $a2, $ra + vstx $vr17, $a2, $ra lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 - vstx $vr11, $a2, $ra + vstx $vr19, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vstx $vr15, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2224 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vstx $vr20, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2320 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra ori $a2, $zero, 2256 - vstx $vr11, $a2, $ra - ori $a2, $zero, 2272 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2288 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra + ori $a2, $zero, 2272 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra + ori $t2, $zero, 2288 + vstx $vr27, $t2, $ra ori $a2, $zero, 2304 - vstx $vr11, $a2, $ra - ori $a2, $zero, 2320 - vstx $vr25, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 1888 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra + ori $t3, $zero, 2320 + vstx $vr29, $t3, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr21, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 - vstx $vr11, $a2, $ra + vstx $vr21, $a2, $ra ori $a2, $zero, 2352 - vstx $vr26, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2752 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vstx $vr30, $a2, $ra ori $a2, $zero, 2368 - vstx $vr11, $a2, $ra - ori $a2, $zero, 2384 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra + ori $a2, $zero, 2384 + lu12i.w $a0, 2 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a2, $ra ori $a2, $zero, 2400 - vstx $vr15, $a2, $ra + vstx $vr22, $a2, $ra ori $a2, $zero, 2416 - vstx $vr24, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2736 - add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $a2, $ra ori $a2, $zero, 2432 - vstx $vr17, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + vstx $vr24, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 - vstx $vr19, $a2, $ra + vstx $vr5, $a2, $ra + ori $a2, $zero, 2464 + vstx $vr26, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2464 - vstx $vr11, $a2, $ra + vld $vr22, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2480 - vstx $vr23, $a2, $ra - ori $a2, $zero, 2496 + vstx $vr22, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 3104 + add.d $a0, $sp, $a0 + vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $a6, $ra + ori $t6, $zero, 2496 lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 + vstx $vr5, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 + vstx $vr5, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2544 - vstx $vr11, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 1856 + vstx $vr5, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2560 - vstx $vr11, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vstx $vr5, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2576 - vstx $vr21, $a2, $ra + vstx $vr24, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2592 - vstx $vr11, $a2, $ra + vstx $vr6, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2608 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2624 - vstx $vr11, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 976 + vstx $vr12, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2640 - vstx $vr11, $a2, $ra + vstx $vr25, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 64 - add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 - vstx $vr24, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr27, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2672 + ori $a2, $zero, 2656 vstx $vr27, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a2, $zero, 2672 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2688 - vstx $vr11, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 1104 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2704 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2720 - vstx $vr13, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 1088 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2736 - vstx $vr22, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2752 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + lu12i.w $a0, 2 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2768 - vstx $vr31, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 1072 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 2800 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2800 - vstx $vr11, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 2832 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2832 - vstx $vr30, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 2864 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2864 - vstx $vr29, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 2896 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 - vstx $vr28, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 - vstx $vr11, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 32 - add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 2928 - vstx $vr25, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 1728 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2944 - vstx $vr11, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2944 + vstx $vr12, $a2, $ra ori $a2, $zero, 2960 - vstx $vr22, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 2288 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2992 - vstx $vr11, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 3008 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3008 - vstx $vr20, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra + ori $a2, $zero, 3024 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3024 - vstx $vr11, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3040 - vstx $vr18, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 - vstx $vr11, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 3056 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 3072 - vstx $vr11, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 1680 + lu12i.w $a0, 1 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra ori $a2, $zero, 3088 - vstx $vr13, $a2, $ra + vstx $vr18, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3104 - vstx $vr16, $a2, $ra - ori $t4, $zero, 3120 + vstx $vr14, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $t4, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3120 + vstx $vr12, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 2992 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 - vstx $vr14, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3152 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3168 - vstx $vr14, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3184 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3200 - vstx $vr23, $a2, $ra - ori $fp, $zero, 3216 + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1648 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $fp, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3216 + vstx $vr12, $a2, $ra ori $a2, $zero, 3232 - vstx $vr26, $a2, $ra - ori $a2, $zero, 3248 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 + lu12i.w $a0, 1 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3248 + vstx $vr12, $a2, $ra ori $a2, $zero, 3264 - vstx $vr13, $a2, $ra - ori $a2, $zero, 3280 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3280 + vstx $vr12, $a2, $ra + ori $a2, $zero, 3296 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3296 - vstx $vr13, $a2, $ra - ori $a2, $zero, 3312 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3312 + vstx $vr12, $a2, $ra + ori $a2, $zero, 3328 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3328 - vstx $vr13, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a6, $ra - ori $a6, $zero, 3344 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3344 + vstx $vr12, $a2, $ra + ori $a2, $zero, 3360 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3360 - vstx $vr13, $a2, $ra + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra ori $a2, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3424 - vstx $vr13, $a2, $ra - lu12i.w $a0, 1 - ori $a0, $a0, 4016 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3440 + vstx $vr12, $a2, $ra ori $a2, $zero, 3456 - vstx $vr13, $a2, $ra + vstx $vr31, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3472 - vstx $vr13, $a2, $ra + vstx $vr12, $a2, $ra + ori $a2, $zero, 3488 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3488 - vstx $vr13, $a2, $ra - ori $a2, $zero, 3504 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3504 + vstx $vr18, $a2, $ra ori $a2, $zero, 3520 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra ori $a2, $zero, 3536 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3552 - vstx $vr13, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 832 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra ori $a2, $zero, 3568 - vstx $vr13, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 2976 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3584 - vstx $vr13, $a2, $ra + vstx $vr18, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $t3, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3616 - vstx $vr13, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3600 + vstx $vr18, $a2, $ra lu12i.w $a0, 2 - ori $a0, $a0, 784 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $t2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a7, $ra lu12i.w $a0, 2 - ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 - vstx $vr13, $a2, $ra - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $fp, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a5, $ra ori $a2, $zero, 3664 - vstx $vr13, $a2, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 4064 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra + ori $a5, $zero, 3680 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3680 - vstx $vr13, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a5, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 2512 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3696 + vstx $vr18, $a2, $ra + ori $a6, $zero, 3712 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a7, $ra - ori $a2, $zero, 3712 - vstx $vr12, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a6, $ra + ori $a2, $zero, 3728 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $a5, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $ra + ori $a7, $zero, 3744 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3744 - vstx $vr12, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a7, $ra + ori $a2, $zero, 3760 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 - vstx $vr12, $a2, $ra + vld $vr26, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a2, $ra + lu12i.w $a0, 2 + ori $a0, $a0, 272 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3792 + vstx $vr18, $a2, $ra lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $t6, $ra - ori $a2, $zero, 3776 - vstx $vr0, $a2, $ra + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t5, $ra + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr30, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 5 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr30, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr29, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr18, $a0, 0 + vori.b $vr18, $vr28, 0 lu12i.w $a0, 5 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr28, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr28, $a0, 0 lu12i.w $a0, 5 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265553,7 +263871,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265561,31 +263879,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr3, $a0, 0 lu12i.w $a0, 5 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265593,15 +263903,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265609,7 +263919,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265617,7 +263927,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265625,15 +263935,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265641,39 +263951,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265681,23 +263991,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265705,19 +264015,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265725,7 +264039,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265733,7 +264047,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265741,7 +264055,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265749,23 +264063,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265773,23 +264087,19 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3440 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 5 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr8, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265797,7 +264107,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265805,15 +264115,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265821,15 +264131,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265837,15 +264147,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265853,39 +264163,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3584 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3600 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr11, $a0, 0 lu12i.w $a0, 5 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265893,23 +264195,19 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3616 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr8, $a0, 0 lu12i.w $a0, 5 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr10, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265917,15 +264215,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265933,7 +264231,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265941,31 +264239,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265973,7 +264271,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265981,7 +264279,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265989,7 +264287,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -265997,7 +264295,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -266005,7 +264303,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -266013,7 +264311,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -266021,7 +264319,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 @@ -266029,47 +264327,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 5 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 5 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t1, $a0, 0 # 8-byte Folded Reload addi.d $t1, $t1, 125 @@ -266078,683 +264368,680 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 fldx.d $fa0, $t0, $ra fst.d $fa0, $sp, 1880 # 8-byte Folded Spill ori $t0, $zero, 2048 - lu12i.w $a0, 1 - ori $a0, $a0, 2896 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $s8 + vstx $vr7, $t0, $s8 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s8 ori $t0, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s8 ori $t0, $zero, 2096 - lu12i.w $a0, 1 - ori $a0, $a0, 2848 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $s8 + vstx $vr13, $t0, $s8 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a4, $s8 - ori $a2, $zero, 2128 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $s8 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s8 - ori $a2, $zero, 2160 - lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + ori $a2, $zero, 2160 + vstx $vr16, $a2, $s8 ori $a2, $zero, 2176 - lu12i.w $a0, 1 - ori $a0, $a0, 3200 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 + vstx $vr17, $a2, $s8 ori $a2, $zero, 2192 - lu12i.w $a0, 1 - ori $a0, $a0, 3184 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2800 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr19, $a2, $s8 ori $a2, $zero, 2208 - vstx $vr0, $a2, $s8 + vstx $vr15, $a2, $s8 ori $a2, $zero, 2224 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vstx $vr20, $a2, $s8 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 ori $a2, $zero, 2240 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2256 - vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2272 vstx $vr0, $a2, $s8 - ori $a2, $zero, 2288 + ori $a2, $zero, 2272 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 - ori $a2, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 - ori $a2, $zero, 2320 + vstx $vr0, $t2, $s8 + ori $a2, $zero, 2304 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2768 + lu12i.w $a0, 2 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t3, $s8 ori $a2, $zero, 2336 - vstx $vr0, $a2, $s8 - ori $a2, $zero, 2352 + vstx $vr21, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a2, $zero, 2368 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2368 vstx $vr0, $a2, $s8 - ori $a2, $zero, 2384 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2384 vstx $vr0, $a2, $s8 - ori $a2, $zero, 2400 - vstx $vr15, $a2, $s8 lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2400 + vstx $vr0, $a2, $s8 + lu12i.w $a0, 2 + ori $a0, $a0, 176 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2720 + add.d $a0, $sp, $a0 + vld $vr21, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2432 - vstx $vr17, $a2, $s8 + vstx $vr21, $a2, $s8 ori $a2, $zero, 2448 - vstx $vr19, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2704 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2464 - vstx $vr7, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 + ori $a2, $zero, 2464 vstx $vr0, $a2, $s8 + ori $a2, $zero, 2480 + vstx $vr22, $a2, $s8 + vstx $vr23, $t6, $s8 + ori $a2, $zero, 2512 lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 vstx $vr0, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2512 + ori $a2, $zero, 2528 vstx $vr0, $a2, $s8 + ori $a2, $zero, 2544 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2528 vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $ra, $zero, 2560 + vstx $vr5, $ra, $s8 + ori $a2, $zero, 2576 + vstx $vr24, $a2, $s8 + ori $fp, $zero, 2592 + vstx $vr6, $fp, $s8 + ori $t6, $zero, 2608 + lu12i.w $a0, 2 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2544 - vstx $vr0, $a2, $s8 - ori $a2, $zero, 2560 + vstx $vr0, $t6, $s8 + ori $a2, $zero, 2624 lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 - ori $a2, $zero, 2576 - vstx $vr21, $a2, $s8 - ori $a2, $zero, 2592 + ori $a2, $zero, 2640 + vstx $vr25, $a2, $s8 + ori $a2, $zero, 2656 + vstx $vr27, $a2, $s8 + ori $a2, $zero, 2672 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + ori $a2, $zero, 2688 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2608 vstx $vr0, $a2, $s8 + ori $a2, $zero, 2704 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 vstx $vr0, $a2, $s8 + ori $a2, $zero, 2720 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2640 vstx $vr0, $a2, $s8 - ori $a2, $zero, 2656 - vstx $vr24, $a2, $s8 - ori $a2, $zero, 2672 - vstx $vr27, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 - add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2688 - vstx $vr8, $a2, $s8 + ori $a2, $zero, 2736 lu12i.w $a0, 2 - ori $a0, $a0, 1792 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2704 - vstx $vr2, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2720 vstx $vr0, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 - add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2736 - vstx $vr21, $a2, $s8 ori $a2, $zero, 2752 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 ori $a2, $zero, 2768 - vstx $vr31, $a2, $s8 + lu12i.w $a0, 2 + ori $a0, $a0, 64 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 2784 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 - ori $a2, $zero, 2800 + ori $t5, $zero, 2800 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 - ori $a2, $zero, 2816 + vstx $vr0, $t5, $s8 + ori $t3, $zero, 2816 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s8 + vstx $vr0, $t3, $s8 ori $a2, $zero, 2832 - vstx $vr30, $a2, $s8 - ori $a2, $zero, 2848 - lu12i.w $a0, 2 - ori $a0, $a0, 48 + lu12i.w $a0, 1 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + ori $t2, $zero, 2848 + lu12i.w $a0, 2 + ori $a0, $a0, 1824 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2320 + add.d $a0, $sp, $a0 + vld $vr19, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2864 - vstx $vr29, $a2, $s8 + vstx $vr19, $a2, $s8 ori $a2, $zero, 2880 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 ori $a2, $zero, 2896 - vstx $vr28, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 3024 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 2912 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 + add.d $a0, $sp, $a0 + vld $vr27, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2928 - vstx $vr25, $a2, $s8 + vstx $vr27, $a2, $s8 ori $a2, $zero, 2944 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 + add.d $a0, $sp, $a0 + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2960 - vstx $vr22, $a2, $s8 + vstx $vr15, $a2, $s8 ori $a2, $zero, 2976 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 ori $a2, $zero, 2992 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2688 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3008 - vstx $vr20, $a2, $s8 + vstx $vr0, $a2, $s8 ori $a2, $zero, 3024 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2272 + add.d $a0, $sp, $a0 + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3040 - vstx $vr18, $a2, $s8 - ori $t6, $zero, 3056 + vstx $vr13, $a2, $s8 + ori $a2, $zero, 3056 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $s8 + vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2672 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3072 - vstx $vr11, $a2, $s8 + vstx $vr10, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 3088 - vstx $vr0, $t3, $s8 + ori $a2, $zero, 3088 + vstx $vr0, $a2, $s8 ori $a2, $zero, 3104 - vstx $vr16, $a2, $s8 + vstx $vr14, $a2, $s8 + ori $a2, $zero, 3120 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $s8 + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 3136 - vstx $vr0, $ra, $s8 + vld $vr24, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3136 + vstx $vr24, $a2, $s8 + ori $a2, $zero, 3152 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 3152 - vstx $vr2, $t2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3168 - vstx $vr14, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2656 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3184 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 3184 - vstx $vr2, $a7, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2640 + add.d $a0, $sp, $a0 + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3200 - vstx $vr23, $a2, $s8 + vstx $vr9, $a2, $s8 + ori $a2, $zero, 3216 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $fp, $s8 - ori $a2, $zero, 3232 - vstx $vr26, $a2, $s8 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3232 + vstx $vr6, $a2, $s8 ori $a2, $zero, 3248 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3264 lu12i.w $a0, 2 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3264 + vstx $vr5, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3296 + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3296 + vstx $vr16, $a2, $s8 + ori $a2, $zero, 3312 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3312 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3328 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3328 + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3344 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a6, $s8 - ori $a2, $zero, 3360 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3360 + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3376 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 3376 - vstx $vr2, $a5, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3392 - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3408 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3424 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3440 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3440 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3456 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3472 - lu12i.w $a0, 1 - ori $a0, $a0, 4000 + lu12i.w $a0, 2 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3472 + vstx $vr12, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3488 - vstx $vr2, $a2, $s8 + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3504 - vstx $vr2, $a2, $s8 + vstx $vr3, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr2, $a2, $s8 + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 - vstx $vr2, $a2, $s8 + vstx $vr4, $a2, $s8 ori $a2, $zero, 3552 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload - vstx $vr20, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3568 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3600 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 - vstx $vr2, $a2, $s8 + vld $vr20, $a0, 0 # 16-byte Folded Reload + vstx $vr20, $a2, $s8 ori $a2, $zero, 3616 lu12i.w $a0, 2 - ori $a0, $a0, 800 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 - lu12i.w $a0, 2 - ori $a0, $a0, 784 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 ori $a2, $zero, 3632 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3648 lu12i.w $a0, 2 - ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $t4, $zero, 3664 - vstx $vr2, $t4, $s8 - ori $a2, $zero, 3680 - lu12i.w $a0, 2 - ori $a0, $a0, 1488 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3648 + vstx $vr0, $a2, $s8 + ori $a2, $zero, 3664 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a5, $s8 ori $a2, $zero, 3696 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3712 lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s8 + vld $vr11, $a0, 0 # 16-byte Folded Reload + vstx $vr11, $a2, $s8 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a6, $s8 ori $a2, $zero, 3728 - vstx $vr2, $a2, $s8 - ori $a2, $zero, 3744 - lu12i.w $a0, 1 - ori $a0, $a0, 3920 + lu12i.w $a0, 2 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload - vstx $vr3, $a2, $s8 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s8 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a7, $s8 ori $a2, $zero, 3760 - vstx $vr2, $a2, $s8 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 + vstx $vr26, $a2, $s8 + ori $a7, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 3792 - vstx $vr2, $a6, $s8 - ori $a2, $zero, 3776 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a7, $s8 + ori $a6, $zero, 3776 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload - vstx $vr4, $a2, $s8 + vld $vr14, $a0, 0 # 16-byte Folded Reload + vstx $vr14, $a6, $s8 + lu12i.w $a0, 6 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr30, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr29, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3888 - add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 @@ -266762,1655 +265049,1619 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr7, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 + add.d $a0, $sp, $a0 + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr7, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr28, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr12, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr29, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr31, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3584 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2224 - add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vst $vr12, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3648 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 lu12i.w $a0, 6 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr8, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr12, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr23, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr23, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr26, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 6 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 6 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 150 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa2, $t1, $s8 - fst.d $fa2, $sp, 1872 # 8-byte Folded Spill + fldx.d $fa1, $t1, $s8 + fst.d $fa1, $sp, 1872 # 8-byte Folded Spill ori $t1, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t1, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t1, $s7 ori $t1, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t1, $s7 + vld $vr17, $a0, 0 # 16-byte Folded Reload + vstx $vr17, $t1, $s7 ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t1, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t1, $s7 ori $t1, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t1, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t1, $s7 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a4, $s7 - ori $a2, $zero, 2128 - vstx $vr12, $a2, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $s7 + ori $a4, $zero, 2128 + lu12i.w $a0, 1 + ori $a0, $a0, 3232 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $s7 ori $a2, $zero, 2144 - vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2160 vstx $vr1, $a2, $s7 lu12i.w $a0, 1 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2176 - vstx $vr2, $a2, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2160 + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3184 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2176 + vstx $vr1, $a2, $s7 ori $a2, $zero, 2192 - vstx $vr2, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2208 vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2224 + ori $a2, $zero, 2208 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2224 + vstx $vr18, $a2, $s7 ori $a2, $zero, 2240 - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2256 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $a2, $s7 - ori $s8, $zero, 2272 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s8, $s7 + vld $vr17, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2256 + vstx $vr17, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2272 + vstx $vr17, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 240 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2288 - vstx $vr2, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vstx $vr18, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2304 - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2320 + vstx $vr18, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s7 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2320 + vstx $vr18, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2352 - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2368 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vstx $vr18, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s7 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2368 + vstx $vr18, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2384 - vstx $vr1, $a2, $s7 + vstx $vr18, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2400 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a2, $zero, 2432 + vstx $vr21, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2432 + ori $a2, $zero, 2448 vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2448 - vstx $vr1, $a2, $s7 ori $a2, $zero, 2464 - vstx $vr7, $a2, $s7 + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2480 vstx $vr1, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a2, $zero, 2496 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 vstx $vr1, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 1184 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 + vstx $vr18, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s7 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 + vstx $vr18, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s7 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2544 + vstx $vr18, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2688 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2560 - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vstx $vr1, $ra, $s7 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2576 vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2592 - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2608 + vstx $vr1, $fp, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s7 - ori $a2, $zero, 2624 + vstx $vr1, $t6, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2624 vstx $vr1, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 976 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2640 vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2656 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2672 vstx $vr1, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - vstx $vr8, $a2, $s7 + vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 vstx $vr1, $a2, $s7 - ori $a2, $zero, 2736 - vstx $vr21, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 + ori $a2, $zero, 2736 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a5, $zero, 2752 + lu12i.w $a0, 2 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2768 - vstx $vr1, $a2, $s7 + vstx $vr1, $a5, $s7 + ori $ra, $zero, 2768 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 64 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $ra, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2800 - vstx $vr1, $a2, $s7 + vstx $vr1, $t5, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2816 - vstx $vr1, $a2, $s7 + vstx $vr1, $t3, $s7 + ori $s8, $zero, 2832 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2832 - vstx $vr1, $a2, $s7 + vstx $vr1, $s8, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 48 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2848 - vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t2, $s7 ori $a2, $zero, 2864 - vstx $vr1, $a2, $s7 + vstx $vr19, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 vstx $vr1, $a2, $s7 + ori $a2, $zero, 2896 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 vstx $vr1, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 944 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 - vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 32 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2928 vstx $vr1, $a2, $s7 + ori $a2, $zero, 2928 + vstx $vr27, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2944 vstx $vr1, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 16 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2960 - vstx $vr1, $a2, $s7 + vstx $vr15, $a2, $s7 + ori $a2, $zero, 2976 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2976 vstx $vr1, $a2, $s7 + ori $a2, $zero, 2992 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2992 vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr21, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3008 - vstx $vr1, $a2, $s7 + vstx $vr21, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3072 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3040 - vstx $vr1, $a2, $s7 + vstx $vr13, $a2, $s7 + ori $a2, $zero, 3056 lu12i.w $a0, 2 - ori $a0, $a0, 912 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t6, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3072 vstx $vr1, $a2, $s7 + ori $a2, $zero, 3072 + vstx $vr10, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t3, $s7 + ori $a2, $zero, 3088 + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3104 vstx $vr1, $a2, $s7 - ori $fp, $zero, 3120 + ori $a2, $zero, 3120 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $fp, $s7 - vstx $vr0, $ra, $s7 + vstx $vr1, $a2, $s7 + ori $a2, $zero, 3136 + vstx $vr24, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3152 + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3168 - vstx $vr0, $a2, $s7 + vstx $vr24, $a2, $s7 + ori $a2, $zero, 3184 lu12i.w $a0, 2 - ori $a0, $a0, 1664 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3200 - vstx $vr0, $a2, $s7 - ori $a7, $zero, 3216 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 + ori $fp, $zero, 3200 + vstx $vr9, $fp, $s7 + ori $a2, $zero, 3216 lu12i.w $a0, 2 - ori $a0, $a0, 1648 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 ori $a2, $zero, 3232 - vstx $vr0, $a2, $s7 - ori $t2, $zero, 3248 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s7 + vstx $vr6, $a2, $s7 lu12i.w $a0, 2 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3264 + ori $a2, $zero, 3248 vstx $vr1, $a2, $s7 - ori $t3, $zero, 3280 + ori $a2, $zero, 3264 + vstx $vr5, $a2, $s7 + ori $a2, $zero, 3280 lu12i.w $a0, 2 - ori $a0, $a0, 1616 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3296 vstx $vr1, $a2, $s7 - ori $t6, $zero, 3312 + ori $a2, $zero, 3296 + vstx $vr16, $a2, $s7 + ori $a2, $zero, 3312 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 - vstx $vr1, $a2, $s7 - ori $ra, $zero, 3344 + vstx $vr16, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3344 + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 - vstx $vr1, $a2, $s7 + vstx $vr15, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3376 + vstx $vr1, $a2, $s7 ori $a2, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3408 - vstx $vr0, $a2, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3408 + vstx $vr1, $a2, $s7 ori $a2, $zero, 3424 - vstx $vr0, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 vstx $vr1, $a2, $s7 + ori $a2, $zero, 3440 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 ori $a2, $zero, 3456 - vstx $vr0, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 912 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3472 vstx $vr1, $a2, $s7 ori $a2, $zero, 3488 lu12i.w $a0, 2 - ori $a0, $a0, 1520 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s7 - ori $a2, $zero, 3504 - lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $a2, $s7 + ori $a2, $zero, 3504 + vstx $vr3, $a2, $s7 ori $a2, $zero, 3520 lu12i.w $a0, 2 - ori $a0, $a0, 1504 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s7 - ori $a2, $zero, 3536 - lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $a2, $s7 - ori $a2, $zero, 3552 - vstx $vr20, $a2, $s7 + ori $a2, $zero, 3536 + vstx $vr4, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 832 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 + ori $a2, $zero, 3552 vstx $vr1, $a2, $s7 + ori $t3, $zero, 3568 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t3, $s7 ori $a2, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 816 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 vstx $vr1, $a2, $s7 + ori $a2, $zero, 3600 + vstx $vr20, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3616 - vstx $vr0, $a2, $s7 + vstx $vr1, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 vstx $vr1, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 768 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 - vstx $vr0, $a2, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + ori $t6, $zero, 3648 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t4, $s7 - lu12i.w $a0, 2 - ori $a0, $a0, 1488 + vstx $vr1, $t6, $s7 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3664 + vstx $vr1, $a2, $s7 ori $a2, $zero, 3680 - vstx $vr0, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3696 vstx $vr1, $a2, $s7 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3696 + vstx $vr11, $a2, $s7 ori $a2, $zero, 3712 - vstx $vr0, $a2, $s7 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 1568 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3728 vstx $vr1, $a2, $s7 + lu12i.w $a0, 1 + ori $a0, $a0, 4048 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3744 - vstx $vr3, $a2, $s7 + vstx $vr4, $a2, $s7 + ori $a2, $zero, 3760 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 vstx $vr1, $a2, $s7 + lu12i.w $a0, 2 + ori $a0, $a0, 272 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a7, $s7 + vstx $vr14, $a6, $s7 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a6, $s7 - ori $a2, $zero, 3776 - vstx $vr4, $a2, $s7 + vld $vr1, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 7 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2448 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr3, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr6, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268418,15 +266669,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268434,135 +266685,151 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 7 - ori $a0, $a0, 2272 - add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1408 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2288 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3024 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2304 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2320 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 784 + add.d $a0, $sp, $a0 + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2336 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr9, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2352 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + lu12i.w $a0, 2 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2368 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1360 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2384 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 + add.d $a0, $sp, $a0 + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2400 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr11, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1344 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2416 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2432 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1328 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 2448 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 3936 + add.d $a0, $sp, $a0 + vld $vr17, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 7 + ori $a0, $a0, 2448 + add.d $a0, $sp, $a0 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268570,27 +266837,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 + add.d $a0, $sp, $a0 + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268598,7 +266869,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268606,47 +266877,47 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr27, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268654,119 +266925,115 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 - add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268774,7 +267041,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268782,23 +267049,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr11, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268806,7 +267073,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268814,15 +267081,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268830,7 +267097,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268838,7 +267105,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268846,15 +267113,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268862,39 +267129,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268902,35 +267169,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3488 + add.d $a0, $sp, $a0 + vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr8, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -268940,121 +267211,149 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 lu12i.w $a0, 7 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr29, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr31, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr25, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3600 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3616 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 + vst $vr10, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3632 + add.d $a0, $sp, $a0 + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3648 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr14, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2864 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -269062,15 +267361,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -269078,39 +267377,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2432 - add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr12, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr23, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -269118,43 +267409,47 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 @@ -269162,89 +267457,81 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3744 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr26, $a0, 0 lu12i.w $a0, 7 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3808 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr30, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3888 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 + lu12i.w $a0, 2 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 7 - ori $a0, $a0, 3968 - add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 7 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 fldx.d $fs2, $t0, $s7 - fld.d $ft14, $sp, 1840 # 8-byte Folded Reload + fld.d $ft14, $sp, 1832 # 8-byte Folded Reload fld.d $fa0, $sp, 1896 # 8-byte Folded Reload - fld.d $fa6, $sp, 1888 # 8-byte Folded Reload - fmadd.d $ft14, $fa6, $ft14, $fa0 - fld.d $ft15, $sp, 1832 # 8-byte Folded Reload + fld.d $ft4, $sp, 1888 # 8-byte Folded Reload + fmadd.d $ft14, $ft4, $ft14, $fa0 + fld.d $ft15, $sp, 1824 # 8-byte Folded Reload fld.d $fa0, $sp, 1880 # 8-byte Folded Reload fmadd.d $ft14, $fa0, $ft15, $ft14 - fld.d $ft15, $sp, 1824 # 8-byte Folded Reload + fld.d $ft15, $sp, 1816 # 8-byte Folded Reload fld.d $fa0, $sp, 1872 # 8-byte Folded Reload fmadd.d $ft14, $fa0, $ft15, $ft14 - fld.d $ft15, $sp, 1816 # 8-byte Folded Reload + fld.d $ft15, $sp, 1808 # 8-byte Folded Reload fmadd.d $fa0, $fs2, $ft15, $ft14 fst.d $fa0, $sp, 1896 # 8-byte Folded Spill lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 175 @@ -269252,658 +267539,655 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 slli.d $t1, $t0, 3 ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $s6 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t0, $s6 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s6 ori $t0, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s6 ori $t0, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s6 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a4, $s6 - ori $a2, $zero, 2128 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $s6 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vstx $vr0, $a4, $s6 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 - ori $a2, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + ori $a6, $zero, 2160 + vstx $vr0, $a6, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2176 - vstx $vr6, $s7, $s6 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2176 + vstx $vr0, $a2, $s6 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 - vstx $vr6, $a2, $s6 - ori $a2, $zero, 2208 + vstx $vr0, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2208 vstx $vr0, $a2, $s6 ori $a2, $zero, 2224 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vstx $vr12, $a2, $s6 + ori $t5, $zero, 2256 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 - ori $a2, $zero, 2256 - vstx $vr12, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vstx $vr0, $t5, $s6 + ori $a2, $zero, 2272 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $s6 - ori $s8, $zero, 2288 + vstx $vr0, $a2, $s6 + ori $a2, $zero, 2288 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $s8, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 2320 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a2, $s6 - ori $a2, $zero, 2336 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2336 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2352 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 + vstx $vr12, $a2, $s6 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2368 vstx $vr0, $a2, $s6 - ori $a5, $zero, 2384 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a5, $s6 - ori $a2, $zero, 2400 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2384 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2400 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2416 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2416 vstx $vr0, $a2, $s6 + ori $a2, $zero, 2432 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2432 vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 vstx $vr0, $a2, $s6 + ori $a2, $zero, 2464 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2464 vstx $vr0, $a2, $s6 + ori $t2, $zero, 2480 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 - vstx $vr0, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + vstx $vr0, $t2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2496 - vstx $vr6, $a2, $s6 + vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 - vstx $vr6, $a2, $s6 + vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 - vstx $vr6, $a2, $s6 - ori $a2, $zero, 2544 - vstx $vr7, $a2, $s6 + vstx $vr12, $a2, $s6 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr12, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2560 - vstx $vr6, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vstx $vr0, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2576 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2592 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a2, $s6 - ori $a2, $zero, 2608 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2592 + vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2608 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2624 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a2, $s6 - ori $a2, $zero, 2640 - lu12i.w $a0, 2 - ori $a0, $a0, 976 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2624 + vstx $vr0, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2640 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2656 vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2672 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 2688 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + vstx $vr23, $a2, $s6 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2688 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2736 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2736 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 - vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vstx $vr0, $a5, $s6 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2768 - vstx $vr0, $a2, $s6 + vstx $vr0, $ra, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 vstx $vr0, $a2, $s6 - ori $a2, $zero, 2800 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2800 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 - vstx $vr23, $a2, $s6 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2832 - vstx $vr0, $a2, $s6 + vstx $vr0, $s8, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 - vstx $vr0, $a2, $s6 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2864 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 - vstx $vr0, $a2, $s6 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2896 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 - vstx $vr0, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vstx $vr12, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2928 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2944 - vstx $vr0, $a2, $s6 - ori $t4, $zero, 2960 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vstx $vr12, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $s6 + ori $a2, $zero, 2960 + vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr0, $a2, $s6 + vstx $vr12, $a2, $s6 ori $a2, $zero, 2992 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 3008 - lu12i.w $a0, 1 - ori $a0, $a0, 3088 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vstx $vr21, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3040 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3040 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3072 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3072 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3088 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3104 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3104 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3120 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 vstx $vr0, $a2, $s6 + ori $a2, $zero, 3152 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3152 - vstx $vr0, $a2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 3168 - lu12i.w $a0, 1 - ori $a0, $a0, 3040 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vstx $vr24, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3200 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $s7, $zero, 3184 + vstx $vr12, $s7, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vstx $vr0, $fp, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s6 - ori $a2, $zero, 3232 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $fp, $zero, 3216 + vstx $vr12, $fp, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3232 vstx $vr0, $a2, $s6 + ori $a2, $zero, 3248 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 3264 - lu12i.w $a0, 2 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3280 + vstx $vr12, $a2, $s6 ori $a2, $zero, 3296 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 + ori $a2, $zero, 3312 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 3328 - lu12i.w $a0, 1 - ori $a0, $a0, 4064 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vstx $vr16, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1600 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a7, $zero, 3344 + vstx $vr12, $a7, $s6 ori $a2, $zero, 3360 - vstx $vr0, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 1584 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr15, $a2, $s6 ori $a2, $zero, 3376 - vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 ori $a2, $zero, 3392 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3408 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + lu12i.w $a0, 2 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3424 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 + ori $a2, $zero, 3408 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3424 + vstx $vr12, $a2, $s6 ori $a2, $zero, 3440 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3456 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 + lu12i.w $a0, 2 + ori $a0, $a0, 912 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3456 + vstx $vr12, $a2, $s6 ori $a2, $zero, 3472 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 3488 - vstx $vr0, $a7, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3488 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3504 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr0, $a2, $s6 + vstx $vr12, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 vstx $vr0, $a2, $s6 ori $a2, $zero, 3552 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3568 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3584 + vstx $vr0, $t3, $s6 + ori $t3, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $t3, $s6 + ori $a2, $zero, 3600 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 vstx $vr0, $a2, $s6 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 3616 - vstx $vr28, $a6, $s6 + ori $a2, $zero, 3616 + vstx $vr28, $a2, $s6 + ori $a2, $zero, 3632 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3632 vstx $vr0, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 - vstx $vr29, $a2, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vstx $vr29, $t6, $s6 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3664 vstx $vr0, $a2, $s6 + ori $a2, $zero, 3680 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 3680 - vstx $vr0, $ra, $s6 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + vstx $vr0, $a2, $s6 + ori $a2, $zero, 3696 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3696 vstx $vr0, $a2, $s6 ori $a2, $zero, 3712 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s6 + ori $ra, $zero, 3728 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 - vstx $vr0, $a2, $s6 + vstx $vr0, $ra, $s6 ori $a2, $zero, 3744 + vstx $vr4, $a2, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3760 vstx $vr0, $a2, $s6 - lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $s8, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 - vstx $vr0, $a2, $s6 + vstx $vr0, $s8, $s6 + ori $a5, $zero, 3776 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 - vstx $vr0, $a2, $s6 - ori $a2, $zero, 3776 + vstx $vr0, $a5, $s6 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s6 + lu12i.w $a0, 8 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -269911,15 +268195,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -269927,39 +268211,35 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3888 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -269967,15 +268247,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -269983,15 +268263,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -269999,35 +268279,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1472 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270035,51 +268319,55 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270087,71 +268375,79 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270159,15 +268455,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270175,31 +268471,27 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270207,7 +268499,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270215,7 +268507,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270223,7 +268515,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270231,7 +268523,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270241,17 +268533,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 lu12i.w $a0, 8 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 144 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270259,23 +268547,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3280 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr31, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2800 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270283,83 +268579,75 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1168 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 8 - ori $a0, $a0, 2880 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 192 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 2896 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3264 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 2912 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1200 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 2928 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + lu12i.w $a0, 8 + ori $a0, $a0, 2928 + add.d $a0, $sp, $a0 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270367,7 +268655,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270375,31 +268663,27 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr11, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr11, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270407,15 +268691,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270423,7 +268707,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270431,103 +268715,95 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 8 - ori $a0, $a0, 3168 - add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3312 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3184 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 + vst $vr15, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1248 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3200 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3216 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3344 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3232 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 368 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3248 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3360 + lu12i.w $a0, 8 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr6, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr8, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270535,15 +268811,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270551,7 +268827,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270561,86 +268837,69 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 lu12i.w $a0, 8 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2912 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr9, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3456 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3472 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr10, $a0, 0 lu12i.w $a0, 8 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - vori.b $vr31, $vr30, 0 lu12i.w $a0, 8 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr14, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270650,145 +268909,165 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 lu12i.w $a0, 8 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3552 - add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3696 + add.d $a0, $sp, $a0 + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr9, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3712 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr26, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3776 + add.d $a0, $sp, $a0 + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr24, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 @@ -270796,63 +269075,55 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3808 - add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 8 - ori $a0, $a0, 3904 - add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 + vst $vr21, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3920 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3840 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3936 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3952 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 8 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 200 @@ -270862,654 +269133,659 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 fst.d $fa0, $sp, 1888 # 8-byte Folded Spill ori $t1, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $s5 ori $t1, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $s5 ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $s5 ori $t1, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $s5 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a4, $s5 - ori $a2, $zero, 2128 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s5 + vstx $vr0, $a4, $s5 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2160 - vstx $vr0, $a2, $s5 + vstx $vr0, $a6, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $s5 + ori $a2, $zero, 2176 + vstx $vr0, $a2, $s5 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2192 - vstx $vr0, $a2, $s5 + ori $a6, $zero, 2192 + vstx $vr0, $a6, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2224 - vstx $vr6, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vstx $vr0, $a2, $s5 + ori $t6, $zero, 2240 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2240 - vstx $vr7, $a2, $s5 - ori $s7, $zero, 2256 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t6, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vstx $vr0, $t5, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2272 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a2, $zero, 2288 + vstx $vr0, $a2, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2304 - vstx $vr5, $a2, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 - vstx $vr3, $a2, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2352 vstx $vr0, $a2, $s5 - ori $fp, $zero, 2368 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $fp, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a2, $zero, 2368 + vstx $vr0, $a2, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2400 + ori $a2, $zero, 2384 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2416 + ori $a2, $zero, 2400 vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2736 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2432 + ori $a2, $zero, 2416 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2448 + ori $a2, $zero, 2432 vstx $vr0, $a2, $s5 - ori $a2, $zero, 2464 - lu12i.w $a0, 1 - ori $a0, $a0, 2704 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2448 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 + ori $a2, $zero, 2464 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + lu12i.w $a0, 1 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 1888 + vstx $vr0, $t2, $s5 + ori $t2, $zero, 2496 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 2512 vstx $vr0, $t2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2528 - vstx $vr0, $s6, $s5 - ori $a2, $zero, 2544 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2512 vstx $vr0, $a2, $s5 - ori $a2, $zero, 2560 lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2528 vstx $vr0, $a2, $s5 - ori $a2, $zero, 2576 lu12i.w $a0, 2 - ori $a0, $a0, 992 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a2, $zero, 2560 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2592 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a2, $zero, 2576 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2608 vstx $vr0, $a2, $s5 + ori $a2, $zero, 2592 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 vstx $vr0, $a2, $s5 - ori $t3, $zero, 2640 + ori $a2, $zero, 2608 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 + ori $a2, $zero, 2624 vstx $vr0, $a2, $s5 - ori $t6, $zero, 2672 + ori $a2, $zero, 2640 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + vstx $vr0, $a2, $s5 + ori $a2, $zero, 2656 + lu12i.w $a0, 2 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2688 vstx $vr0, $a2, $s5 - ori $a2, $zero, 2704 + ori $a2, $zero, 2672 + vstx $vr23, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 1104 + add.d $a0, $sp, $a0 + vld $vr23, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2688 + vstx $vr23, $a2, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2704 vstx $vr0, $a2, $s5 ori $a2, $zero, 2720 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2736 vstx $vr0, $a2, $s5 - ori $s8, $zero, 2752 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a2, $zero, 2752 + vstx $vr0, $a2, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2768 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2800 vstx $vr0, $a2, $s5 + lu12i.w $a0, 2 + ori $a0, $a0, 1840 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 - vstx $vr23, $a2, $s5 + vstx $vr0, $a2, $s5 + ori $a2, $zero, 2832 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2832 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 vstx $vr0, $a2, $s5 + ori $a2, $zero, 2864 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2864 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 vstx $vr0, $a2, $s5 - ori $a5, $zero, 2896 + ori $a2, $zero, 2896 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + ori $a2, $zero, 2928 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2928 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2944 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a2, $zero, 2960 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2992 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3008 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 vstx $vr0, $a2, $s5 + ori $a2, $zero, 3040 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3040 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3072 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t4, $zero, 3088 - vstx $vr0, $t4, $s5 + ori $a2, $zero, 3088 + vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3104 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3152 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3168 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - vstx $vr0, $a2, $s5 + vstx $vr0, $s7, $s5 + ori $s6, $zero, 3200 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3200 - vstx $vr0, $a2, $s5 + vstx $vr0, $s6, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3216 - vstx $vr0, $a2, $s5 + vstx $vr0, $fp, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3232 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3248 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3264 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 - vstx $vr0, $a2, $s5 + ori $fp, $zero, 3280 + vstx $vr0, $fp, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3296 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3344 - vstx $vr0, $a2, $s5 - ori $a2, $zero, 3360 + vstx $vr0, $a7, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3360 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 vstx $vr0, $a2, $s5 - ori $a2, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3392 vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3424 vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3440 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3472 vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s5 - ori $a2, $zero, 3504 + ori $a2, $zero, 3488 + vstx $vr0, $a2, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3504 vstx $vr0, $a2, $s5 ori $a2, $zero, 3520 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s5 ori $a2, $zero, 3536 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3552 vstx $vr0, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + ori $t5, $zero, 3568 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3568 - vstx $vr0, $a2, $s5 + vstx $vr0, $t5, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3584 - vstx $vr0, $a2, $s5 + vstx $vr0, $t3, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3600 vstx $vr0, $a2, $s5 - vstx $vr28, $a6, $s5 + ori $a2, $zero, 3616 + vstx $vr28, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 vstx $vr0, $a2, $s5 ori $a2, $zero, 3648 vstx $vr29, $a2, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + ori $a7, $zero, 3664 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3664 - vstx $vr0, $a2, $s5 + vstx $vr0, $a7, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s5 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a2, $zero, 3680 + vstx $vr0, $a2, $s5 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3696 vstx $vr0, $a2, $s5 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3712 - vstx $vr28, $a2, $s5 + vstx $vr0, $a2, $s5 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 - vstx $vr0, $a2, $s5 + vstx $vr0, $ra, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 vld $vr29, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3744 vstx $vr29, $a2, $s5 + ori $a2, $zero, 3760 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 vstx $vr0, $a2, $s5 - ori $a2, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $s8, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s5 + vstx $vr0, $a5, $s5 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3776 - vstx $vr0, $a2, $s5 + lu12i.w $a0, 9 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271517,15 +269793,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271533,7 +269809,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271541,7 +269817,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271549,23 +269825,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271573,15 +269849,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271589,15 +269865,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271605,7 +269881,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271613,7 +269889,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271621,7 +269897,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271629,15 +269905,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271645,39 +269921,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271685,15 +269961,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271701,79 +269977,79 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271781,15 +270057,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271797,31 +270073,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271829,7 +270105,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271837,7 +270113,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271845,7 +270121,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -271853,367 +270129,351 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3232 - add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 - add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr11, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1264 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr15, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr8, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3392 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr7, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 @@ -272221,3303 +270481,3275 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3664 + add.d $a0, $sp, $a0 + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vst $vr31, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2848 + add.d $a0, $sp, $a0 + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3584 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr11, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2416 - add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vst $vr13, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr9, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr9, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr26, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 + add.d $a0, $sp, $a0 + vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr15, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2448 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr14, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr24, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3808 + add.d $a0, $sp, $a0 + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3792 - add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr12, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr21, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3872 + add.d $a0, $sp, $a0 + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3824 - add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vst $vr11, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 + vst $vr10, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 9 ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 448 - add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vst $vr9, $a0, 0 lu12i.w $a0, 9 ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2944 - add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 9 - ori $a0, $a0, 3984 - add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t1, $a0, 0 # 8-byte Folded Reload addi.d $t1, $t1, 225 andi $t1, $t1, 511 slli.d $t1, $t1, 3 - fldx.d $ft7, $t0, $s5 - fst.d $ft7, $sp, 1880 # 8-byte Folded Spill + fldx.d $ft10, $t0, $s5 + fst.d $ft10, $sp, 1880 # 8-byte Folded Spill ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t0, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t0, $s4 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t0, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t0, $s4 ori $t0, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t0, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t0, $s4 ori $t0, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t0, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t0, $s4 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a4, $s4 - ori $a2, $zero, 2128 + vld $vr27, $a0, 0 # 16-byte Folded Reload + vstx $vr27, $a4, $s4 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr26, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a4, $s4 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - ori $a2, $zero, 2160 + vld $vr24, $a0, 0 # 16-byte Folded Reload + vstx $vr24, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2160 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2176 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2192 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a6, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 ori $a2, $zero, 2224 - vstx $vr6, $a2, $s4 - ori $a2, $zero, 2240 - vstx $vr7, $a2, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $s7, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t6, $s4 + ori $t3, $zero, 2256 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t3, $s4 ori $a2, $zero, 2272 - vstx $vr25, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $s5, $zero, 2288 - vstx $vr15, $s5, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2288 + lu12i.w $a0, 2 + ori $a0, $a0, 240 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 ori $a2, $zero, 2304 - vstx $vr5, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 ori $a2, $zero, 2320 - vstx $vr15, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 224 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 ori $a2, $zero, 2336 - vstx $vr3, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 3168 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2352 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2352 - vstx $vr15, $s7, $s4 - vstx $vr2, $fp, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2368 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 2384 - vstx $vr15, $ra, $s4 - ori $a2, $zero, 2400 - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2384 + lu12i.w $a0, 2 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 - ori $a2, $zero, 2416 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2400 lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 - ori $a2, $zero, 2432 - lu12i.w $a0, 1 - ori $a0, $a0, 2736 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + ori $a2, $zero, 2416 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2432 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 160 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 - vstx $vr2, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2464 - vstx $vr2, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2480 - vstx $vr2, $a2, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2512 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $s6, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2544 - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2528 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2560 - vstx $vr15, $a2, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2576 - vstx $vr2, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 2592 - vstx $vr15, $a7, $s4 - ori $t2, $zero, 2608 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2592 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2608 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 2624 - vstx $vr15, $a6, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 976 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2624 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t3, $s4 - ori $fp, $zero, 2656 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2640 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 64 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $fp, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t6, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2656 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2672 + vstx $vr18, $a2, $s4 ori $a2, $zero, 2688 - vstx $vr2, $a2, $s4 + vstx $vr23, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 - vstx $vr15, $a2, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 - vstx $vr2, $a2, $s4 - ori $s6, $zero, 2736 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vstx $vr23, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $s6, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2736 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $s8, $s4 - ori $t3, $zero, 2768 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2752 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t3, $s4 - ori $a2, $zero, 2784 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2768 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2784 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $t6, $zero, 2800 - vstx $vr23, $t6, $s4 - ori $a2, $zero, 2816 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2800 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2816 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2832 - vstx $vr2, $a2, $s4 - ori $a2, $zero, 2848 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2848 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2864 - vstx $vr2, $a2, $s4 - ori $a2, $zero, 2880 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2880 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a5, $s4 - ori $a2, $zero, 2912 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2896 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2912 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2928 - vstx $vr2, $a2, $s4 - ori $a2, $zero, 2944 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2944 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2960 - vstx $vr2, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 ori $a2, $zero, 2992 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 ori $a2, $zero, 3008 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3040 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3040 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3072 + vstx $vr18, $a2, $s4 + ori $t2, $zero, 3072 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t4, $s4 - ori $a2, $zero, 3104 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3088 + vstx $vr18, $a2, $s4 + ori $s7, $zero, 3104 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $s7, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 - vstx $vr2, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3152 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 + ori $a2, $zero, 3168 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3168 - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3184 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3200 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $s6, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3216 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 ori $a2, $zero, 3232 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3248 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 ori $a2, $zero, 3264 - lu12i.w $a0, 2 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $fp, $s4 ori $a2, $zero, 3296 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 ori $a2, $zero, 3328 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3392 - vstx $vr15, $a2, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3424 + vstx $vr25, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3424 + vstx $vr18, $a2, $s4 + ori $ra, $zero, 3440 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3456 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $ra, $s4 + ori $s8, $zero, 3456 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3472 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $s8, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3472 + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3488 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 + ori $a2, $zero, 3504 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr15, $a2, $s4 + vstx $vr18, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 - vstx $vr15, $a2, $s4 - ori $t4, $zero, 3552 + vstx $vr18, $a2, $s4 + ori $a5, $zero, 3552 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $t4, $s4 - ori $a2, $zero, 3568 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a5, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 - ori $s8, $zero, 3584 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $t5, $s4 + ori $a6, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $s8, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a6, $s4 + ori $a2, $zero, 3600 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3616 - vstx $vr15, $a2, $s4 - lu12i.w $a0, 2 - ori $a0, $a0, 784 - add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 ori $a2, $zero, 3632 - vstx $vr15, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3648 - vstx $vr15, $a2, $s4 - ori $a2, $zero, 3664 + vstx $vr18, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a7, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 752 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3680 - lu12i.w $a0, 2 - ori $a0, $a0, 1488 + vstx $vr18, $a2, $s4 + ori $a2, $zero, 3696 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s4 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3696 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3712 - vstx $vr28, $a2, $s4 + vstx $vr18, $a2, $s4 + ori $s6, $zero, 3728 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 - vstx $vr15, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $s6, $s4 ori $a2, $zero, 3744 vstx $vr29, $a2, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3760 - vstx $vr15, $a2, $s4 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 + vstx $vr18, $a2, $s4 + ori $s5, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 - vstx $vr2, $a2, $s4 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $s5, $s4 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 - vstx $vr2, $a2, $s4 + vstx $vr22, $a2, $s4 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 10 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 304 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr18, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 480 + add.d $a0, $sp, $a0 + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr18, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr18, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr8, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr21, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 416 - add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vst $vr7, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 - add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vst $vr8, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3456 - add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3472 - add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 - add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2928 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 - add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vst $vr31, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vst $vr17, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3520 - add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3552 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3696 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr29, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3712 + add.d $a0, $sp, $a0 + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr17, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr16, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr15, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3744 - add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vst $vr14, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3808 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr12, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr11, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3888 + add.d $a0, $sp, $a0 + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 - add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vst $vr11, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 10 ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 448 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 10 - ori $a0, $a0, 3968 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 10 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 250 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa0, $t1, $s4 - fst.d $fa0, $sp, 1872 # 8-byte Folded Spill + fldx.d $ft1, $t1, $s4 + fst.d $ft1, $sp, 1872 # 8-byte Folded Spill ori $t1, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t1, $s3 ori $t1, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t1, $s3 ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t1, $s3 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $t1, $s3 ori $t1, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload - vstx $vr5, $t1, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t1, $s3 ori $a4, $zero, 2112 - lu12i.w $a0, 1 - ori $a0, $a0, 2832 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $s3 - ori $a2, $zero, 2128 - lu12i.w $a0, 1 - ori $a0, $a0, 2384 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 + vstx $vr27, $a4, $s3 + ori $a4, $zero, 2128 + vstx $vr26, $a4, $s3 ori $a2, $zero, 2144 + vstx $vr24, $a2, $s3 + ori $t6, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2368 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2160 - vstx $vr4, $a2, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t6, $s3 + ori $fp, $zero, 2176 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2176 - vstx $vr0, $a2, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $fp, $s3 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 - vstx $vr0, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 - vstx $vr7, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2224 vstx $vr9, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - vstx $vr12, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2256 - vstx $vr13, $a2, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t3, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 + add.d $a0, $sp, $a0 + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2272 - vstx $vr25, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - vstx $vr8, $s5, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2288 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2304 - vstx $vr14, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 - vstx $vr8, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 - vstx $vr11, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - vstx $vr8, $s7, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2368 - vstx $vr10, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - vstx $vr8, $ra, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2384 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2400 - vstx $vr0, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 - vstx $vr0, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2432 - vstx $vr0, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 - vstx $vr0, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2464 - vstx $vr0, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2480 - vstx $vr0, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2496 - vstx $vr8, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 - vstx $vr8, $a2, $s3 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1872 - add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $s5, $zero, 2528 - vstx $vr8, $s5, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2544 - vstx $vr8, $s7, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2528 + vstx $vr9, $a2, $s3 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - ori $s4, $zero, 2560 - vstx $vr25, $s4, $s3 - ori $ra, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s3 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2560 + vstx $vr9, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2576 + vstx $vr10, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - vstx $vr25, $a7, $s3 + vld $vr10, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2592 + vstx $vr10, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s3 + vld $vr11, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2608 + vstx $vr11, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - vstx $vr25, $a6, $s3 - ori $a5, $zero, 2640 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2624 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 + add.d $a0, $sp, $a0 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2640 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2656 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $s3 - ori $a7, $zero, 2672 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2672 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 - vstx $vr25, $a2, $s3 + vstx $vr13, $a2, $s3 ori $a2, $zero, 2720 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vstx $vr23, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s6, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2736 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2752 - vstx $vr25, $s6, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2752 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2768 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 - vstx $vr25, $a2, $s3 - vstx $vr23, $t6, $s3 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 3040 + add.d $a0, $sp, $a0 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2800 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2832 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2864 - vstx $vr0, $a2, $s3 + vstx $vr15, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 - vstx $vr23, $a2, $s3 - ori $fp, $zero, 2880 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2896 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 - vstx $vr23, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2928 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2944 - vstx $vr23, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2960 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 ori $a2, $zero, 2976 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - vstx $vr23, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2992 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3008 - vstx $vr0, $a2, $s3 + vstx $vr27, $a2, $s3 ori $a2, $zero, 3024 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - vstx $vr23, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3040 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 + ori $a2, $zero, 3056 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3056 - vstx $vr23, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3072 - vstx $vr0, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $t2, $s3 + ori $a2, $zero, 3088 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3088 - vstx $vr23, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3104 - vstx $vr0, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $s7, $s3 + ori $a2, $zero, 3120 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3120 - vstx $vr23, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 ori $a2, $zero, 3136 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3152 - vstx $vr23, $a2, $s3 - ori $a2, $zero, 3168 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3168 + vstx $vr16, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3184 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3200 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 3216 - vstx $vr23, $t2, $s3 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3216 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3232 - vstx $vr0, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 3248 - vstx $vr23, $t3, $s3 - lu12i.w $a0, 2 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3248 + vstx $vr13, $a2, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3264 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3296 - vstx $vr23, $a2, $s3 + vstx $vr24, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 - vstx $vr23, $a2, $s3 + vstx $vr14, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 - vstx $vr23, $a2, $s3 + vstx $vr13, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 vstx $vr23, $a2, $s3 + ori $a2, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $t6, $zero, 3392 - vstx $vr23, $t6, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3408 vstx $vr23, $a2, $s3 + ori $a2, $zero, 3408 + vstx $vr25, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3424 - vstx $vr23, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + ori $s4, $zero, 3424 + vstx $vr23, $s4, $s3 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 - vstx $vr23, $a2, $s3 + vstx $vr23, $ra, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3456 - vstx $vr23, $a2, $s3 + vstx $vr23, $s8, $s3 + ori $a2, $zero, 3472 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3472 vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3488 - vstx $vr23, $a2, $s3 + ori $t5, $zero, 3488 + vstx $vr23, $t5, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3504 vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 vstx $vr23, $a2, $s3 + ori $a2, $zero, 3536 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3536 vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 848 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $a5, $s3 ori $a2, $zero, 3568 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 + add.d $a0, $sp, $a0 + vld $vr23, $a0, 0 # 16-byte Folded Reload vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $s3 + vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $a6, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3600 vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3616 - vstx $vr23, $a2, $s3 + ori $t3, $zero, 3616 + vstx $vr23, $t3, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 vstx $vr23, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 - vstx $vr23, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + ori $a7, $zero, 3648 + vstx $vr23, $a7, $s3 + ori $a2, $zero, 3664 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3664 vstx $vr23, $a2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3680 - vstx $vr23, $a2, $s3 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a6, $zero, 3680 + vstx $vr23, $a6, $s3 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3696 vstx $vr23, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3712 - vstx $vr23, $a2, $s3 + ori $t2, $zero, 3712 + vstx $vr23, $t2, $s3 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3728 - vstx $vr0, $a2, $s3 - ori $a2, $zero, 3744 + vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $s6, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - vstx $vr23, $a2, $s3 + ori $a5, $zero, 3744 + vstx $vr23, $a5, $s3 + ori $a2, $zero, 3760 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 vstx $vr23, $a2, $s3 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 - vstx $vr0, $a2, $s3 + vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $s5, $s3 ori $a2, $zero, 3776 + vstx $vr22, $a2, $s3 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s3 + vld $vr22, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 11 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr21, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr21, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 544 + add.d $a0, $sp, $a0 + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr8, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 + add.d $a0, $sp, $a0 + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2912 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr7, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3616 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3632 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3680 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3600 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr30, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3648 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr3, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3616 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr29, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2432 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr17, $a0, 0 lu12i.w $a0, 11 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275525,31 +273757,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275557,7 +273789,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275565,7 +273797,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275573,7 +273805,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275581,7 +273813,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275589,7 +273821,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275597,7 +273829,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275605,7 +273837,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 @@ -275613,61 +273845,49 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 + lu12i.w $a0, 2 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 448 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 11 ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2944 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 11 - ori $a0, $a0, 3984 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 fldx.d $fs2, $t0, $s3 - fld.d $ft14, $sp, 1808 # 8-byte Folded Reload + fld.d $ft14, $sp, 1800 # 8-byte Folded Reload fld.d $fa0, $sp, 1896 # 8-byte Folded Reload fld.d $fa1, $sp, 1888 # 8-byte Folded Reload fmadd.d $ft14, $fa1, $ft14, $fa0 - fld.d $ft15, $sp, 1800 # 8-byte Folded Reload + fld.d $ft15, $sp, 1792 # 8-byte Folded Reload fld.d $fa0, $sp, 1880 # 8-byte Folded Reload fmadd.d $ft14, $fa0, $ft15, $ft14 - fld.d $ft15, $sp, 1792 # 8-byte Folded Reload + fld.d $ft15, $sp, 1784 # 8-byte Folded Reload fld.d $fa0, $sp, 1872 # 8-byte Folded Reload fmadd.d $ft14, $fa0, $ft15, $ft14 - fld.d $ft15, $sp, 1784 # 8-byte Folded Reload + fld.d $ft15, $sp, 1776 # 8-byte Folded Reload fmadd.d $fa0, $fs2, $ft15, $ft14 fst.d $fa0, $sp, 1896 # 8-byte Folded Spill lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 275 @@ -275675,650 +273895,664 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 slli.d $t1, $t0, 3 ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload - vstx $vr27, $t0, $s2 + vld $vr28, $a0, 0 # 16-byte Folded Reload + vstx $vr28, $t0, $s2 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t0, $s2 ori $t0, $zero, 2080 - vstx $vr6, $t0, $s2 + vstx $vr12, $t0, $s2 ori $t0, $zero, 2096 - vstx $vr5, $t0, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2336 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t0, $s2 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload - vstx $vr26, $a4, $s2 - ori $a2, $zero, 2128 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $s2 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload - vstx $vr31, $a2, $s2 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $s2 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - vstx $vr25, $a2, $s2 - ori $a2, $zero, 2160 - vstx $vr4, $a2, $s2 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a2, $s2 lu12i.w $a0, 1 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2176 - vstx $vr0, $a2, $s2 + vstx $vr0, $t6, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2752 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $fp, $s2 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 vstx $vr0, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2736 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 - vstx $vr7, $a2, $s2 + vstx $vr0, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 256 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2224 - vstx $vr9, $a2, $s2 + vstx $vr0, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - vstx $vr12, $a2, $s2 - ori $a2, $zero, 2256 - vstx $vr13, $a2, $s2 - ori $a2, $zero, 2272 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vstx $vr0, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2256 vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $s5, $zero, 2272 + vstx $vr0, $s5, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2288 vstx $vr0, $a2, $s2 - ori $a2, $zero, 2304 - vstx $vr14, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1888 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $s7, $zero, 2304 + vstx $vr0, $s7, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 vstx $vr0, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 3168 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 - vstx $vr11, $a2, $s2 + vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 + vstx $vr0, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 2352 - vstx $vr0, $a6, $s2 ori $a2, $zero, 2368 - vstx $vr10, $a2, $s2 + vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2384 vstx $vr0, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3168 - add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2400 - vstx $vr6, $a2, $s2 - lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2416 - vstx $vr9, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 2736 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $fp, $zero, 2400 + vstx $vr4, $fp, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload + ori $s3, $zero, 2416 + vstx $vr5, $s3, $s2 ori $a2, $zero, 2432 - vstx $vr10, $a2, $s2 - ori $a2, $zero, 2448 lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 + vld $vr6, $a0, 0 # 16-byte Folded Reload + vstx $vr6, $a2, $s2 + ori $a2, $zero, 2448 + lu12i.w $a0, 2 + ori $a0, $a0, 160 + add.d $a0, $sp, $a0 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 3136 + add.d $a0, $sp, $a0 vld $vr12, $a0, 0 # 16-byte Folded Reload - vstx $vr12, $a2, $s2 ori $a2, $zero, 2464 + vstx $vr12, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $s2 + vld $vr21, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2480 + vstx $vr21, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload - vstx $vr14, $a2, $s2 + vld $vr8, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2496 + vstx $vr8, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1904 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s5, $s2 - vstx $vr8, $s7, $s2 + ori $a2, $zero, 2528 + vstx $vr0, $a2, $s2 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s4, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 992 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a2, $zero, 2544 + vstx $vr0, $a2, $s2 + ori $a2, $zero, 2560 + vstx $vr9, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2576 + vstx $vr2, $a2, $s2 ori $a2, $zero, 2592 - vstx $vr0, $a2, $s2 + vstx $vr10, $a2, $s2 ori $a2, $zero, 2608 + vstx $vr11, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2624 vstx $vr0, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 + add.d $a0, $sp, $a0 + vld $vr23, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2640 + vstx $vr23, $a2, $s2 + ori $a2, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s2 + ori $a2, $zero, 2672 + vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 64 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 - vstx $vr23, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - vstx $vr2, $a7, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - vstx $vr3, $a2, $s2 + vstx $vr0, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 - vstx $vr0, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + vstx $vr10, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2720 - vstx $vr4, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vstx $vr0, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2736 - vstx $vr22, $a2, $s2 + vstx $vr9, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s6, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vld $vr11, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2752 + vstx $vr11, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2768 - vstx $vr5, $a2, $s2 + vstx $vr3, $a2, $s2 + ori $a2, $zero, 2784 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s8, $zero, 2784 - vstx $vr0, $s8, $s2 + vstx $vr0, $a2, $s2 ori $a2, $zero, 2800 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $s2 + ori $a2, $zero, 2816 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2816 - vstx $vr0, $s6, $s2 + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2832 - vstx $vr0, $a2, $s2 + vstx $vr1, $a2, $s2 + ori $a2, $zero, 2848 lu12i.w $a0, 2 - ori $a0, $a0, 48 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s3, $zero, 2848 - vstx $vr0, $s3, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload + vstx $vr18, $a2, $s2 ori $a2, $zero, 2864 - vstx $vr1, $a2, $s2 + vstx $vr15, $a2, $s2 + ori $s6, $zero, 2880 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $fp, $s2 + vld $vr15, $a0, 0 # 16-byte Folded Reload + vstx $vr15, $s6, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2896 vstx $vr1, $a2, $s2 + ori $a2, $zero, 2912 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $fp, $zero, 2912 - vstx $vr7, $fp, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vld $vr15, $a0, 0 # 16-byte Folded Reload + vstx $vr15, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2928 - vstx $vr1, $a2, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 1728 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a2, $s2 ori $a2, $zero, 2944 - vstx $vr7, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload + vstx $vr15, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 + add.d $a0, $sp, $a0 + vld $vr22, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2960 - vstx $vr1, $a2, $s2 + vstx $vr22, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr7, $a2, $s2 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1712 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 2992 - vstx $vr7, $a5, $s2 - ori $a2, $zero, 3008 - lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2992 vstx $vr1, $a2, $s2 + ori $a2, $zero, 3008 + vstx $vr27, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 - vstx $vr7, $a2, $s2 - ori $t4, $zero, 3040 + vstx $vr15, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t4, $s2 + vld $vr29, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3040 + vstx $vr29, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 - vstx $vr7, $a2, $s2 - ori $a2, $zero, 3072 + vstx $vr1, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3072 vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3088 - vstx $vr7, $a2, $s2 - ori $a2, $zero, 3104 + vstx $vr15, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3104 vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 - vstx $vr7, $a2, $s2 + vstx $vr1, $a2, $s2 + ori $a2, $zero, 3136 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3136 vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 880 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3152 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3168 + ori $a2, $zero, 3152 vstx $vr1, $a2, $s2 + ori $a2, $zero, 3168 + vstx $vr16, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3184 - vstx $vr7, $a2, $s2 - ori $a2, $zero, 3200 + vstx $vr1, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 + add.d $a0, $sp, $a0 + vld $vr25, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3200 + vstx $vr25, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3216 vstx $vr1, $a2, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 1648 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3232 - vstx $vr1, $a2, $s2 + vstx $vr31, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t3, $s2 - lu12i.w $a0, 2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3248 + vstx $vr1, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 3264 - vstx $vr7, $t3, $s2 + vld $vr30, $a0, 0 # 16-byte Folded Reload + ori $ra, $zero, 3264 + vstx $vr30, $ra, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 4080 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s2 ori $a2, $zero, 3296 - vstx $vr7, $a2, $s2 + vstx $vr24, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 4064 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 3328 - vstx $vr7, $t2, $s2 + vstx $vr1, $a2, $s2 + ori $a2, $zero, 3328 + vstx $vr14, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3344 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s2 ori $a2, $zero, 3360 - vstx $vr7, $a2, $s2 + vstx $vr13, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3376 - vstx $vr7, $a2, $s2 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t6, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3392 + vstx $vr1, $a2, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 - vstx $vr7, $a2, $s2 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3424 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $s4, $s2 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3440 - vstx $vr7, $a2, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $s8, $zero, 3440 + vstx $vr1, $s8, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 - vstx $vr7, $a2, $s2 + vstx $vr1, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 3472 - vstx $vr7, $a7, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3472 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3488 - vstx $vr7, $a2, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t5, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 - vstx $vr7, $a2, $s2 + vld $vr17, $a0, 0 # 16-byte Folded Reload + ori $t6, $zero, 3504 + vstx $vr17, $t6, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr7, $a2, $s2 + vstx $vr13, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 - vstx $vr7, $a2, $s2 - ori $ra, $zero, 3552 + vstx $vr27, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $ra, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + ori $t5, $zero, 3552 + vstx $vr1, $t5, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $t6, $zero, 3568 - vstx $vr7, $t6, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3568 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3584 vstx $vr1, $a2, $s2 ori $a2, $zero, 3600 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3616 - vstx $vr7, $a2, $s2 - ori $a2, $zero, 3632 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t3, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3632 + vstx $vr1, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3648 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a7, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 3664 - vstx $vr7, $s7, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3664 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $s5, $zero, 3680 - vstx $vr7, $s5, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a6, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3696 + vstx $vr1, $a2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 736 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $s4, $zero, 3712 - vstx $vr7, $s4, $s2 - ori $a2, $zero, 3728 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t2, $s2 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3728 + vstx $vr1, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3744 - vstx $vr7, $a2, $s2 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a5, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3760 - vstx $vr7, $a2, $s2 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 + vstx $vr1, $a2, $s2 + ori $a2, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3792 vstx $vr1, $a2, $s2 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 - vstx $vr29, $a2, $s2 + vstx $vr1, $a2, $s2 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 12 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276326,95 +274560,95 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276422,39 +274656,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276462,15 +274696,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr13, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276478,127 +274712,127 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr13, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276606,15 +274840,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276622,55 +274856,55 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276678,103 +274912,103 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr14, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr15, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276782,151 +275016,151 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr24, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276934,23 +275168,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276958,7 +275192,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276966,7 +275200,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276974,7 +275208,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -276982,23 +275216,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277006,7 +275240,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277014,7 +275248,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277022,7 +275256,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277030,19 +275264,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3648 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277050,15 +275288,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277066,31 +275304,31 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277098,23 +275336,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277122,87 +275360,87 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277210,39 +275448,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 @@ -277250,55 +275488,47 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 ori $a0, $a0, 3952 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 448 - add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 12 - ori $a0, $a0, 3968 - add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 12 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 300 @@ -277307,3103 +275537,3123 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 fldx.d $fa1, $t1, $s2 fst.d $fa1, $sp, 1888 # 8-byte Folded Spill ori $t1, $zero, 2048 - vstx $vr27, $t1, $s1 + vstx $vr28, $t1, $s1 ori $t1, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $t1, $s1 ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $t1, $s1 ori $t1, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $t1, $s1 ori $a4, $zero, 2112 - vstx $vr26, $a4, $s1 - ori $a2, $zero, 2128 - vstx $vr31, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 3248 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $s1 + ori $a4, $zero, 2128 + lu12i.w $a0, 1 + ori $a0, $a0, 3232 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $s1 ori $a2, $zero, 2144 - vstx $vr25, $a2, $s1 - ori $a2, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $a2, $s1 lu12i.w $a0, 1 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2160 + vstx $vr1, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 2752 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2176 - vstx $vr31, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2192 - vstx $vr27, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2208 vstx $vr1, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2224 vstx $vr1, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - vstx $vr1, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vstx $vr28, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2256 vstx $vr1, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2272 - vstx $vr1, $a2, $s1 + vstx $vr1, $s5, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2288 - vstx $vr25, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vstx $vr28, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2304 - vstx $vr1, $a2, $s1 + vld $vr28, $a0, 0 # 16-byte Folded Reload + vstx $vr28, $s7, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2320 - vstx $vr25, $a2, $s1 + vstx $vr28, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2336 vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - vstx $vr25, $a6, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vld $vr28, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 + vstx $vr28, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2368 vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2384 - vstx $vr25, $a2, $s1 - ori $a2, $zero, 2400 - vstx $vr6, $a2, $s1 - ori $a2, $zero, 2416 - vstx $vr9, $a2, $s1 + vstx $vr28, $a2, $s1 + vstx $vr4, $fp, $s1 + vstx $vr5, $s3, $s1 ori $a2, $zero, 2432 - vstx $vr10, $a2, $s1 + vstx $vr6, $a2, $s1 ori $a2, $zero, 2448 - vstx $vr12, $a2, $s1 + vstx $vr7, $a2, $s1 ori $a2, $zero, 2464 - vstx $vr13, $a2, $s1 + vstx $vr12, $a2, $s1 ori $a2, $zero, 2480 - vstx $vr14, $a2, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 - add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vstx $vr21, $a2, $s1 ori $a2, $zero, 2496 - vstx $vr6, $a2, $s1 + vstx $vr8, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2512 - vstx $vr6, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2528 - vstx $vr6, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2544 - vstx $vr1, $a2, $s1 + vstx $vr4, $a2, $s1 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2560 - vstx $vr6, $a2, $s1 - ori $a2, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr4, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2560 vstx $vr1, $a2, $s1 + ori $a2, $zero, 2576 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2592 vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2608 vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2624 vstx $vr1, $a2, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 976 - add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2640 - vstx $vr30, $a2, $s1 - ori $a2, $zero, 2656 vstx $vr23, $a2, $s1 - ori $a2, $zero, 2672 - vstx $vr2, $a2, $s1 - ori $a2, $zero, 2688 - vstx $vr3, $a2, $s1 + ori $a2, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2704 vstx $vr1, $a2, $s1 - ori $a2, $zero, 2720 - vstx $vr4, $a2, $s1 - ori $a2, $zero, 2736 - vstx $vr22, $a2, $s1 + ori $a2, $zero, 2672 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 vstx $vr1, $a2, $s1 - ori $a2, $zero, 2768 - vstx $vr5, $a2, $s1 + ori $a2, $zero, 2688 lu12i.w $a0, 2 - ori $a0, $a0, 1760 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s8, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2800 vstx $vr1, $a2, $s1 + ori $a2, $zero, 2704 + vstx $vr10, $a2, $s1 + ori $s7, $zero, 2720 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s6, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2288 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - ori $s8, $zero, 2832 - vstx $vr23, $s8, $s1 - vstx $vr0, $s3, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2272 + vstx $vr1, $s7, $s1 + ori $a2, $zero, 2736 + vstx $vr9, $a2, $s1 + ori $a2, $zero, 2752 + vstx $vr11, $a2, $s1 + ori $a2, $zero, 2768 + vstx $vr3, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 2864 - vstx $vr1, $a6, $s1 + ori $a2, $zero, 2784 + vstx $vr1, $a2, $s1 + ori $a2, $zero, 2800 + vstx $vr0, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2880 + ori $a2, $zero, 2816 vstx $vr0, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 - vstx $vr26, $a2, $s1 + vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t3, $zero, 2832 + vstx $vr0, $t3, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2848 + vstx $vr1, $a2, $s1 + ori $t2, $zero, 2864 + lu12i.w $a0, 1 + ori $a0, $a0, 2320 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 32 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s6, $zero, 2928 - vstx $vr0, $s6, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $s6, $s1 + ori $a7, $zero, 2896 + lu12i.w $a0, 1 + ori $a0, $a0, 3024 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a7, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2944 - vstx $vr0, $a2, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2912 + vstx $vr1, $a2, $s1 + ori $a6, $zero, 2928 + vstx $vr26, $a6, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2960 - vstx $vr0, $a2, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2944 + vstx $vr1, $a2, $s1 + ori $a5, $zero, 2960 + vstx $vr22, $a5, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr0, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $s6, $zero, 2992 + vstx $vr1, $s6, $s1 + ori $s2, $zero, 3008 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3008 - vstx $vr0, $a2, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $s2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3024 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 3072 - add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload - vstx $vr25, $t4, $s1 + vstx $vr1, $a2, $s1 + ori $s3, $zero, 3040 + vstx $vr29, $s3, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 - vstx $vr0, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3072 - vstx $vr14, $a2, $s1 + vld $vr29, $a0, 0 # 16-byte Folded Reload + ori $s4, $zero, 3072 + vstx $vr29, $s4, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3088 - vstx $vr0, $a2, $s1 + vstx $vr1, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3104 - vstx $vr13, $a2, $s1 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $s5, $zero, 3104 + vstx $vr1, $s5, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3120 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3136 - vstx $vr0, $a2, $s1 - ori $s3, $zero, 3152 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s3, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3152 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3168 - vstx $vr0, $a2, $s1 - ori $t4, $zero, 3184 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1664 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3184 + vstx $vr2, $a2, $s1 ori $a2, $zero, 3200 - vstx $vr15, $a2, $s1 + vstx $vr25, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3216 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 2560 - add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - ori $s2, $zero, 3232 - vstx $vr11, $s2, $s1 + vstx $vr2, $a2, $s1 + ori $a2, $zero, 3232 + vstx $vr31, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3248 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 2 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $s1 - ori $t3, $zero, 3264 + vstx $vr2, $a2, $s1 + vstx $vr30, $ra, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3280 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3296 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3312 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s1 - ori $fp, $zero, 3344 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3328 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3344 + vstx $vr2, $a2, $s1 + ori $ra, $zero, 3344 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 - vstx $vr0, $a2, $s1 - ori $t2, $zero, 3376 + vstx $vr8, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3376 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3392 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3408 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3424 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 3440 - vstx $vr0, $a5, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s8, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $s1 - ori $a7, $zero, 3472 + vld $vr11, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3472 + vstx $vr11, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3488 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 3984 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 + vstx $vr17, $t6, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 3968 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $s1 ori $a2, $zero, 3536 - vstx $vr0, $a2, $s1 + vstx $vr27, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t5, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $s1 - ori $t6, $zero, 3568 + vld $vr27, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3568 + vstx $vr27, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3584 vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3600 - vstx $vr0, $a2, $s1 + vstx $vr28, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3616 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3648 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vstx $vr2, $a2, $s1 + ori $a2, $zero, 3664 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s5, $s1 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3680 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3696 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + vstx $vr7, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s4, $s1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3712 + vstx $vr2, $a2, $s1 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3728 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3744 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3760 - vstx $vr0, $a2, $s1 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 + vstx $vr5, $a2, $s1 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3792 - vstx $vr0, $a2, $s1 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 4032 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 - vstx $vr29, $a2, $s1 + vstx $vr2, $a2, $s1 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 13 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr10, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr25, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - vori.b $vr16, $vr17, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr20, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr21, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3248 - add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr14, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr15, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr19, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 13 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr24, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 13 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 13 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t1, $a0, 0 # 8-byte Folded Reload addi.d $t1, $t1, 325 andi $t1, $t1, 511 slli.d $t1, $t1, 3 - fldx.d $fa7, $t0, $s1 - fst.d $fa7, $sp, 1880 # 8-byte Folded Spill + fldx.d $fa2, $t0, $s1 + fst.d $fa2, $sp, 1880 # 8-byte Folded Spill ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t0, $s0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $s0 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $t0, $s0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $s0 ori $t0, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t0, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $t0, $s0 ori $t0, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $t0, $s0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t0, $s0 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a4, $s0 - ori $a2, $zero, 2128 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a4, $s0 + ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a4, $s0 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2160 - vstx $vr7, $a2, $s0 + vstx $vr12, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2752 + add.d $a0, $sp, $a0 + vld $vr22, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2176 - vstx $vr31, $a2, $s0 + vstx $vr22, $a2, $s0 ori $a2, $zero, 2192 - vstx $vr27, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2208 - vstx $vr7, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2352 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2224 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vld $vr26, $a0, 0 # 16-byte Folded Reload + vstx $vr26, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload + ori $s1, $zero, 2224 + vstx $vr14, $s1, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 + add.d $a0, $sp, $a0 + vld $vr14, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2240 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vstx $vr14, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2256 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vstx $vr15, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2272 - vstx $vr7, $a2, $s0 + vstx $vr14, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2288 - vstx $vr7, $a2, $s0 - ori $a2, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $fp, $zero, 2288 + vstx $vr16, $fp, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s0 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2304 + vstx $vr16, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2320 - vstx $vr7, $a2, $s0 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $t6, $zero, 2320 + vstx $vr16, $t6, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2336 - vstx $vr7, $a2, $s0 + vld $vr21, $a0, 0 # 16-byte Folded Reload + ori $s8, $zero, 2336 + vstx $vr21, $s8, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2352 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vstx $vr16, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2368 - vstx $vr7, $a2, $s0 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $t5, $zero, 2368 + vstx $vr16, $t5, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2384 - vstx $vr7, $a2, $s0 + vstx $vr16, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2400 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + vstx $vr3, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2416 - vstx $vr7, $a2, $s0 + vstx $vr3, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2432 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + vstx $vr3, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2448 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2704 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2464 - vstx $vr7, $a2, $s0 lu12i.w $a0, 1 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2480 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + lu12i.w $a0, 1 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 1888 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2496 + vstx $vr3, $a2, $s0 ori $a2, $zero, 2512 - vstx $vr7, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload + vstx $vr16, $a2, $s0 ori $a2, $zero, 2528 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + lu12i.w $a0, 2 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload + vstx $vr16, $a2, $s0 ori $a2, $zero, 2544 - vstx $vr7, $a2, $s0 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload + vstx $vr16, $a2, $s0 ori $a2, $zero, 2560 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2576 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2592 - vstx $vr7, $a2, $s0 - ori $a2, $zero, 2608 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - vstx $vr7, $a2, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 + ori $a2, $zero, 2608 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 ori $a2, $zero, 2624 - vstx $vr7, $a2, $s0 - ori $a2, $zero, 2640 - vstx $vr30, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2656 - vstx $vr7, $a2, $s0 + vld $vr23, $a0, 0 # 16-byte Folded Reload + vstx $vr23, $a2, $s0 + ori $a2, $zero, 2640 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 + ori $a2, $zero, 2656 + lu12i.w $a0, 2 + ori $a0, $a0, 128 + add.d $a0, $sp, $a0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 + add.d $a0, $sp, $a0 + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2672 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + vstx $vr16, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2688 - vstx $vr7, $a2, $s0 + vstx $vr16, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2704 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + vstx $vr3, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2720 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vld $vr16, $a0, 0 # 16-byte Folded Reload + vstx $vr16, $s7, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2736 - vstx $vr7, $a2, $s0 + vstx $vr3, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2752 - vstx $vr7, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vstx $vr3, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2768 - vstx $vr7, $a2, $s0 + vstx $vr3, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2784 - vstx $vr7, $a2, $s0 + vstx $vr3, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2800 - vstx $vr7, $a2, $s0 + vstx $vr3, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2816 - vstx $vr7, $a2, $s0 - vstx $vr23, $s8, $s0 + vstx $vr16, $a2, $s0 + vstx $vr0, $t3, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2848 - vstx $vr7, $a2, $s0 - vstx $vr1, $a6, $s0 + vstx $vr0, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2320 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $t2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2880 - vstx $vr1, $a2, $s0 - ori $a2, $zero, 2896 - vstx $vr26, $a2, $s0 + vstx $vr0, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 3024 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a7, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2912 - vstx $vr1, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vstx $vr16, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s6, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a6, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 2944 - vstx $vr1, $ra, $s0 - ori $a2, $zero, 2960 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2944 + vstx $vr16, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $a5, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 2976 - vstx $vr1, $a2, $s0 + vstx $vr16, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2992 - vstx $vr1, $a2, $s0 - ori $a2, $zero, 3008 + vld $vr16, $a0, 0 # 16-byte Folded Reload + vstx $vr16, $s6, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $s2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $s8, $zero, 3024 - vstx $vr1, $s8, $s0 - ori $a2, $zero, 3040 - vstx $vr25, $a2, $s0 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3024 + vstx $vr16, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2272 + add.d $a0, $sp, $a0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $s3, $s0 + ori $a5, $zero, 3040 + lu12i.w $a0, 2 + ori $a0, $a0, 1728 + add.d $a0, $sp, $a0 + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3056 + vstx $vr16, $a2, $s0 + vstx $vr29, $s4, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s0 - ori $a2, $zero, 3072 - vstx $vr14, $a2, $s0 + vld $vr16, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3088 + vstx $vr16, $a2, $s0 + vstx $vr1, $s5, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s0 - ori $a2, $zero, 3104 - vstx $vr13, $a2, $s0 ori $a2, $zero, 3120 - lu12i.w $a0, 2 - ori $a0, $a0, 896 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $a2, $s0 - ori $s7, $zero, 3136 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s7, $s0 + ori $a2, $zero, 3136 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s3, $s0 + ori $s4, $zero, 3152 + vstx $vr1, $s4, $s0 ori $s6, $zero, 3168 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $s6, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t4, $s0 - ori $a2, $zero, 3200 - vstx $vr15, $a2, $s0 - ori $a2, $zero, 3216 + ori $a2, $zero, 3184 + vstx $vr1, $a2, $s0 + ori $a4, $zero, 3200 + lu12i.w $a0, 1 + ori $a0, $a0, 2640 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3216 vstx $vr1, $a2, $s0 - vstx $vr11, $s2, $s0 - ori $a2, $zero, 3248 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 + lu12i.w $a0, 1 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3232 vstx $vr1, $a2, $s0 lu12i.w $a0, 2 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload - vstx $vr27, $t3, $s0 - ori $a2, $zero, 3280 - lu12i.w $a0, 2 - ori $a0, $a0, 1616 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $s3, $zero, 3248 + vstx $vr1, $s3, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3264 vstx $vr1, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 976 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $s7, $zero, 3280 + vstx $vr1, $s7, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $s5, $zero, 3296 - vstx $vr28, $s5, $s0 - ori $a2, $zero, 3312 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3296 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $s0 + ori $s2, $zero, 3312 + vstx $vr1, $s2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3328 - vstx $vr24, $a2, $s0 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $fp, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 - add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload - ori $s1, $zero, 3360 - vstx $vr21, $s1, $s0 + vstx $vr1, $ra, $s0 + ori $a2, $zero, 3360 + vstx $vr8, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t2, $s0 + ori $a7, $zero, 3376 + vstx $vr1, $a7, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $fp, $zero, 3392 - vstx $vr1, $fp, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + ori $a2, $zero, 3392 + vstx $vr1, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $s3, $zero, 3408 - vstx $vr1, $s3, $s0 + ori $s5, $zero, 3408 + vstx $vr1, $s5, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $s4, $zero, 3424 - vstx $vr1, $s4, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + ori $t2, $zero, 3424 + vstx $vr1, $t2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload - vstx $vr20, $a5, $s0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3440 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3456 vstx $vr1, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 4000 - add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload - vstx $vr19, $a7, $s0 + ori $a2, $zero, 3472 + vstx $vr11, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t4, $zero, 3488 - vstx $vr1, $t4, $s0 + ori $ra, $zero, 3488 + vstx $vr1, $ra, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - ori $a4, $zero, 3504 - vstx $vr17, $a4, $s0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3504 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 3520 - vstx $vr1, $t2, $s0 + ori $a2, $zero, 3520 + vstx $vr1, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload - ori $a6, $zero, 3536 - vstx $vr18, $a6, $s0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3536 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3552 vstx $vr1, $a2, $s0 + ori $a2, $zero, 3568 + vstx $vr27, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 832 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t6, $s0 - ori $s2, $zero, 3584 - vstx $vr2, $s2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3600 + ori $a2, $zero, 3584 vstx $vr1, $a2, $s0 + ori $a2, $zero, 3600 + vstx $vr28, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $t6, $zero, 3616 - vstx $vr2, $t6, $s0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3616 + vstx $vr1, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3632 vstx $vr1, $a2, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 768 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 3648 - vstx $vr2, $t3, $s0 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3664 + ori $a2, $zero, 3648 vstx $vr1, $a2, $s0 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 + add.d $a0, $sp, $a0 + vld $vr8, $a0, 0 # 16-byte Folded Reload + ori $t3, $zero, 3664 + vstx $vr8, $t3, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3680 - vstx $vr2, $a2, $s0 + vstx $vr11, $a2, $s0 + ori $a6, $zero, 3696 + vstx $vr7, $a6, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 736 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3696 - vstx $vr1, $a2, $s0 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3712 - vstx $vr2, $a2, $s0 + vstx $vr7, $a2, $s0 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3728 - vstx $vr1, $a2, $s0 + vstx $vr7, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 3744 - vstx $vr2, $a7, $s0 + vld $vr7, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3744 + vstx $vr7, $a2, $s0 ori $a2, $zero, 3760 - lu12i.w $a0, 1 - ori $a0, $a0, 3904 + vstx $vr5, $a2, $s0 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - vstx $vr13, $a2, $s0 + vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3792 - vstx $vr0, $a2, $s0 - ori $a5, $zero, 3776 + vstx $vr1, $a2, $s0 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $s0 + vld $vr5, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3776 + vstx $vr5, $a2, $s0 + lu12i.w $a0, 14 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr10, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 880 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr30, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 864 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr31, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 848 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr7, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr25, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr24, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr25, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 288 + add.d $a0, $sp, $a0 + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr28, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr29, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr9, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2800 + add.d $a0, $sp, $a0 + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr30, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr6, $a0, 0 lu12i.w $a0, 14 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr13, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr11, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 + add.d $a0, $sp, $a0 + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 + add.d $a0, $sp, $a0 + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr29, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 @@ -280411,1632 +278661,1617 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 14 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr6, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 14 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $a2, $a0, 0 # 8-byte Folded Reload addi.d $t0, $a2, 350 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa0, $t1, $s0 - fst.d $fa0, $sp, 1872 # 8-byte Folded Spill + fldx.d $fa6, $t1, $s0 + fst.d $fa6, $sp, 1872 # 8-byte Folded Spill ori $a2, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t5 + vld $vr6, $a0, 0 # 16-byte Folded Reload + vstx $vr6, $a2, $t4 ori $a2, $zero, 2064 - vstx $vr22, $a2, $t5 + vstx $vr2, $a2, $t4 ori $a2, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - vstx $vr10, $a2, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 ori $a2, $zero, 2096 - lu12i.w $a0, 1 - ori $a0, $a0, 2848 - add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - vstx $vr8, $a2, $t5 + vstx $vr4, $a2, $t4 ori $a2, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 ori $a2, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 ori $a2, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2368 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 ori $a2, $zero, 2160 - vstx $vr0, $a2, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 3200 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $a2, $t4 ori $a2, $zero, 2176 - vstx $vr0, $a2, $t5 + vstx $vr22, $a2, $t4 + ori $a2, $zero, 2192 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2192 - vstx $vr0, $a2, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 ori $a2, $zero, 2208 - lu12i.w $a0, 1 - ori $a0, $a0, 2800 + vstx $vr26, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $s1, $t4 + ori $a2, $zero, 2240 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2224 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 + ori $a2, $zero, 2256 + vstx $vr15, $a2, $t4 + ori $a2, $zero, 2272 + vstx $vr14, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2240 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $fp, $t4 + ori $a2, $zero, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2256 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2272 - vstx $vr29, $t1, $t5 + vld $vr14, $a0, 0 # 16-byte Folded Reload + vstx $vr14, $t6, $t4 + vstx $vr21, $s8, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2288 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vld $vr15, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2352 + vstx $vr15, $a2, $t4 + ori $t6, $zero, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2304 - vstx $vr0, $t1, $t5 + vld $vr21, $a0, 0 # 16-byte Folded Reload + vstx $vr21, $t5, $t4 + ori $a2, $zero, 2384 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2320 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 + ori $fp, $zero, 2384 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2336 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2400 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2352 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2416 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2368 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2432 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2384 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2448 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2400 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2464 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2416 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2480 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2432 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2496 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 1184 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2512 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 1168 + add.d $a0, $sp, $a0 + vld $vr6, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2528 + vstx $vr6, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 1856 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2544 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2448 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2560 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2464 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2576 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 144 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2592 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 1152 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2608 + vstx $vr2, $a2, $t4 + ori $a2, $zero, 2624 + vstx $vr23, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2480 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2640 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2496 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2656 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2512 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $s0, $zero, 2672 + vstx $vr2, $s0, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2528 - vstx $vr0, $t1, $t5 - ori $s0, $zero, 2544 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2688 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s0, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2704 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2560 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2720 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 992 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2576 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2736 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2592 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2752 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2608 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2768 + vstx $vr2, $a2, $t4 + ori $a2, $zero, 2784 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2624 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 3040 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2800 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1840 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2816 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2640 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2832 + vstx $vr2, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2656 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2848 + vstx $vr2, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2672 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2864 + vstx $vr2, $a2, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2688 - vstx $vr0, $t1, $t5 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 2880 + vstx $vr2, $a2, $t4 + ori $a2, $zero, 2896 + vstx $vr0, $a2, $t4 lu12i.w $a0, 2 ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2704 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2720 - vstx $vr0, $t1, $t5 + ori $a2, $zero, 2912 + vstx $vr0, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2736 - vstx $vr0, $t1, $t5 + ori $a2, $zero, 2928 + vstx $vr0, $a2, $t4 lu12i.w $a0, 2 ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2752 - vstx $vr0, $t1, $t5 + ori $a2, $zero, 2944 + vstx $vr0, $a2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2768 - vstx $vr0, $t1, $t5 + ori $a2, $zero, 2960 + vstx $vr0, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1760 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2784 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2800 - vstx $vr0, $t1, $t5 + ori $a2, $zero, 2976 + vstx $vr0, $a2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2816 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 2992 + vstx $vr0, $t1, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2832 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 3008 + vstx $vr0, $t1, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2848 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 3024 + vstx $vr0, $t1, $t4 lu12i.w $a0, 1 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2864 - vstx $vr0, $t1, $t5 + vstx $vr0, $a5, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2880 - vstx $vr0, $t1, $t5 - ori $t1, $zero, 2896 + ori $a5, $zero, 3056 + vstx $vr0, $a5, $t4 + ori $t1, $zero, 3072 lu12i.w $a0, 1 - ori $a0, $a0, 2256 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 944 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2912 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 32 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2928 - vstx $vr0, $t1, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $t5 - ori $t1, $zero, 2960 + vstx $vr0, $t1, $t4 + ori $t1, $zero, 3088 lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 928 + vstx $vr0, $t1, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2976 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 3104 + vstx $vr0, $t1, $t4 lu12i.w $a0, 2 ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2992 - vstx $vr0, $t1, $t5 + ori $t5, $zero, 3120 + vstx $vr0, $t5, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3008 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 3136 + vstx $vr0, $t1, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $t5 + vstx $vr0, $s4, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3040 - vstx $vr0, $t1, $t5 + vstx $vr0, $s6, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3056 - vstx $vr0, $t1, $t5 + ori $t1, $zero, 3184 + vstx $vr0, $t1, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3072 - vstx $vr0, $t1, $t5 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3088 - vstx $vr0, $t1, $t5 + ori $a4, $zero, 3216 + vstx $vr0, $a4, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2608 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3104 - vstx $vr0, $t1, $t5 + ori $a4, $zero, 3232 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3120 - vstx $vr0, $t1, $t5 + vstx $vr0, $s3, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $t5 + ori $a4, $zero, 3264 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3152 - vstx $vr0, $t1, $t5 + vstx $vr0, $s7, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s6, $t5 + ori $a4, $zero, 3296 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3184 - vstx $vr0, $t1, $t5 + vstx $vr0, $s2, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3200 - vstx $vr0, $t1, $t5 + ori $a4, $zero, 3328 + vstx $vr0, $a4, $t4 + ori $a4, $zero, 3344 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3216 - vstx $vr0, $t1, $t5 + vstx $vr0, $a4, $t4 + ori $s8, $zero, 3360 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3232 - vstx $vr0, $t1, $t5 + vstx $vr0, $s8, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3248 - vstx $vr0, $t1, $t5 - ori $t1, $zero, 3264 - vstx $vr27, $t1, $t5 + vstx $vr0, $a7, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1616 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3280 - vstx $vr0, $t1, $t5 - vstx $vr28, $s5, $t5 + ori $s7, $zero, 3392 + vstx $vr0, $s7, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3312 - vstx $vr0, $t1, $t5 - ori $t1, $zero, 3328 - vstx $vr24, $t1, $t5 + vstx $vr0, $s5, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3344 - vstx $vr0, $t1, $t5 - vstx $vr21, $s1, $t5 + vstx $vr0, $t2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3376 - vstx $vr0, $t1, $t5 + ori $a4, $zero, 3440 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $t5 + ori $s6, $zero, 3456 + vstx $vr0, $s6, $t4 + ori $s5, $zero, 3472 lu12i.w $a0, 1 - ori $a0, $a0, 4032 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s3, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 1552 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s4, $t5 - ori $t1, $zero, 3440 - vstx $vr20, $t1, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3456 - vstx $vr0, $t1, $t5 - ori $t1, $zero, 3472 - vstx $vr19, $t1, $t5 + vstx $vr0, $s5, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $t5 - vstx $vr17, $a4, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 1504 + vstx $vr0, $ra, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $t5 - vstx $vr18, $a6, $t5 - ori $a4, $zero, 3552 + ori $a4, $zero, 3504 + vstx $vr0, $a4, $t4 + ori $s4, $zero, 3520 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 - ori $a4, $zero, 3568 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + vstx $vr0, $s4, $t4 + ori $s3, $zero, 3536 + lu12i.w $a0, 1 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 + vstx $vr0, $s3, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s2, $t5 - ori $a4, $zero, 3600 + ori $a4, $zero, 3552 + vstx $vr0, $a4, $t4 + ori $s2, $zero, 3568 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 + vstx $vr0, $s2, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $t5 - ori $a4, $zero, 3632 - lu12i.w $a0, 2 - ori $a0, $a0, 784 + ori $s1, $zero, 3584 + vstx $vr0, $s1, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 + ori $a4, $zero, 3600 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 768 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $t5 - ori $a4, $zero, 3664 + ori $a4, $zero, 3616 + vstx $vr0, $a4, $t4 lu12i.w $a0, 2 - ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 - lu12i.w $a0, 2 - ori $a0, $a0, 1488 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 3632 + vstx $vr2, $a4, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 3648 + vstx $vr0, $a4, $t4 + vstx $vr8, $t3, $t4 ori $a4, $zero, 3680 - vstx $vr0, $a4, $t5 - ori $a4, $zero, 3696 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 + vstx $vr0, $a4, $t4 lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a6, $t4 ori $a4, $zero, 3712 - vstx $vr0, $a4, $t5 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $t4 ori $a4, $zero, 3728 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t5 + vstx $vr0, $a4, $t4 + ori $a4, $zero, 3744 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $t5 + vstx $vr0, $a4, $t4 ori $a4, $zero, 3760 - vstx $vr13, $a4, $t5 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 2496 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $t4 + lu12i.w $a0, 2 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $a4, $zero, 3792 - vstx $vr0, $a4, $t5 + vstx $vr0, $a4, $t4 + ori $a4, $zero, 3776 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a5, $t5 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a4, $t4 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 15 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2448 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 832 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + vst $vr7, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + vst $vr22, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr7, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + vst $vr7, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr22, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr22, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 + add.d $a0, $sp, $a0 + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr18, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1296 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1280 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr24, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr25, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr16, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 + add.d $a0, $sp, $a0 + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr30, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 96 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 112 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr27, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1056 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr28, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr29, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1072 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr16, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1088 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr31, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3232 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr9, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3248 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr3, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr30, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr11, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr29, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 + add.d $a0, $sp, $a0 + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr16, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 464 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1280 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr3, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3584 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3648 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3552 - add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vst $vr5, $a0, 0 lu12i.w $a0, 15 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3696 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3712 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3776 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3856 + add.d $a0, $sp, $a0 + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 15 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 15 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 15 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - fldx.d $fs2, $t0, $t5 - fld.d $ft14, $sp, 1776 # 8-byte Folded Reload - fld.d $fa0, $sp, 1896 # 8-byte Folded Reload - fld.d $fa1, $sp, 1888 # 8-byte Folded Reload - fmadd.d $ft14, $fa1, $ft14, $fa0 - fld.d $ft15, $sp, 1768 # 8-byte Folded Reload - fld.d $fa0, $sp, 1880 # 8-byte Folded Reload - fmadd.d $ft14, $fa0, $ft15, $ft14 + vst $vr10, $a0, 0 + fldx.d $fs2, $t0, $t4 + fld.d $ft14, $sp, 1768 # 8-byte Folded Reload + fld.d $fa1, $sp, 1896 # 8-byte Folded Reload + fld.d $fa3, $sp, 1888 # 8-byte Folded Reload + fmadd.d $ft14, $fa3, $ft14, $fa1 fld.d $ft15, $sp, 1760 # 8-byte Folded Reload - fld.d $fa0, $sp, 1872 # 8-byte Folded Reload - fmadd.d $ft14, $fa0, $ft15, $ft14 + fld.d $fa1, $sp, 1880 # 8-byte Folded Reload + fmadd.d $ft14, $fa1, $ft15, $ft14 fld.d $ft15, $sp, 1752 # 8-byte Folded Reload - fmadd.d $fa0, $fs2, $ft15, $ft14 - fst.d $fa0, $sp, 1896 # 8-byte Folded Spill + fld.d $fa1, $sp, 1872 # 8-byte Folded Reload + fmadd.d $ft14, $fa1, $ft15, $ft14 + fld.d $ft15, $sp, 1744 # 8-byte Folded Reload + fmadd.d $fa1, $fs2, $ft15, $ft14 + fst.d $fa1, $sp, 1896 # 8-byte Folded Spill lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $a6, $a0, 0 # 8-byte Folded Reload addi.d $t0, $a6, 375 @@ -282044,715 +280279,692 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 slli.d $t1, $t0, 3 ori $a6, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload - vstx $vr18, $a6, $t8 + vld $vr20, $a0, 0 # 16-byte Folded Reload + vstx $vr20, $a6, $t8 ori $a6, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload - vstx $vr30, $a6, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a6, $t8 ori $a6, $zero, 2080 + lu12i.w $a0, 1 + ori $a0, $a0, 2768 + add.d $a0, $sp, $a0 + vld $vr10, $a0, 0 # 16-byte Folded Reload vstx $vr10, $a6, $t8 ori $a6, $zero, 2096 - vstx $vr8, $a6, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2336 + add.d $a0, $sp, $a0 + vld $vr28, $a0, 0 # 16-byte Folded Reload + vstx $vr28, $a6, $t8 ori $a4, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload - vstx $vr11, $a4, $t8 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a4, $t8 ori $a4, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload - vstx $vr26, $a4, $t8 + vld $vr5, $a0, 0 # 16-byte Folded Reload + vstx $vr5, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload ori $a4, $zero, 2144 - vstx $vr17, $a4, $t8 + vstx $vr5, $a4, $t8 ori $a4, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload - vstx $vr3, $a4, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 ori $a4, $zero, 2176 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $a4, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 ori $a4, $zero, 2192 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload - vstx $vr24, $a4, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload - vstx $vr5, $a2, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2208 + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2224 + vstx $vr12, $a4, $t8 + ori $t4, $zero, 2240 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2224 - vstx $vr4, $a2, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t4, $t8 + ori $t3, $zero, 2256 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2240 - vstx $vr8, $a2, $t8 - ori $s6, $zero, 2256 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t3, $t8 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - vstx $vr10, $s6, $t8 - ori $a2, $zero, 2272 - vstx $vr29, $a2, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2272 + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2288 + vstx $vr13, $a4, $t8 + ori $a4, $zero, 2304 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2288 - vstx $vr0, $a2, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2320 + vstx $vr14, $a4, $t8 + ori $a4, $zero, 2336 lu12i.w $a0, 1 - ori $a0, $a0, 2304 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2304 - vstx $vr9, $a2, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 + vstx $vr15, $t6, $t8 + ori $a4, $zero, 2368 + vstx $vr21, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s8, $zero, 2320 - vstx $vr0, $s8, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $fp, $t8 + ori $t6, $zero, 2400 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload - ori $s1, $zero, 2336 - vstx $vr7, $s1, $t8 + vld $vr22, $a0, 0 # 16-byte Folded Reload + vstx $vr22, $t6, $t8 + ori $fp, $zero, 2416 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2352 - vstx $vr0, $a2, $t8 - ori $a5, $zero, 2368 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $fp, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2752 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $a5, $t8 + vld $vr16, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2432 + vstx $vr16, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1920 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2384 - vstx $vr0, $a2, $t8 - ori $a2, $zero, 2400 - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload - vstx $vr21, $a2, $t8 - ori $a2, $zero, 2416 + vld $vr17, $a0, 0 # 16-byte Folded Reload + ori $ra, $zero, 2448 + vstx $vr17, $ra, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload - vstx $vr23, $a2, $t8 - ori $a2, $zero, 2432 + ori $a4, $zero, 2464 + vstx $vr23, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload - vstx $vr20, $a2, $t8 + vld $vr26, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2480 + vstx $vr26, $a4, $t8 + ori $a4, $zero, 2496 lu12i.w $a0, 1 - ori $a0, $a0, 2720 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2448 - vstx $vr12, $a2, $t8 + vld $vr21, $a0, 0 # 16-byte Folded Reload + vstx $vr21, $a4, $t8 + ori $a4, $zero, 2512 + lu12i.w $a0, 2 + ori $a0, $a0, 1184 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2528 + vstx $vr6, $a4, $t8 + ori $a4, $zero, 2544 + lu12i.w $a0, 2 + ori $a0, $a0, 1856 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2464 - vstx $vr13, $a2, $t8 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2560 + vstx $vr31, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2480 - vstx $vr16, $a2, $t8 + vld $vr19, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2576 + vstx $vr19, $a4, $t8 + ori $a4, $zero, 2592 lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2496 - vstx $vr0, $a2, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2608 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s4, $zero, 2512 - vstx $vr0, $s4, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t2, $zero, 2528 - vstx $vr0, $t2, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2624 + vstx $vr1, $a4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2688 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s0, $t8 + vld $vr18, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2640 + vstx $vr18, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $s7, $zero, 2560 - vstx $vr1, $s7, $t8 - ori $a7, $zero, 2576 + vld $vr27, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2656 + vstx $vr27, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 992 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a7, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $s0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $s0, $zero, 2592 - vstx $vr1, $s0, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $s0, $zero, 2688 + vstx $vr3, $s0, $t8 + ori $a4, $zero, 2704 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t6, $zero, 2608 - vstx $vr1, $t6, $t8 + vstx $vr1, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2624 - vstx $vr14, $a2, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2720 + vstx $vr3, $a4, $t8 + ori $a4, $zero, 2736 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $ra, $zero, 2640 - vstx $vr1, $ra, $t8 - ori $a2, $zero, 2656 + vstx $vr1, $a4, $t8 + lu12i.w $a0, 2 + ori $a0, $a0, 80 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2752 + vstx $vr1, $a4, $t8 lu12i.w $a0, 2 ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $t8 - ori $a4, $zero, 2672 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + ori $a4, $zero, 2768 + vstx $vr1, $a4, $t8 + ori $a4, $zero, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vstx $vr1, $a4, $t8 - ori $s5, $zero, 2688 lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s5, $t8 + vld $vr13, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2800 + vstx $vr13, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $fp, $zero, 2704 - vstx $vr1, $fp, $t8 - ori $a6, $zero, 2720 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2816 + vstx $vr3, $a4, $t8 + ori $a4, $zero, 2832 lu12i.w $a0, 1 - ori $a0, $a0, 3120 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a6, $t8 - ori $s3, $zero, 2736 + vstx $vr1, $a4, $t8 + lu12i.w $a0, 2 + ori $a0, $a0, 1824 + add.d $a0, $sp, $a0 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $t2, $zero, 2848 + vstx $vr3, $t2, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3104 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s3, $t8 + vld $vr5, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2864 + vstx $vr5, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2752 - vstx $vr1, $a2, $t8 - ori $s2, $zero, 2768 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a7, $zero, 2880 + vstx $vr3, $a7, $t8 + ori $a4, $zero, 2896 lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s2, $t8 + vstx $vr1, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t5, $zero, 2784 - vstx $vr1, $t5, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a6, $zero, 2912 + vstx $vr3, $a6, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload - ori $t3, $zero, 2800 - vstx $vr2, $t3, $t8 + vld $vr12, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2928 + vstx $vr12, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - ori $t4, $zero, 2816 - vstx $vr15, $t4, $t8 - ori $t0, $zero, 2832 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2944 + vstx $vr3, $a4, $t8 lu12i.w $a0, 1 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload - vstx $vr15, $t0, $t8 + vld $vr8, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 2960 + vstx $vr8, $a4, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2848 - vstx $vr1, $t0, $t8 - ori $t0, $zero, 2864 - lu12i.w $a0, 1 - ori $a0, $a0, 2272 - add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload - vstx $vr14, $t0, $t8 + vstx $vr1, $a2, $t8 + ori $a2, $zero, 2992 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2880 - vstx $vr1, $t0, $t8 + vstx $vr1, $a2, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2896 - vstx $vr1, $t0, $t8 + vld $vr6, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3008 + vstx $vr6, $a2, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2912 - vstx $vr31, $t0, $t8 - ori $t0, $zero, 2928 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3024 + vstx $vr3, $a2, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t0, $t8 + vld $vr11, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 3040 + vstx $vr11, $a4, $t8 lu12i.w $a0, 2 ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2944 - vstx $vr1, $t0, $t8 + vstx $vr1, $a5, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2672 + add.d $a0, $sp, $a0 + vld $vr24, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 3072 + vstx $vr24, $a4, $t8 + ori $a4, $zero, 3088 lu12i.w $a0, 2 - ori $a0, $a0, 16 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2960 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 928 + vstx $vr1, $a4, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2976 - vstx $vr1, $t0, $t8 + ori $a5, $zero, 3104 + vstx $vr1, $a5, $t8 lu12i.w $a0, 2 ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2992 - vstx $vr1, $t0, $t8 + vstx $vr1, $t5, $t8 + ori $a5, $zero, 3136 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2992 + add.d $a0, $sp, $a0 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $a5, $t8 + lu12i.w $a0, 2 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3008 + ori $t0, $zero, 3152 vstx $vr1, $t0, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2656 + add.d $a0, $sp, $a0 + vld $vr9, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3168 + vstx $vr9, $t0, $t8 + ori $t5, $zero, 3184 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3024 - vstx $vr1, $t0, $t8 + vstx $vr1, $t5, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3040 + ori $t0, $zero, 3200 vstx $vr1, $t0, $t8 + ori $t0, $zero, 3216 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3056 vstx $vr1, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3072 + ori $t0, $zero, 3232 vstx $vr1, $t0, $t8 + ori $t0, $zero, 3248 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3088 - vstx $vr29, $t0, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t0, $t8 lu12i.w $a0, 1 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3104 + ori $t0, $zero, 3264 vstx $vr1, $t0, $t8 + ori $t0, $zero, 3280 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3120 - vstx $vr29, $t0, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $t0, $t8 lu12i.w $a0, 1 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3136 - vstx $vr27, $t0, $t8 + vld $vr14, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3296 + vstx $vr14, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3152 - vstx $vr29, $t0, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3312 + vstx $vr1, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3168 - vstx $vr28, $t0, $t8 + vld $vr15, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3328 + vstx $vr15, $t0, $t8 + ori $t0, $zero, 3344 lu12i.w $a0, 2 - ori $a0, $a0, 1664 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3184 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3200 vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 1648 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3216 - vstx $vr29, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2560 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3232 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3248 - vstx $vr29, $t0, $t8 + vstx $vr1, $s8, $t8 + ori $t0, $zero, 3376 lu12i.w $a0, 2 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3264 vstx $vr1, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1616 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3280 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3296 - vstx $vr1, $t0, $t8 + vstx $vr1, $s7, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 864 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3312 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3328 - vstx $vr1, $t0, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3408 + vstx $vr3, $t0, $t8 + ori $t0, $zero, 3424 lu12i.w $a0, 2 - ori $a0, $a0, 1600 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3344 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3360 vstx $vr1, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1584 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3376 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 1568 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3392 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3408 - vstx $vr29, $t0, $t8 + vld $vr3, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3440 + vstx $vr3, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3424 - vstx $vr29, $t0, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $s6, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 4016 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3440 - vstx $vr1, $t0, $t8 + vstx $vr1, $s5, $t8 + ori $t0, $zero, 3488 lu12i.w $a0, 2 - ori $a0, $a0, 1536 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3456 - vstx $vr29, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3472 vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 1520 - add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3488 - vstx $vr29, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3504 vstx $vr1, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3520 - vstx $vr29, $t0, $t8 + vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr1, $s4, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3536 - vstx $vr1, $t0, $t8 + vstx $vr1, $s3, $t8 + ori $t0, $zero, 3552 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3552 vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3568 - vstx $vr1, $t0, $t8 - ori $t0, $zero, 3584 + vstx $vr1, $s2, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t0, $t8 + vstx $vr1, $s1, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3600 vstx $vr1, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 800 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3616 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 784 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vstx $vr3, $t0, $t8 ori $t0, $zero, 3632 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + vstx $vr2, $t0, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3648 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + vstx $vr2, $t0, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3664 vstx $vr1, $t0, $t8 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3680 - vstx $vr1, $t0, $t8 - lu12i.w $a0, 2 - ori $a0, $a0, 736 + vstx $vr2, $t0, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3696 vstx $vr1, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 3936 + lu12i.w $a0, 2 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3712 - vstx $vr1, $t0, $t8 + vstx $vr2, $t0, $t8 + ori $t0, $zero, 3728 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3728 vstx $vr1, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3744 vstx $vr1, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3760 vstx $vr1, $t0, $t8 - lu12i.w $a0, 1 - ori $a0, $a0, 3216 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3792 - vstx $vr1, $t0, $t8 + vstx $vr0, $t0, $t8 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3776 - vstx $vr1, $t0, $t8 + vstx $vr0, $t0, $t8 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 16 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282760,15 +280972,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282776,15 +280988,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282792,7 +281004,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282800,15 +281012,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282816,55 +281028,51 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2528 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 + lu12i.w $a0, 1 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 @@ -282872,1438 +281080,1455 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2992 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2240 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2976 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 16 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr29, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 16 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 16 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr19, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2848 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr4, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 16 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 16 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 400 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa1, $t1, $t8 - fst.d $fa1, $sp, 1888 # 8-byte Folded Spill + fldx.d $fa4, $t1, $t8 + fst.d $fa4, $sp, 1888 # 8-byte Folded Spill ori $t1, $zero, 2048 - vstx $vr18, $t1, $t7 + vstx $vr20, $t1, $t7 ori $t1, $zero, 2064 - vstx $vr30, $t1, $t7 - ori $t1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t1, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 + ori $t1, $zero, 2080 + vstx $vr10, $t1, $t7 ori $t1, $zero, 2096 + vstx $vr28, $t1, $t7 + ori $t1, $zero, 2112 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t1, $t7 - ori $t1, $zero, 2112 - vstx $vr11, $t1, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 + ori $t8, $zero, 2112 + lu12i.w $a0, 1 + ori $a0, $a0, 3232 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2128 - vstx $vr26, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 3216 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2144 - vstx $vr17, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 3200 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2160 - vstx $vr3, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 2752 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2176 - vstx $vr22, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 3184 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2192 - vstx $vr24, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 2736 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2208 - vstx $vr5, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 256 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2224 vstx $vr4, $t1, $t7 - ori $t1, $zero, 2240 - vstx $vr8, $t1, $t7 - vstx $vr10, $s6, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t4, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t3, $t7 ori $t1, $zero, 2272 - vstx $vr1, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 240 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2288 - vstx $vr1, $t1, $t7 + vstx $vr4, $t1, $t7 ori $t1, $zero, 2304 - vstx $vr9, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s8, $t7 - vstx $vr7, $s1, $t7 - ori $t1, $zero, 2352 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t1, $t7 - vstx $vr6, $a5, $t7 - ori $a5, $zero, 2384 - lu12i.w $a0, 2 - ori $a0, $a0, 1920 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2320 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a5, $t7 - ori $a5, $zero, 2400 - vstx $vr21, $a5, $t7 - ori $a5, $zero, 2416 - vstx $vr23, $a5, $t7 - ori $a5, $zero, 2432 - vstx $vr20, $a5, $t7 - ori $a5, $zero, 2448 - vstx $vr12, $a5, $t7 - ori $a5, $zero, 2464 - vstx $vr13, $a5, $t7 - ori $a5, $zero, 2480 - vstx $vr16, $a5, $t7 - ori $a5, $zero, 2496 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2336 + vstx $vr4, $t1, $t7 + ori $s1, $zero, 2352 lu12i.w $a0, 2 - ori $a0, $a0, 1904 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a5, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s4, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2368 + vstx $vr4, $t1, $t7 + ori $s2, $zero, 2384 lu12i.w $a0, 2 ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t2, $t7 - ori $a5, $zero, 2544 - vstx $vr0, $a5, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s2, $t7 + vstx $vr22, $t6, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1856 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $fp, $t7 + ori $t1, $zero, 2432 + vstx $vr16, $t1, $t7 + vstx $vr17, $ra, $t7 + ori $t1, $zero, 2464 + vstx $vr23, $t1, $t7 + ori $t1, $zero, 2480 + vstx $vr26, $t1, $t7 + ori $t1, $zero, 2496 + vstx $vr21, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 992 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2512 + vstx $vr4, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s0, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2528 + vstx $vr4, $t1, $t7 + ori $t1, $zero, 2544 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 + ori $t1, $zero, 2560 + vstx $vr31, $t1, $t7 + ori $t1, $zero, 2576 + vstx $vr19, $t1, $t7 + ori $t1, $zero, 2592 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 2624 - vstx $vr0, $a5, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 + ori $t1, $zero, 2608 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 64 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 2656 - vstx $vr0, $a5, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 - add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload - vstx $vr30, $a4, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload - vstx $vr29, $s5, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2624 + vstx $vr4, $t1, $t7 + ori $t1, $zero, 2640 + vstx $vr18, $t1, $t7 + ori $t1, $zero, 2656 + vstx $vr27, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2672 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload - vstx $vr21, $a6, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s0, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s3, $t7 + vld $vr30, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2704 + vstx $vr30, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2720 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload - vstx $vr20, $s2, $t7 + vld $vr31, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2736 + vstx $vr31, $t1, $t7 + ori $s5, $zero, 2752 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t5, $t7 - vstx $vr2, $t3, $t7 + vld $vr29, $a0, 0 # 16-byte Folded Reload + vstx $vr29, $s5, $t7 + ori $s7, $zero, 2768 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t4, $t7 - ori $a2, $zero, 2832 - vstx $vr15, $a2, $t7 + vld $vr28, $a0, 0 # 16-byte Folded Reload + vstx $vr28, $s7, $t7 + ori $s6, $zero, 2784 lu12i.w $a0, 2 - ori $a0, $a0, 48 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload - ori $s0, $zero, 2848 - vstx $vr16, $s0, $t7 - ori $a2, $zero, 2864 - vstx $vr14, $a2, $t7 - ori $a2, $zero, 2880 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s6, $t7 + ori $s4, $zero, 2800 + vstx $vr13, $s4, $t7 + ori $s3, $zero, 2816 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s3, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2896 - vstx $vr0, $a2, $t7 - ori $t8, $zero, 2912 - vstx $vr31, $t8, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2832 + vstx $vr4, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 32 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2928 - vstx $vr0, $a2, $t7 - ori $a2, $zero, 2944 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t2, $t7 + ori $t1, $zero, 2864 + vstx $vr5, $t1, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a7, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2960 - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $a7, $zero, 2896 + vstx $vr4, $a7, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 2976 - vstx $vr0, $a2, $t7 - ori $t5, $zero, 2992 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a6, $t7 + ori $a6, $zero, 2928 + vstx $vr12, $a6, $t7 + ori $a6, $zero, 2944 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t5, $t7 - ori $t3, $zero, 3008 - lu12i.w $a0, 1 - ori $a0, $a0, 3088 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a6, $t7 + ori $a6, $zero, 2960 + vstx $vr8, $a6, $t7 + ori $a6, $zero, 2976 + lu12i.w $a0, 2 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $t7 - ori $a2, $zero, 3024 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a6, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - ori $t2, $zero, 3040 - lu12i.w $a0, 1 - ori $a0, $a0, 3072 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $a6, $zero, 2992 + vstx $vr4, $a6, $t7 + ori $a6, $zero, 3008 + vstx $vr6, $a6, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a2, $zero, 3040 + vstx $vr11, $a2, $t7 ori $a2, $zero, 3056 lu12i.w $a0, 2 - ori $a0, $a0, 912 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - ori $ra, $zero, 3072 - lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a2, $zero, 3072 + vstx $vr24, $a2, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3088 - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a4, $t7 ori $s8, $zero, 3104 lu12i.w $a0, 1 - ori $a0, $a0, 2608 - add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - vstx $vr17, $s8, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $s8, $t7 ori $a2, $zero, 3120 - vstx $vr0, $a2, $t7 - ori $a2, $zero, 3136 - vstx $vr27, $a2, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + vstx $vr7, $a5, $t7 ori $a2, $zero, 3152 - vstx $vr0, $a2, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 1040 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 ori $a2, $zero, 3168 - vstx $vr28, $a2, $t7 + vstx $vr9, $a2, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3184 - vstx $vr0, $a2, $t7 - ori $s7, $zero, 3200 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t5, $t7 + ori $a2, $zero, 3200 lu12i.w $a0, 1 - ori $a0, $a0, 2576 + ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload - vstx $vr18, $s7, $t7 + vld $vr13, $a0, 0 # 16-byte Folded Reload + vstx $vr13, $a2, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3216 - vstx $vr0, $a2, $t7 + vstx $vr4, $a2, $t7 + ori $t6, $zero, 3232 lu12i.w $a0, 1 - ori $a0, $a0, 2560 - add.d $a0, $sp, $a0 - vld $vr19, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3232 - vstx $vr19, $a2, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 1632 + ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr12, $a0, 0 # 16-byte Folded Reload + vstx $vr12, $t6, $t7 ori $a2, $zero, 3248 - vstx $vr0, $a2, $t7 - ori $s6, $zero, 3264 lu12i.w $a0, 2 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s6, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 1616 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3280 - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $t5, $zero, 3264 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3296 - vstx $vr0, $a2, $t7 + vld $vr9, $a0, 0 # 16-byte Folded Reload + vstx $vr9, $t5, $t7 + ori $a2, $zero, 3280 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $t4, $zero, 3296 + vstx $vr14, $t4, $t7 ori $a2, $zero, 3312 - vstx $vr0, $a2, $t7 - ori $s4, $zero, 3328 - lu12i.w $a0, 1 - ori $a0, $a0, 4064 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s4, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1600 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $t3, $zero, 3328 + vstx $vr15, $t3, $t7 ori $a2, $zero, 3344 - vstx $vr0, $a2, $t7 + lu12i.w $a0, 2 + ori $a0, $a0, 944 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr27, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3360 - vstx $vr0, $a2, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 1584 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vstx $vr27, $a2, $t7 ori $a2, $zero, 3376 - vstx $vr0, $a2, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 ori $a2, $zero, 3392 - vstx $vr0, $a2, $t7 - ori $a2, $zero, 3408 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + lu12i.w $a0, 2 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a2, $zero, 3408 lu12i.w $a0, 2 - ori $a0, $a0, 1552 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 ori $a2, $zero, 3424 - vstx $vr0, $a2, $t7 - ori $a2, $zero, 3440 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + lu12i.w $a0, 2 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $t2, $zero, 3440 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $s3, $zero, 3456 - vstx $vr0, $s3, $t7 - ori $s5, $zero, 3472 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $t2, $t7 + ori $a2, $zero, 3456 + lu12i.w $a0, 2 + ori $a0, $a0, 912 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 4000 + ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s5, $t7 + vld $vr23, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3472 + vstx $vr23, $a2, $t7 ori $a2, $zero, 3488 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a7, $zero, 3504 lu12i.w $a0, 1 - ori $a0, $a0, 3984 + ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3504 - vstx $vr0, $a2, $t7 + vld $vr7, $a0, 0 # 16-byte Folded Reload + vstx $vr7, $a7, $t7 lu12i.w $a0, 2 - ori $a0, $a0, 1504 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3520 - vstx $vr0, $a2, $t7 + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr8, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3536 - vstx $vr0, $a2, $t7 - ori $t6, $zero, 3552 + vstx $vr8, $a2, $t7 + ori $ra, $zero, 3552 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $t7 - ori $a4, $zero, 3568 - lu12i.w $a0, 2 - ori $a0, $a0, 832 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $ra, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $t7 + vld $vr22, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3568 + vstx $vr22, $a2, $t7 ori $a2, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - ori $s2, $zero, 3600 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a6, $zero, 3600 lu12i.w $a0, 1 - ori $a0, $a0, 3952 + ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $s2, $t7 + vld $vr15, $a0, 0 # 16-byte Folded Reload + vstx $vr15, $a6, $t7 ori $a2, $zero, 3616 lu12i.w $a0, 2 - ori $a0, $a0, 800 - add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - vstx $vr22, $a2, $t7 - ori $fp, $zero, 3632 - lu12i.w $a0, 2 - ori $a0, $a0, 784 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a5, $zero, 3632 lu12i.w $a0, 2 - ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a5, $t7 ori $a2, $zero, 3648 - vstx $vr22, $a2, $t7 - ori $t4, $zero, 3664 - lu12i.w $a0, 2 - ori $a0, $a0, 752 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $t7 - lu12i.w $a0, 2 - ori $a0, $a0, 1488 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - ori $a7, $zero, 3680 - vstx $vr22, $a7, $t7 - ori $a6, $zero, 3696 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3664 + vstx $vr4, $a2, $t7 + ori $a2, $zero, 3680 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a6, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - ori $a5, $zero, 3712 - vstx $vr22, $a5, $t7 - ori $a2, $zero, 3728 + vld $vr20, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3696 + vstx $vr20, $a2, $t7 + ori $a2, $zero, 3712 lu12i.w $a0, 2 - ori $a0, $a0, 720 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $t7 - lu12i.w $a0, 1 - ori $a0, $a0, 3920 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 + ori $a4, $zero, 3728 + lu12i.w $a0, 2 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3744 - vstx $vr22, $t1, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a4, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3760 - vstx $vr0, $t1, $t7 + vld $vr4, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3744 + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 3216 + ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 3792 - vstx $vr22, $t1, $t7 + vld $vr19, $a0, 0 # 16-byte Folded Reload + ori $a2, $zero, 3760 + vstx $vr19, $a2, $t7 + ori $a2, $zero, 3792 + lu12i.w $a0, 2 + ori $a0, $a0, 272 + add.d $a0, $sp, $a0 + vld $vr4, $a0, 0 # 16-byte Folded Reload + vstx $vr4, $a2, $t7 lu12i.w $a0, 1 - ori $a0, $a0, 2544 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 3776 - vstx $vr14, $t1, $t7 + vstx $vr4, $t1, $t7 + lu12i.w $a0, 1 + ori $a0, $a0, 2480 + add.d $a0, $sp, $a0 + vld $vr21, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 17 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr21, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr4, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3888 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 17 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284311,15 +282536,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284327,39 +282552,35 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 + lu12i.w $a0, 1 + ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 528 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr3, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284367,15 +282588,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284383,223 +282604,215 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2928 + add.d $a0, $sp, $a0 + vld $vr11, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 17 + ori $a0, $a0, 2256 + add.d $a0, $sp, $a0 + vst $vr11, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 480 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2256 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2528 + ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2272 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1408 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2288 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3024 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2304 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2320 - add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3008 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vst $vr0, $a0, 0 lu12i.w $a0, 17 - ori $a0, $a0, 2336 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2352 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2992 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2368 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr24, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1360 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2384 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2512 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2400 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1344 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2416 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2240 + ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2432 + ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 + vst $vr25, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1328 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2448 + ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2976 + ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2464 + ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 + vst $vr26, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1312 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 2480 - add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2496 - add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 17 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3872 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2960 + lu12i.w $a0, 2 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2480 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3856 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284607,15 +282820,15 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 144 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284623,7 +282836,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284631,23 +282844,23 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3232 + ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3248 + ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284655,215 +282868,215 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 + lu12i.w $a0, 1 + ori $a0, $a0, 2208 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 vst $vr3, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 + lu12i.w $a0, 1 + ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3280 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 - vld $vr25, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3008 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 @@ -284871,1491 +283084,1471 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2912 + ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2224 + ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2416 + ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vld $vr26, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3648 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr0, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2448 + ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vld $vr24, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr0, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2464 - add.d $a0, $sp, $a0 - vld $vr23, $a0, 0 # 16-byte Folded Reload - lu12i.w $a0, 17 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 3968 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 17 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr6, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t1, $a0, 0 # 8-byte Folded Reload addi.d $t1, $t1, 425 andi $t1, $t1, 511 slli.d $t1, $t1, 3 - fldx.d $fa6, $t0, $t7 - fst.d $fa6, $sp, 1880 # 8-byte Folded Spill + fldx.d $fa2, $t0, $t7 + fst.d $fa2, $sp, 1880 # 8-byte Folded Spill ori $t0, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2112 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 - ori $t7, $zero, 2128 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t8, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t7, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $fp, $zero, 2128 + vstx $vr2, $fp, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2144 - vstx $vr6, $t0, $a1 - ori $s1, $zero, 2160 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $s0, $zero, 2144 + vstx $vr2, $s0, $a1 + ori $t7, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $s1, $a1 - ori $t0, $zero, 2176 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t7, $a1 + ori $t8, $zero, 2176 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t8, $a1 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2192 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2208 + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2208 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2224 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2240 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2256 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2272 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2288 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2304 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2320 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2336 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2352 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s1, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2368 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1920 - add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2384 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2400 - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s2, $a1 lu12i.w $a0, 1 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2400 + vstx $vr2, $t0, $a1 ori $t0, $zero, 2416 - vstx $vr6, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 2736 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2432 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2448 lu12i.w $a0, 1 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + ori $t0, $zero, 2448 + lu12i.w $a0, 2 + ori $a0, $a0, 160 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2464 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2480 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2496 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2512 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2528 - vstx $vr6, $t0, $a1 + vstx $vr2, $t0, $a1 ori $t0, $zero, 2544 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 - add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 lu12i.w $a0, 2 ori $a0, $a0, 1856 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2560 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 2 - ori $a0, $a0, 1840 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + ori $t0, $zero, 2576 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2592 - vstx $vr6, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2608 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2624 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 976 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2624 + vstx $vr2, $t0, $a1 ori $t0, $zero, 2640 - vstx $vr6, $t0, $a1 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2672 - vstx $vr30, $t0, $a1 - ori $t0, $zero, 2688 - vstx $vr29, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2688 + vstx $vr2, $t0, $a1 ori $t0, $zero, 2704 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2720 - vstx $vr21, $t0, $a1 - ori $t0, $zero, 2736 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vstx $vr30, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1776 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2752 - vstx $vr6, $t0, $a1 - ori $t0, $zero, 2768 - vstx $vr20, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2720 + vstx $vr2, $t0, $a1 + ori $t0, $zero, 2736 + vstx $vr31, $t0, $a1 + vstx $vr29, $s5, $a1 + ori $s5, $zero, 2752 + vstx $vr28, $s7, $a1 + ori $s2, $zero, 2768 lu12i.w $a0, 2 - ori $a0, $a0, 1760 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2784 - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s6, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2624 + ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vld $vr30, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2800 - vstx $vr30, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s4, $a1 + ori $s1, $zero, 2800 lu12i.w $a0, 2 - ori $a0, $a0, 960 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2816 - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s3, $a1 + ori $s4, $zero, 2816 lu12i.w $a0, 1 - ori $a0, $a0, 2288 + ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload + vld $vr28, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2832 - vstx $vr6, $t0, $a1 - vstx $vr16, $s0, $a1 - ori $t0, $zero, 2864 + vstx $vr28, $t0, $a1 + ori $t0, $zero, 2848 + lu12i.w $a0, 2 + ori $a0, $a0, 1824 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2272 + ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2864 + vstx $vr2, $t0, $a1 ori $t0, $zero, 2880 lu12i.w $a0, 2 - ori $a0, $a0, 1744 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2256 + ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vld $vr20, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2896 - vstx $vr20, $t0, $a1 + vstx $vr2, $t0, $a1 + ori $t0, $zero, 2912 lu12i.w $a0, 2 - ori $a0, $a0, 944 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t8, $a1 - lu12i.w $a0, 2 - ori $a0, $a0, 32 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + lu12i.w $a0, 1 + ori $a0, $a0, 2304 add.d $a0, $sp, $a0 - vld $vr21, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2928 - vstx $vr21, $t0, $a1 + vstx $vr2, $t0, $a1 + ori $s3, $zero, 2928 ori $t0, $zero, 2944 lu12i.w $a0, 2 - ori $a0, $a0, 1728 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 - lu12i.w $a0, 2 - ori $a0, $a0, 16 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + lu12i.w $a0, 1 + ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vld $vr29, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 2960 - vstx $vr29, $t0, $a1 + vstx $vr2, $t0, $a1 + ori $s6, $zero, 2960 ori $t0, $zero, 2976 lu12i.w $a0, 2 - ori $a0, $a0, 928 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1712 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t5, $a1 - ori $t5, $zero, 2992 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 2992 + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 3088 + ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3008 + vstx $vr2, $t0, $a1 + ori $s7, $zero, 3008 ori $t0, $zero, 3024 lu12i.w $a0, 2 - ori $a0, $a0, 1696 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 3072 + ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t2, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3040 + vstx $vr2, $t0, $a1 + ori $t0, $zero, 3056 lu12i.w $a0, 2 - ori $a0, $a0, 912 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr6, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3056 - vstx $vr6, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 3056 + ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $a1 - ori $ra, $zero, 3072 - ori $t0, $zero, 3088 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3072 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1680 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - vstx $vr17, $s8, $a1 - ori $s8, $zero, 3104 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3088 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 1 + ori $a0, $a0, 3008 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $s8, $a1 ori $t0, $zero, 3120 lu12i.w $a0, 2 - ori $a0, $a0, 896 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 2592 + ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3136 - vstx $vr17, $t0, $a1 - ori $t0, $zero, 3152 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 880 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - ori $t8, $zero, 3152 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3152 + vstx $vr2, $t0, $a1 + ori $s8, $zero, 3152 lu12i.w $a0, 1 - ori $a0, $a0, 3040 + ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3168 - vstx $vr17, $t0, $a1 + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 1024 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3184 + vstx $vr2, $t0, $a1 + ori $t0, $zero, 3200 + vstx $vr13, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1664 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - vstx $vr18, $s7, $a1 - ori $s7, $zero, 3200 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3216 + vstx $vr2, $t0, $a1 + vstx $vr12, $t6, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1648 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - ori $t0, $zero, 3232 - vstx $vr19, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3248 + vstx $vr2, $t0, $a1 + ori $t6, $zero, 3248 + vstx $vr9, $t5, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1632 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 2 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload - vstx $vr16, $s6, $a1 - ori $s6, $zero, 3264 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3280 - lu12i.w $a0, 2 - ori $a0, $a0, 1616 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 4080 + ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3296 - vstx $vr16, $t0, $a1 - ori $t0, $zero, 3312 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t4, $a1 + ori $t4, $zero, 3296 lu12i.w $a0, 2 - ori $a0, $a0, 864 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3312 + vstx $vr2, $t0, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 4064 + ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload - vstx $vr16, $s4, $a1 - ori $s4, $zero, 3328 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t3, $a1 + ori $t5, $zero, 3328 ori $t0, $zero, 3344 lu12i.w $a0, 2 - ori $a0, $a0, 1600 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 4048 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 ori $t0, $zero, 3360 - vstx $vr16, $t0, $a1 - ori $t0, $zero, 3376 + vstx $vr27, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1584 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3376 + vstx $vr2, $t0, $a1 + ori $t3, $zero, 3376 ori $t0, $zero, 3392 lu12i.w $a0, 2 - ori $a0, $a0, 1568 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 4032 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + lu12i.w $a0, 2 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 - vld $vr16, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3408 - vstx $vr16, $t0, $a1 - ori $t0, $zero, 3424 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1552 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 4016 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3440 - vstx $vr17, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3424 + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1536 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s3, $a1 - ori $s0, $zero, 3456 - lu12i.w $a0, 1 - ori $a0, $a0, 4000 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t2, $a1 + ori $t0, $zero, 3456 + lu12i.w $a0, 2 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - vstx $vr17, $s5, $a1 - ori $s3, $zero, 3472 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + ori $t0, $zero, 3472 + vstx $vr23, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1520 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $t0, $zero, 3488 - vstx $vr0, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 3984 - add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3504 - vstx $vr17, $t0, $a1 - ori $t0, $zero, 3520 + vstx $vr2, $t0, $a1 + vstx $vr7, $a7, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 1504 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t0, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 3968 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3536 - vstx $vr17, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a7, $zero, 3520 + vstx $vr2, $a7, $a1 + ori $a7, $zero, 3536 + vstx $vr8, $a7, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 848 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - vstx $vr17, $t6, $a1 - ori $t6, $zero, 3552 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $ra, $a1 + ori $ra, $zero, 3552 + ori $a7, $zero, 3568 + vstx $vr22, $a7, $a1 + ori $a7, $zero, 3584 lu12i.w $a0, 2 - ori $a0, $a0, 832 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - vstx $vr17, $a4, $a1 - ori $a4, $zero, 3568 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a7, $a1 + vstx $vr15, $a6, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 816 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3584 - vstx $vr17, $t0, $a1 - vstx $vr1, $s2, $a1 - ori $s5, $zero, 3600 + vld $vr7, $a0, 0 # 16-byte Folded Reload + ori $a6, $zero, 3616 + vstx $vr7, $a6, $a1 + ori $a7, $zero, 3616 lu12i.w $a0, 2 - ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3616 - vstx $vr1, $t0, $a1 - lu12i.w $a0, 2 - ori $a0, $a0, 784 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a5, $a1 + ori $a5, $zero, 3632 + lu12i.w $a0, 1 + ori $a0, $a0, 4080 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $fp, $a1 - ori $fp, $zero, 3632 - lu12i.w $a0, 2 - ori $a0, $a0, 768 + vld $vr8, $a0, 0 # 16-byte Folded Reload + ori $a6, $zero, 3648 + vstx $vr8, $a6, $a1 + ori $a6, $zero, 3648 + lu12i.w $a0, 1 + ori $a0, $a0, 4064 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $t0, $zero, 3648 - vstx $vr1, $t0, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3664 + vstx $vr2, $t0, $a1 + ori $t0, $zero, 3680 lu12i.w $a0, 2 - ori $a0, $a0, 752 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $t4, $a1 - ori $t4, $zero, 3664 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 + ori $t0, $zero, 3696 + vstx $vr20, $t0, $a1 + ori $t0, $zero, 3712 lu12i.w $a0, 2 - ori $a0, $a0, 1488 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a7, $a1 - ori $a7, $zero, 3680 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $t0, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 736 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a6, $a1 - ori $a6, $zero, 3696 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a4, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 3936 + ori $a0, $a0, 4048 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a5, $a1 - ori $a5, $zero, 3712 + vld $vr2, $a0, 0 # 16-byte Folded Reload + ori $a4, $zero, 3744 + vstx $vr2, $a4, $a1 + ori $a4, $zero, 3760 + vstx $vr19, $a4, $a1 lu12i.w $a0, 2 - ori $a0, $a0, 720 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - vstx $vr1, $a2, $a1 - lu12i.w $a0, 1 - ori $a0, $a0, 3920 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3744 - vstx $vr1, $a2, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload + vstx $vr2, $a2, $a1 lu12i.w $a0, 1 - ori $a0, $a0, 3904 + ori $a0, $a0, 4032 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a2, $zero, 3760 - vstx $vr1, $a2, $a1 - ori $a2, $zero, 3792 - vstx $vr22, $a2, $a1 + vld $vr2, $a0, 0 # 16-byte Folded Reload ori $a2, $zero, 3776 - vstx $vr14, $a2, $a1 + vstx $vr2, $a2, $a1 + lu12i.w $a0, 18 + ori $a0, $a0, 1936 + add.d $a0, $sp, $a0 + vst $vr21, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 704 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 1952 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 1968 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr18, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 688 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 1984 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1456 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2000 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr17, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 672 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2016 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3888 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2032 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr16, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 656 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2048 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 640 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4016 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2064 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 624 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2080 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 608 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2096 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 592 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 4000 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2112 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 576 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2128 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 560 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2144 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 544 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2160 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 528 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2176 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1440 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 512 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2208 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1424 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3984 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2224 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 496 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2240 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 480 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2256 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr11, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1456 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2272 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2288 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr10, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1440 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2304 add.d $a0, $sp, $a0 vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1392 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2320 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1424 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2336 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1376 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2352 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1408 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2368 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1360 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2512 + vst $vr24, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2400 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1344 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr24, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2416 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr24, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1376 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2432 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1328 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2448 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr25, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1360 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2464 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1312 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2480 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr26, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1344 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2496 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1296 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2512 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1328 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2528 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1280 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2544 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 720 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2560 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 704 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2576 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1232 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2592 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1040 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2608 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 96 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2624 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 112 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2640 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1056 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2656 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 128 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2672 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 336 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2688 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1072 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2704 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1088 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2720 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3280 + add.d $a0, $sp, $a0 + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2736 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3248 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr2, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2752 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1104 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2768 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1120 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr2, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2784 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 176 + vst $vr2, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2800 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1136 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2816 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 160 - add.d $a0, $sp, $a0 - vld $vr2, $a0, 0 # 16-byte Folded Reload + vst $vr18, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vst $vr2, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1184 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr3, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1152 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr4, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr5, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1168 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr9, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 192 + vst $vr9, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr5, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2896 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3264 + vst $vr5, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr4, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1200 + vst $vr4, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2384 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2928 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 512 + add.d $a0, $sp, $a0 + vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2944 add.d $a0, $sp, $a0 - vst $vr25, $a0, 0 + vst $vr12, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1264 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2960 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr10, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3296 + ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vld $vr4, $a0, 0 # 16-byte Folded Reload + vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 2976 add.d $a0, $sp, $a0 - vst $vr4, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 208 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vst $vr11, $a0, 0 lu12i.w $a0, 18 ori $a0, $a0, 2992 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 224 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 2416 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 @@ -286363,307 +284556,319 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1216 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr13, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3024 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr13, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 240 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3040 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 256 + vst $vr29, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vld $vr15, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3056 add.d $a0, $sp, $a0 - vst $vr15, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 272 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr14, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3072 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr14, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 288 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3088 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1232 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3104 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 304 + vst $vr16, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr15, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3120 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr15, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 320 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3136 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 336 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3424 add.d $a0, $sp, $a0 vld $vr25, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vst $vr25, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 352 + lu12i.w $a0, 1 + ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3168 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3312 + vst $vr17, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr8, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 - vst $vr8, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 1248 + vst $vr1, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr1, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3200 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr1, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3328 + ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vld $vr11, $a0, 0 # 16-byte Folded Reload + vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3216 add.d $a0, $sp, $a0 - vst $vr11, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3344 + vst $vr3, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr9, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3232 add.d $a0, $sp, $a0 - vst $vr9, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 368 + vst $vr6, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3248 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3360 + ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3264 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2400 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3280 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3392 + ori $a0, $a0, 2832 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3296 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3376 + ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3312 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3408 + ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3328 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3424 + ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3344 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 416 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3360 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 384 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3376 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 400 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3392 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3584 + add.d $a0, $sp, $a0 + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3408 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3440 + ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3424 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3456 + ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3440 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3472 + ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3456 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3648 + add.d $a0, $sp, $a0 + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3472 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3488 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3488 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2928 + ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vld $vr31, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3504 add.d $a0, $sp, $a0 - vst $vr31, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3504 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3520 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3520 + ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3536 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3536 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3552 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3552 + ori $a0, $a0, 2848 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3568 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3568 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3584 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3584 + ori $a0, $a0, 2864 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3600 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3600 + ori $a0, $a0, 2880 add.d $a0, $sp, $a0 - vld $vr28, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3616 add.d $a0, $sp, $a0 - vst $vr28, $a0, 0 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3696 + add.d $a0, $sp, $a0 + vld $vr27, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3632 add.d $a0, $sp, $a0 - vst $vr26, $a0, 0 + vst $vr27, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3648 + ori $a0, $a0, 2896 add.d $a0, $sp, $a0 vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 @@ -286671,1819 +284876,1813 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a0, $sp, $a0 vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3616 + ori $a0, $a0, 2912 add.d $a0, $sp, $a0 - vld $vr22, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3664 add.d $a0, $sp, $a0 - vst $vr22, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3632 + vst $vr19, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3680 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 2432 + ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vld $vr27, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3696 add.d $a0, $sp, $a0 - vst $vr27, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 432 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3712 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr19, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3664 + ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vld $vr18, $a0, 0 # 16-byte Folded Reload + vld $vr26, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3728 add.d $a0, $sp, $a0 - vst $vr18, $a0, 0 + vst $vr26, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3680 + ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vld $vr17, $a0, 0 # 16-byte Folded Reload + vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3744 add.d $a0, $sp, $a0 - vst $vr17, $a0, 0 - lu12i.w $a0, 2 - ori $a0, $a0, 464 + vst $vr19, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + vld $vr6, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3760 add.d $a0, $sp, $a0 - vst $vr0, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3696 + vst $vr6, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 - vld $vr3, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3776 add.d $a0, $sp, $a0 - vst $vr3, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3712 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr20, $a0, 0 + lu12i.w $a0, 1 + ori $a0, $a0, 3776 + add.d $a0, $sp, $a0 + vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vst $vr24, $a0, 0 + vst $vr21, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3728 + ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vld $vr13, $a0, 0 # 16-byte Folded Reload + vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3824 add.d $a0, $sp, $a0 - vst $vr13, $a0, 0 + vst $vr22, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3776 + ori $a0, $a0, 3792 add.d $a0, $sp, $a0 - vld $vr14, $a0, 0 # 16-byte Folded Reload + vld $vr23, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vst $vr14, $a0, 0 + vst $vr23, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3744 + ori $a0, $a0, 3808 add.d $a0, $sp, $a0 - vld $vr7, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vst $vr7, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3760 + ori $a0, $a0, 3840 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3792 + ori $a0, $a0, 3856 add.d $a0, $sp, $a0 - vld $vr5, $a0, 0 # 16-byte Folded Reload + vld $vr30, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vst $vr5, $a0, 0 + vst $vr30, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3808 + ori $a0, $a0, 3872 add.d $a0, $sp, $a0 - vld $vr10, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3904 add.d $a0, $sp, $a0 - vst $vr10, $a0, 0 + vst $vr20, $a0, 0 lu12i.w $a0, 1 - ori $a0, $a0, 3824 + ori $a0, $a0, 3888 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3920 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 3840 + vst $vr20, $a0, 0 + lu12i.w $a0, 2 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 - vld $vr12, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 ori $a0, $a0, 3936 add.d $a0, $sp, $a0 - vst $vr12, $a0, 0 - lu12i.w $a0, 18 - ori $a0, $a0, 3952 - add.d $a0, $sp, $a0 - vst $vr23, $a0, 0 + vst $vr31, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 448 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vld $vr31, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 18 - ori $a0, $a0, 3968 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 - lu12i.w $a0, 1 - ori $a0, $a0, 2944 + ori $a0, $a0, 3952 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr31, $a0, 0 lu12i.w $a0, 18 - ori $a0, $a0, 3984 + ori $a0, $a0, 3968 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 + vst $vr0, $a0, 0 lu12i.w $a0, 2 - ori $a0, $a0, 1944 + ori $a0, $a0, 1928 add.d $a0, $sp, $a0 ld.d $t0, $a0, 0 # 8-byte Folded Reload addi.d $t0, $t0, 450 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - fldx.d $fa0, $t1, $a1 - fst.d $fa0, $sp, 1872 # 8-byte Folded Spill - lu12i.w $a0, 21 - ori $a0, $a0, 1952 - add.d $a1, $sp, $a0 + fldx.d $fs7, $t1, $a1 ori $t2, $zero, 2048 lu12i.w $a0, 1 - ori $a0, $a0, 2896 + ori $a0, $a0, 2352 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t2, $a3 ori $t1, $zero, 2064 lu12i.w $a0, 1 - ori $a0, $a0, 2880 + ori $a0, $a0, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $a2, $zero, 2080 + ori $a1, $zero, 2080 lu12i.w $a0, 1 - ori $a0, $a0, 2864 + ori $a0, $a0, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $a2, $a3 + vstx $vr0, $a1, $a3 ori $t2, $zero, 2080 ori $a2, $zero, 2096 lu12i.w $a0, 1 - ori $a0, $a0, 2848 + ori $a0, $a0, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $a2, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2832 + ori $a0, $a0, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2112 - vstx $vr0, $t1, $a3 + ori $a4, $zero, 2112 + vstx $vr0, $a4, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2384 + ori $a0, $a0, 3232 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t7, $a3 - ori $t7, $zero, 2128 - ori $s2, $zero, 2144 + vstx $vr0, $fp, $a3 + ori $fp, $zero, 2128 lu12i.w $a0, 1 - ori $a0, $a0, 2368 + ori $a0, $a0, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s2, $a3 + vstx $vr0, $s0, $a3 + ori $s0, $zero, 2144 lu12i.w $a0, 1 - ori $a0, $a0, 2816 + ori $a0, $a0, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $s1, $a3 - ori $s1, $zero, 2160 + vstx $vr0, $t7, $a3 + ori $t7, $zero, 2160 lu12i.w $a0, 1 - ori $a0, $a0, 3200 + ori $a0, $a0, 2752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2176 - vstx $vr0, $t1, $a3 - ori $t3, $zero, 2192 + vstx $vr0, $t8, $a3 + ori $t8, $zero, 2176 + ori $a1, $zero, 2192 lu12i.w $a0, 1 ori $a0, $a0, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $a3 + vstx $vr0, $a1, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2800 + ori $a0, $a0, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2208 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2352 + lu12i.w $a0, 2 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2224 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2336 + lu12i.w $a0, 2 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2240 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2320 + lu12i.w $a0, 2 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2256 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2784 + lu12i.w $a0, 2 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2272 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 80 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2288 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2304 - lu12i.w $a0, 1 - ori $a0, $a0, 2304 + lu12i.w $a0, 2 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2304 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1024 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2320 vstx $vr0, $t1, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2768 + ori $a0, $a0, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2336 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1008 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2352 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2752 + lu12i.w $a0, 2 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2368 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1920 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2384 vstx $vr0, $t1, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 3168 + ori $a0, $a0, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2400 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 3152 + ori $t1, $zero, 2416 + lu12i.w $a0, 2 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2416 vstx $vr0, $t1, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2736 + ori $a0, $a0, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2432 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2720 + lu12i.w $a0, 2 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2448 vstx $vr0, $t1, $a3 lu12i.w $a0, 1 - ori $a0, $a0, 2704 + ori $a0, $a0, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2464 vstx $vr0, $t1, $a3 + ori $t1, $zero, 2480 lu12i.w $a0, 1 - ori $a0, $a0, 3136 + ori $a0, $a0, 3120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2480 vstx $vr0, $t1, $a3 - lu12i.w $a0, 2 - ori $a0, $a0, 1904 + lu12i.w $a0, 1 + ori $a0, $a0, 3104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2496 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1888 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2512 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1872 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2528 vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2688 + lu12i.w $a0, 2 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2544 vstx $vr0, $t1, $a3 - lu12i.w $a0, 2 - ori $a0, $a0, 1856 + lu12i.w $a0, 1 + ori $a0, $a0, 3088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2560 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2576 - lu12i.w $a0, 2 - ori $a0, $a0, 992 + lu12i.w $a0, 1 + ori $a0, $a0, 3072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2576 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1840 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2592 vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1824 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2608 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2624 lu12i.w $a0, 2 - ori $a0, $a0, 1808 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2624 vstx $vr0, $t1, $a3 - lu12i.w $a0, 2 - ori $a0, $a0, 976 + lu12i.w $a0, 1 + ori $a0, $a0, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload ori $t1, $zero, 2640 vstx $vr0, $t1, $a3 ori $t1, $zero, 2656 lu12i.w $a0, 2 - ori $a0, $a0, 64 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $t1, $zero, 2672 - lu12i.w $a0, 1 - ori $a0, $a0, 2672 + lu12i.w $a0, 2 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2672 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2688 - lu12i.w $a0, 1 - ori $a0, $a0, 2656 + lu12i.w $a0, 2 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2688 vstx $vr0, $t1, $a3 + ori $t1, $zero, 2704 lu12i.w $a0, 2 - ori $a0, $a0, 1792 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2704 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2720 - lu12i.w $a0, 1 - ori $a0, $a0, 3120 + lu12i.w $a0, 2 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ori $t1, $zero, 2720 vstx $vr0, $t1, $a3 ori $t1, $zero, 2736 - lu12i.w $a0, 1 - ori $a0, $a0, 3104 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $a3 lu12i.w $a0, 2 - ori $a0, $a0, 1776 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ori $t1, $zero, 2752 - vstx $vr0, $t1, $a3 - ori $t1, $zero, 2768 - lu12i.w $a0, 1 - ori $a0, $a0, 2640 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + ld.d $a0, $sp, 0 # 8-byte Folded Reload vstx $vr0, $t1, $a3 - lu12i.w $a0, 2 - ori $a0, $a0, 1760 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $t1, 2 + ori $t1, $t1, 80 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s5, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 64 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s2, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1072 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 2784 vstx $vr0, $t1, $a3 - ori $t1, $zero, 2800 - vstx $vr30, $t1, $a3 - ori $t1, $zero, 2816 - lu12i.w $a0, 2 - ori $a0, $a0, 960 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $a3 - lu12i.w $a0, 1 - ori $a0, $a0, 2288 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $t1, 1 + ori $t1, $t1, 3040 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1840 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s4, $a3 ori $t1, $zero, 2832 - vstx $vr0, $t1, $a3 + vstx $vr28, $t1, $a3 ori $t1, $zero, 2848 - lu12i.w $a0, 2 - ori $a0, $a0, 48 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload - ld.d $a0, $sp, 0 # 8-byte Folded Reload + lu12i.w $s1, 2 + ori $s1, $s1, 1824 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 2272 + ori $t1, $t1, 2320 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 2864 vstx $vr0, $t1, $a3 - lu12i.w $t1, 2 - ori $t1, $t1, 1744 - add.d $t1, $sp, $t1 - vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 2880 + lu12i.w $s1, 2 + ori $s1, $s1, 1808 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $t1, $zero, 2896 - vstx $vr20, $t1, $a3 - lu12i.w $t1, 2 - ori $t1, $t1, 944 + lu12i.w $t1, 1 + ori $t1, $t1, 3024 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 2896 + vstx $vr0, $t1, $a3 ori $t1, $zero, 2912 + lu12i.w $s1, 2 + ori $s1, $s1, 1792 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $t1, $zero, 2928 - vstx $vr21, $t1, $a3 - lu12i.w $t1, 2 - ori $t1, $t1, 1728 + lu12i.w $t1, 1 + ori $t1, $t1, 2304 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s3, $a3 ori $t1, $zero, 2944 + lu12i.w $s1, 2 + ori $s1, $s1, 1776 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $t1, $zero, 2960 - vstx $vr29, $t1, $a3 + lu12i.w $t1, 1 + ori $t1, $t1, 2288 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s6, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 928 + ori $t1, $t1, 1056 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 2976 vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 1712 - add.d $t1, $sp, $t1 - vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $t5, $a3 - lu12i.w $t1, 1 - ori $t1, $t1, 3088 + ori $t1, $t1, 1760 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - ori $t1, $zero, 3008 + ori $t1, $zero, 2992 vstx $vr0, $t1, $a3 - lu12i.w $t1, 2 - ori $t1, $t1, 1696 + lu12i.w $t1, 1 + ori $t1, $t1, 2688 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $s7, $a3 ori $t1, $zero, 3024 + lu12i.w $s1, 2 + ori $s1, $s1, 1744 + add.d $s1, $sp, $s1 + vld $vr0, $s1, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 3072 + ori $t1, $t1, 2272 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3040 vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1728 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3056 - vstx $vr6, $t1, $a3 + vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 3056 + ori $t1, $t1, 2672 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3072 + vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 48 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $ra, $a3 ori $t1, $zero, 3088 - lu12i.w $t5, 2 - ori $t5, $t5, 1680 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 2608 + ori $t1, $t1, 3008 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3104 + vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1712 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s8, $a3 ori $t1, $zero, 3120 - lu12i.w $t5, 2 - ori $t5, $t5, 896 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 2592 + ori $t1, $t1, 2992 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3136 vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 880 + ori $t1, $t1, 1040 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $t8, $a3 + vstx $vr0, $s8, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 3040 + ori $t1, $t1, 2656 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3168 vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 1664 + ori $t1, $t1, 1024 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3184 vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 2576 + ori $t1, $t1, 2640 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3200 + vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1008 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s7, $a3 ori $t1, $zero, 3216 - lu12i.w $t5, 2 - ori $t5, $t5, 1648 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 + lu12i.w $t1, 1 + ori $t1, $t1, 2624 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3232 - lu12i.w $t5, 1 - ori $t5, $t5, 2560 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - ori $t1, $zero, 3248 - lu12i.w $t5, 2 - ori $t5, $t5, 1632 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload + lu12i.w $t1, 2 + ori $t1, $t1, 992 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $t6, $a3 + lu12i.w $t1, 1 + ori $t1, $t1, 2608 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3264 vstx $vr0, $t1, $a3 lu12i.w $t1, 2 + ori $t1, $t1, 976 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s6, $a3 ori $t1, $zero, 3280 - lu12i.w $t5, 2 - ori $t5, $t5, 1616 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 4080 + ori $t1, $t1, 2592 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $t4, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 960 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - ori $t1, $zero, 3296 - vstx $vr0, $t1, $a3 ori $t1, $zero, 3312 - lu12i.w $t5, 2 - ori $t5, $t5, 864 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 4064 + ori $t1, $t1, 2256 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s4, $a3 - ori $t1, $zero, 3344 - lu12i.w $t5, 2 - ori $t5, $t5, 1600 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $a3 - lu12i.w $t1, 1 - ori $t1, $t1, 4048 + vstx $vr0, $t5, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 944 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - ori $t1, $zero, 3360 + ori $t1, $zero, 3344 vstx $vr0, $t1, $a3 - ori $t1, $zero, 3376 - lu12i.w $t5, 2 - ori $t5, $t5, 1584 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload + ori $t1, $zero, 3360 + lu12i.w $t4, 1 + ori $t4, $t4, 2240 + add.d $t4, $sp, $t4 + vld $vr0, $t4, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1696 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + vstx $vr0, $t3, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1680 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3392 - lu12i.w $t5, 2 - ori $t5, $t5, 1568 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 32 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3408 - vstx $vr16, $t1, $a3 - ori $t1, $zero, 3424 - lu12i.w $t5, 2 - ori $t5, $t5, 1552 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 - lu12i.w $t1, 1 - ori $t1, $t1, 4016 + lu12i.w $t1, 2 + ori $t1, $t1, 1664 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3424 + vstx $vr0, $t1, $a3 ori $t1, $zero, 3440 + lu12i.w $t3, 2 + ori $t3, $t3, 928 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 1536 + ori $t1, $t1, 912 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s0, $a3 - lu12i.w $t1, 1 - ori $t1, $t1, 4000 + ori $t1, $zero, 3456 + vstx $vr0, $t1, $a3 + ori $t1, $zero, 3472 + lu12i.w $t3, 1 + ori $t3, $t3, 2576 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + vstx $vr0, $t1, $a3 + lu12i.w $t1, 2 + ori $t1, $t1, 1648 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $s3, $a3 ori $t1, $zero, 3488 - lu12i.w $t5, 2 - ori $t5, $t5, 1520 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 1 - ori $t1, $t1, 3984 + ori $t1, $t1, 2560 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload ori $t1, $zero, 3504 vstx $vr0, $t1, $a3 - ori $t1, $zero, 3520 - lu12i.w $t5, 2 - ori $t5, $t5, 1504 - add.d $t5, $sp, $t5 - vld $vr0, $t5, 0 # 16-byte Folded Reload - vstx $vr0, $t1, $a3 - lu12i.w $t1, 1 - ori $t1, $t1, 3968 + lu12i.w $t1, 2 + ori $t1, $t1, 1632 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3520 + vstx $vr0, $t1, $a3 ori $t1, $zero, 3536 + lu12i.w $t3, 1 + ori $t3, $t3, 2544 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 848 + ori $t1, $t1, 1616 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $t6, $a3 + vstx $vr0, $ra, $a3 + ori $t1, $zero, 3568 + lu12i.w $t3, 1 + ori $t3, $t3, 2976 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + vstx $vr0, $t1, $a3 lu12i.w $t1, 2 - ori $t1, $t1, 832 + ori $t1, $t1, 1600 add.d $t1, $sp, $t1 vld $vr0, $t1, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 816 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3584 - vstx $vr0, $a4, $a3 - lu12i.w $a4, 1 - ori $a4, $a4, 3952 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $s5, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 800 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3616 - vstx $vr0, $a4, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 784 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $fp, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 768 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3648 - vstx $vr0, $a4, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 752 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $t4, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 1488 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a7, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 736 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - vstx $vr0, $a6, $a3 - lu12i.w $a4, 1 - ori $a4, $a4, 3936 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload + ori $t1, $zero, 3584 + vstx $vr0, $t1, $a3 + lu12i.w $t1, 1 + ori $t1, $t1, 2528 + add.d $t1, $sp, $t1 + vld $vr0, $t1, 0 # 16-byte Folded Reload + ori $t1, $zero, 3600 + vstx $vr0, $t1, $a3 + vstx $vr7, $a7, $a3 + lu12i.w $a7, 2 + add.d $a7, $sp, $a7 + vld $vr0, $a7, 0 # 16-byte Folded Reload vstx $vr0, $a5, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 720 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3728 - vstx $vr0, $a4, $a3 - lu12i.w $a4, 1 - ori $a4, $a4, 3920 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3744 - vstx $vr0, $a4, $a3 - lu12i.w $a4, 1 - ori $a4, $a4, 3904 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - ori $a4, $zero, 3760 - vstx $vr0, $a4, $a3 - ori $a4, $zero, 3792 + vstx $vr8, $a6, $a3 + lu12i.w $a5, 1 + ori $a5, $a5, 4064 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3664 + vstx $vr0, $a5, $a3 + ori $a5, $zero, 3680 + lu12i.w $a6, 2 + ori $a6, $a6, 1584 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a5, $a3 + ori $a5, $zero, 3696 + lu12i.w $a6, 1 + ori $a6, $a6, 2512 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a5, $a3 + ori $a5, $zero, 3712 + lu12i.w $a6, 2 + ori $a6, $a6, 1568 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a5, $a3 + lu12i.w $a5, 2 + ori $a5, $a5, 896 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3728 + vstx $vr0, $a5, $a3 + lu12i.w $a5, 1 + ori $a5, $a5, 4048 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3744 + vstx $vr0, $a5, $a3 + ori $a5, $zero, 3760 + lu12i.w $a6, 1 + ori $a6, $a6, 2496 + add.d $a6, $sp, $a6 + vld $vr0, $a6, 0 # 16-byte Folded Reload + vstx $vr0, $a5, $a3 + lu12i.w $a5, 2 + ori $a5, $a5, 272 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3792 + vstx $vr0, $a5, $a3 + lu12i.w $a5, 1 + ori $a5, $a5, 4032 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3776 + vstx $vr0, $a5, $a3 + lu12i.w $a5, 1 + ori $a5, $a5, 2480 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 1936 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1552 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 1952 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2464 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 1968 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1536 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 1984 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2960 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2000 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1520 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2016 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2448 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2032 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1504 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2048 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 4016 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2064 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1488 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2080 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 880 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2096 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 4000 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2112 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 864 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2128 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2944 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2144 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 848 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2160 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 832 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2176 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 816 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2192 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1472 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2208 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3984 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2224 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 800 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2240 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2928 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2256 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1456 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2272 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2224 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2288 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1440 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2304 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 784 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2320 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1424 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2336 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 768 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2352 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1408 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2368 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3968 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2384 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1392 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2400 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2416 + add.d $a5, $sp, $a5 + vst $vr24, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1376 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2432 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3936 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2448 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1360 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2464 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3920 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2480 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1344 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2496 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 752 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2512 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1328 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2528 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 736 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2544 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 720 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2560 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 704 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2576 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1232 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2592 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1248 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2608 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 288 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2624 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 304 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2640 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 320 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2656 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3264 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2672 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 336 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2688 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 352 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2704 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 368 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2720 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3280 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2736 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2800 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2752 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3296 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2768 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2784 + add.d $a5, $sp, $a5 + vst $vr2, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3312 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2800 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2816 + add.d $a5, $sp, $a5 + vst $vr18, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2208 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2832 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3328 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2848 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2368 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2864 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2880 + add.d $a5, $sp, $a5 + vst $vr9, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2896 + add.d $a5, $sp, $a5 + vst $vr5, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2912 + add.d $a5, $sp, $a5 + vst $vr4, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2384 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2928 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2944 + add.d $a5, $sp, $a5 + vst $vr12, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2960 + add.d $a5, $sp, $a5 + vst $vr10, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 2976 + add.d $a5, $sp, $a5 + vst $vr11, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2400 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 2992 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2416 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3008 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3024 + add.d $a5, $sp, $a5 + vst $vr13, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3040 + add.d $a5, $sp, $a5 + vst $vr29, $a5, 0 lu12i.w $a5, 1 + ori $a5, $a5, 3376 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3056 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3072 + add.d $a5, $sp, $a5 + vst $vr14, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1264 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3088 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3104 + add.d $a5, $sp, $a5 + vst $vr16, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3120 + add.d $a5, $sp, $a5 + vst $vr15, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1280 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3136 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3152 + add.d $a5, $sp, $a5 + vst $vr25, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3168 + add.d $a5, $sp, $a5 + vst $vr17, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1296 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3184 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3200 + add.d $a5, $sp, $a5 + vst $vr1, $a5, 0 + lu12i.w $a5, 19 ori $a5, $a5, 3216 add.d $a5, $sp, $a5 + vst $vr3, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 1312 + add.d $a5, $sp, $a5 vld $vr0, $a5, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $a3 - ori $a4, $zero, 3776 + lu12i.w $a5, 19 + ori $a5, $a5, 3232 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 lu12i.w $a5, 1 - ori $a5, $a5, 2544 + ori $a5, $a5, 3472 add.d $a5, $sp, $a5 vld $vr0, $a5, 0 # 16-byte Folded Reload - vstx $vr0, $a4, $a3 - lu12i.w $a4, 2 - ori $a4, $a4, 704 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 1952 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1472 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 1968 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 688 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 1984 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1456 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2000 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 672 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2016 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3888 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2032 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 656 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2048 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 640 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2064 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 624 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2080 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 608 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2096 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 592 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2112 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 576 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2128 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 560 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2144 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 544 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2160 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 528 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2176 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1440 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2192 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 512 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2208 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1424 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2224 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 496 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2240 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 480 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2256 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2528 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2272 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1408 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2288 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3024 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2304 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1392 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2320 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3008 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2336 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1376 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2352 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2992 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2368 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1360 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2384 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2512 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2400 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1344 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2416 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2240 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2432 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1328 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2448 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2976 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2464 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1312 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2480 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2496 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2496 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1296 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2512 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3872 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2528 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1280 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2544 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2960 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2560 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2480 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2576 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3856 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2592 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1040 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2608 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 96 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2624 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 112 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2640 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1056 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2656 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 128 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2672 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 144 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2688 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1072 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2704 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1088 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2720 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3232 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2736 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3248 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2752 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1104 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2768 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1120 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2784 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 176 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2800 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1136 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2816 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 2832 - add.d $a4, $sp, $a4 - vst $vr2, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1184 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2848 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1152 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2864 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1168 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2880 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 192 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2896 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3264 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2912 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1200 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2928 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3280 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2944 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1264 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2960 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 2976 - add.d $a4, $sp, $a4 - vst $vr4, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 208 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 2992 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 224 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3008 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1216 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3024 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 240 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3040 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3056 - add.d $a4, $sp, $a4 - vst $vr15, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 272 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3072 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 288 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3088 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1232 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3104 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 304 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3120 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 320 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3136 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3152 - add.d $a4, $sp, $a4 - vst $vr25, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 352 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3168 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3184 - add.d $a4, $sp, $a4 - vst $vr8, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 1248 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3200 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3216 - add.d $a4, $sp, $a4 - vst $vr11, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3232 - add.d $a4, $sp, $a4 - vst $vr9, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 368 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3248 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3360 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3264 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2400 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3280 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3392 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3296 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3376 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3312 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3408 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3328 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3424 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3344 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 416 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3360 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 384 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3376 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 400 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3392 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2912 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3408 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3440 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3424 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3456 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3440 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3472 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3456 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2224 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3472 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3488 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3488 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3504 - add.d $a4, $sp, $a4 - vst $vr31, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3504 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3520 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3520 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3536 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3536 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3552 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3552 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3568 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3568 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3584 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3584 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3600 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3616 - add.d $a4, $sp, $a4 - vst $vr28, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 2416 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3632 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3648 - add.d $a4, $sp, $a4 - vst $vr19, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3664 - add.d $a4, $sp, $a4 - vst $vr22, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3632 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3680 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3696 - add.d $a4, $sp, $a4 - vst $vr27, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 432 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3712 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3728 - add.d $a4, $sp, $a4 - vst $vr18, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3744 - add.d $a4, $sp, $a4 - vst $vr17, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 464 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3760 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3776 - add.d $a4, $sp, $a4 - vst $vr3, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3712 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3792 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3808 - add.d $a4, $sp, $a4 - vst $vr24, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3824 - add.d $a4, $sp, $a4 - vst $vr13, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3840 - add.d $a4, $sp, $a4 - vst $vr14, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3856 - add.d $a4, $sp, $a4 - vst $vr7, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3760 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3872 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3888 - add.d $a4, $sp, $a4 - vst $vr5, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3904 - add.d $a4, $sp, $a4 - vst $vr10, $a4, 0 - lu12i.w $a4, 1 - ori $a4, $a4, 3824 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3920 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3936 - add.d $a4, $sp, $a4 - vst $vr12, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3952 - add.d $a4, $sp, $a4 - vst $vr23, $a4, 0 - lu12i.w $a4, 2 - ori $a4, $a4, 448 - add.d $a4, $sp, $a4 - vld $vr0, $a4, 0 # 16-byte Folded Reload - lu12i.w $a4, 19 - ori $a4, $a4, 3968 - add.d $a4, $sp, $a4 - vst $vr0, $a4, 0 - lu12i.w $a4, 19 - ori $a4, $a4, 3984 - add.d $a4, $sp, $a4 - vst $vr1, $a4, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3248 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3488 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3264 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 528 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3280 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2832 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3296 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3504 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3312 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3520 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3328 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3552 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3344 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 544 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3360 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3536 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3376 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3568 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3392 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3584 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3408 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3600 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3424 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3616 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3440 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3632 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3456 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3648 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3472 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 560 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3488 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3664 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3504 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 576 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3520 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3680 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3536 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 592 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3552 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2848 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3568 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 608 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3584 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2864 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3600 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2880 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3616 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3632 + add.d $a5, $sp, $a5 + vst $vr27, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2896 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3648 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2912 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3664 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 624 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3680 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3712 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3696 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3728 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3712 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3728 + add.d $a5, $sp, $a5 + vst $vr26, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3744 + add.d $a5, $sp, $a5 + vst $vr19, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3760 + add.d $a5, $sp, $a5 + vst $vr6, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 640 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3776 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 656 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3792 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3808 + add.d $a5, $sp, $a5 + vst $vr21, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3824 + add.d $a5, $sp, $a5 + vst $vr22, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3840 + add.d $a5, $sp, $a5 + vst $vr23, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3808 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3856 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3840 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3872 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3888 + add.d $a5, $sp, $a5 + vst $vr30, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 3872 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3904 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 19 + ori $a5, $a5, 3920 + add.d $a5, $sp, $a5 + vst $vr20, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 672 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3936 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 2 + ori $a5, $a5, 688 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3952 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 + lu12i.w $a5, 1 + ori $a5, $a5, 2432 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + lu12i.w $a5, 19 + ori $a5, $a5, 3968 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 fldx.d $fs2, $t0, $a3 - fld.d $ft14, $sp, 1744 # 8-byte Folded Reload + lu12i.w $a3, 21 + ori $a3, $a3, 1936 + add.d $a3, $sp, $a3 + fld.d $ft14, $sp, 1736 # 8-byte Folded Reload fld.d $fa0, $sp, 1896 # 8-byte Folded Reload fld.d $fa1, $sp, 1888 # 8-byte Folded Reload fmadd.d $ft14, $fa1, $ft14, $fa0 - fld.d $ft15, $sp, 1736 # 8-byte Folded Reload - fld.d $fa0, $sp, 1880 # 8-byte Folded Reload - fmadd.d $ft14, $fa0, $ft15, $ft14 fld.d $ft15, $sp, 1728 # 8-byte Folded Reload - fld.d $fa0, $sp, 1872 # 8-byte Folded Reload + fld.d $fa0, $sp, 1880 # 8-byte Folded Reload fmadd.d $ft14, $fa0, $ft15, $ft14 fld.d $ft15, $sp, 1720 # 8-byte Folded Reload + fmadd.d $ft14, $fs7, $ft15, $ft14 + fld.d $ft15, $sp, 1712 # 8-byte Folded Reload fmadd.d $ft14, $fs2, $ft15, $ft14 - ori $a3, $zero, 3488 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3232 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + ori $a5, $zero, 3488 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3232 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 ori $t0, $zero, 2048 - lu12i.w $a3, 2 - ori $a3, $a3, 1952 - add.d $t1, $sp, $a3 + lu12i.w $a5, 2 + ori $a5, $a5, 1936 + add.d $t1, $sp, $a5 vstx $vr0, $t0, $t1 ori $t6, $zero, 2064 - ori $a3, $zero, 3520 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3264 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + ori $a5, $zero, 3520 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3264 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 vstx $vr0, $t6, $t1 - ori $a3, $zero, 3568 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3296 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + ori $a5, $zero, 3568 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3296 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 vstx $vr0, $t2, $t1 ori $a6, $zero, 2080 - ori $a3, $zero, 3616 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3328 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + ori $a5, $zero, 3616 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3328 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 vstx $vr0, $a2, $t1 - ori $a5, $zero, 2096 - ori $a2, $zero, 3664 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3360 - add.d $a2, $sp, $a2 - vld $vr1, $a2, 0 # 16-byte Folded Reload + ori $a2, $zero, 2096 + ori $a5, $zero, 3664 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3360 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - ori $a2, $zero, 2112 - vstx $vr0, $a2, $t1 - ori $a7, $zero, 2112 - ori $a2, $zero, 3712 - add.d $a2, $sp, $a2 - vld $vr0, $a2, 0 # 16-byte Folded Reload - ori $a2, $zero, 3392 - add.d $a2, $sp, $a2 - vld $vr1, $a2, 0 # 16-byte Folded Reload + vstx $vr0, $a4, $t1 + ori $a4, $zero, 2112 + ori $a5, $zero, 3712 + add.d $a5, $sp, $a5 + vld $vr0, $a5, 0 # 16-byte Folded Reload + ori $a5, $zero, 3392 + add.d $a5, $sp, $a5 + vld $vr1, $a5, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - vstx $vr0, $t7, $t1 - ori $a2, $zero, 2128 - ori $a3, $zero, 3760 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3424 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + vstx $vr0, $fp, $t1 + ori $a5, $zero, 2128 + ori $a7, $zero, 3760 + add.d $a7, $sp, $a7 + vld $vr0, $a7, 0 # 16-byte Folded Reload + ori $a7, $zero, 3424 + add.d $a7, $sp, $a7 + vld $vr1, $a7, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - vstx $vr0, $s2, $t1 - ori $a4, $zero, 2144 - ori $a3, $zero, 3792 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - ori $a3, $zero, 3440 - add.d $a3, $sp, $a3 - vld $vr1, $a3, 0 # 16-byte Folded Reload + vstx $vr0, $s0, $t1 + ori $a7, $zero, 2144 + ori $t0, $zero, 3792 + add.d $t0, $sp, $t0 + vld $vr0, $t0, 0 # 16-byte Folded Reload + ori $t0, $zero, 3440 + add.d $t0, $sp, $t0 + vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - vstx $vr0, $s1, $t1 + vstx $vr0, $t7, $t1 ori $t2, $zero, 2160 - ori $a3, $zero, 2176 - add.d $a3, $sp, $a3 - vld $vr0, $a3, 0 # 16-byte Folded Reload - vstx $vr0, $t3, $t1 - ori $a3, $zero, 2192 + ori $t0, $zero, 2176 + add.d $t0, $sp, $t0 + vld $vr0, $t0, 0 # 16-byte Folded Reload + vstx $vr0, $a1, $t1 + ori $a1, $zero, 2192 ori $t0, $zero, 3824 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload @@ -288491,82 +286690,81 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - ori $t3, $zero, 2176 - vstx $vr0, $t3, $t1 + vstx $vr0, $t8, $t1 ori $t0, $zero, 2368 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 2192 + ori $t0, $t0, 640 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 1952 + ori $t0, $t0, 1936 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 - lu12i.w $t0, 1 - ori $t0, $t0, 1088 + ori $t0, $zero, 2384 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload - ori $t0, $zero, 2384 + lu12i.w $t0, 1 + ori $t0, $t0, 2192 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload - vextrins.d $vr0, $vr1, 16 + vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 1968 + ori $t0, $t0, 1952 add.d $t0, $sp, $t0 - vst $vr0, $t0, 0 + vst $vr1, $t0, 0 ori $t0, $zero, 2400 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 1152 + ori $t0, $t0, 704 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 1984 + ori $t0, $t0, 1968 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 2416 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 2208 + ori $t0, $t0, 736 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2000 + ori $t0, $t0, 1984 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 2432 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 1200 + ori $t0, $t0, 768 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2016 + ori $t0, $t0, 2000 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 2448 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 1248 + ori $t0, $t0, 816 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2032 + ori $t0, $t0, 2016 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1280 + ori $t0, $t0, 848 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2464 @@ -288574,11 +286772,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2048 + ori $t0, $t0, 2032 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1312 + ori $t0, $t0, 880 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2480 @@ -288586,51 +286784,51 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2064 + ori $t0, $t0, 2048 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 592 + ori $t0, $t0, 144 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1904 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2080 + ori $t0, $t0, 2064 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 608 + ori $t0, $t0, 160 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1920 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2096 + ori $t0, $t0, 2080 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 624 + ori $t0, $t0, 176 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1936 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2112 + ori $t0, $t0, 2096 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 640 + ori $t0, $t0, 192 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1952 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2128 + ori $t0, $t0, 2112 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 656 + ori $t0, $t0, 208 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2688 @@ -288638,61 +286836,61 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2144 + ori $t0, $t0, 2128 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 672 + ori $t0, $t0, 224 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1968 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2160 + ori $t0, $t0, 2144 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 688 + ori $t0, $t0, 240 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 1984 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2176 + ori $t0, $t0, 2160 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 704 + ori $t0, $t0, 256 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 2000 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2192 + ori $t0, $t0, 2176 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 720 + ori $t0, $t0, 272 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 2016 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2208 + ori $t0, $t0, 2192 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 736 + ori $t0, $t0, 288 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload vld $vr1, $sp, 2032 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2224 + ori $t0, $t0, 2208 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 752 + ori $t0, $t0, 304 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2048 @@ -288700,11 +286898,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2240 + ori $t0, $t0, 2224 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 768 + ori $t0, $t0, 320 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2064 @@ -288712,11 +286910,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2256 + ori $t0, $t0, 2240 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 784 + ori $t0, $t0, 336 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2080 @@ -288724,11 +286922,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2272 + ori $t0, $t0, 2256 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 800 + ori $t0, $t0, 352 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2096 @@ -288736,11 +286934,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2288 + ori $t0, $t0, 2272 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 816 + ori $t0, $t0, 368 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2112 @@ -288748,11 +286946,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2304 + ori $t0, $t0, 2288 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 832 + ori $t0, $t0, 384 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2128 @@ -288760,7 +286958,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2320 + ori $t0, $t0, 2304 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 2848 @@ -288771,11 +286969,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2336 + ori $t0, $t0, 2320 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 848 + ori $t0, $t0, 400 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2160 @@ -288783,11 +286981,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2352 + ori $t0, $t0, 2336 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 864 + ori $t0, $t0, 416 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2192 @@ -288795,11 +286993,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2368 + ori $t0, $t0, 2352 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 880 + ori $t0, $t0, 432 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2208 @@ -288807,11 +287005,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2384 + ori $t0, $t0, 2368 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 896 + ori $t0, $t0, 448 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2224 @@ -288819,11 +287017,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2400 + ori $t0, $t0, 2384 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 912 + ori $t0, $t0, 464 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2240 @@ -288831,11 +287029,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2416 + ori $t0, $t0, 2400 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 928 + ori $t0, $t0, 480 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2256 @@ -288843,11 +287041,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2432 + ori $t0, $t0, 2416 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 944 + ori $t0, $t0, 496 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2272 @@ -288855,11 +287053,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2448 + ori $t0, $t0, 2432 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 960 + ori $t0, $t0, 512 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2288 @@ -288867,11 +287065,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2464 + ori $t0, $t0, 2448 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 976 + ori $t0, $t0, 528 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2304 @@ -288879,11 +287077,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2480 + ori $t0, $t0, 2464 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 992 + ori $t0, $t0, 544 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2320 @@ -288891,11 +287089,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2496 + ori $t0, $t0, 2480 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1008 + ori $t0, $t0, 560 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2336 @@ -288903,11 +287101,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2512 + ori $t0, $t0, 2496 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1024 + ori $t0, $t0, 576 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2352 @@ -288915,11 +287113,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2528 + ori $t0, $t0, 2512 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1040 + ori $t0, $t0, 592 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2976 @@ -288927,11 +287125,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2544 + ori $t0, $t0, 2528 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1056 + ori $t0, $t0, 608 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2496 @@ -288939,11 +287137,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2560 + ori $t0, $t0, 2544 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1072 + ori $t0, $t0, 624 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2512 @@ -288951,11 +287149,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2576 + ori $t0, $t0, 2560 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1104 + ori $t0, $t0, 656 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2528 @@ -288963,11 +287161,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2592 + ori $t0, $t0, 2576 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1120 + ori $t0, $t0, 672 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2544 @@ -288975,11 +287173,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2608 + ori $t0, $t0, 2592 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1136 + ori $t0, $t0, 688 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2560 @@ -288987,11 +287185,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2624 + ori $t0, $t0, 2608 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1168 + ori $t0, $t0, 720 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2576 @@ -288999,11 +287197,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2640 + ori $t0, $t0, 2624 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1184 + ori $t0, $t0, 752 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2592 @@ -289011,11 +287209,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2656 + ori $t0, $t0, 2640 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1216 + ori $t0, $t0, 784 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2608 @@ -289023,11 +287221,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2672 + ori $t0, $t0, 2656 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1232 + ori $t0, $t0, 800 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2624 @@ -289035,11 +287233,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2688 + ori $t0, $t0, 2672 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1264 + ori $t0, $t0, 832 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2640 @@ -289047,11 +287245,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2704 + ori $t0, $t0, 2688 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1296 + ori $t0, $t0, 864 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2656 @@ -289059,7 +287257,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2720 + ori $t0, $t0, 2704 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 3120 @@ -289070,11 +287268,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2736 + ori $t0, $t0, 2720 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1328 + ori $t0, $t0, 896 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2704 @@ -289082,11 +287280,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2752 + ori $t0, $t0, 2736 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1344 + ori $t0, $t0, 912 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2720 @@ -289094,11 +287292,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2768 + ori $t0, $t0, 2752 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1360 + ori $t0, $t0, 928 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2736 @@ -289106,11 +287304,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2784 + ori $t0, $t0, 2768 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1376 + ori $t0, $t0, 944 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2752 @@ -289118,11 +287316,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2800 + ori $t0, $t0, 2784 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1392 + ori $t0, $t0, 960 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2768 @@ -289130,11 +287328,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2816 + ori $t0, $t0, 2800 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1408 + ori $t0, $t0, 976 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2784 @@ -289142,11 +287340,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2832 + ori $t0, $t0, 2816 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1424 + ori $t0, $t0, 992 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2800 @@ -289154,11 +287352,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2848 + ori $t0, $t0, 2832 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1440 + ori $t0, $t0, 1008 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2816 @@ -289166,11 +287364,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2864 + ori $t0, $t0, 2848 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1456 + ori $t0, $t0, 1024 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2832 @@ -289178,11 +287376,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2880 + ori $t0, $t0, 2864 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1472 + ori $t0, $t0, 1040 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2864 @@ -289190,11 +287388,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2896 + ori $t0, $t0, 2880 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1488 + ori $t0, $t0, 1056 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2880 @@ -289202,11 +287400,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2912 + ori $t0, $t0, 2896 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1504 + ori $t0, $t0, 1072 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2896 @@ -289214,11 +287412,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2928 + ori $t0, $t0, 2912 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1520 + ori $t0, $t0, 1088 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3472 @@ -289226,11 +287424,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2944 + ori $t0, $t0, 2928 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1536 + ori $t0, $t0, 1104 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2912 @@ -289238,11 +287436,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2960 + ori $t0, $t0, 2944 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1552 + ori $t0, $t0, 1120 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2928 @@ -289250,11 +287448,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2976 + ori $t0, $t0, 2960 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1568 + ori $t0, $t0, 1136 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2944 @@ -289262,11 +287460,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 2992 + ori $t0, $t0, 2976 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1584 + ori $t0, $t0, 1152 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2960 @@ -289274,11 +287472,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3008 + ori $t0, $t0, 2992 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1600 + ori $t0, $t0, 1168 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 2992 @@ -289286,11 +287484,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3024 + ori $t0, $t0, 3008 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1616 + ori $t0, $t0, 1184 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3008 @@ -289298,11 +287496,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3040 + ori $t0, $t0, 3024 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1632 + ori $t0, $t0, 1200 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3024 @@ -289310,11 +287508,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3056 + ori $t0, $t0, 3040 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1648 + ori $t0, $t0, 1216 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3040 @@ -289322,11 +287520,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3072 + ori $t0, $t0, 3056 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1664 + ori $t0, $t0, 1232 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3056 @@ -289334,11 +287532,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3088 + ori $t0, $t0, 3072 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1680 + ori $t0, $t0, 1248 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3072 @@ -289346,11 +287544,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3104 + ori $t0, $t0, 3088 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1696 + ori $t0, $t0, 1264 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3088 @@ -289358,7 +287556,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3120 + ori $t0, $t0, 3104 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 ori $t0, $zero, 3808 @@ -289369,11 +287567,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3136 + ori $t0, $t0, 3120 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1712 + ori $t0, $t0, 1280 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3136 @@ -289381,11 +287579,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3152 + ori $t0, $t0, 3136 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1728 + ori $t0, $t0, 1296 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3152 @@ -289393,11 +287591,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3168 + ori $t0, $t0, 3152 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1744 + ori $t0, $t0, 1312 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3168 @@ -289405,11 +287603,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3184 + ori $t0, $t0, 3168 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1760 + ori $t0, $t0, 1328 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3184 @@ -289417,11 +287615,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3200 + ori $t0, $t0, 3184 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1776 + ori $t0, $t0, 1344 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3200 @@ -289429,11 +287627,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3216 + ori $t0, $t0, 3200 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1792 + ori $t0, $t0, 1360 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3216 @@ -289441,11 +287639,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3232 + ori $t0, $t0, 3216 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1808 + ori $t0, $t0, 1376 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3248 @@ -289453,11 +287651,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3248 + ori $t0, $t0, 3232 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1824 + ori $t0, $t0, 1392 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3280 @@ -289465,11 +287663,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3264 + ori $t0, $t0, 3248 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1840 + ori $t0, $t0, 1408 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3312 @@ -289477,11 +287675,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3280 + ori $t0, $t0, 3264 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1856 + ori $t0, $t0, 1424 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3344 @@ -289489,11 +287687,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3296 + ori $t0, $t0, 3280 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1872 + ori $t0, $t0, 1440 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3376 @@ -289501,11 +287699,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3312 + ori $t0, $t0, 3296 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1888 + ori $t0, $t0, 1456 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3408 @@ -289513,11 +287711,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3328 + ori $t0, $t0, 3312 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1904 + ori $t0, $t0, 1472 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 4000 @@ -289525,11 +287723,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3344 + ori $t0, $t0, 3328 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1920 + ori $t0, $t0, 1488 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3504 @@ -289537,11 +287735,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3360 + ori $t0, $t0, 3344 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1936 + ori $t0, $t0, 1504 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3536 @@ -289549,11 +287747,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3376 + ori $t0, $t0, 3360 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1952 + ori $t0, $t0, 1520 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3552 @@ -289561,11 +287759,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3392 + ori $t0, $t0, 3376 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1968 + ori $t0, $t0, 1536 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3584 @@ -289573,11 +287771,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3408 + ori $t0, $t0, 3392 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 1984 + ori $t0, $t0, 1552 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3600 @@ -289585,11 +287783,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3424 + ori $t0, $t0, 3408 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2000 + ori $t0, $t0, 1568 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3632 @@ -289597,11 +287795,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3440 + ori $t0, $t0, 3424 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2016 + ori $t0, $t0, 1584 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3648 @@ -289609,11 +287807,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3456 + ori $t0, $t0, 3440 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2032 + ori $t0, $t0, 1600 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3680 @@ -289621,11 +287819,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3472 + ori $t0, $t0, 3456 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2048 + ori $t0, $t0, 1616 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3696 @@ -289633,11 +287831,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3488 + ori $t0, $t0, 3472 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2064 + ori $t0, $t0, 1632 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3728 @@ -289645,11 +287843,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3504 + ori $t0, $t0, 3488 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2080 + ori $t0, $t0, 1648 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3744 @@ -289657,10 +287855,10 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3520 + ori $t0, $t0, 3504 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 - ori $t0, $zero, 4080 + ori $t0, $zero, 4064 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3776 @@ -289668,11 +287866,10 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3536 + ori $t0, $t0, 3520 add.d $t0, $sp, $t0 vst $vr1, $t0, 0 - lu12i.w $t0, 1 - ori $t0, $t0, 32 + ori $t0, $zero, 4080 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3840 @@ -289680,11 +287877,10 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3552 + ori $t0, $t0, 3536 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 80 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3856 @@ -289692,11 +287888,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3568 + ori $t0, $t0, 3552 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 128 + ori $t0, $t0, 16 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3872 @@ -289704,11 +287900,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3584 + ori $t0, $t0, 3568 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 160 + ori $t0, $t0, 32 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3888 @@ -289716,11 +287912,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3600 + ori $t0, $t0, 3584 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 208 + ori $t0, $t0, 48 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3904 @@ -289728,11 +287924,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3616 + ori $t0, $t0, 3600 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 240 + ori $t0, $t0, 64 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3920 @@ -289740,11 +287936,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3632 + ori $t0, $t0, 3616 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 256 + ori $t0, $t0, 80 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3936 @@ -289752,11 +287948,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3648 + ori $t0, $t0, 3632 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2096 + ori $t0, $t0, 1664 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3952 @@ -289764,11 +287960,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3664 + ori $t0, $t0, 3648 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2112 + ori $t0, $t0, 1680 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3968 @@ -289776,11 +287972,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3680 + ori $t0, $t0, 3664 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2128 + ori $t0, $t0, 1696 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 3984 @@ -289788,11 +287984,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3696 + ori $t0, $t0, 3680 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2144 + ori $t0, $t0, 1712 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 4016 @@ -289800,11 +287996,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3712 + ori $t0, $t0, 3696 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 2160 + ori $t0, $t0, 1728 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload ori $t0, $zero, 4032 @@ -289812,228 +288008,227 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 lu12i.w $t0, 2 - ori $t0, $t0, 3728 + ori $t0, $t0, 3712 add.d $t0, $sp, $t0 vst $vr0, $t0, 0 lu12i.w $t0, 1 - ori $t0, $t0, 336 + ori $t0, $t0, 112 add.d $t0, $sp, $t0 vld $vr0, $t0, 0 # 16-byte Folded Reload lu12i.w $t0, 1 - ori $t0, $t0, 320 + ori $t0, $t0, 96 add.d $t0, $sp, $t0 vld $vr1, $t0, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - lu12i.w $t0, 1 - ori $t0, $t0, 2184 - add.d $t0, $sp, $t0 - ld.d $t4, $t0, 0 # 8-byte Folded Reload - lu12i.w $t0, 2 - ori $t0, $t0, 1944 - add.d $t0, $sp, $t0 - ld.d $t0, $t0, 0 # 8-byte Folded Reload - add.d $t0, $t4, $t0 + ld.d $t0, $sp, 1864 # 8-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 1928 + add.d $t3, $sp, $t3 + ld.d $t5, $t3, 0 # 8-byte Folded Reload + add.d $t0, $t0, $t5 andi $t0, $t0, 511 slli.d $t0, $t0, 3 - lu12i.w $t4, 2 - ori $t4, $t4, 3744 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 352 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - ori $t4, $zero, 4048 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3760 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - ori $t4, $zero, 4064 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 368 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3728 + add.d $t3, $sp, $t3 + vst $vr0, $t3, 0 + ori $t3, $zero, 4048 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1968 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3776 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 384 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3744 + add.d $t3, $sp, $t3 + vst $vr0, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 1984 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1744 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3792 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 400 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 16 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3760 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2000 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1760 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3808 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 416 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 48 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3776 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 128 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1776 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3824 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 432 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 64 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3792 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2016 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1792 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3840 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 96 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 448 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload - vextrins.d $vr0, $vr1, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3856 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 464 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 112 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3808 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2032 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1808 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3872 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 480 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 144 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3824 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2048 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1824 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3888 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 496 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 176 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3840 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2064 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1840 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3904 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 512 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 192 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3856 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2080 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1856 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3920 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 528 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 224 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3872 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2096 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1872 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3936 - add.d $t4, $sp, $t4 - vst $vr1, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 544 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 272 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3888 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2112 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1888 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 + lu12i.w $t3, 2 + ori $t3, $t3, 3904 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2128 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1904 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 + lu12i.w $t3, 2 + ori $t3, $t3, 3920 + add.d $t3, $sp, $t3 + vst $vr1, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2144 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1920 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3952 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 560 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 288 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3936 + add.d $t3, $sp, $t3 + vst $vr0, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2160 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1936 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3968 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 - lu12i.w $t4, 1 - ori $t4, $t4, 576 - add.d $t4, $sp, $t4 - vld $vr0, $t4, 0 # 16-byte Folded Reload - lu12i.w $t4, 1 - ori $t4, $t4, 304 - add.d $t4, $sp, $t4 - vld $vr1, $t4, 0 # 16-byte Folded Reload + lu12i.w $t3, 2 + ori $t3, $t3, 3952 + add.d $t3, $sp, $t3 + vst $vr0, $t3, 0 + lu12i.w $t3, 1 + ori $t3, $t3, 2176 + add.d $t3, $sp, $t3 + vld $vr0, $t3, 0 # 16-byte Folded Reload + lu12i.w $t3, 1 + ori $t3, $t3, 1952 + add.d $t3, $sp, $t3 + vld $vr1, $t3, 0 # 16-byte Folded Reload vextrins.d $vr0, $vr1, 16 - lu12i.w $t4, 2 - ori $t4, $t4, 3984 - add.d $t4, $sp, $t4 - vst $vr0, $t4, 0 + lu12i.w $t3, 2 + ori $t3, $t3, 3968 + add.d $t3, $sp, $t3 + vst $vr0, $t3, 0 fstx.d $ft14, $t0, $t1 ori $t0, $zero, 2048 - vldx $vr22, $t3, $t1 + vldx $vr22, $t8, $t1 vldx $vr23, $t2, $t1 vreplvei.d $vr0, $vr22, 1 ori $t2, $zero, 3456 @@ -290043,35 +288238,39 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 ori $t2, $zero, 3824 add.d $t2, $sp, $t2 vst $vr0, $t2, 0 # 16-byte Folded Spill + vldx $vr22, $a7, $t1 + vreplvei.d $vr0, $vr23, 1 + ori $a7, $zero, 3440 + add.d $a7, $sp, $a7 + vst $vr0, $a7, 0 # 16-byte Folded Spill + vreplvei.d $vr0, $vr23, 0 + ori $a7, $zero, 3792 + add.d $a7, $sp, $a7 + vst $vr0, $a7, 0 # 16-byte Folded Spill + vldx $vr23, $a5, $t1 + vreplvei.d $vr0, $vr22, 1 + ori $a5, $zero, 3424 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 # 16-byte Folded Spill + vreplvei.d $vr0, $vr22, 0 + ori $a5, $zero, 3760 + add.d $a5, $sp, $a5 + vst $vr0, $a5, 0 # 16-byte Folded Spill vldx $vr22, $a4, $t1 vreplvei.d $vr0, $vr23, 1 - ori $a4, $zero, 3440 + ori $a4, $zero, 3392 add.d $a4, $sp, $a4 vst $vr0, $a4, 0 # 16-byte Folded Spill vreplvei.d $vr0, $vr23, 0 - ori $a4, $zero, 3792 + ori $a4, $zero, 3712 add.d $a4, $sp, $a4 vst $vr0, $a4, 0 # 16-byte Folded Spill + ori $t3, $zero, 2096 vldx $vr23, $a2, $t1 - vreplvei.d $vr0, $vr22, 1 - ori $a2, $zero, 3424 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 - ori $a2, $zero, 3760 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vldx $vr22, $a7, $t1 - vreplvei.d $vr0, $vr23, 1 - ori $a2, $zero, 3392 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 - ori $a2, $zero, 3712 + lu12i.w $a2, 2 + ori $a2, $a2, 1928 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $t3, $zero, 2096 - vldx $vr23, $a5, $t1 + ld.d $t4, $a2, 0 # 8-byte Folded Reload vreplvei.d $vr0, $vr22, 1 ori $a2, $zero, 3360 add.d $a2, $sp, $a2 @@ -290090,7 +288289,6 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 ori $a2, $zero, 3616 add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a6, $zero, 2064 vldx $vr23, $t6, $t1 vreplvei.d $vr0, $vr22, 1 ori $a2, $zero, 3296 @@ -290110,7 +288308,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3984 + ori $a2, $a2, 3968 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr0, $vr22, 1 @@ -290122,292 +288320,289 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr0, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3968 + ori $a2, $a2, 3952 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr2, $vr23, 1 - vreplvei.d $vr1, $vr23, 0 + vreplvei.d $vr1, $vr23, 1 + vreplvei.d $vr0, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3952 + ori $a2, $a2, 3936 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr4, $vr22, 1 - vreplvei.d $vr3, $vr22, 0 + vreplvei.d $vr3, $vr22, 1 + vreplvei.d $vr2, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3936 + ori $a2, $a2, 3920 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr6, $vr23, 1 - vreplvei.d $vr5, $vr23, 0 + vreplvei.d $vr5, $vr23, 1 + vreplvei.d $vr4, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3920 + ori $a2, $a2, 3904 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr7, $vr22, 1 - vreplvei.d $vr8, $vr22, 0 + vreplvei.d $vr6, $vr22, 1 + vreplvei.d $vr7, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3904 + ori $a2, $a2, 3888 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr9, $vr23, 1 - vreplvei.d $vr10, $vr23, 0 + vreplvei.d $vr8, $vr23, 1 + vreplvei.d $vr9, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3888 + ori $a2, $a2, 3872 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr11, $vr22, 1 - vreplvei.d $vr12, $vr22, 0 + vreplvei.d $vr10, $vr22, 1 + vreplvei.d $vr11, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3872 + ori $a2, $a2, 3856 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr13, $vr23, 1 - vreplvei.d $vr14, $vr23, 0 + vreplvei.d $vr12, $vr23, 1 + vreplvei.d $vr13, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3856 + ori $a2, $a2, 3840 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr15, $vr22, 1 - vreplvei.d $vr16, $vr22, 0 + vreplvei.d $vr14, $vr22, 1 + vreplvei.d $vr15, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3840 + ori $a2, $a2, 3824 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr17, $vr23, 1 - vreplvei.d $vr18, $vr23, 0 + vreplvei.d $vr16, $vr23, 1 + vreplvei.d $vr17, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3824 + ori $a2, $a2, 3808 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr19, $vr22, 1 - vreplvei.d $vr20, $vr22, 0 + vreplvei.d $vr18, $vr22, 1 + vreplvei.d $vr19, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3808 + ori $a2, $a2, 3792 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr21, $vr23, 1 - vreplvei.d $vr25, $vr23, 0 + vreplvei.d $vr20, $vr23, 1 + vreplvei.d $vr21, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3792 + ori $a2, $a2, 3776 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 400 + ori $a2, $a2, 128 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr27, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr26, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3776 + ori $a2, $a2, 3760 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr28, $vr23, 1 - vreplvei.d $vr29, $vr23, 0 + vreplvei.d $vr27, $vr23, 1 + vreplvei.d $vr28, $vr23, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3760 + ori $a2, $a2, 3744 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr30, $vr22, 1 - vreplvei.d $vr31, $vr22, 0 + vreplvei.d $vr29, $vr22, 1 + vreplvei.d $vr30, $vr22, 0 lu12i.w $a2, 2 - ori $a2, $a2, 3744 - add.d $a2, $sp, $a2 - vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 - lu12i.w $a2, 1 - ori $a2, $a2, 352 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + ori $a2, $a2, 3728 + add.d $a2, $sp, $a2 + vld $vr22, $a2, 0 + vreplvei.d $vr31, $vr23, 1 + vreplvei.d $vr23, $vr23, 0 ori $a2, $zero, 4048 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3728 + ori $a2, $a2, 3712 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 320 + ori $a2, $a2, 96 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 336 + ori $a2, $a2, 112 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3712 + ori $a2, $a2, 3696 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 4032 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2160 + ori $a2, $a2, 1728 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3696 + ori $a2, $a2, 3680 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 4016 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2144 + ori $a2, $a2, 1712 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3680 + ori $a2, $a2, 3664 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 3984 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2128 + ori $a2, $a2, 1696 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3664 + ori $a2, $a2, 3648 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 3968 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2112 + ori $a2, $a2, 1680 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3648 + ori $a2, $a2, 3632 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 3952 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2096 + ori $a2, $a2, 1664 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3632 + ori $a2, $a2, 3616 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 3936 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 256 + ori $a2, $a2, 80 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3616 + ori $a2, $a2, 3600 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 3920 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 240 + ori $a2, $a2, 64 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3600 + ori $a2, $a2, 3584 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 3904 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 208 + ori $a2, $a2, 48 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3584 + ori $a2, $a2, 3568 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 3888 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 160 + ori $a2, $a2, 32 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3568 + ori $a2, $a2, 3552 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 3872 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 128 + ori $a2, $a2, 16 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3552 + ori $a2, $a2, 3536 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 + vreplvei.d $vr24, $vr23, 1 ori $a2, $zero, 3856 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 80 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3536 + ori $a2, $a2, 3520 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - vreplvei.d $vr0, $vr22, 1 + vreplvei.d $vr24, $vr22, 1 ori $a2, $zero, 3840 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr22, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 32 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr22, $vr22, 0 + ori $a2, $zero, 4080 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill + vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3520 + ori $a2, $a2, 3504 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 - vreplvei.d $vr0, $vr23, 1 - ori $a2, $zero, 4080 + vreplvei.d $vr24, $vr23, 1 + ori $a2, $zero, 4064 add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr0, $vr23, 0 + vst $vr24, $a2, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 + ori $a2, $zero, 3776 + add.d $a2, $sp, $a2 + vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3504 + ori $a2, $a2, 3488 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2080 + ori $a2, $a2, 1648 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290415,12 +288610,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3488 + ori $a2, $a2, 3472 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2064 + ori $a2, $a2, 1632 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290428,12 +288623,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3472 + ori $a2, $a2, 3456 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2048 + ori $a2, $a2, 1616 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290441,12 +288636,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3456 + ori $a2, $a2, 3440 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2032 + ori $a2, $a2, 1600 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290454,12 +288649,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3440 + ori $a2, $a2, 3424 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2016 + ori $a2, $a2, 1584 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290467,12 +288662,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3424 + ori $a2, $a2, 3408 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 2000 + ori $a2, $a2, 1568 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290480,12 +288675,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3408 + ori $a2, $a2, 3392 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1984 + ori $a2, $a2, 1552 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290493,12 +288688,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3392 + ori $a2, $a2, 3376 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1968 + ori $a2, $a2, 1536 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290506,12 +288701,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3376 + ori $a2, $a2, 3360 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1952 + ori $a2, $a2, 1520 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290519,12 +288714,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3360 + ori $a2, $a2, 3344 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1936 + ori $a2, $a2, 1504 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290532,12 +288727,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3344 + ori $a2, $a2, 3328 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1920 + ori $a2, $a2, 1488 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290545,12 +288740,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3328 + ori $a2, $a2, 3312 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1904 + ori $a2, $a2, 1472 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290558,7 +288753,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3312 + ori $a2, $a2, 3296 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290567,11 +288762,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1888 + ori $a2, $a2, 1456 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3296 + ori $a2, $a2, 3280 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290580,11 +288775,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1872 + ori $a2, $a2, 1440 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3280 + ori $a2, $a2, 3264 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290593,11 +288788,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1856 + ori $a2, $a2, 1424 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3264 + ori $a2, $a2, 3248 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290606,11 +288801,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1840 + ori $a2, $a2, 1408 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3248 + ori $a2, $a2, 3232 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290619,11 +288814,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1824 + ori $a2, $a2, 1392 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3232 + ori $a2, $a2, 3216 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290632,11 +288827,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1808 + ori $a2, $a2, 1376 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3216 + ori $a2, $a2, 3200 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290645,11 +288840,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1792 + ori $a2, $a2, 1360 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3200 + ori $a2, $a2, 3184 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290658,11 +288853,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1776 + ori $a2, $a2, 1344 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3184 + ori $a2, $a2, 3168 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290671,11 +288866,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1760 + ori $a2, $a2, 1328 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3168 + ori $a2, $a2, 3152 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290684,11 +288879,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1744 + ori $a2, $a2, 1312 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3152 + ori $a2, $a2, 3136 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290697,11 +288892,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1728 + ori $a2, $a2, 1296 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3136 + ori $a2, $a2, 3120 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290710,11 +288905,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1712 + ori $a2, $a2, 1280 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3120 + ori $a2, $a2, 3104 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290726,12 +288921,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3104 + ori $a2, $a2, 3088 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1696 + ori $a2, $a2, 1264 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290739,12 +288934,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3088 + ori $a2, $a2, 3072 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1680 + ori $a2, $a2, 1248 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290752,12 +288947,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3072 + ori $a2, $a2, 3056 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1664 + ori $a2, $a2, 1232 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290765,12 +288960,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3056 + ori $a2, $a2, 3040 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1648 + ori $a2, $a2, 1216 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290778,12 +288973,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3040 + ori $a2, $a2, 3024 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1632 + ori $a2, $a2, 1200 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290791,12 +288986,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3024 + ori $a2, $a2, 3008 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1616 + ori $a2, $a2, 1184 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290804,12 +288999,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 3008 + ori $a2, $a2, 2992 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1600 + ori $a2, $a2, 1168 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290817,12 +289012,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2992 + ori $a2, $a2, 2976 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1584 + ori $a2, $a2, 1152 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290830,12 +289025,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2976 + ori $a2, $a2, 2960 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1568 + ori $a2, $a2, 1136 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290843,12 +289038,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2960 + ori $a2, $a2, 2944 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1552 + ori $a2, $a2, 1120 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290856,12 +289051,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2944 + ori $a2, $a2, 2928 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1536 + ori $a2, $a2, 1104 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -290869,12 +289064,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2928 + ori $a2, $a2, 2912 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1520 + ori $a2, $a2, 1088 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -290882,7 +289077,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2912 + ori $a2, $a2, 2896 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290891,11 +289086,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1504 + ori $a2, $a2, 1072 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2896 + ori $a2, $a2, 2880 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290904,11 +289099,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1488 + ori $a2, $a2, 1056 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2880 + ori $a2, $a2, 2864 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290917,11 +289112,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1472 + ori $a2, $a2, 1040 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2864 + ori $a2, $a2, 2848 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290930,11 +289125,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1456 + ori $a2, $a2, 1024 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2848 + ori $a2, $a2, 2832 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290943,11 +289138,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1440 + ori $a2, $a2, 1008 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2832 + ori $a2, $a2, 2816 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290956,11 +289151,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1424 + ori $a2, $a2, 992 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2816 + ori $a2, $a2, 2800 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290969,11 +289164,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1408 + ori $a2, $a2, 976 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2800 + ori $a2, $a2, 2784 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -290982,11 +289177,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1392 + ori $a2, $a2, 960 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2784 + ori $a2, $a2, 2768 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -290995,11 +289190,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1376 + ori $a2, $a2, 944 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2768 + ori $a2, $a2, 2752 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291008,11 +289203,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1360 + ori $a2, $a2, 928 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2752 + ori $a2, $a2, 2736 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291021,11 +289216,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1344 + ori $a2, $a2, 912 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2736 + ori $a2, $a2, 2720 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291034,11 +289229,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1328 + ori $a2, $a2, 896 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2720 + ori $a2, $a2, 2704 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291050,12 +289245,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2704 + ori $a2, $a2, 2688 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1296 + ori $a2, $a2, 864 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291063,12 +289258,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2688 + ori $a2, $a2, 2672 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1264 + ori $a2, $a2, 832 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291076,12 +289271,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2672 + ori $a2, $a2, 2656 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1232 + ori $a2, $a2, 800 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291089,12 +289284,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2656 + ori $a2, $a2, 2640 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1216 + ori $a2, $a2, 784 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291102,12 +289297,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2640 + ori $a2, $a2, 2624 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1184 + ori $a2, $a2, 752 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291115,12 +289310,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2624 + ori $a2, $a2, 2608 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1168 + ori $a2, $a2, 720 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291128,12 +289323,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2608 + ori $a2, $a2, 2592 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1136 + ori $a2, $a2, 688 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291141,12 +289336,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2592 + ori $a2, $a2, 2576 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1120 + ori $a2, $a2, 672 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291154,12 +289349,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2576 + ori $a2, $a2, 2560 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1104 + ori $a2, $a2, 656 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291167,12 +289362,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2560 + ori $a2, $a2, 2544 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1072 + ori $a2, $a2, 624 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291180,12 +289375,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2544 + ori $a2, $a2, 2528 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1056 + ori $a2, $a2, 608 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291193,12 +289388,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2528 + ori $a2, $a2, 2512 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 1040 + ori $a2, $a2, 592 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291206,7 +289401,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2512 + ori $a2, $a2, 2496 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291215,11 +289410,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1024 + ori $a2, $a2, 576 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2496 + ori $a2, $a2, 2480 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291228,11 +289423,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1008 + ori $a2, $a2, 560 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2480 + ori $a2, $a2, 2464 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291241,11 +289436,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 992 + ori $a2, $a2, 544 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2464 + ori $a2, $a2, 2448 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291254,11 +289449,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 976 + ori $a2, $a2, 528 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2448 + ori $a2, $a2, 2432 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291267,11 +289462,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 960 + ori $a2, $a2, 512 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2432 + ori $a2, $a2, 2416 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291280,11 +289475,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 944 + ori $a2, $a2, 496 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2416 + ori $a2, $a2, 2400 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291293,11 +289488,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 928 + ori $a2, $a2, 480 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2400 + ori $a2, $a2, 2384 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291306,11 +289501,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 912 + ori $a2, $a2, 464 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2384 + ori $a2, $a2, 2368 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291319,11 +289514,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 896 + ori $a2, $a2, 448 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2368 + ori $a2, $a2, 2352 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291332,11 +289527,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 880 + ori $a2, $a2, 432 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2352 + ori $a2, $a2, 2336 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291345,11 +289540,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 864 + ori $a2, $a2, 416 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2336 + ori $a2, $a2, 2320 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291358,11 +289553,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 848 + ori $a2, $a2, 400 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2320 + ori $a2, $a2, 2304 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291374,12 +289569,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2304 + ori $a2, $a2, 2288 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 832 + ori $a2, $a2, 384 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291387,12 +289582,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2288 + ori $a2, $a2, 2272 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 816 + ori $a2, $a2, 368 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291400,12 +289595,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2272 + ori $a2, $a2, 2256 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 800 + ori $a2, $a2, 352 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291413,12 +289608,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2256 + ori $a2, $a2, 2240 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 784 + ori $a2, $a2, 336 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291426,12 +289621,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2240 + ori $a2, $a2, 2224 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 768 + ori $a2, $a2, 320 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 @@ -291439,12 +289634,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2224 + ori $a2, $a2, 2208 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 752 + ori $a2, $a2, 304 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291452,67 +289647,67 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2208 + ori $a2, $a2, 2192 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 736 + ori $a2, $a2, 288 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 vst $vr23, $sp, 2032 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2192 + ori $a2, $a2, 2176 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 720 + ori $a2, $a2, 272 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 vst $vr22, $sp, 2016 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2176 + ori $a2, $a2, 2160 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 704 + ori $a2, $a2, 256 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 vst $vr23, $sp, 2000 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2160 + ori $a2, $a2, 2144 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 688 + ori $a2, $a2, 240 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 vst $vr22, $sp, 1984 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2144 + ori $a2, $a2, 2128 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 lu12i.w $a2, 1 - ori $a2, $a2, 672 + ori $a2, $a2, 224 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 vst $vr23, $sp, 1968 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2128 + ori $a2, $a2, 2112 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 lu12i.w $a2, 1 - ori $a2, $a2, 656 + ori $a2, $a2, 208 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 @@ -291520,51 +289715,51 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2112 + ori $a2, $a2, 2096 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 vst $vr24, $sp, 1952 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 640 + ori $a2, $a2, 192 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2096 + ori $a2, $a2, 2080 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 vst $vr24, $sp, 1936 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 624 + ori $a2, $a2, 176 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2080 + ori $a2, $a2, 2064 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 vst $vr24, $sp, 1920 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 608 + ori $a2, $a2, 160 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2064 + ori $a2, $a2, 2048 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 vst $vr24, $sp, 1904 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 592 + ori $a2, $a2, 144 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2048 + ori $a2, $a2, 2032 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291573,11 +289768,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1312 + ori $a2, $a2, 880 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2032 + ori $a2, $a2, 2016 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr24, $vr22, 1 @@ -291586,11 +289781,11 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr24, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1280 + ori $a2, $a2, 848 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2016 + ori $a2, $a2, 2000 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 vreplvei.d $vr24, $vr23, 1 @@ -291598,12 +289793,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr24, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 2000 + ori $a2, $a2, 1984 add.d $a2, $sp, $a2 vld $vr24, $a2, 0 vreplvei.d $vr23, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1248 + ori $a2, $a2, 816 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr23, $vr22, 1 @@ -291611,12 +289806,12 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 add.d $a2, $sp, $a2 vst $vr23, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 1984 + ori $a2, $a2, 1968 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 vreplvei.d $vr22, $vr22, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1200 + ori $a2, $a2, 768 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr24, 1 @@ -291625,7 +289820,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr22, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr24, 0 lu12i.w $a2, 1 - ori $a2, $a2, 2208 + ori $a2, $a2, 736 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr23, 1 @@ -291634,1376 +289829,1361 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr22, $a2, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr23, 0 lu12i.w $a2, 1 - ori $a2, $a2, 1152 + ori $a2, $a2, 704 add.d $a2, $sp, $a2 vst $vr22, $a2, 0 # 16-byte Folded Spill lu12i.w $a2, 2 - ori $a2, $a2, 1968 + ori $a2, $a2, 1952 add.d $a2, $sp, $a2 vld $vr22, $a2, 0 + addi.d $t4, $t4, 1 lu12i.w $a2, 2 - ori $a2, $a2, 1944 - add.d $a2, $sp, $a2 - ld.d $a2, $a2, 0 # 8-byte Folded Reload - addi.d $a2, $a2, 1 - lu12i.w $a5, 2 - ori $a5, $a5, 1944 - add.d $a5, $sp, $a5 - st.d $a2, $a5, 0 # 8-byte Folded Spill - lu12i.w $a2, 2 - ori $a2, $a2, 1952 + ori $a2, $a2, 1936 add.d $a2, $sp, $a2 vld $vr23, $a2, 0 - fldx.d $fs2, $a3, $t1 - lu12i.w $a2, 2 - ori $a2, $a2, 1944 - add.d $a2, $sp, $a2 - ld.d $t1, $a2, 0 # 8-byte Folded Reload - ori $a2, $zero, 2176 - add.d $a2, $sp, $a2 - vst $vr26, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr26, $vr22, 1 - ori $a2, $zero, 2384 - add.d $a2, $sp, $a2 - vst $vr26, $a2, 0 # 16-byte Folded Spill + fldx.d $fs1, $a1, $t1 + ori $a1, $zero, 2176 + add.d $a1, $sp, $a1 + vst $vr25, $a1, 0 # 16-byte Folded Spill + vreplvei.d $vr25, $vr22, 1 + ori $a1, $zero, 2384 + add.d $a1, $sp, $a1 + vst $vr25, $a1, 0 # 16-byte Folded Spill vreplvei.d $vr22, $vr22, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 1088 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr22, $vr23, 1 - ori $a2, $zero, 2368 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - vreplvei.d $vr22, $vr23, 0 - lu12i.w $a2, 1 - ori $a2, $a2, 2192 - add.d $a2, $sp, $a2 - vst $vr22, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 25 - beq $t1, $a2, .LBB16_3 + vreplvei.d $vr24, $vr23, 1 + ori $a1, $zero, 2368 + add.d $a1, $sp, $a1 + vst $vr24, $a1, 0 # 16-byte Folded Spill + vreplvei.d $vr23, $vr23, 0 + lu12i.w $a1, 1 + ori $a1, $a1, 640 + add.d $a1, $sp, $a1 + vst $vr23, $a1, 0 # 16-byte Folded Spill + ori $t1, $zero, 25 + beq $t4, $t1, .LBB16_3 b .LBB16_2 .LBB16_3: # in Loop: Header=BB16_1 Depth=1 - ori $a2, $zero, 3776 - add.d $a2, $sp, $a2 - vst $vr0, $a2, 0 # 16-byte Folded Spill - ori $a2, $zero, 4064 - add.d $a2, $sp, $a2 - vst $vr31, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - add.d $a2, $sp, $a2 - vst $vr29, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 16 - add.d $a2, $sp, $a2 - vst $vr27, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 48 - add.d $a2, $sp, $a2 - vst $vr25, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 64 - add.d $a2, $sp, $a2 - vst $vr20, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 96 - add.d $a2, $sp, $a2 - vst $vr18, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 112 - add.d $a2, $sp, $a2 - vst $vr16, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 144 - add.d $a2, $sp, $a2 - vst $vr14, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 176 - add.d $a2, $sp, $a2 - vst $vr12, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 192 - add.d $a2, $sp, $a2 - vst $vr10, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 224 - add.d $a2, $sp, $a2 - vst $vr8, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 272 - add.d $a2, $sp, $a2 - vst $vr6, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 288 - add.d $a2, $sp, $a2 - vst $vr4, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 304 - add.d $a2, $sp, $a2 - vst $vr2, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 368 - add.d $a2, $sp, $a2 - vst $vr30, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 384 - add.d $a2, $sp, $a2 - vst $vr28, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 416 - add.d $a2, $sp, $a2 - vst $vr21, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 432 - add.d $a2, $sp, $a2 - vst $vr19, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 448 - add.d $a2, $sp, $a2 - vst $vr17, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 464 - add.d $a2, $sp, $a2 - vst $vr15, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 480 - add.d $a2, $sp, $a2 - vst $vr13, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 496 - add.d $a2, $sp, $a2 - vst $vr11, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 512 - add.d $a2, $sp, $a2 - vst $vr9, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 528 - add.d $a2, $sp, $a2 - vst $vr7, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 544 - add.d $a2, $sp, $a2 - vst $vr5, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 560 - add.d $a2, $sp, $a2 - vst $vr3, $a2, 0 # 16-byte Folded Spill - lu12i.w $a2, 1 - ori $a2, $a2, 576 - add.d $a2, $sp, $a2 - vst $vr1, $a2, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2192 + add.d $a1, $sp, $a1 + vst $vr22, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1744 + add.d $a1, $sp, $a1 + vst $vr30, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1760 + add.d $a1, $sp, $a1 + vst $vr28, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1776 + add.d $a1, $sp, $a1 + vst $vr26, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1792 + add.d $a1, $sp, $a1 + vst $vr21, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1808 + add.d $a1, $sp, $a1 + vst $vr19, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1824 + add.d $a1, $sp, $a1 + vst $vr17, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1840 + add.d $a1, $sp, $a1 + vst $vr15, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1856 + add.d $a1, $sp, $a1 + vst $vr13, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1872 + add.d $a1, $sp, $a1 + vst $vr11, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1888 + add.d $a1, $sp, $a1 + vst $vr9, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1904 + add.d $a1, $sp, $a1 + vst $vr7, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1920 + add.d $a1, $sp, $a1 + vst $vr5, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1936 + add.d $a1, $sp, $a1 + vst $vr3, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1952 + add.d $a1, $sp, $a1 + vst $vr1, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1968 + add.d $a1, $sp, $a1 + vst $vr31, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 1984 + add.d $a1, $sp, $a1 + vst $vr29, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2000 + add.d $a1, $sp, $a1 + vst $vr27, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2016 + add.d $a1, $sp, $a1 + vst $vr20, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2032 + add.d $a1, $sp, $a1 + vst $vr18, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2048 + add.d $a1, $sp, $a1 + vst $vr16, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2064 + add.d $a1, $sp, $a1 + vst $vr14, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2080 + add.d $a1, $sp, $a1 + vst $vr12, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2096 + add.d $a1, $sp, $a1 + vst $vr10, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2112 + add.d $a1, $sp, $a1 + vst $vr8, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2128 + add.d $a1, $sp, $a1 + vst $vr6, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2144 + add.d $a1, $sp, $a1 + vst $vr4, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2160 + add.d $a1, $sp, $a1 + vst $vr2, $a1, 0 # 16-byte Folded Spill + lu12i.w $a1, 1 + ori $a1, $a1, 2176 + add.d $a1, $sp, $a1 + vst $vr0, $a1, 0 # 16-byte Folded Spill ld.d $t6, $sp, 24 # 8-byte Folded Reload addi.d $t6, $t6, 1 - lu12i.w $a2, 1 - ori $a2, $a2, 2184 - add.d $a2, $sp, $a2 - ld.d $a2, $a2, 0 # 8-byte Folded Reload - addi.d $a2, $a2, 25 - lu12i.w $a3, 1 - ori $a3, $a3, 2184 - add.d $a3, $sp, $a3 - st.d $a2, $a3, 0 # 8-byte Folded Spill + ld.d $t0, $sp, 1864 # 8-byte Folded Reload + addi.d $t0, $t0, 25 + st.d $t0, $sp, 1864 # 8-byte Folded Spill ori $t0, $zero, 11 beq $t6, $t0, .LBB16_4 b .LBB16_1 .LBB16_4: + vld $vr0, $sp, 1952 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1952 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 1936 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1936 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 1920 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1920 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 1904 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1904 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1312 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2480 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 1312 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2464 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2464 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2448 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2448 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2432 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2432 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2416 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2416 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2400 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2400 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2384 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2384 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2368 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2368 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2144 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2144 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2128 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2128 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2112 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2112 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2096 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2096 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2080 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2080 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2064 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2064 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 304 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2048 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 288 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 2032 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 2032 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 2016 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 2016 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 2000 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 2000 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 1984 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1984 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr0, $sp, 1968 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - vld $vr0, $sp, 1968 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2352 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2352 + vextrins.d $vr1, $vr0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 576 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2336 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 560 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2320 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2336 + vextrins.d $vr1, $vr0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 544 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2304 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 528 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2288 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2320 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2272 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2304 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2256 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2288 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2240 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2272 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2224 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2256 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2208 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2240 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2192 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2224 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2160 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2208 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2672 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2192 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 864 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2656 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2160 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2640 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2672 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2624 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2656 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2608 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2640 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2592 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2624 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2576 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2608 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2560 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2592 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2544 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2576 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2528 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2560 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2512 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2544 + vextrins.d $vr1, $vr0, 16 + lu12i.w $a0, 1 + ori $a0, $a0, 608 + add.d $a0, $sp, $a0 + vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2496 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 592 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2896 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2528 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2880 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2512 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill + ori $a0, $zero, 2864 + add.d $a0, $sp, $a0 + vld $vr0, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2496 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1504 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2896 + ori $a0, $zero, 2832 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 1504 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2880 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2864 + ori $a0, $zero, 2816 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 1472 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2832 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1440 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2816 + ori $a0, $zero, 2800 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 1440 - add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 2800 - add.d $a0, $sp, $a0 - vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill - lu12i.w $a0, 1 - ori $a0, $a0, 1408 - add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 2784 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2768 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2752 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2736 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2720 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2704 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3104 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3088 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3072 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3056 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3040 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3024 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3008 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2992 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2960 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2944 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2928 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 2912 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3408 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3376 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3344 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3312 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3280 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3248 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3216 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3200 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3184 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3168 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3152 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3136 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3728 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3696 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3680 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3648 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3632 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3600 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3584 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3552 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3536 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3504 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 4032 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 4016 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3984 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3968 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload - vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vst $vr1, $a0, 0 # 16-byte Folded Spill + vld $vr1, $a0, 0 # 16-byte Folded Reload + vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 - vld $vr1, $a0, 0 # 16-byte Folded Reload + vst $vr1, $a0, 0 # 16-byte Folded Spill ori $a0, $zero, 3952 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload + lu12i.w $a0, 1 + ori $a0, $a0, 1664 + add.d $a0, $sp, $a0 + vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr1, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vst $vr1, $a0, 0 # 16-byte Folded Spill lu12i.w $a0, 1 - ori $a0, $a0, 256 + ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr31, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3936 @@ -293011,7 +291191,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr31, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 240 + ori $a0, $a0, 64 add.d $a0, $sp, $a0 vld $vr30, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3920 @@ -293019,7 +291199,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr30, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 208 + ori $a0, $a0, 48 add.d $a0, $sp, $a0 vld $vr28, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3904 @@ -293027,7 +291207,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr28, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 160 + ori $a0, $a0, 32 add.d $a0, $sp, $a0 vld $vr24, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3888 @@ -293035,7 +291215,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr24, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 128 + ori $a0, $a0, 16 add.d $a0, $sp, $a0 vld $vr25, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3872 @@ -293043,15 +291223,13 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr25, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 80 add.d $a0, $sp, $a0 vld $vr26, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr26, $vr0, 16 - lu12i.w $a0, 1 - ori $a0, $a0, 32 + ori $a0, $zero, 4080 add.d $a0, $sp, $a0 vld $vr27, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 3840 @@ -293059,104 +291237,106 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr27, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 512 + ori $a0, $a0, 2112 add.d $a0, $sp, $a0 vld $vr29, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 224 + ori $a0, $a0, 1904 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr29, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 496 + ori $a0, $a0, 2096 add.d $a0, $sp, $a0 vld $vr23, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 192 + ori $a0, $a0, 1888 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr23, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 480 + ori $a0, $a0, 2080 add.d $a0, $sp, $a0 vld $vr22, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 176 + ori $a0, $a0, 1872 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr22, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 464 + ori $a0, $a0, 2064 add.d $a0, $sp, $a0 vld $vr21, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 144 + ori $a0, $a0, 1856 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr21, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 448 + ori $a0, $a0, 2048 add.d $a0, $sp, $a0 vld $vr20, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 112 + ori $a0, $a0, 1840 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr20, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 432 + ori $a0, $a0, 2032 add.d $a0, $sp, $a0 vld $vr18, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 96 + ori $a0, $a0, 1824 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr18, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 416 + ori $a0, $a0, 2016 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 64 + ori $a0, $a0, 1808 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr3, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 400 + ori $a0, $a0, 128 add.d $a0, $sp, $a0 vld $vr10, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 48 + ori $a0, $a0, 1792 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr10, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 384 + ori $a0, $a0, 2000 add.d $a0, $sp, $a0 vld $vr11, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 16 + ori $a0, $a0, 1776 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr11, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 368 + ori $a0, $a0, 1984 add.d $a0, $sp, $a0 vld $vr12, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 + ori $a0, $a0, 1760 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr12, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 352 + ori $a0, $a0, 1968 add.d $a0, $sp, $a0 vld $vr13, $a0, 0 # 16-byte Folded Reload - ori $a0, $zero, 4064 + lu12i.w $a0, 1 + ori $a0, $a0, 1744 add.d $a0, $sp, $a0 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr13, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 320 + ori $a0, $a0, 96 add.d $a0, $sp, $a0 vld $vr15, $a0, 0 # 16-byte Folded Reload ori $a0, $zero, 4048 @@ -293164,29 +291344,29 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr0, $a0, 0 # 16-byte Folded Reload vextrins.d $vr15, $vr0, 16 lu12i.w $a0, 1 - ori $a0, $a0, 576 + ori $a0, $a0, 2176 add.d $a0, $sp, $a0 vld $vr19, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 304 + ori $a0, $a0, 1952 add.d $a0, $sp, $a0 vld $vr1, $a0, 0 # 16-byte Folded Reload vextrins.d $vr19, $vr1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 560 + ori $a0, $a0, 2160 add.d $a0, $sp, $a0 vld $vr17, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 288 + ori $a0, $a0, 1936 add.d $a0, $sp, $a0 vld $vr2, $a0, 0 # 16-byte Folded Reload vextrins.d $vr17, $vr2, 16 lu12i.w $a0, 1 - ori $a0, $a0, 544 + ori $a0, $a0, 2144 add.d $a0, $sp, $a0 vld $vr16, $a0, 0 # 16-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 272 + ori $a0, $a0, 1920 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vextrins.d $vr16, $vr14, 16 @@ -293255,57 +291435,57 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vextrins.d $vr0, $vr14, 16 ld.d $a1, $sp, 16 # 8-byte Folded Reload lu12i.w $a0, 1 - ori $a0, $a0, 2192 + ori $a0, $a0, 640 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 0 lu12i.w $a0, 1 - ori $a0, $a0, 1088 + ori $a0, $a0, 2192 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 16 lu12i.w $a0, 1 - ori $a0, $a0, 1152 + ori $a0, $a0, 704 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 32 lu12i.w $a0, 1 - ori $a0, $a0, 2208 + ori $a0, $a0, 736 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 48 lu12i.w $a0, 1 - ori $a0, $a0, 1200 + ori $a0, $a0, 768 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 64 lu12i.w $a0, 1 - ori $a0, $a0, 1248 + ori $a0, $a0, 816 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 80 lu12i.w $a0, 1 - ori $a0, $a0, 1280 + ori $a0, $a0, 848 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 96 lu12i.w $a0, 1 - ori $a0, $a0, 1312 + ori $a0, $a0, 880 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 112 lu12i.w $a0, 1 - ori $a0, $a0, 592 + ori $a0, $a0, 144 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 128 lu12i.w $a0, 1 - ori $a0, $a0, 608 + ori $a0, $a0, 160 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 144 lu12i.w $a0, 1 - ori $a0, $a0, 624 + ori $a0, $a0, 176 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 160 @@ -293314,62 +291494,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 192 lu12i.w $a0, 1 - ori $a0, $a0, 640 + ori $a0, $a0, 192 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 176 lu12i.w $a0, 1 - ori $a0, $a0, 656 + ori $a0, $a0, 208 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 200 lu12i.w $a0, 1 - ori $a0, $a0, 672 + ori $a0, $a0, 224 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 216 lu12i.w $a0, 1 - ori $a0, $a0, 688 + ori $a0, $a0, 240 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 232 lu12i.w $a0, 1 - ori $a0, $a0, 704 + ori $a0, $a0, 256 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 248 lu12i.w $a0, 1 - ori $a0, $a0, 720 + ori $a0, $a0, 272 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 264 lu12i.w $a0, 1 - ori $a0, $a0, 736 + ori $a0, $a0, 288 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 280 lu12i.w $a0, 1 - ori $a0, $a0, 752 + ori $a0, $a0, 304 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 296 lu12i.w $a0, 1 - ori $a0, $a0, 768 + ori $a0, $a0, 320 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 312 lu12i.w $a0, 1 - ori $a0, $a0, 784 + ori $a0, $a0, 336 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 328 lu12i.w $a0, 1 - ori $a0, $a0, 800 + ori $a0, $a0, 352 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 344 lu12i.w $a0, 1 - ori $a0, $a0, 816 + ori $a0, $a0, 368 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 360 @@ -293378,62 +291558,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 392 lu12i.w $a0, 1 - ori $a0, $a0, 832 + ori $a0, $a0, 384 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 376 lu12i.w $a0, 1 - ori $a0, $a0, 848 + ori $a0, $a0, 400 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 400 lu12i.w $a0, 1 - ori $a0, $a0, 864 + ori $a0, $a0, 416 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 416 lu12i.w $a0, 1 - ori $a0, $a0, 880 + ori $a0, $a0, 432 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 432 lu12i.w $a0, 1 - ori $a0, $a0, 896 + ori $a0, $a0, 448 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 448 lu12i.w $a0, 1 - ori $a0, $a0, 912 + ori $a0, $a0, 464 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 464 lu12i.w $a0, 1 - ori $a0, $a0, 928 + ori $a0, $a0, 480 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 480 lu12i.w $a0, 1 - ori $a0, $a0, 944 + ori $a0, $a0, 496 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 496 lu12i.w $a0, 1 - ori $a0, $a0, 960 + ori $a0, $a0, 512 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 512 lu12i.w $a0, 1 - ori $a0, $a0, 976 + ori $a0, $a0, 528 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 528 lu12i.w $a0, 1 - ori $a0, $a0, 992 + ori $a0, $a0, 544 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 544 lu12i.w $a0, 1 - ori $a0, $a0, 1008 + ori $a0, $a0, 560 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 560 @@ -293442,62 +291622,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 592 lu12i.w $a0, 1 - ori $a0, $a0, 1024 + ori $a0, $a0, 576 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 576 lu12i.w $a0, 1 - ori $a0, $a0, 1040 + ori $a0, $a0, 592 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 600 lu12i.w $a0, 1 - ori $a0, $a0, 1056 + ori $a0, $a0, 608 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 616 lu12i.w $a0, 1 - ori $a0, $a0, 1072 + ori $a0, $a0, 624 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 632 lu12i.w $a0, 1 - ori $a0, $a0, 1104 + ori $a0, $a0, 656 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 648 lu12i.w $a0, 1 - ori $a0, $a0, 1120 + ori $a0, $a0, 672 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 664 lu12i.w $a0, 1 - ori $a0, $a0, 1136 + ori $a0, $a0, 688 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 680 lu12i.w $a0, 1 - ori $a0, $a0, 1168 + ori $a0, $a0, 720 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 696 lu12i.w $a0, 1 - ori $a0, $a0, 1184 + ori $a0, $a0, 752 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 712 lu12i.w $a0, 1 - ori $a0, $a0, 1216 + ori $a0, $a0, 784 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 728 lu12i.w $a0, 1 - ori $a0, $a0, 1232 + ori $a0, $a0, 800 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 744 lu12i.w $a0, 1 - ori $a0, $a0, 1264 + ori $a0, $a0, 832 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 760 @@ -293506,62 +291686,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 792 lu12i.w $a0, 1 - ori $a0, $a0, 1296 + ori $a0, $a0, 864 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 776 lu12i.w $a0, 1 - ori $a0, $a0, 1328 + ori $a0, $a0, 896 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 800 lu12i.w $a0, 1 - ori $a0, $a0, 1344 + ori $a0, $a0, 912 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 816 lu12i.w $a0, 1 - ori $a0, $a0, 1360 + ori $a0, $a0, 928 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 832 lu12i.w $a0, 1 - ori $a0, $a0, 1376 + ori $a0, $a0, 944 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 848 lu12i.w $a0, 1 - ori $a0, $a0, 1392 + ori $a0, $a0, 960 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 864 lu12i.w $a0, 1 - ori $a0, $a0, 1408 + ori $a0, $a0, 976 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 880 lu12i.w $a0, 1 - ori $a0, $a0, 1424 + ori $a0, $a0, 992 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 896 lu12i.w $a0, 1 - ori $a0, $a0, 1440 + ori $a0, $a0, 1008 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 912 lu12i.w $a0, 1 - ori $a0, $a0, 1456 + ori $a0, $a0, 1024 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 928 lu12i.w $a0, 1 - ori $a0, $a0, 1472 + ori $a0, $a0, 1040 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 944 lu12i.w $a0, 1 - ori $a0, $a0, 1488 + ori $a0, $a0, 1056 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 960 @@ -293570,62 +291750,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 992 lu12i.w $a0, 1 - ori $a0, $a0, 1504 + ori $a0, $a0, 1072 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 976 lu12i.w $a0, 1 - ori $a0, $a0, 1520 + ori $a0, $a0, 1088 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1000 lu12i.w $a0, 1 - ori $a0, $a0, 1536 + ori $a0, $a0, 1104 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1016 lu12i.w $a0, 1 - ori $a0, $a0, 1552 + ori $a0, $a0, 1120 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1032 lu12i.w $a0, 1 - ori $a0, $a0, 1568 + ori $a0, $a0, 1136 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1048 lu12i.w $a0, 1 - ori $a0, $a0, 1584 + ori $a0, $a0, 1152 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1064 lu12i.w $a0, 1 - ori $a0, $a0, 1600 + ori $a0, $a0, 1168 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1080 lu12i.w $a0, 1 - ori $a0, $a0, 1616 + ori $a0, $a0, 1184 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1096 lu12i.w $a0, 1 - ori $a0, $a0, 1632 + ori $a0, $a0, 1200 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1112 lu12i.w $a0, 1 - ori $a0, $a0, 1648 + ori $a0, $a0, 1216 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1128 lu12i.w $a0, 1 - ori $a0, $a0, 1664 + ori $a0, $a0, 1232 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1144 lu12i.w $a0, 1 - ori $a0, $a0, 1680 + ori $a0, $a0, 1248 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1160 @@ -293634,62 +291814,62 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 1192 lu12i.w $a0, 1 - ori $a0, $a0, 1696 + ori $a0, $a0, 1264 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1176 lu12i.w $a0, 1 - ori $a0, $a0, 1712 + ori $a0, $a0, 1280 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1200 lu12i.w $a0, 1 - ori $a0, $a0, 1728 + ori $a0, $a0, 1296 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1216 lu12i.w $a0, 1 - ori $a0, $a0, 1744 + ori $a0, $a0, 1312 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1232 lu12i.w $a0, 1 - ori $a0, $a0, 1760 + ori $a0, $a0, 1328 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1248 lu12i.w $a0, 1 - ori $a0, $a0, 1776 + ori $a0, $a0, 1344 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1264 lu12i.w $a0, 1 - ori $a0, $a0, 1792 + ori $a0, $a0, 1360 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1280 lu12i.w $a0, 1 - ori $a0, $a0, 1808 + ori $a0, $a0, 1376 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1296 lu12i.w $a0, 1 - ori $a0, $a0, 1824 + ori $a0, $a0, 1392 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1312 lu12i.w $a0, 1 - ori $a0, $a0, 1840 + ori $a0, $a0, 1408 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1328 lu12i.w $a0, 1 - ori $a0, $a0, 1856 + ori $a0, $a0, 1424 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1344 lu12i.w $a0, 1 - ori $a0, $a0, 1872 + ori $a0, $a0, 1440 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1360 @@ -293698,71 +291878,71 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 1392 lu12i.w $a0, 1 - ori $a0, $a0, 1888 + ori $a0, $a0, 1456 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1376 lu12i.w $a0, 1 - ori $a0, $a0, 1904 + ori $a0, $a0, 1472 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1400 lu12i.w $a0, 1 - ori $a0, $a0, 1920 + ori $a0, $a0, 1488 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1416 lu12i.w $a0, 1 - ori $a0, $a0, 1936 + ori $a0, $a0, 1504 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1432 lu12i.w $a0, 1 - ori $a0, $a0, 1952 + ori $a0, $a0, 1520 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1448 lu12i.w $a0, 1 - ori $a0, $a0, 1968 + ori $a0, $a0, 1536 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1464 lu12i.w $a0, 1 - ori $a0, $a0, 1984 + ori $a0, $a0, 1552 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1480 lu12i.w $a0, 1 - ori $a0, $a0, 2000 + ori $a0, $a0, 1568 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1496 lu12i.w $a0, 1 - ori $a0, $a0, 2016 + ori $a0, $a0, 1584 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1512 lu12i.w $a0, 1 - ori $a0, $a0, 2032 + ori $a0, $a0, 1600 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1528 lu12i.w $a0, 1 - ori $a0, $a0, 2048 + ori $a0, $a0, 1616 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1544 lu12i.w $a0, 1 - ori $a0, $a0, 2064 + ori $a0, $a0, 1632 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1560 - ori $a0, $zero, 4080 + ori $a0, $zero, 4064 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 1592 lu12i.w $a0, 1 - ori $a0, $a0, 2080 + ori $a0, $a0, 1648 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1576 @@ -293774,32 +291954,32 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr30, $a1, 1680 vst $vr31, $a1, 1696 lu12i.w $a0, 1 - ori $a0, $a0, 2096 + ori $a0, $a0, 1664 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1712 lu12i.w $a0, 1 - ori $a0, $a0, 2112 + ori $a0, $a0, 1680 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1728 lu12i.w $a0, 1 - ori $a0, $a0, 2128 + ori $a0, $a0, 1696 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1744 lu12i.w $a0, 1 - ori $a0, $a0, 2144 + ori $a0, $a0, 1712 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1760 lu12i.w $a0, 1 - ori $a0, $a0, 336 + ori $a0, $a0, 112 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload fst.d $ft6, $a1, 1792 lu12i.w $a0, 1 - ori $a0, $a0, 2160 + ori $a0, $a0, 1728 add.d $a0, $sp, $a0 vld $vr14, $a0, 0 # 16-byte Folded Reload vst $vr14, $a1, 1776 @@ -293815,7 +291995,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr22, $a1, 1944 vst $vr23, $a1, 1960 lu12i.w $a0, 1 - ori $a0, $a0, 528 + ori $a0, $a0, 2128 add.d $a0, $sp, $a0 vld $vr3, $a0, 0 # 16-byte Folded Reload fst.d $fa3, $a1, 1992 @@ -293847,7 +292027,7 @@ _Z12multiplySpecIdLj25ELj19ELj11EEvPT_S1_S1_: # @_Z12multiplySpecIdLj25ELj19ELj1 vst $vr17, $a1, 2016 vst $vr19, $a1, 2032 lu12i.w $a0, 31 - ori $a0, $a0, 2128 + ori $a0, $a0, 2112 add.d $sp, $sp, $a0 fld.d $fs7, $sp, 1880 # 8-byte Folded Reload fld.d $fs6, $sp, 1888 # 8-byte Folded Reload diff --git a/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.data16.dir/crc8.le.data16.s b/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.data16.dir/crc8.le.data16.s index 68159c00..6ded6e10 100644 --- a/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.data16.dir/crc8.le.data16.s +++ b/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.data16.dir/crc8.le.data16.s @@ -157,6 +157,7 @@ main: # @main ori $a2, $zero, 7 ori $t5, $zero, 1 ori $t4, $zero, 8 + ld.d $s1, $sp, 72 # 8-byte Folded Reload b .LBB0_5 .p2align 4, , 16 .LBB0_4: # %crc_table.exit @@ -264,7 +265,6 @@ main: # @main st.b $s5, $a1, 250 vpickve2gr.b $s5, $vr2, 15 st.b $s5, $a1, 254 - ld.d $s1, $sp, 72 # 8-byte Folded Reload xori $a4, $s1, 29 st.d $a4, $sp, 120 # 8-byte Folded Spill st.b $a4, $a1, 128 diff --git a/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.dir/crc8.le.s b/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.dir/crc8.le.s index a0eb17f1..6fca1c09 100644 --- a/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.dir/crc8.le.s +++ b/results/SingleSource/UnitTests/HashRecognize/CMakeFiles/crc8.le.dir/crc8.le.s @@ -153,6 +153,7 @@ main: # @main ori $a2, $zero, 7 ori $t5, $zero, 1 ori $t4, $zero, 8 + ld.d $s1, $sp, 72 # 8-byte Folded Reload b .LBB0_5 .p2align 4, , 16 .LBB0_4: # %crc_table.exit @@ -253,7 +254,6 @@ main: # @main st.b $s5, $a1, 250 vpickve2gr.b $s5, $vr2, 15 st.b $s5, $a1, 254 - ld.d $s1, $sp, 72 # 8-byte Folded Reload xori $a4, $s1, 29 st.d $a4, $sp, 120 # 8-byte Folded Spill st.b $a4, $a1, 128 diff --git a/results/SingleSource/UnitTests/SignlessTypes/Large/CMakeFiles/cast.dir/cast.s b/results/SingleSource/UnitTests/SignlessTypes/Large/CMakeFiles/cast.dir/cast.s index 2a0d6588..d155c002 100644 --- a/results/SingleSource/UnitTests/SignlessTypes/Large/CMakeFiles/cast.dir/cast.s +++ b/results/SingleSource/UnitTests/SignlessTypes/Large/CMakeFiles/cast.dir/cast.s @@ -69,6 +69,9 @@ main: # @main pcalau12i $a0, %pc_hi20(.L.str.9) addi.d $a0, $a0, %pc_lo12(.L.str.9) st.d $a0, $sp, 128 # 8-byte Folded Spill + ld.d $s5, $sp, 40 # 8-byte Folded Reload + ld.d $s6, $sp, 32 # 8-byte Folded Reload + ld.d $s7, $sp, 24 # 8-byte Folded Reload .p2align 4, , 16 .LBB0_3: # =>This Inner Loop Header: Depth=1 st.d $a1, $sp, 120 # 8-byte Folded Spill @@ -148,7 +151,6 @@ main: # @main bstrpick.d $fp, $s0, 15, 0 move $a0, $s1 move $a1, $s0 - ld.d $s5, $sp, 40 # 8-byte Folded Reload move $a2, $s5 move $a3, $s5 move $a4, $s5 @@ -161,7 +163,6 @@ main: # @main move $a1, $s0 move $a2, $s5 move $a3, $s5 - ld.d $s6, $sp, 32 # 8-byte Folded Reload move $a4, $s6 move $s2, $a5 pcaddu18i $ra, %call36(printf) @@ -218,7 +219,6 @@ main: # @main jirl $ra, $ra, 0 move $a0, $s1 move $a1, $s0 - ld.d $s7, $sp, 24 # 8-byte Folded Reload move $a2, $s7 move $a3, $s7 move $a4, $s7 diff --git a/results/SingleSource/UnitTests/Vectorizer/VPlanNativePath/CMakeFiles/outer-loop-vect.dir/outer-loop-vect.s b/results/SingleSource/UnitTests/Vectorizer/VPlanNativePath/CMakeFiles/outer-loop-vect.dir/outer-loop-vect.s index 6bc8b38b..d405406e 100644 --- a/results/SingleSource/UnitTests/Vectorizer/VPlanNativePath/CMakeFiles/outer-loop-vect.dir/outer-loop-vect.s +++ b/results/SingleSource/UnitTests/Vectorizer/VPlanNativePath/CMakeFiles/outer-loop-vect.dir/outer-loop-vect.s @@ -1098,6 +1098,13 @@ main: # @main ori $a4, $zero, 45 ori $a5, $zero, 120 lu12i.w $s1, 1 + vld $vr2, $sp, 320 # 16-byte Folded Reload + vld $vr4, $sp, 304 # 16-byte Folded Reload + vld $vr27, $sp, 288 # 16-byte Folded Reload + vld $vr29, $sp, 272 # 16-byte Folded Reload + vld $vr31, $sp, 256 # 16-byte Folded Reload + vld $vr19, $sp, 240 # 16-byte Folded Reload + vld $vr0, $sp, 224 # 16-byte Folded Reload .p2align 4, , 16 .LBB0_74: # %vector.body366 # =>This Loop Header: Depth=1 @@ -1109,13 +1116,6 @@ main: # @main vmadd.d $vr22, $vr17, $vr7 vld $vr10, $sp, 336 # 16-byte Folded Reload vori.b $vr9, $vr10, 0 - vld $vr2, $sp, 320 # 16-byte Folded Reload - vld $vr4, $sp, 304 # 16-byte Folded Reload - vld $vr27, $sp, 288 # 16-byte Folded Reload - vld $vr29, $sp, 272 # 16-byte Folded Reload - vld $vr31, $sp, 256 # 16-byte Folded Reload - vld $vr19, $sp, 240 # 16-byte Folded Reload - vld $vr0, $sp, 224 # 16-byte Folded Reload .p2align 4, , 16 .LBB0_75: # %.preheader.i183369 # Parent Loop BB0_74 Depth=1