From 5d05638b0c4b1d0d018ec7f2b728b9bff2c10eab Mon Sep 17 00:00:00 2001 From: David Kiliani Date: Sat, 17 Sep 2011 20:23:41 +0200 Subject: [PATCH 1/2] Add support for the Olimex STM32 H103 board. Pin layout and header files for the STM32 H103 prototype board from Olimex featuring an STM32F103RBT6 chip. This commit contains all necessary changes to compile with BOARD=olimex_stm32_h103. Signed-off-by: David Kiliani --- libmaple/usb/usb_config.h | 6 ++ support/ld/olimex_stm32_h103 | 1 + support/make/target-config.mk | 10 +++ wirish/boards.h | 2 + wirish/boards/olimex_stm32_h103.cpp | 122 ++++++++++++++++++++++++++++ wirish/boards/olimex_stm32_h103.h | 88 ++++++++++++++++++++ wirish/rules.mk | 1 + 7 files changed, 230 insertions(+) create mode 120000 support/ld/olimex_stm32_h103 create mode 100644 wirish/boards/olimex_stm32_h103.cpp create mode 100644 wirish/boards/olimex_stm32_h103.h diff --git a/libmaple/usb/usb_config.h b/libmaple/usb/usb_config.h index 23b49eeab..62a6a7127 100644 --- a/libmaple/usb/usb_config.h +++ b/libmaple/usb/usb_config.h @@ -47,6 +47,12 @@ #define USB_DISC_DEV GPIOB #define USB_DISC_PIN 8 +#elif defined(BOARD_olimex_stm32_h103) + + #define VCOM_ID_PRODUCT 0x0004 + #define USB_DISC_DEV GPIOC + #define USB_DISC_PIN 11 + #else #error ("Sorry! the USB stack relies on LeafLabs board-specific " \ diff --git a/support/ld/olimex_stm32_h103 b/support/ld/olimex_stm32_h103 new file mode 120000 index 000000000..2d8bbedc1 --- /dev/null +++ b/support/ld/olimex_stm32_h103 @@ -0,0 +1 @@ +maple \ No newline at end of file diff --git a/support/make/target-config.mk b/support/make/target-config.mk index a30a5daba..c12fe3b68 100644 --- a/support/make/target-config.mk +++ b/support/make/target-config.mk @@ -40,6 +40,16 @@ ifeq ($(BOARD), maple_RET6) SRAM_SIZE := 65536 endif +ifeq ($(BOARD), olimex_stm32_h103) + MCU := STM32F103RB + PRODUCT_ID := 0003 + ERROR_LED_PORT := GPIOC + ERROR_LED_PIN := 12 + DENSITY := STM32_MEDIUM_DENSITY + FLASH_SIZE := 131072 + SRAM_SIZE := 20480 +endif + # Memory target-specific configuration values ifeq ($(MEMORY_TARGET), ram) diff --git a/wirish/boards.h b/wirish/boards.h index 2515c00f7..e9f7c28e8 100644 --- a/wirish/boards.h +++ b/wirish/boards.h @@ -134,6 +134,8 @@ bool boardUsesPin(uint8 pin); * (...RBT6) on it. Maple Rev6 (as of March 2011) DOES NOT EXIST. */ #include "maple_RET6.h" +#elif defined(BOARD_olimex_stm32_h103) +#include "olimex_stm32_h103.h" #else /* * TODO turn this into a warning so people can: diff --git a/wirish/boards/olimex_stm32_h103.cpp b/wirish/boards/olimex_stm32_h103.cpp new file mode 100644 index 000000000..a9f09363b --- /dev/null +++ b/wirish/boards/olimex_stm32_h103.cpp @@ -0,0 +1,122 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * Copyright (c) 2011 David Kiliani. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file olimex_stm32_h103.cpp + * @author David Kiliani + * @brief Olimex STM32_H103 PIN_MAP and boardInit(). + */ + +#ifdef BOARD_olimex_stm32_h103 + +#include "olimex_stm32_h103.h" + +#include "gpio.h" +#include "timer.h" +#include "wirish_types.h" + +void boardInit(void) { +} + +extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { + + /* Header EXT1 */ + + {GPIOA, TIMER1, NULL, 11, 4, ADCx}, /* D0/EXT1_1/PA11 (USBDM) */ + {GPIOA, TIMER1, NULL, 8, 1, ADCx}, /* D1/EXT1_2/PA8 */ + {GPIOA, NULL, NULL, 12, 0, ADCx}, /* D2/EXT1_3/PA12 (USBDP) */ + {GPIOA, TIMER1, NULL, 9, 2, ADCx}, /* D3/EXT1_4/PA9 */ + + {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D4/EXT1_7/PA10 */ + {GPIOC, NULL, NULL, 10, 0, ADCx}, /* D5/EXT1_8/PC10 */ + {GPIOC, NULL, NULL, 11, 0, ADCx}, /* D6/EXT1_9/PC11 (USBpull) */ + {GPIOC, NULL, NULL, 12, 0, ADCx}, /* D7/EXT1_10/PC12 (LED) */ + {GPIOD, NULL, NULL, 2, 0, ADCx}, /* D8/EXT1_11/PD2 */ + {GPIOB, NULL, NULL, 5, 0, ADCx}, /* D9/EXT1_12/PB5 */ + {GPIOB, TIMER4, NULL, 6, 1, ADCx}, /* D10/EXT1_13/PB6 */ + {GPIOA, TIMER3, ADC1, 6, 1, 6}, /* D11/EXT1_14/PA6 */ + {GPIOB, TIMER4, NULL, 7, 2, ADCx}, /* D12/EXT1_15/PB7 */ + {GPIOB, TIMER4, NULL, 8, 3, ADCx}, /* D13/EXT1_16/PB8 */ + {GPIOB, TIMER4, NULL, 9, 4, ADCx}, /* D14/EXT1_17/PB9 */ + {GPIOA, NULL, ADC1, 5, 0, 5}, /* D15/EXT1_18/PA5 */ + {GPIOC, NULL, ADC1, 0, 0, 10}, /* D16/EXT1_19/PC0 */ + {GPIOC, NULL, ADC1, 1, 0, 11}, /* D17/EXT1_20/PC1 */ + {GPIOB, TIMER3, ADC1, 0, 3, 8}, /* D18/EXT1_21/PB0 */ + {GPIOA, TIMER3, ADC1, 7, 2, 7}, /* D19/EXT1_22/PA7 */ + + {GPIOC, NULL, NULL, 13, 0, ADCx}, /* D20/EXT1_24/PC13 */ + + {GPIOB, TIMER3, ADC1, 1, 4, 9}, /* D21/EXT1_26/PB1 */ + + /* Header EXT2 */ + + {GPIOC, NULL, ADC1, 2, 0, 12}, /* D22/EXT2_2/PC2 */ + + {GPIOA, TIMER2, ADC1, 0, 1, 0}, /* D23/EXT2_4/PA0 (BUT) */ + + {GPIOA, TIMER2, ADC1, 2, 3, 2}, /* D24/EXT2_7/PA2 */ + {GPIOA, TIMER2, ADC1, 1, 2, 1}, /* D25/EXT2_8/PA1 */ + {GPIOC, NULL, ADC1, 3, 0, 13}, /* D26/EXT2_9/PC3 */ + {GPIOA, TIMER2, ADC1, 3, 4, 3}, /* D27/EXT2_10/PA3 */ + {GPIOA, NULL, ADC1, 4, 0, 4}, /* D28/EXT2_11/PA4 */ + {GPIOC, NULL, ADC1, 4, 0, 14}, /* D29/EXT2_12/PC4 (USB-P) */ + {GPIOC, NULL, ADC1, 5, 0, 15}, /* D30/EXT2_13/PC5 */ + {GPIOB, NULL, NULL, 10, 0, ADCx}, /* D31/EXT2_14/PB10 */ + {GPIOB, NULL, NULL, 11, 0, ADCx}, /* D32/EXT2_15/PB11 */ + {GPIOB, NULL, NULL, 13, 0, ADCx}, /* D33/EXT2_16/PB13 */ + {GPIOB, NULL, NULL, 12, 0, ADCx}, /* D34/EXT2_17/PB12 */ + {GPIOB, NULL, NULL, 14, 0, ADCx}, /* D35/EXT2_18/PB14 */ + {GPIOB, NULL, NULL, 15, 0, ADCx}, /* D36/EXT2_19/PB15 */ + {GPIOC, NULL, NULL, 6, 0, ADCx}, /* D37/EXT2_20/PC6 */ + {GPIOC, NULL, NULL, 7, 0, ADCx}, /* D38/EXT2_21/PC7 */ + {GPIOC, NULL, NULL, 8, 0, ADCx}, /* D39/EXT2_22/PC8 */ + + {GPIOC, NULL, NULL, 9, 0, ADCx}, /* D40/EXT2_24/PC9 */ + + /* JTAG header */ + + {GPIOA, NULL, NULL, 13, 0, ADCx}, /* D41/JTAG7/PA13 */ + {GPIOA, NULL, NULL, 14, 0, ADCx}, /* D42/JTAG9/PA14 */ + {GPIOA, NULL, NULL, 15, 0, ADCx}, /* D43/JTAG5/PA15 */ + {GPIOB, NULL, NULL, 3, 0, ADCx}, /* D44/JTAG13/PB3 */ + {GPIOB, NULL, NULL, 4, 0, ADCx}, /* D45/JTAG3/PB4 */ +}; + +extern const uint8 boardPWMPins[] __FLASH__ = { + 0, 1, 3, 4, 10, 11, 12, 13, 14, 18, 19, 21, 23, 24, 25, 27 +}; + +extern const uint8 boardADCPins[] __FLASH__ = { + 11, 15, 16, 17, 18, 19, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30 +}; + +extern const uint8 boardUsedPins[] __FLASH__ = { + BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN, + BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN +}; + +#endif diff --git a/wirish/boards/olimex_stm32_h103.h b/wirish/boards/olimex_stm32_h103.h new file mode 100644 index 000000000..e2d52364c --- /dev/null +++ b/wirish/boards/olimex_stm32_h103.h @@ -0,0 +1,88 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * Copyright (c) 2011 David Kiliani. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file olimex_stm32_h103.h + * @author David Kiliani + * @brief Private include file for Olimex STM32_H103 in boards.h + */ + +#ifndef _BOARD_OLIMEX_STM32_H103_H_ +#define _BOARD_OLIMEX_STM32_H103_H_ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ + +#define BOARD_BUTTON_PIN 23 +#define BOARD_LED_PIN 7 + +/* Number of USARTs/UARTs whose pins are broken out to headers */ +#define BOARD_NR_USARTS 3 + +/* Default USART pin numbers (not considering AFIO remap) */ +#define BOARD_USART1_TX_PIN 3 +#define BOARD_USART1_RX_PIN 4 +#define BOARD_USART2_TX_PIN 24 +#define BOARD_USART2_RX_PIN 27 +#define BOARD_USART3_TX_PIN 31 +#define BOARD_USART3_RX_PIN 32 + +/* Number of SPI ports */ +#define BOARD_NR_SPI 2 + +/* Default SPI pin numbers (not considering AFIO remap) */ +#define BOARD_SPI1_NSS_PIN 28 +#define BOARD_SPI1_MOSI_PIN 19 +#define BOARD_SPI1_MISO_PIN 11 +#define BOARD_SPI1_SCK_PIN 15 +#define BOARD_SPI2_NSS_PIN 34 +#define BOARD_SPI2_MOSI_PIN 36 +#define BOARD_SPI2_MISO_PIN 35 +#define BOARD_SPI2_SCK_PIN 33 + +/* Total number of GPIO pins that are broken out to headers and + * intended for general use. */ +#define BOARD_NR_GPIO_PINS 46 + +/* Number of pins capable of PWM output */ +#define BOARD_NR_PWM_PINS 16 + +/* Number of pins capable of ADC conversion */ +#define BOARD_NR_ADC_PINS 16 + +/* Number of pins already connected to external hardware. For Maple, + * these are just BOARD_LED_PIN and BOARD_BUTTON_PIN. */ +#define BOARD_NR_USED_PINS 7 + +/* Debug port pins */ +#define BOARD_JTMS_SWDIO_PIN 41 +#define BOARD_JTCK_SWCLK_PIN 42 +#define BOARD_JTDI_PIN 43 +#define BOARD_JTDO_PIN 44 +#define BOARD_NJTRST_PIN 45 + +#endif diff --git a/wirish/rules.mk b/wirish/rules.mk index 6999288fe..6aa090440 100644 --- a/wirish/rules.mk +++ b/wirish/rules.mk @@ -21,6 +21,7 @@ cppSRCS_$(d) := wirish_math.cpp \ boards/maple_mini.cpp \ boards/maple_native.cpp \ boards/maple_RET6.cpp \ + boards/olimex_stm32_h103.cpp \ comm/HardwareSerial.cpp \ comm/HardwareSPI.cpp \ HardwareTimer.cpp \ From 163f4446e87f8fa3e7f5d4308646840ddbc4c002 Mon Sep 17 00:00:00 2001 From: David Kiliani Date: Mon, 26 Sep 2011 15:56:14 +0200 Subject: [PATCH 2/2] Make JTAG upload more generic to simplify use of other boards. Replaces the OpenOCD wrapper scripts with a direct call to OpenOCD using the stock interface and board configuration scripts. Signed-off-by: David Kiliani --- Makefile | 19 +++++- support/make/build-rules.mk | 1 - support/openocd/debug_0.3.cfg | 75 ----------------------- support/openocd/debug_0.4.cfg | 75 ----------------------- support/openocd/flash_0.3.cfg | 89 ---------------------------- support/openocd/flash_0.4.cfg | 95 ------------------------------ support/scripts/openocd-wrapper.sh | 16 ----- 7 files changed, 16 insertions(+), 354 deletions(-) delete mode 100644 support/openocd/debug_0.3.cfg delete mode 100644 support/openocd/debug_0.4.cfg delete mode 100644 support/openocd/flash_0.3.cfg delete mode 100644 support/openocd/flash_0.4.cfg delete mode 100755 support/scripts/openocd-wrapper.sh diff --git a/Makefile b/Makefile index fc36667a6..ca8552dd0 100644 --- a/Makefile +++ b/Makefile @@ -34,6 +34,10 @@ PRODUCT_ID := 0003 BOARD ?= maple MEMORY_TARGET ?= flash +OOCD ?= openocd +OOCD_INTERFACE ?= olimex-arm-usb-ocd +OOCD_BOARD ?= olimex_stm32_h103 + # $(BOARD)- and $(MEMORY_TARGET)-specific configuration include $(MAKEDIR)/target-config.mk @@ -90,7 +94,7 @@ $(foreach m,$(LIBMAPLE_MODULES),$(eval $(call LIBMAPLE_MODULE_template,$(m)))) ## # main target -include $(SRCROOT)/build-targets.mk +include build-targets.mk .PHONY: install sketch clean help debug cscope tags ctags ram flash jtag doxygen mrproper @@ -101,7 +105,13 @@ UPLOAD_ram := $(SUPPORT_PATH)/scripts/reset.py && \ UPLOAD_flash := $(SUPPORT_PATH)/scripts/reset.py && \ sleep 1 && \ $(DFU) -a1 -d $(VENDOR_ID):$(PRODUCT_ID) -D $(BUILD_PATH)/$(BOARD).bin -R -UPLOAD_jtag := $(OPENOCD_WRAPPER) flash +UPLOAD_jtag := $(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "init" -c "reset init" \ + -c "flash write_image erase unlock $(BUILD_PATH)/$(BOARD).elf 0" \ + -c "verify_image $(BUILD_PATH)/$(BOARD).elf" \ + -c "reset run" \ + -c "shutdown" # Conditionally upload to whatever the last build was install: INSTALL_TARGET = $(shell cat $(BUILD_PATH)/build-type 2>/dev/null) @@ -154,7 +164,10 @@ help: @echo " " debug: - $(OPENOCD_WRAPPER) debug + $(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "init" -c "reset init" \ + -c "reset halt" cscope: rm -rf *.cscope diff --git a/support/make/build-rules.mk b/support/make/build-rules.mk index 330cdd801..3d541ba32 100644 --- a/support/make/build-rules.mk +++ b/support/make/build-rules.mk @@ -9,7 +9,6 @@ DISAS := arm-none-eabi-objdump OBJDUMP := arm-none-eabi-objdump SIZE := arm-none-eabi-size DFU := dfu-util -OPENOCD_WRAPPER := support/scripts/openocd-wrapper.sh # Suppress annoying output unless V is set ifndef V diff --git a/support/openocd/debug_0.3.cfg b/support/openocd/debug_0.3.cfg deleted file mode 100644 index 87d33ae3f..000000000 --- a/support/openocd/debug_0.3.cfg +++ /dev/null @@ -1,75 +0,0 @@ -# script for stm32 - -interface ft2232 -ft2232_device_desc "Olimex OpenOCD JTAG" -ft2232_layout olimex-jtag -ft2232_vid_pid 0x15ba 0x0003 - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME stm32 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz -jtag_khz 1000 - -jtag_nsrst_delay 100 -jtag_ntrst_delay 100 - -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst - -#jtag scan chain -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # See STM Document RM0008 - # Section 30.6.3 - set _CPUTAPID 0x3ba00477 -} - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -if { [info exists BSTAPID ] } { - # FIXME this never gets used to override defaults... - set _BSTAPID $BSTAPID -} else { - # See STM Document RM0008 - # Section 29.6.2 - # Low density devices, Rev A - set _BSTAPID1 0x06412041 - # Medium density devices, Rev A - set _BSTAPID2 0x06410041 - # Medium density devices, Rev B and Rev Z - set _BSTAPID3 0x16410041 - # High density devices, Rev A - set _BSTAPID4 0x06414041 - # Connectivity line devices, Rev A and Rev Z - set _BSTAPID5 0x06418041 -} -jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ - -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ - -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 - - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME - -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0 - -flash bank stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME - -proc nopforever {} { - puts "Resetting the chip..." - reset run -} - -init -nopforever diff --git a/support/openocd/debug_0.4.cfg b/support/openocd/debug_0.4.cfg deleted file mode 100644 index 7d6982afa..000000000 --- a/support/openocd/debug_0.4.cfg +++ /dev/null @@ -1,75 +0,0 @@ -# script for stm32 - -interface ft2232 -ft2232_device_desc "Olimex OpenOCD JTAG" -ft2232_layout olimex-jtag -ft2232_vid_pid 0x15ba 0x0003 - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME stm32 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz -jtag_khz 1000 - -jtag_nsrst_delay 100 -jtag_ntrst_delay 100 - -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config srst_only - -#jtag scan chain -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # See STM Document RM0008 - # Section 30.6.3 - set _CPUTAPID 0x3ba00477 -} - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -if { [info exists BSTAPID ] } { - # FIXME this never gets used to override defaults... - set _BSTAPID $BSTAPID -} else { - # See STM Document RM0008 - # Section 29.6.2 - # Low density devices, Rev A - set _BSTAPID1 0x06412041 - # Medium density devices, Rev A - set _BSTAPID2 0x06410041 - # Medium density devices, Rev B and Rev Z - set _BSTAPID3 0x16410041 - # High density devices, Rev A - set _BSTAPID4 0x06414041 - # Connectivity line devices, Rev A and Rev Z - set _BSTAPID5 0x06418041 -} -jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ - -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ - -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 - - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME - -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0 - -flash bank bank0 stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME - -proc nopforever {} { - puts "Resetting the chip... Halting for debugger." - reset halt -} - -init -nopforever diff --git a/support/openocd/flash_0.3.cfg b/support/openocd/flash_0.3.cfg deleted file mode 100644 index 41c6532a9..000000000 --- a/support/openocd/flash_0.3.cfg +++ /dev/null @@ -1,89 +0,0 @@ -# script for stm32 - -interface ft2232 -ft2232_device_desc "Olimex OpenOCD JTAG" -ft2232_layout olimex-jtag -ft2232_vid_pid 0x15ba 0x0003 - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME stm32 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz -jtag_khz 1000 - -jtag_nsrst_delay 100 -jtag_ntrst_delay 100 - -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config trst_and_srst - -#jtag scan chain -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # See STM Document RM0008 - # Section 30.6.3 - set _CPUTAPID 0x3ba00477 -} - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -if { [info exists BSTAPID ] } { - # FIXME this never gets used to override defaults... - set _BSTAPID $BSTAPID -} else { - # See STM Document RM0008 - # Section 29.6.2 - # Low density devices, Rev A - set _BSTAPID1 0x06412041 - # Medium density devices, Rev A - set _BSTAPID2 0x06410041 - # Medium density devices, Rev B and Rev Z - set _BSTAPID3 0x16410041 - # High density devices, Rev A - set _BSTAPID4 0x06414041 - # Connectivity line devices, Rev A and Rev Z - set _BSTAPID5 0x06418041 -} -jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ - -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ - -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 - - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME - -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0 -# TODO: native -#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x10000 -work-area-backup 0 - -flash bank stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME - -proc flash_chip {} { - echo "Halting..." - halt - echo "Erasing..." - flash erase_address 0x08000000 0x20000 - # TODO: native - #flash erase_address 0x08000000 0x80000 - echo "Flashing image..." - flash write_bank 0 build/maple.bin 0 - echo "Verifying image..." - verify_image build/maple.bin 0x08000000 bin - echo "Checksum verified, resetting chip" - reset run - echo "Daemon shutdown" - shutdown -} - -init -flash_chip diff --git a/support/openocd/flash_0.4.cfg b/support/openocd/flash_0.4.cfg deleted file mode 100644 index 32c06c6b3..000000000 --- a/support/openocd/flash_0.4.cfg +++ /dev/null @@ -1,95 +0,0 @@ -# script for stm32 - -interface ft2232 -ft2232_device_desc "Olimex OpenOCD JTAG" -ft2232_layout olimex-jtag -ft2232_vid_pid 0x15ba 0x0003 - -if { [info exists CHIPNAME] } { - set _CHIPNAME $CHIPNAME -} else { - set _CHIPNAME stm32 -} - -if { [info exists ENDIAN] } { - set _ENDIAN $ENDIAN -} else { - set _ENDIAN little -} - -# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz -jtag_khz 1000 - -jtag_nsrst_delay 100 -jtag_ntrst_delay 100 - -#use combined on interfaces or targets that can't set TRST/SRST separately -reset_config srst_only - -#jtag scan chain -if { [info exists CPUTAPID ] } { - set _CPUTAPID $CPUTAPID -} else { - # See STM Document RM0008 - # Section 30.6.3 - set _CPUTAPID 0x3ba00477 -} - -jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID - -if { [info exists BSTAPID ] } { - # FIXME this never gets used to override defaults... - set _BSTAPID $BSTAPID -} else { - # See STM Document RM0008 - # Section 29.6.2 - # Low density devices, Rev A - set _BSTAPID1 0x06412041 - # Medium density devices, Rev A - set _BSTAPID2 0x06410041 - # Medium density devices, Rev B and Rev Z - set _BSTAPID3 0x16410041 - # High density devices, Rev A - set _BSTAPID4 0x06414041 - # Connectivity line devices, Rev A and Rev Z - set _BSTAPID5 0x06418041 -} -jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ - -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ - -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 - - -set _TARGETNAME $_CHIPNAME.cpu -target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME - -$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0 -# TODO: native -#$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x10000 -work-area-backup 0 - -flash bank bank0 stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME - -proc flash_chip {} { - echo "Halting..." - reset halt - - echo "Unlocking flash..." - flash protect 0 0 last off - - echo "Erasing..." - flash erase_address 0x08000000 0x20000 - - echo "Flashing image..." - flash write_bank 0 build/maple.bin 0 - - echo "Verifying image..." - verify_image build/maple.bin 0x08000000 bin - - echo "Checksum verified, resetting chip" - reset run - - echo "Daemon shutdown" - shutdown -} - -init -flash_chip diff --git a/support/scripts/openocd-wrapper.sh b/support/scripts/openocd-wrapper.sh deleted file mode 100755 index 73be92e47..000000000 --- a/support/scripts/openocd-wrapper.sh +++ /dev/null @@ -1,16 +0,0 @@ -#!/usr/bin/env bash - -# Helper to decide which openocd script to use. We only support 0.3.x and 0.4.x. - -if [ $# -ne 1 ] -then - echo "Usage: `basename $0` {flash|debug}" - exit 1 -fi - -OPENOCD_VERSION=`openocd -v 2>&1 | head -n1 | \ - awk '{print $4}' | sed 's/\([0-9]*\.[0-9]*\)\.[0-9]*/\1/'` - -CFG_FILE=$1_${OPENOCD_VERSION}.cfg - -openocd -f support/openocd/$CFG_FILE