[Bitcode] Remove auto-detection for typed pointers

Always read bitcode according to the -opaque-pointers mode. Do not
perform auto-detection to implicitly switch to typed pointers.

This is a step towards removing typed pointer support, and also
eliminates the class of problems where linking may fail if a typed
pointer module is loaded before an opaque pointer module. (The
latest place where this was encountered is D139924, but this has
previously been fixed in other places doing bitcode linking as well.)

Differential Revision: https://reviews.llvm.org/D139940

Author: nikic

llvm/docs/OpaquePointers.rst

@@ -287,10 +287,12 @@ The following typed pointer functionality has already been removed:
 * The ``CLANG_ENABLE_OPAQUE_POINTERS`` cmake flag is no longer supported.
 * C APIs that do not support opaque pointers (like ``LLVMBuildLoad``) are no
   longer supported.
+* Typed pointer bitcode is implicitly upgraded to use opaque pointers, unless
+  ``-opaque-pointers=0`` is passed.
 
 The following typed pointer functionality is still to be removed:
 
 * The ``-no-opaque-pointers`` cc1 flag, ``-opaque-pointers=0`` opt flag and
   ``-plugin-opt=no-opaque-pointers`` lto flag.
-* Auto-detection of typed pointers in bitcode and textual IR.
+* Auto-detection of typed pointers in textual IR.
 * Support for typed pointers in LLVM libraries.

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

@@ -2359,18 +2359,14 @@ Error BitcodeReader::parseTypeTableBody() {
       if (!ResultTy ||
           !PointerType::isValidElementType(ResultTy))
         return error("Invalid type");
-      if (LLVM_UNLIKELY(!Context.hasSetOpaquePointersValue()))
-        Context.setOpaquePointers(false);
       ContainedIDs.push_back(Record[0]);
       ResultTy = PointerType::get(ResultTy, AddressSpace);
       break;
     }
     case bitc::TYPE_CODE_OPAQUE_POINTER: { // OPAQUE_POINTER: [addrspace]
       if (Record.size() != 1)
         return error("Invalid opaque pointer record");
-      if (LLVM_UNLIKELY(!Context.hasSetOpaquePointersValue())) {
-        Context.setOpaquePointers(true);
-      } else if (Context.supportsTypedPointers())
+      if (Context.supportsTypedPointers())
         return error(
             "Opaque pointers are only supported in -opaque-pointers mode");
       unsigned AddressSpace = Record[0];

llvm/test/Bitcode/Inputs/invalid-call-mismatched-explicit-type.bc

@@ -2,14 +2,14 @@
 
 target datalayout = "A2"
 
-; CHECK-LABEL: define i8 addrspace(2)* @alloca_addrspace_2() {
+; CHECK-LABEL: define ptr addrspace(2) @alloca_addrspace_2() {
 ; CHECK: %alloca = alloca i8, align 1, addrspace(2)
 define i8 addrspace(2)* @alloca_addrspace_2() {
   %alloca = alloca i8, addrspace(2)
   ret i8 addrspace(2)* %alloca
 }
 
-; CHECK-LABEL: define i8 addrspace(5)* @alloca_addrspace_5() {
+; CHECK-LABEL: define ptr addrspace(5) @alloca_addrspace_5() {
 ; CHECK: %alloca = alloca i8, align 1, addrspace(5)
 define i8 addrspace(5)* @alloca_addrspace_5() {
   %alloca = alloca i8, addrspace(5)

llvm/test/Bitcode/Inputs/invalid-gep-mismatched-explicit-type.bc

@@ -1,14 +1,14 @@
 ; RUN: llvm-dis < %S/arm-intrinsics.bc | FileCheck %s
 
 define void @f(i32* %p) {
-; CHECK: call i32 @llvm.arm.ldrex.p0i32(i32* elementtype(i32)
+; CHECK: call i32 @llvm.arm.ldrex.p0(ptr elementtype(i32)
   %a = call i32 @llvm.arm.ldrex.p0i32(i32* %p)
-; CHECK: call i32 @llvm.arm.strex.p0i32(i32 0, i32* elementtype(i32)
+; CHECK: call i32 @llvm.arm.strex.p0(i32 0, ptr elementtype(i32)
   %c = call i32 @llvm.arm.strex.p0i32(i32 0, i32* %p)
 
-; CHECK: call i32 @llvm.arm.ldaex.p0i32(i32* elementtype(i32)
+; CHECK: call i32 @llvm.arm.ldaex.p0(ptr elementtype(i32)
   %a2 = call i32 @llvm.arm.ldaex.p0i32(i32* %p)
-; CHECK: call i32 @llvm.arm.stlex.p0i32(i32 0, i32* elementtype(i32)
+; CHECK: call i32 @llvm.arm.stlex.p0(i32 0, ptr elementtype(i32)
   %c2 = call i32 @llvm.arm.stlex.p0i32(i32 0, i32* %p)
   ret void
 }

llvm/test/Bitcode/Inputs/invalid-gep-operator-mismatched-explicit-type.bc

@@ -3,15 +3,15 @@
 ; Backwards compatibility test: make sure we can process bitcode without
 ; synchronization scope names encoded in it.
 
-; CHECK: load atomic i32, i32* %x unordered, align 4
-; CHECK: load atomic volatile i32, i32* %x syncscope("singlethread") acquire, align 4
-; CHECK: store atomic i32 3, i32* %x release, align 4
-; CHECK: store atomic volatile i32 3, i32* %x syncscope("singlethread") monotonic, align 4
-; CHECK: cmpxchg i32* %x, i32 1, i32 0 syncscope("singlethread") monotonic monotonic
-; CHECK: cmpxchg volatile i32* %x, i32 0, i32 1 acq_rel acquire
-; CHECK: cmpxchg i32* %x, i32 42, i32 0 acq_rel monotonic
-; CHECK: cmpxchg weak i32* %x, i32 13, i32 0 seq_cst monotonic
-; CHECK: atomicrmw add i32* %x, i32 10 seq_cst
-; CHECK: atomicrmw volatile xchg  i32* %x, i32 10 monotonic
+; CHECK: load atomic i32, ptr %x unordered, align 4
+; CHECK: load atomic volatile i32, ptr %x syncscope("singlethread") acquire, align 4
+; CHECK: store atomic i32 3, ptr %x release, align 4
+; CHECK: store atomic volatile i32 3, ptr %x syncscope("singlethread") monotonic, align 4
+; CHECK: cmpxchg ptr %x, i32 1, i32 0 syncscope("singlethread") monotonic monotonic
+; CHECK: cmpxchg volatile ptr %x, i32 0, i32 1 acq_rel acquire
+; CHECK: cmpxchg ptr %x, i32 42, i32 0 acq_rel monotonic
+; CHECK: cmpxchg weak ptr %x, i32 13, i32 0 seq_cst monotonic
+; CHECK: atomicrmw add ptr %x, i32 10 seq_cst
+; CHECK: atomicrmw volatile xchg  ptr %x, i32 10 monotonic
 ; CHECK: fence syncscope("singlethread") release
 ; CHECK: fence seq_cst

llvm/test/Bitcode/Inputs/invalid-load-mismatched-explicit-type.bc

@@ -3,16 +3,16 @@
 
 define void @test_cmpxchg(i32* %addr, i32 %desired, i32 %new) {
   cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
-  ; CHECK: cmpxchg i32* %addr, i32 %desired, i32 %new seq_cst seq_cst
+  ; CHECK: cmpxchg ptr %addr, i32 %desired, i32 %new seq_cst seq_cst
 
   cmpxchg volatile i32* %addr, i32 %desired, i32 %new seq_cst monotonic
-  ; CHECK: cmpxchg volatile i32* %addr, i32 %desired, i32 %new seq_cst monotonic
+  ; CHECK: cmpxchg volatile ptr %addr, i32 %desired, i32 %new seq_cst monotonic
 
   cmpxchg weak i32* %addr, i32 %desired, i32 %new acq_rel acquire
-  ; CHECK: cmpxchg weak i32* %addr, i32 %desired, i32 %new acq_rel acquire
+  ; CHECK: cmpxchg weak ptr %addr, i32 %desired, i32 %new acq_rel acquire
 
   cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new syncscope("singlethread") release monotonic
-  ; CHECK: cmpxchg weak volatile i32* %addr, i32 %desired, i32 %new syncscope("singlethread") release monotonic
+  ; CHECK: cmpxchg weak volatile ptr %addr, i32 %desired, i32 %new syncscope("singlethread") release monotonic
 
   ret void
 }