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EbinJose2002sys-ce-bb
EbinJose2002
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sys-ce-bb
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Porting tests from llvm-project (#3303)
Add tests for atomic exchange, type emission, bitcasts, and block reordering Original commit: KhronosGroup/SPIRV-LLVM-Translator@6fce8e4628f420e
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5 files changed

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‎llvm-spirv/test/AtomicExchange.ll‎

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; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -spirv-text -o - | FileCheck %s
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: spirv-val %t.spv
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; RUN: llvm-spirv -r --spirv-target-env=SPV-IR %t.spv -o %t.rev.bc
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; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-SPV-IR
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; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
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; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-OCL-IR
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target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir"
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; CHECK-DAG: TypeInt [[#Int64:]] 64 0
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; CHECK-COUNT-9: AtomicExchange [[#Int64]] [[#]] [[#]] [[#]] [[#]] [[#]]
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; CHECK-SPV-IR-COUNT-9: __spirv_AtomicExchange
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; CHECK-OCL-IR-COUNT-9: call spir_func i64 @_Z9atom_xchg
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; TODO: The call to @_Z9atom_xchg is not yet lowered to the corresponding SPIR-V instruction.
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; It currently remains as a plain function call during SPIR-V generation.
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%Type1 = type { i64 }
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%Type2 = type { ptr addrspace(4) }
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define linkonce_odr dso_local spir_func void @f1() {
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entry:
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%a = alloca %Type1, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePyN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEy(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 3)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f2() {
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entry:
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%a = alloca %Type1, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePxN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEx(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 3)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f3() {
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entry:
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%a = alloca %Type1, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 3)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f4() {
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entry:
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%a = alloca %Type1, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePlN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEl(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 3)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f5() {
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entry:
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%a = alloca %Type2, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 %p)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f6() {
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entry:
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%a = alloca %Type2, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 %p)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f7() {
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entry:
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%a = alloca %Type2, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 %p)
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ret void
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}
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define linkonce_odr dso_local spir_func void @f8() {
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entry:
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%a = alloca %Type2, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 %p)
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ret void
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}
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; Function Attrs: convergent mustprogress norecurse nounwind
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define linkonce_odr dso_local spir_func void @f9() {
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entry:
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%a = alloca %Type2, align 8
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%a.ascast = addrspacecast ptr %a to ptr addrspace(4)
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%p = ptrtoint ptr addrspace(4) %a.ascast to i64
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%res = call spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4) %a.ascast, i32 0, i32 912, i64 %p)
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ret void
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}
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declare dso_local spir_func i64 @_Z22__spirv_AtomicExchangePyN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEy(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @_Z22__spirv_AtomicExchangePxN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEx(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @_Z22__spirv_AtomicExchangePmN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEm(ptr addrspace(4), i32, i32, i64)
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declare dso_local spir_func i64 @_Z22__spirv_AtomicExchangePlN5__spv5Scope4FlagENS0_19MemorySemanticsMask4FlagEl(ptr addrspace(4), i32, i32, i64)

‎llvm-spirv/test/basic_float_types.ll‎

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; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
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; RUN: FileCheck < %t.txt %s
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; RUN: spirv-val %t.spv
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; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
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; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir64"
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define void @main() {
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entry:
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; CHECK-DAG: Capability Float16Buffer
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; CHECK-DAG: Capability Float64
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; CHECK-DAG: TypeFloat [[#half:]] 16
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; CHECK-DAG: TypeFloat [[#float:]] 32
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; CHECK-DAG: TypeFloat [[#double:]] 64
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; CHECK-DAG: TypeVector [[#v2half:]] [[#half]] 2
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; CHECK-DAG: TypeVector [[#v3half:]] [[#half]] 3
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; CHECK-DAG: TypeVector [[#v4half:]] [[#half]] 4
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; CHECK-DAG: TypeVector [[#v2float:]] [[#float]] 2
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; CHECK-DAG: TypeVector [[#v3float:]] [[#float]] 3
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; CHECK-DAG: TypeVector [[#v4float:]] [[#float]] 4
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; CHECK-DAG: TypeVector [[#v2double:]] [[#double]] 2
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; CHECK-DAG: TypeVector [[#v3double:]] [[#double]] 3
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; CHECK-DAG: TypeVector [[#v4double:]] [[#double]] 4
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; CHECK-DAG: TypePointer [[#ptr_Function_half:]] 7 [[#half]]
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; CHECK-DAG: TypePointer [[#ptr_Function_float:]] 7 [[#float]]
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; CHECK-DAG: TypePointer [[#ptr_Function_double:]] 7 [[#double]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2half:]] 7 [[#v2half]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3half:]] 7 [[#v3half]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4half:]] 7 [[#v4half]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2float:]] 7 [[#v2float]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3float:]] 7 [[#v3float]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4float:]] 7 [[#v4float]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2double:]] 7 [[#v2double]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3double:]] 7 [[#v3double]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4double:]] 7 [[#v4double]]
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; CHECK-DAG: Variable [[#ptr_Function_half]] [[#]] 7
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; CHECK-LLVM: alloca half, align 2
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%half_Val = alloca half, align 2
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; CHECK-DAG: Variable [[#ptr_Function_float]] [[#]] 7
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; CHECK-LLVM: alloca float, align 4
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%float_Val = alloca float, align 4
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; CHECK-DAG: Variable [[#ptr_Function_double]] [[#]] 7
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; CHECK-LLVM: alloca double, align 8
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%double_Val = alloca double, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v2half]] [[#]] 7
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; CHECK-LLVM: alloca <2 x half>, align 4
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%half2_Val = alloca <2 x half>, align 4
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; CHECK-DAG: Variable [[#ptr_Function_v3half]] [[#]] 7
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; CHECK-LLVM: alloca <3 x half>, align 8
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%half3_Val = alloca <3 x half>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v4half]] [[#]] 7
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; CHECK-LLVM: alloca <4 x half>, align 8
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%half4_Val = alloca <4 x half>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v2float]] [[#]] 7
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; CHECK-LLVM: alloca <2 x float>, align 8
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%float2_Val = alloca <2 x float>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v3float]] [[#]] 7
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; CHECK-LLVM: alloca <3 x float>, align 16
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%float3_Val = alloca <3 x float>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v4float]] [[#]] 7
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; CHECK-LLVM: alloca <4 x float>, align 16
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%float4_Val = alloca <4 x float>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v2double]] [[#]] 7
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; CHECK-LLVM: alloca <2 x double>, align 16
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%double2_Val = alloca <2 x double>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v3double]] [[#]] 7
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; CHECK-LLVM: alloca <3 x double>, align 32
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%double3_Val = alloca <3 x double>, align 32
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; CHECK-DAG: Variable [[#ptr_Function_v4double]] [[#]] 7
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; CHECK-LLVM: alloca <4 x double>, align 32
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%double4_Val = alloca <4 x double>, align 32
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ret void
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}

‎llvm-spirv/test/basic_int_types.ll‎

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; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
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; RUN: FileCheck < %t.txt %s
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; RUN: spirv-val %t.spv
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; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
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; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir64"
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define void @main() {
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entry:
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; CHECK-DAG: TypeInt [[#short:]] 16 0
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; CHECK-DAG: TypeInt [[#int:]] 32 0
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; CHECK-DAG: TypeInt [[#long:]] 64 0
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; CHECK-DAG: TypeVector [[#v2short:]] [[#short]] 2
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; CHECK-DAG: TypeVector [[#v3short:]] [[#short]] 3
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; CHECK-DAG: TypeVector [[#v4short:]] [[#short]] 4
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; CHECK-DAG: TypeVector [[#v2int:]] [[#int]] 2
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; CHECK-DAG: TypeVector [[#v3int:]] [[#int]] 3
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; CHECK-DAG: TypeVector [[#v4int:]] [[#int]] 4
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; CHECK-DAG: TypeVector [[#v2long:]] [[#long]] 2
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; CHECK-DAG: TypeVector [[#v3long:]] [[#long]] 3
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; CHECK-DAG: TypeVector [[#v4long:]] [[#long]] 4
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; CHECK-DAG: TypePointer [[#ptr_Function_short:]] 7 [[#short]]
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; CHECK-DAG: TypePointer [[#ptr_Function_int:]] 7 [[#int]]
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; CHECK-DAG: TypePointer [[#ptr_Function_long:]] 7 [[#long]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2short:]] 7 [[#v2short]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3short:]] 7 [[#v3short]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4short:]] 7 [[#v4short]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2int:]] 7 [[#v2int]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3int:]] 7 [[#v3int]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4int:]] 7 [[#v4int]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v2long:]] 7 [[#v2long]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v3long:]] 7 [[#v3long]]
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; CHECK-DAG: TypePointer [[#ptr_Function_v4long:]] 7 [[#v4long]]
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; CHECK-DAG: Variable [[#ptr_Function_short]] [[#]] 7
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; CHECK-LLVM: alloca i16, align 2
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%int16_t_Val = alloca i16, align 2
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; CHECK-DAG: Variable [[#ptr_Function_int]] [[#]] 7
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; CHECK-LLVM: alloca i32, align 4
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%int_Val = alloca i32, align 4
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; CHECK-DAG: Variable [[#ptr_Function_long]] [[#]] 7
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; CHECK-LLVM: alloca i64, align 8
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%int64_t_Val = alloca i64, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v2short]] [[#]] 7
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; CHECK-LLVM: alloca <2 x i16>, align 4
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%int16_t2_Val = alloca <2 x i16>, align 4
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; CHECK-DAG: Variable [[#ptr_Function_v3short]] [[#]] 7
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; CHECK-LLVM: alloca <3 x i16>, align 8
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%int16_t3_Val = alloca <3 x i16>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v4short]] [[#]] 7
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; CHECK-LLVM: alloca <4 x i16>, align 8
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%int16_t4_Val = alloca <4 x i16>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v2int]] [[#]] 7
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; CHECK-LLVM: alloca <2 x i32>, align 8
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%int2_Val = alloca <2 x i32>, align 8
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; CHECK-DAG: Variable [[#ptr_Function_v3int]] [[#]] 7
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; CHECK-LLVM: alloca <3 x i32>, align 16
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%int3_Val = alloca <3 x i32>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v4int]] [[#]] 7
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; CHECK-LLVM: alloca <4 x i32>, align 16
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%int4_Val = alloca <4 x i32>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v2long]] [[#]] 7
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; CHECK-LLVM: alloca <2 x i64>, align 16
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%int64_t2_Val = alloca <2 x i64>, align 16
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; CHECK-DAG: Variable [[#ptr_Function_v3long]] [[#]] 7
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; CHECK-LLVM: alloca <3 x i64>, align 32
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%int64_t3_Val = alloca <3 x i64>, align 32
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; CHECK-DAG: Variable [[#ptr_Function_v4long]] [[#]] 7
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; CHECK-LLVM: alloca <4 x i64>, align 32
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%int64_t4_Val = alloca <4 x i64>, align 32
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ret void
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}

‎llvm-spirv/test/block-ordering.ll‎

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; RUN: llvm-as %s -o %t.bc
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; RUN: llvm-spirv %t.bc -o %t.spv
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; RUN: llvm-spirv %t.bc -spirv-text -o %t.txt
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; RUN: FileCheck < %t.txt %s
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; RUN: spirv-val %t.spv
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target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
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target triple = "spir64"
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; Checks SPIR-V blocks are correctly reordered so that dominators shows up
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; before others in the binary layout.
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define void @main() {
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; CHECK: Label
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; CHECK: Branch [[#l1:]]
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; CHECK: Label [[#l1]]
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; CHECK: Branch [[#l2:]]
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; CHECK: Label [[#l2]]
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; CHECK: Branch [[#end:]]
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; CHECK: Label [[#end]]
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; CHECK: Return
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entry:
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br label %l1
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l2:
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br label %end
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l1:
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br label %l2
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end:
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ret void
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}

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