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[sycl-post-link] Fix the order of spec constants IDs in device image properties (#3739)
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+70
-2
lines changed

4 files changed

+70
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llvm/include/llvm/Support/PropertySetIO.h

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@@ -201,6 +201,16 @@ class PropertySetRegistry {
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PropSet.insert(std::make_pair(Prop.first, PropertyValue(Prop.second)));
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}
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template <typename T>
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void add(StringRef Category, const MapVector<StringRef, T> &Props) {
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assert(PropSetMap.find(Category) == PropSetMap.end() &&
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"category already added");
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auto &PropSet = PropSetMap[Category];
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for (const auto &Prop : Props)
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PropSet.insert({Prop.first, PropertyValue(Prop.second)});
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}
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// Parses and creates a property set registry.
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static Expected<std::unique_ptr<PropertySetRegistry>>
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read(const MemoryBuffer *Buf);

llvm/tools/sycl-post-link/SpecConstants.cpp

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#include "SpecConstants.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/MapVector.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/IR/InstIterator.h"

llvm/tools/sycl-post-link/SpecConstants.h

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#pragma once
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#include "llvm/ADT/MapVector.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/PassManager.h"
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@@ -46,7 +47,7 @@ struct SpecConstantDescriptor {
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unsigned Size;
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};
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using SpecIDMapTy =
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std::map<llvm::StringRef, std::vector<SpecConstantDescriptor>>;
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llvm::MapVector<llvm::StringRef, std::vector<SpecConstantDescriptor>>;
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class SpecConstantsPass : public llvm::PassInfoMixin<SpecConstantsPass> {
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public:
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// RUN: %clangxx -fsycl -fsycl-device-only -c -o %t.bc %s
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// RUN: sycl-post-link %t.bc -spec-const=default -o %t-split1.txt
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// RUN: llvm-dis %t-split1_0.bc
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// RUN: cat %t-split1_0.ll | FileCheck %s -check-prefixes=CHECK,CHECK-IR
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// RUN: cat %t-split1_0.prop | FileCheck %s -check-prefixes=CHECK,CHECK-PROP
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// RUN: llvm-spirv -o %t-split1_0.spv -spirv-max-version=1.1 -spirv-ext=+all %t-split1_0.bc
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//
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//==----------- SYCL-2020-spec-const-ids-order.cpp -------------------------==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// The test checks that the tool chain correctly identifies all specialization
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// constants, emits correct specialization constats map file and can properly
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// translate the resulting bitcode to SPIR-V.
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#include <CL/sycl.hpp>
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const static sycl::specialization_id<int> SpecConst42{42};
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const static sycl::specialization_id<int> SecondValue{42};
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const static sycl::specialization_id<int> ConstantId{42};
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const static sycl::specialization_id<int> Val23{42};
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int main() {
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sycl::queue queue;
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{
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sycl::buffer<int, 1> buf{sycl::range{4}};
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queue.submit([&](sycl::handler &cgh) {
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cgh.set_specialization_constant<SpecConst42>(1);
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cgh.set_specialization_constant<SecondValue>(2);
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cgh.set_specialization_constant<ConstantId>(3);
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cgh.set_specialization_constant<Val23>(4);
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auto acc = buf.get_access<sycl::access::mode::read_write>(cgh);
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cgh.single_task<class Kernel3Name>([=](sycl::kernel_handler kh) {
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acc[0] = kh.get_specialization_constant<SpecConst42>();
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acc[1] = kh.get_specialization_constant<SecondValue>();
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acc[2] = kh.get_specialization_constant<ConstantId>();
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acc[3] = kh.get_specialization_constant<Val23>();
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});
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});
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}
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return 0;
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}
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// CHECK-PROP: [SYCL/specialization constants]
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// CHECK: _ZTSN2cl4sycl6detail32specialization_id_name_generatorIL_ZL5Val23EEE
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// CHECK-IR-SAME: i32 [[#ID:]]
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// CHECK-NEXT: _ZTSN2cl4sycl6detail32specialization_id_name_generatorIL_ZL10ConstantIdEEE
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// CHECK-IR-SAME: i32 [[#ID+1]]
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// CHECK-NEXT: _ZTSN2cl4sycl6detail32specialization_id_name_generatorIL_ZL11SecondValueEEE
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// CHECK-IR-SAME: i32 [[#ID+2]]
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// CHECK-NEXT: _ZTSN2cl4sycl6detail32specialization_id_name_generatorIL_ZL11SpecConst42EEE
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// CHECK-IR-SAME: i32 [[#ID+3]]

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