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21 | 21 |
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22 | 22 | /// -fintelfpga -fsycl-link tests |
23 | 23 | // RUN: touch %t.o |
24 | | -// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link %t.o -o libfoo.a 2>&1 \ |
| 24 | +// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -fsycl-link %t.o -o libfoo.a 2>&1 \ |
25 | 25 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-EARLY %s |
26 | | -// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.o -o libfoo.a 2>&1 \ |
| 26 | +// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -fsycl-link=early %t.o -o libfoo.a 2>&1 \ |
27 | 27 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-EARLY %s |
28 | | -// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=image %t.o -o libfoo.a 2>&1 \ |
| 28 | +// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -fsycl-link=image %t.o -o libfoo.a 2>&1 \ |
29 | 29 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-IMAGE %s |
30 | 30 | // CHK-FPGA-LINK-NOT: clang-offload-bundler{{.*}} "-check-section" |
31 | 31 | // CHK-FPGA-LINK: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUT:.+\.o]]" "-outputs=[[OUTPUT1:.+\.o]]" "-unbundle" |
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50 | 50 |
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51 | 51 | /// -fintelfpga -fsycl-link clang-cl specific |
52 | 52 | // RUN: touch %t.obj |
53 | | -// RUN: %clang_cl -### -fsycl -fintelfpga -fsycl-link %t.obj -Folibfoo.lib 2>&1 \ |
| 53 | +// RUN: %clang_cl -### -fsycl -fintelfpga -fno-sycl-devicelib -fsycl-link %t.obj -Folibfoo.lib 2>&1 \ |
54 | 54 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-WIN %s |
55 | | -// RUN: %clang_cl -### -fsycl -fintelfpga -fsycl-link %t.obj -o libfoo.lib 2>&1 \ |
| 55 | +// RUN: %clang_cl -### -fsycl -fintelfpga -fno-sycl-devicelib -fsycl-link %t.obj -o libfoo.lib 2>&1 \ |
56 | 56 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-WIN %s |
57 | 57 | // CHK-FPGA-LINK-WIN: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice{{.*}}" "-inputs=[[INPUT:.+\.obj]]" "-outputs=[[OUTPUT1:.+\.obj]]" "-unbundle" |
58 | 58 | // CHK-FPGA-LINK-WIN-NOT: clang-offload-bundler{{.*}} |
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185 | 185 |
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186 | 186 | /// -fintelfpga -fsycl-link from source |
187 | 187 | // RUN: touch %t.cpp |
188 | | -// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \ |
| 188 | +// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \ |
189 | 189 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-SRC,CHK-FPGA-LINK-SRC-DEFAULT %s |
190 | | -// RUN: %clang_cl -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \ |
| 190 | +// RUN: %clang_cl -### -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \ |
191 | 191 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-SRC,CHK-FPGA-LINK-SRC-CL %s |
192 | 192 | // CHK-FPGA-LINK-SRC: 0: input, "[[INPUT:.+\.cpp]]", c++, (host-sycl) |
193 | 193 | // CHK-FPGA-LINK-SRC: 1: preprocessor, {0}, c++-cpp-output, (host-sycl) |
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275 | 275 |
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276 | 276 | /// -fintelfpga dependency file use from object phases test |
277 | 277 | // RUN: touch %t-1.o |
278 | | -// RUN: %clangxx -fsycl -fintelfpga -ccc-print-phases -### %t-1.o 2>&1 \ |
| 278 | +// RUN: %clangxx -fsycl -fno-sycl-devicelib -fintelfpga -ccc-print-phases -### %t-1.o 2>&1 \ |
279 | 279 | // RUN: | FileCheck -check-prefix=CHK-FPGA-DEP-FILES-OBJ-PHASES -DINPUT=%t-1.o %s |
280 | | -// RUN: %clang_cl -fsycl -fintelfpga -ccc-print-phases -### %t-1.o 2>&1 \ |
| 280 | +// RUN: %clang_cl -fsycl -fno-sycl-devicelib -fintelfpga -ccc-print-phases -### %t-1.o 2>&1 \ |
281 | 281 | // RUN: | FileCheck -check-prefix=CHK-FPGA-DEP-FILES-OBJ-PHASES -DINPUT=%t-1.o %s |
282 | 282 | // CHK-FPGA-DEP-FILES-OBJ-PHASES: 0: input, "[[INPUT]]", object, (host-sycl) |
283 | 283 | // CHK-FPGA-DEP-FILES-OBJ-PHASES: 1: clang-offload-unbundler, {0}, object, (host-sycl) |
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348 | 348 | // RUN: llc -filetype=obj -o %t-aoco_cl.o %t-aoco_cl.bc |
349 | 349 | // RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o |
350 | 350 | // RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco_cl.o |
351 | | -// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \ |
| 351 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \ |
352 | 352 | // RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES %s |
353 | 353 | // CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl) |
354 | 354 | // CHK-FPGA-AOCO-PHASES: 1: input, "[[INPUTCPP:.+\.cpp]]", c++, (host-sycl) |
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375 | 375 | // CHK-FPGA-AOCO-PHASES: 22: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {21}, image |
376 | 376 |
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377 | 377 | /// FPGA AOCO Windows phases check |
378 | | -// RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \ |
| 378 | +// RUN: %clang_cl -fsycl -fno-sycl-devicelib -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \ |
379 | 379 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES-WIN %s |
380 | 380 | // CHK-FPGA-AOCO-PHASES-WIN: 0: input, "{{.*}}", object, (host-sycl) |
381 | 381 | // CHK-FPGA-AOCO-PHASES-WIN: 1: input, "[[INPUTSRC:.+\.cpp]]", c++, (host-sycl) |
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401 | 401 | // CHK-FPGA-AOCO-PHASES-WIN: 21: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {20}, image |
402 | 402 |
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403 | 403 | /// aoco test, checking tools |
404 | | -// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \ |
| 404 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \ |
405 | 405 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s |
406 | | -// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aoco.a -### %s 2>&1 \ |
| 406 | +// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fno-sycl-devicelib -fintelfpga %t_aoco.a -### %s 2>&1 \ |
407 | 407 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s |
408 | | -// RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco_cl.a -### %s 2>&1 \ |
| 408 | +// RUN: %clang_cl -fsycl -fno-sycl-devicelib -fintelfpga -foffload-static-lib=%t_aoco_cl.a -### %s 2>&1 \ |
409 | 409 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s |
410 | | -// RUN: %clang_cl -fsycl -fintelfpga %t_aoco_cl.a -### %s 2>&1 \ |
| 410 | +// RUN: %clang_cl -fsycl -fno-sycl-devicelib -fintelfpga %t_aoco_cl.a -### %s 2>&1 \ |
411 | 411 | // RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s |
412 | 412 | // CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-check-section" |
413 | 413 | // CHK-FPGA-AOCO-LIN: clang{{.*}} "-emit-obj" {{.*}} "-o" "[[HOSTOBJ:.+\.o]]" |
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