@@ -496,6 +496,13 @@ DIE *DwarfDebug::updateSubprogramScopeDIE(CompileUnit *SPCU, DISubprogram *SP) {
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}
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}
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+ if (m_pModule && m_pModule->getFunction () &&
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+ m_pModule->getFunction ()->getSubprogram () == SP &&
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+ m_pModule->GetType () == VISAModule::ObjectType::SUBROUTINE) {
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+ SPCU->addUInt (SPDie, dwarf::DW_AT_calling_convention, dwarf::DW_FORM_data1,
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+ dwarf::DW_CC_nocall);
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+ }
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+
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if (EmitSettings.EnableRelocation ) {
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auto Id = m_pModule->GetFuncId ();
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SPCU->addLabelAddress (SPDie, dwarf::DW_AT_low_pc,
@@ -1131,15 +1138,11 @@ void DwarfDebug::beginModule() {
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SectionMap[Asm->GetTextSection ()];
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Asm->SwitchSection (Asm->GetDwarfFrameSection ());
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- if (m_pModule->getSubroutines (*VisaDbgInfo)->empty ()) {
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- // First stack call CIE is written out,
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- // next subroutine CIE if required.
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- offsetCIEStackCall = 0 ;
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- offsetCIESubroutine = writeStackcallCIE ();
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- } else {
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- // TODO: .debug_frame for subrotuines is currently unsupported.
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- // writeSubroutineCIE();
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- }
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+ offsetCIEStackCall = 0 ;
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+ offsetCIESubroutine = writeStackcallCIE ();
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+ // First stack call CIE is written out,
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+ // next subroutine CIE.
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+ writeSubroutineCIE ();
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}
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// Attach DW_AT_inline attribute with inlined subprogram DIEs.
@@ -2312,13 +2315,13 @@ void DwarfDebug::endFunction(const Function *MF) {
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}
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Asm->SwitchSection (Asm->GetDwarfFrameSection ());
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- if (m_pModule-> getSubroutines (*VisaDbgInfo)-> empty ()) {
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- LLVM_DEBUG ( dbgs () << " [DwarfDebug] writing FDEStackCall start --- \n " );
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- writeFDEStackCall (m_pModule );
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- LLVM_DEBUG ( dbgs () << " [DwarfDebug] writing FDEStackCall end *** \n " );
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+
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+ if (m_pModule-> GetType () == VISAModule::ObjectType::SUBROUTINE) {
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+ LLVM_DEBUG ( dbgs () << " [DwarfDebug] writing FDESubproutine *** \n " );
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+ writeFDESubroutine (m_pModule );
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} else {
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- LLVM_DEBUG (dbgs () << " [DwarfDebug] FDESubproutine skipped ***\n " );
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- // writeFDESubroutine (m_pModule);
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+ LLVM_DEBUG (dbgs () << " [DwarfDebug] writing FDEStackCall ***\n " );
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+ writeFDEStackCall (m_pModule);
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}
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ScopeVariables.clear ();
@@ -2808,6 +2811,11 @@ uint32_t DwarfDebug::writeSubroutineCIE() {
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std::vector<uint8_t > data;
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auto numGRFs = GetVISAModule ()->getNumGRFs ();
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+ auto writeSameValue = [](std::vector<uint8_t > &data, uint32_t srcReg) {
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+ write (data, (uint8_t )llvm::dwarf::DW_CFA_same_value);
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+ writeULEB128 (data, srcReg);
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+ };
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+
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// Emit CIE
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auto ptrSize = Asm->GetPointerSize ();
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// The size of the length field plus the value of length must be an integral
@@ -2818,7 +2826,7 @@ uint32_t DwarfDebug::writeSubroutineCIE() {
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// Write CIE_id
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write (data,
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- ptrSize == 4 ? (uint32_t )0xfffffffe : (uint64_t )0xfffffffffffffffe );
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+ ptrSize == 4 ? (uint32_t )0xffffffff : (uint64_t )0xffffffffffffffff );
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// version - ubyte
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write (data, (uint8_t )4 );
@@ -2841,13 +2849,13 @@ uint32_t DwarfDebug::writeSubroutineCIE() {
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// return address register - uleb128
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// set machine return register to one which is physically
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// absent. later CFA instructions map this to a valid GRF.
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- writeULEB128 (data, numGRFs );
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+ writeULEB128 (data, RegisterNumbering::IP );
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// initial instructions (array of ubyte)
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- // DW_CFA_def_cfa -> fpreg+0
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- write (data, ( uint8_t )llvm::dwarf::DW_CFA_def_cfa);
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- writeULEB128 (data, 0 );
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- writeULEB128 (data, 0 );
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+ // same value rule for all GRFs
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+ for ( unsigned int grf = 0 ; grf != numGRFs; ++grf) {
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+ writeSameValue (data, GetEncodedRegNum<RegisterNumbering::GRFBase>(grf) );
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+ }
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while ((lenSize + data.size ()) % ptrSize != 0 )
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// Insert DW_CFA_nop
@@ -3028,7 +3036,8 @@ uint32_t DwarfDebug::writeStackcallCIE() {
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}
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void DwarfDebug::writeFDESubroutine (VISAModule *m) {
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- std::vector<uint8_t > data;
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+ std::vector<uint8_t > data, data1;
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+ uint64_t LabelOffset = std::numeric_limits<uint64_t >::max ();
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auto firstInst = (m->GetInstInfoMap ()->begin ())->first ;
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// TODO: fixup to a proper name getter
@@ -3045,8 +3054,6 @@ void DwarfDebug::writeFDESubroutine(VISAModule *m) {
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if (!sub)
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return ;
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- auto numGRFs = GetVISAModule ()->getNumGRFs ();
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-
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// Emit CIE
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auto ptrSize = Asm->GetPointerSize ();
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uint8_t lenSize = 4 ;
@@ -3081,27 +3088,68 @@ void DwarfDebug::writeFDESubroutine(VISAModule *m) {
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// assume ret var is live throughout sub-routine and it is contained
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// in same GRF.
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- uint32_t linearAddr =
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- (retvarLR.front ().var .mapping .r .regNum * m_pModule->getGRFSizeInBytes ()) +
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- retvarLR.front ().var .mapping .r .subRegNum ;
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+ uint16_t retRegNum = retvarLR.front ().var .mapping .r .regNum ;
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+ uint16_t retSubRegNum = retvarLR.front ().var .mapping .r .subRegNum ;
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// initial location
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- write (data, ptrSize == 4 ? (uint32_t )genOffStart : genOffStart);
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+ // LabelOffset holds offset where start %ip is written to buffer.
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+ // Code later uses this to insert label for relocation.
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+ LabelOffset = data.size ();
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+ if (EmitSettings.EnableRelocation ) {
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+ write (data,
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+ ptrSize == 4 ? (uint32_t )0xfefefefe : (uint64_t )0xfefefefefefefefe );
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+ } else {
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+ write (data, ptrSize == 4 ? (uint32_t )genOffStart : (uint64_t )genOffStart);
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+ }
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// address range
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write (data, ptrSize == 4 ? (uint32_t )(genOffEnd - genOffStart)
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- : (genOffEnd - genOffStart));
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+ : (uint64_t )( genOffEnd - genOffStart));
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// instruction - ubyte
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- write (data, (uint8_t )llvm::dwarf::DW_CFA_register );
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+ write (data, (uint8_t )llvm::dwarf::DW_CFA_val_expression );
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// return reg operand
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- writeULEB128 (data, numGRFs );
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+ writeULEB128 (data, RegisterNumbering ::IP );
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// actual reg holding retval
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- writeULEB128 (data, linearAddr);
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+ data1.clear ();
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+ write (data1, (uint8_t )llvm::dwarf::DW_OP_const2u);
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+ write (data1,
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+ (uint16_t )GetEncodedRegNum<RegisterNumbering::GRFBase>(retRegNum));
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+ write (data1, (uint8_t )llvm::dwarf::DW_OP_const2u);
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+ write (data1, (uint16_t )(retSubRegNum * 8 ));
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+ write (data1, (uint8_t )DW_OP_INTEL_regval_bits);
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+ write (data1, (uint8_t )32 );
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+
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+ writeULEB128 (data, data1.size ());
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+ for (auto item : data1)
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+ write (data, (uint8_t )item);
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// initial instructions (array of ubyte)
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+ // DW_CFA_def_cfa_expression = DW_OP_lit0
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+ write (data, (uint8_t )llvm::dwarf::DW_CFA_def_cfa_expression);
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+ data1.clear ();
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+ if (m->StackCallContext ()) {
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+ // CFA is BE_SP location
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+ write (data1, (uint8_t )llvm::dwarf::DW_OP_const2u);
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+ write (data1, (uint16_t )GetEncodedRegNum<RegisterNumbering::GRFBase>(
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+ GetSpecialGRF ()));
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+ write (data1, (uint8_t )llvm::dwarf::DW_OP_const1u);
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+ if (GetABIVersion () == 3 )
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+ write (data1, (uint8_t )(BESPSubReg_3 * 32 ));
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+ else
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+ write (data1, (uint8_t )(BESPSubReg_1_2 * 32 ));
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+ write (data1, (uint8_t )DW_OP_INTEL_regval_bits);
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+ write (data1, (uint8_t )32 );
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+ encodeScratchAddrSpace (data1);
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+ } else {
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+ write (data1, (uint8_t )llvm::dwarf::DW_OP_lit0);
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+ }
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+ writeULEB128 (data, data1.size ());
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+ for (auto item : data1)
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+ write (data, (uint8_t )item);
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+
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while ((lenSize + data.size ()) % ptrSize != 0 )
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// Insert DW_CFA_nop
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write (data, (uint8_t )llvm::dwarf::DW_CFA_nop);
@@ -3111,8 +3159,24 @@ void DwarfDebug::writeFDESubroutine(VISAModule *m) {
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Asm->EmitInt32 (0xffffffff );
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Asm->EmitIntValue (data.size (), ptrSize);
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- for (auto &byte : data)
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- Asm->EmitInt8 (byte);
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+ if (EmitSettings.EnableRelocation ) {
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+ uint32_t ByteOffset = 0 ;
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+
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+ for (auto it = data.begin (); it != data.end (); ++it) {
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+ auto byte = *it;
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+ if (ByteOffset++ == (uint32_t )LabelOffset) {
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+ auto Label = GetLabelBeforeIp (genOffStart);
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+ Asm->EmitLabelReference (Label, ptrSize, false );
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+ // Now skip ptrSize number of bytes from data
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+ std::advance (it, ptrSize);
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+ byte = *it;
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+ }
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+ Asm->EmitInt8 (byte);
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+ }
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+ } else {
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+ for (auto &byte : data)
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+ Asm->EmitInt8 (byte);
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+ }
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}
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void DwarfDebug::writeFDEStackCall (VISAModule *m) {
@@ -3316,7 +3380,7 @@ void DwarfDebug::writeFDEStackCall(VISAModule *m) {
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write (data1, (uint8_t )llvm::dwarf::DW_OP_const4u);
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write (data1, (uint32_t )(DWRegEncoded));
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write (data1, (uint8_t )llvm::dwarf::DW_OP_const2u);
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- write (data1, (uint16_t )(getRetIPSubReg () * 4 ));
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+ write (data1, (uint16_t )(getRetIPSubReg () * 4 * 8 ));
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write (data1, (uint8_t )DW_OP_INTEL_regval_bits);
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write (data1, (uint8_t )32 );
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writeULEB128 (cfaOps[item.end + MovGenInstSizeInBytes], data1.size ());
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