@@ -209,6 +209,8 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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RESULT_INT (0 );
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break ;
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case CL_DEVICE_GLOBAL_MEM_SIZE: {
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+ #ifdef __arm__
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+ // TODO: legacy code here, need to verify correctness with ARM board
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auto gmem_id = acl_get_default_device_global_memory (device->def );
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if (gmem_id < 0 ) {
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RESULT_INT (0 );
@@ -217,10 +219,20 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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cl_ulong size =
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ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
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.get_usable_range ());
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- #ifdef __arm__
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// on SoC board, two DDR systems are not equivalent
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// so only half can be accessed with a single alloc.
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size /= 2 ;
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+ #else
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+ cl_ulong size = 0 ;
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+ for (unsigned gmem_idx = 0 ;
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+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
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+ gmem_idx++) {
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+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
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+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
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+ size += ACL_RANGE_SIZE (
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
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+ }
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+ }
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#endif
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RESULT_ULONG (size);
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break ;
@@ -251,13 +263,9 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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RESULT_UINT (acl_platform.max_constant_args );
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break ;
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- // "desktop" profile says global memory must be at least 128MB
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- // "embedded" profile says global memory must be at least 1MB
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case CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE: {
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- // Constant memory is global memory.
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- // However conformance_test_api min_max_constant_buffer_size
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- // expects to allocate two buffers of the size we say here.
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- // So be a shade conservative and cut it down by 4.
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+ #ifdef __arm__
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+ // TODO: legacy code here, need to verify correctness with ARM board
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auto gmem_id = acl_get_default_device_global_memory (device->def );
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if (gmem_id < 0 ) {
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RESULT_INT (0 );
@@ -267,13 +275,44 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
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.get_usable_range ()) /
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4 ;
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- #ifdef __arm__
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- // see above
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+ // Cut by 2 again, see comment for CL_DEVICE_GLOBAL_MEM_SIZE
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size /= 2 ;
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+ #else
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+ // Return the maximum size of a single allocation to the constant memory
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+ // (i.e., global memory)
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+ cl_ulong size = 0 ;
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+ for (unsigned gmem_idx = 0 ;
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+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
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+ gmem_idx++) {
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+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
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+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
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+ cl_ulong curr_size = 0 ;
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+ // TODO: investigate if ACL_MEM_ALIGN of 0x400 is still required to
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+ // perform device allocations to memory with 0 starting address
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+ acl_system_global_mem_allocation_type_t alloc_type =
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
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+ .allocation_type ;
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+ if (!alloc_type || (alloc_type & ACL_GLOBAL_MEM_DEVICE_ALLOCATION)) {
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+ curr_size = ACL_RANGE_SIZE (
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
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+ .get_usable_range ());
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+ } else {
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+ curr_size = ACL_RANGE_SIZE (
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
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+ }
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+ if (curr_size > size) {
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+ size = curr_size;
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+ }
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+ }
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+ }
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+ // Note: devices not of type CL_DEVICE_TYPE_CUSTOM and conformant
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+ // to OpenCL 1.2 spec will return size at least of 64KB here
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#endif
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RESULT_ULONG (size);
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} break ;
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case CL_DEVICE_MAX_MEM_ALLOC_SIZE: {
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+ #ifdef __arm__
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+ // TODO: legacy code here, need to verify correctness with ARM board
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auto gmem_id = acl_get_default_device_global_memory (device->def );
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if (gmem_id < 0 ) {
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RESULT_INT (0 );
@@ -282,7 +321,6 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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cl_ulong size =
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ACL_RANGE_SIZE (device->def .autodiscovery_def .global_mem_defs [gmem_id]
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.get_usable_range ());
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- #ifdef __arm__
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// on SoC board, two DDR systems are not equivalent
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// so only half can be accessed with a single alloc.
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@@ -294,6 +332,35 @@ CL_API_ENTRY cl_int CL_API_CALL clGetDeviceInfoIntelFPGA(
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} else {
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size = size / 8 ;
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}
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+ #else
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+ cl_ulong size = 0 ;
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+ for (unsigned gmem_idx = 0 ;
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+ gmem_idx < device->def .autodiscovery_def .num_global_mem_systems ;
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+ gmem_idx++) {
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+ if (device->def .autodiscovery_def .global_mem_defs [gmem_idx].type ==
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+ ACL_GLOBAL_MEM_DEVICE_PRIVATE) {
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+ cl_ulong curr_size = 0 ;
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+ // TODO: investigate if ACL_MEM_ALIGN of 0x400 is still required to
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+ // perform device allocations to memory with 0 starting address
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+ acl_system_global_mem_allocation_type_t alloc_type =
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
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+ .allocation_type ;
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+ if (!alloc_type || (alloc_type & ACL_GLOBAL_MEM_DEVICE_ALLOCATION)) {
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+ curr_size = ACL_RANGE_SIZE (
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx]
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+ .get_usable_range ());
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+ } else {
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+ curr_size = ACL_RANGE_SIZE (
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+ device->def .autodiscovery_def .global_mem_defs [gmem_idx].range );
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+ }
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+ if (curr_size > size) {
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+ size = curr_size;
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+ }
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+ }
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+ }
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+ // Note: devices not of type CL_DEVICE_TYPE_CUSTOM and
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+ // conformant to OpenCL 1.2 spec will return size at least of
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+ // max(CL_DEVICE_GLOBAL_MEM_SIZE/4, 1*1024*1024) here
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#endif
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RESULT_ULONG (size);
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} break ;
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