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Unify register representation
Signed-off-by: Ludvig Liljenberg <[email protected]>
1 parent 5cde3c4 commit c1ada25

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20 files changed

+1986
-903
lines changed

20 files changed

+1986
-903
lines changed

‎src/hyperlight_host/src/hypervisor/gdb/hyperv_debug.rs‎

Lines changed: 10 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,10 @@ use std::collections::HashMap;
1919
use windows::Win32::System::Hypervisor::WHV_VP_EXCEPTION_CONTEXT;
2020

2121
use super::arch::{MAX_NO_OF_HW_BP, vcpu_stop_reason};
22-
use super::{GuestDebug, SW_BP_SIZE, VcpuStopReason, X86_64Regs};
22+
use super::{GuestDebug, SW_BP_SIZE, VcpuStopReason};
23+
use crate::hypervisor::regs::CommonRegisters;
2324
use crate::hypervisor::windows_hypervisor_platform::VMProcessor;
24-
use crate::hypervisor::wrappers::{WHvDebugRegisters, WHvGeneralRegisters};
25+
use crate::hypervisor::wrappers::WHvDebugRegisters;
2526
use crate::{HyperlightError, Result, new_error};
2627

2728
/// KVM Debug struct
@@ -54,7 +55,7 @@ impl HypervDebug {
5455
/// Returns the instruction pointer from the stopped vCPU
5556
fn get_instruction_pointer(&self, vcpu_fd: &VMProcessor) -> Result<u64> {
5657
let regs = vcpu_fd
57-
.get_regs()
58+
.regs()
5859
.map_err(|e| new_error!("Could not retrieve registers from vCPU: {:?}", e))?;
5960

6061
Ok(regs.rip)
@@ -103,7 +104,7 @@ impl HypervDebug {
103104
self.single_step = step;
104105

105106
let mut regs = vcpu_fd
106-
.get_regs()
107+
.regs()
107108
.map_err(|e| new_error!("Could not get registers: {:?}", e))?;
108109

109110
// Set TF Flag to enable Traps
@@ -114,7 +115,7 @@ impl HypervDebug {
114115
}
115116

116117
vcpu_fd
117-
.set_general_purpose_registers(&regs)
118+
.set_regs(&regs)
118119
.map_err(|e| new_error!("Could not set guest registers: {:?}", e))?;
119120

120121
Ok(())
@@ -185,10 +186,10 @@ impl GuestDebug for HypervDebug {
185186
self.sw_breakpoints.remove(addr)
186187
}
187188

188-
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut X86_64Regs) -> Result<()> {
189+
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut CommonRegisters) -> Result<()> {
189190
log::debug!("Read registers");
190191
let vcpu_regs = vcpu_fd
191-
.get_regs()
192+
.regs()
192193
.map_err(|e| new_error!("Could not read guest registers: {:?}", e))?;
193194

194195
regs.rax = vcpu_regs.rax;
@@ -224,32 +225,11 @@ impl GuestDebug for HypervDebug {
224225
.map_err(|_| HyperlightError::TranslateGuestAddress(gva))
225226
}
226227

227-
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &X86_64Regs) -> Result<()> {
228+
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &CommonRegisters) -> Result<()> {
228229
log::debug!("Write registers");
229-
let regs = WHvGeneralRegisters {
230-
rax: regs.rax,
231-
rbx: regs.rbx,
232-
rcx: regs.rcx,
233-
rdx: regs.rdx,
234-
rsi: regs.rsi,
235-
rdi: regs.rdi,
236-
rbp: regs.rbp,
237-
rsp: regs.rsp,
238-
r8: regs.r8,
239-
r9: regs.r9,
240-
r10: regs.r10,
241-
r11: regs.r11,
242-
r12: regs.r12,
243-
r13: regs.r13,
244-
r14: regs.r14,
245-
r15: regs.r15,
246-
247-
rip: regs.rip,
248-
rflags: regs.rflags,
249-
};
250230

251231
vcpu_fd
252-
.set_general_purpose_registers(&regs)
232+
.set_regs(regs)
253233
.map_err(|e| new_error!("Could not write guest registers: {:?}", e))
254234
}
255235
}

‎src/hyperlight_host/src/hypervisor/gdb/kvm_debug.rs‎

Lines changed: 6 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -18,12 +18,13 @@ use std::collections::HashMap;
1818

1919
use kvm_bindings::{
2020
KVM_GUESTDBG_ENABLE, KVM_GUESTDBG_SINGLESTEP, KVM_GUESTDBG_USE_HW_BP, KVM_GUESTDBG_USE_SW_BP,
21-
kvm_debug_exit_arch, kvm_guest_debug, kvm_regs,
21+
kvm_debug_exit_arch, kvm_guest_debug,
2222
};
2323
use kvm_ioctls::VcpuFd;
2424

2525
use super::arch::{MAX_NO_OF_HW_BP, SW_BP_SIZE, vcpu_stop_reason};
26-
use super::{GuestDebug, VcpuStopReason, X86_64Regs};
26+
use super::{GuestDebug, VcpuStopReason};
27+
use crate::hypervisor::regs::CommonRegisters;
2728
use crate::{HyperlightError, Result, new_error};
2829

2930
/// KVM Debug struct
@@ -167,7 +168,7 @@ impl GuestDebug for KvmDebug {
167168
self.sw_breakpoints.remove(addr)
168169
}
169170

170-
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut X86_64Regs) -> Result<()> {
171+
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut CommonRegisters) -> Result<()> {
171172
log::debug!("Read registers");
172173
let vcpu_regs = vcpu_fd
173174
.get_regs()
@@ -212,29 +213,9 @@ impl GuestDebug for KvmDebug {
212213
}
213214
}
214215

215-
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &X86_64Regs) -> Result<()> {
216+
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &CommonRegisters) -> Result<()> {
216217
log::debug!("Write registers");
217-
let new_regs = kvm_regs {
218-
rax: regs.rax,
219-
rbx: regs.rbx,
220-
rcx: regs.rcx,
221-
rdx: regs.rdx,
222-
rsi: regs.rsi,
223-
rdi: regs.rdi,
224-
rbp: regs.rbp,
225-
rsp: regs.rsp,
226-
r8: regs.r8,
227-
r9: regs.r9,
228-
r10: regs.r10,
229-
r11: regs.r11,
230-
r12: regs.r12,
231-
r13: regs.r13,
232-
r14: regs.r14,
233-
r15: regs.r15,
234-
235-
rip: regs.rip,
236-
rflags: regs.rflags,
237-
};
218+
let new_regs = regs.into();
238219

239220
vcpu_fd
240221
.set_regs(&new_regs)

‎src/hyperlight_host/src/hypervisor/gdb/mod.rs‎

Lines changed: 6 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ use thiserror::Error;
4646
use x86_64_target::HyperlightSandboxTarget;
4747

4848
use super::InterruptHandle;
49+
use crate::hypervisor::regs::CommonRegisters;
4950
use crate::mem::layout::SandboxMemoryLayout;
5051
use crate::mem::mgr::SandboxMemoryManager;
5152
use crate::mem::shared_mem::HostSharedMemory;
@@ -88,29 +89,6 @@ impl From<GdbTargetError> for TargetError<GdbTargetError> {
8889
}
8990
}
9091

91-
/// Struct that contains the x86_64 core registers
92-
#[derive(Debug, Default)]
93-
pub(crate) struct X86_64Regs {
94-
pub(crate) rax: u64,
95-
pub(crate) rbx: u64,
96-
pub(crate) rcx: u64,
97-
pub(crate) rdx: u64,
98-
pub(crate) rsi: u64,
99-
pub(crate) rdi: u64,
100-
pub(crate) rbp: u64,
101-
pub(crate) rsp: u64,
102-
pub(crate) r8: u64,
103-
pub(crate) r9: u64,
104-
pub(crate) r10: u64,
105-
pub(crate) r11: u64,
106-
pub(crate) r12: u64,
107-
pub(crate) r13: u64,
108-
pub(crate) r14: u64,
109-
pub(crate) r15: u64,
110-
pub(crate) rip: u64,
111-
pub(crate) rflags: u64,
112-
}
113-
11492
/// Defines the possible reasons for which a vCPU can be stopped when debugging
11593
#[derive(Debug)]
11694
pub enum VcpuStopReason {
@@ -140,7 +118,7 @@ pub(crate) enum DebugMsg {
140118
RemoveSwBreakpoint(u64),
141119
Step,
142120
WriteAddr(u64, Vec<u8>),
143-
WriteRegisters(X86_64Regs),
121+
WriteRegisters(CommonRegisters),
144122
}
145123

146124
/// Enumerates the possible responses that a hypervisor can provide to a debugger
@@ -155,7 +133,7 @@ pub(crate) enum DebugResponse {
155133
NotAllowed,
156134
InterruptHandle(Arc<dyn InterruptHandle>),
157135
ReadAddr(Vec<u8>),
158-
ReadRegisters(X86_64Regs),
136+
ReadRegisters(CommonRegisters),
159137
RemoveHwBreakpoint(bool),
160138
RemoveSwBreakpoint(bool),
161139
Step,
@@ -183,13 +161,13 @@ pub(super) trait GuestDebug {
183161
fn delete_sw_breakpoint_data(&mut self, addr: &u64) -> Option<[u8; 1]>;
184162

185163
/// Read registers
186-
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut X86_64Regs) -> crate::Result<()>;
164+
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut CommonRegisters) -> crate::Result<()>;
187165
/// Enables or disables stepping and sets the vCPU debug configuration
188166
fn set_single_step(&mut self, vcpu_fd: &Self::Vcpu, enable: bool) -> crate::Result<()>;
189167
/// Translates the guest address to physical address
190168
fn translate_gva(&self, vcpu_fd: &Self::Vcpu, gva: u64) -> crate::Result<u64>;
191169
/// Write registers
192-
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &X86_64Regs) -> crate::Result<()>;
170+
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &CommonRegisters) -> crate::Result<()>;
193171

194172
/// Adds hardware breakpoint
195173
fn add_hw_breakpoint(&mut self, vcpu_fd: &Self::Vcpu, addr: u64) -> crate::Result<()> {
@@ -449,7 +427,7 @@ mod tests {
449427
let res = gdb_conn.try_recv();
450428
assert!(res.is_err());
451429

452-
let res = hyp_conn.send(DebugResponse::ReadRegisters(X86_64Regs::default()));
430+
let res = hyp_conn.send(DebugResponse::ReadRegisters(Default::default()));
453431
assert!(res.is_ok());
454432

455433
let res = gdb_conn.recv();

‎src/hyperlight_host/src/hypervisor/gdb/mshv_debug.rs‎

Lines changed: 5 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -28,12 +28,12 @@ use std::collections::HashMap;
2828

2929
use mshv_bindings::{
3030
DebugRegisters, HV_TRANSLATE_GVA_VALIDATE_READ, HV_TRANSLATE_GVA_VALIDATE_WRITE,
31-
StandardRegisters,
3231
};
3332
use mshv_ioctls::VcpuFd;
3433

3534
use super::arch::{MAX_NO_OF_HW_BP, SW_BP_SIZE, vcpu_stop_reason};
36-
use super::{GuestDebug, VcpuStopReason, X86_64Regs};
35+
use super::{GuestDebug, VcpuStopReason};
36+
use crate::hypervisor::regs::CommonRegisters;
3737
use crate::{HyperlightError, Result, new_error};
3838

3939
#[derive(Debug, Default)]
@@ -194,7 +194,7 @@ impl GuestDebug for MshvDebug {
194194
self.sw_breakpoints.remove(addr)
195195
}
196196

197-
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut X86_64Regs) -> Result<()> {
197+
fn read_regs(&self, vcpu_fd: &Self::Vcpu, regs: &mut CommonRegisters) -> Result<()> {
198198
log::debug!("Read registers");
199199
let vcpu_regs = vcpu_fd
200200
.get_regs()
@@ -236,29 +236,9 @@ impl GuestDebug for MshvDebug {
236236
Ok(addr)
237237
}
238238

239-
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &X86_64Regs) -> Result<()> {
239+
fn write_regs(&self, vcpu_fd: &Self::Vcpu, regs: &CommonRegisters) -> Result<()> {
240240
log::debug!("Write registers");
241-
let new_regs = StandardRegisters {
242-
rax: regs.rax,
243-
rbx: regs.rbx,
244-
rcx: regs.rcx,
245-
rdx: regs.rdx,
246-
rsi: regs.rsi,
247-
rdi: regs.rdi,
248-
rbp: regs.rbp,
249-
rsp: regs.rsp,
250-
r8: regs.r8,
251-
r9: regs.r9,
252-
r10: regs.r10,
253-
r11: regs.r11,
254-
r12: regs.r12,
255-
r13: regs.r13,
256-
r14: regs.r14,
257-
r15: regs.r15,
258-
259-
rip: regs.rip,
260-
rflags: regs.rflags,
261-
};
241+
let new_regs = regs.into();
262242

263243
vcpu_fd
264244
.set_regs(&new_regs)

‎src/hyperlight_host/src/hypervisor/gdb/x86_64_target.rs‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -31,8 +31,9 @@ use gdbstub::target::ext::section_offsets::{Offsets, SectionOffsets};
3131
use gdbstub::target::{Target, TargetError, TargetResult};
3232
use gdbstub_arch::x86::X86_64_SSE as GdbTargetArch;
3333

34-
use super::{DebugCommChannel, DebugMsg, DebugResponse, GdbTargetError, X86_64Regs};
34+
use super::{DebugCommChannel, DebugMsg, DebugResponse, GdbTargetError};
3535
use crate::hypervisor::InterruptHandle;
36+
use crate::hypervisor::regs::CommonRegisters;
3637

3738
/// Gdbstub target used by the gdbstub crate to provide GDB protocol implementation
3839
pub(crate) struct HyperlightSandboxTarget {
@@ -248,7 +249,7 @@ impl SingleThreadBase for HyperlightSandboxTarget {
248249
) -> TargetResult<(), Self> {
249250
log::debug!("Write regs");
250251

251-
let regs = X86_64Regs {
252+
let regs = CommonRegisters {
252253
rax: regs.regs[0],
253254
rbx: regs.regs[1],
254255
rcx: regs.regs[2],
@@ -482,7 +483,7 @@ mod tests {
482483

483484
// Check response to read registers - send the response first to not be blocked
484485
// by the recv call in the target
485-
let msg = DebugResponse::ReadRegisters(X86_64Regs::default());
486+
let msg = DebugResponse::ReadRegisters(CommonRegisters::default());
486487
let res = gdb_conn.send(msg);
487488
assert!(res.is_ok());
488489

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