From 1a73a737717c84db163d8df62966a6e9f4e25764 Mon Sep 17 00:00:00 2001 From: Brian Bohe Date: Thu, 15 Dec 2022 13:14:46 -0800 Subject: [PATCH 1/5] Unifying var desc and liveness update on storeLclFld/Var --- src/coreclr/jit/codegen.h | 3 +-- src/coreclr/jit/codegenarm.cpp | 9 ++------- src/coreclr/jit/codegenarm64.cpp | 22 +++++----------------- src/coreclr/jit/codegenlinear.cpp | 24 ++++++++++++++++++++++++ src/coreclr/jit/codegenxarch.cpp | 23 ++--------------------- src/coreclr/jit/simdcodegenxarch.cpp | 14 +++++--------- 6 files changed, 39 insertions(+), 56 deletions(-) diff --git a/src/coreclr/jit/codegen.h b/src/coreclr/jit/codegen.h index 82a3482a3b5391..d5777a63a7bc93 100644 --- a/src/coreclr/jit/codegen.h +++ b/src/coreclr/jit/codegen.h @@ -1193,8 +1193,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #endif // !defined(TARGET_64BIT) - // Do liveness update for register produced by the current node in codegen after - // code has been emitted for it. + void genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc); void genProduceReg(GenTree* tree); void genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum); void genUnspillLocal( diff --git a/src/coreclr/jit/codegenarm.cpp b/src/coreclr/jit/codegenarm.cpp index adbc4147d5e480..78f7ca0fec3f2f 100644 --- a/src/coreclr/jit/codegenarm.cpp +++ b/src/coreclr/jit/codegenarm.cpp @@ -1116,19 +1116,14 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* tree) emitter* emit = GetEmitter(); emit->emitIns_S_R(ins, attr, dataReg, varNum, /* offset */ 0); - - // Updating variable liveness after instruction was emitted - genUpdateLife(tree); - - varDsc->SetRegNum(REG_STK); } else // store into register (i.e move into register) { // Assign into targetReg when dataReg (from op1) is not the same register inst_Mov(targetType, targetReg, dataReg, /* canSkip */ true); - - genProduceReg(tree); } + + genUpdateLifeStore(tree, targetReg, varDsc); } } } diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 4b0468af54ea7c..8323258b6c8637 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2971,18 +2971,13 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* lclNode) emitAttr attr = emitActualTypeSize(targetType); emit->emitIns_S_R(ins, attr, dataReg, varNum, /* offset */ 0); - - genUpdateLife(lclNode); - - varDsc->SetRegNum(REG_STK); } else // store into register (i.e move into register) { // Assign into targetReg when dataReg (from op1) is not the same register inst_Mov(targetType, targetReg, dataReg, /* canSkip */ true); - - genProduceReg(lclNode); } + genUpdateLifeStore(lclNode, targetReg, varDsc); } } @@ -5254,8 +5249,9 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) { assert(treeNode->OperIs(GT_STORE_LCL_FLD, GT_STORE_LCL_VAR)); - unsigned offs = treeNode->GetLclOffs(); - unsigned varNum = treeNode->GetLclNum(); + unsigned offs = treeNode->GetLclOffs(); + unsigned varNum = treeNode->GetLclNum(); + LclVarDsc* varDsc = compiler->lvaGetDesc(varNum); assert(varNum < compiler->lvaCount); GenTree* data = treeNode->gtGetOp1(); @@ -5273,8 +5269,6 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) // Update life after instruction emitted genUpdateLife(treeNode); - - LclVarDsc* varDsc = compiler->lvaGetDesc(varNum); varDsc->SetRegNum(REG_STK); return; @@ -5289,20 +5283,14 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) assert(GetEmitter()->isVectorRegister(tgtReg)); inst_Mov(treeNode->TypeGet(), tgtReg, dataReg, /* canSkip */ true); - genProduceReg(treeNode); } else { // Need an additional integer register to extract upper 4 bytes from data. regNumber tmpReg = treeNode->GetSingleTempReg(); GetEmitter()->emitStoreSimd12ToLclOffset(varNum, offs, dataReg, tmpReg); - - // Update life after instruction emitted - genUpdateLife(treeNode); - - LclVarDsc* varDsc = compiler->lvaGetDesc(varNum); - varDsc->SetRegNum(REG_STK); } + genUpdateLifeStore(treeNode, tgtReg, varDsc); } #endif // FEATURE_SIMD diff --git a/src/coreclr/jit/codegenlinear.cpp b/src/coreclr/jit/codegenlinear.cpp index 1cb20dde70a800..d064ff2254c919 100644 --- a/src/coreclr/jit/codegenlinear.cpp +++ b/src/coreclr/jit/codegenlinear.cpp @@ -2083,6 +2083,30 @@ void CodeGen::genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclN } } +//------------------------------------------------------------------------- +// genProduceReg: Do liveness udpate after tree store instructions were +// emitted, update result var's home if it was stored on stack. +// +// Arguments: +// tree - Gentree node +// targetReg - of the tree +// varDsc - result value's variable +// +// Return Value: +// None. +void CodeGen::genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc) +{ + if (targetReg != REG_NA) + { + genProduceReg(tree); + } + else + { + genUpdateLife(tree); + varDsc->SetRegNum(REG_STK); + } +} + //------------------------------------------------------------------------- // genProduceReg: do liveness update for register produced by the current // node in codegen after code has been emitted for it. diff --git a/src/coreclr/jit/codegenxarch.cpp b/src/coreclr/jit/codegenxarch.cpp index 54ea07cfc02b07..ced9145bc51c77 100644 --- a/src/coreclr/jit/codegenxarch.cpp +++ b/src/coreclr/jit/codegenxarch.cpp @@ -4883,17 +4883,7 @@ void CodeGen::genCodeForStoreLclFld(GenTreeLclFld* tree) { GetEmitter()->emitInsBinary(ins_Store(targetType), emitTypeSize(tree), tree, op1); } - - // Updating variable liveness after instruction was emitted - if (targetReg != REG_NA) - { - genProduceReg(tree); - } - else - { - genUpdateLife(tree); - varDsc->SetRegNum(REG_STK); - } + genUpdateLifeStore(tree, targetReg, varDsc); } //------------------------------------------------------------------------ @@ -5012,16 +5002,7 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* lclNode) emitTypeSize(targetType)); } } - // Updating variable liveness after instruction was emitted - if (targetReg != REG_NA) - { - genProduceReg(lclNode); - } - else - { - genUpdateLife(lclNode); - varDsc->SetRegNum(REG_STK); - } + genUpdateLifeStore(lclNode, targetReg, varDsc); } } diff --git a/src/coreclr/jit/simdcodegenxarch.cpp b/src/coreclr/jit/simdcodegenxarch.cpp index d02d760ffdc66c..cbe18a610f3abf 100644 --- a/src/coreclr/jit/simdcodegenxarch.cpp +++ b/src/coreclr/jit/simdcodegenxarch.cpp @@ -236,8 +236,9 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) GenTree* data = treeNode->Data(); assert(!data->isContained()); - regNumber tgtReg = treeNode->GetRegNum(); - regNumber dataReg = genConsumeReg(data); + regNumber tgtReg = treeNode->GetRegNum(); + regNumber dataReg = genConsumeReg(data); + LclVarDsc* varDsc = compiler->lvaGetDesc(varNum); if (tgtReg != REG_NA) { @@ -245,7 +246,6 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) assert(genIsValidFloatReg(tgtReg)); inst_Mov(treeNode->TypeGet(), tgtReg, dataReg, /* canSkip */ true); - genProduceReg(treeNode); } else { @@ -272,13 +272,9 @@ void CodeGen::genStoreLclTypeSimd12(GenTreeLclVarCommon* treeNode) // Store upper 4 bytes emit->emitIns_S_R(INS_movss, EA_4BYTE, tmpReg, varNum, offs + 8); } - - // Update the life of treeNode - genUpdateLife(treeNode); - - LclVarDsc* varDsc = compiler->lvaGetDesc(varNum); - varDsc->SetRegNum(REG_STK); } + + genUpdateLifeStore(treeNode, tgtReg, varDsc); } //----------------------------------------------------------------------------- From b565b67d271b1a85bbf40b6c9f62f2e9fe64eef6 Mon Sep 17 00:00:00 2001 From: Brian Bohe Date: Thu, 15 Dec 2022 13:46:21 -0800 Subject: [PATCH 2/5] Updating varDsc home after spill and refactoring --- src/coreclr/jit/codegenarm64.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index 8323258b6c8637..55e9823420c1ec 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2928,7 +2928,6 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* lclNode) if (targetReg != REG_NA) { emit->emitIns_R_I(INS_movi, emitActualTypeSize(targetType), targetReg, 0x00, INS_OPTS_16B); - genProduceReg(lclNode); } else { @@ -2941,8 +2940,8 @@ void CodeGen::genCodeForStoreLclVar(GenTreeLclVar* lclNode) assert(targetType == TYP_SIMD8); GetEmitter()->emitIns_S_R(INS_str, EA_8BYTE, REG_ZR, varNum, 0); } - genUpdateLife(lclNode); } + genUpdateLifeStore(lclNode, targetReg, varDsc); return; } if (zeroInit) From 436e1383e6a3e44c94210473dc02eeb7482be7f7 Mon Sep 17 00:00:00 2001 From: Brian Bohe Date: Wed, 8 Feb 2023 10:11:42 -0800 Subject: [PATCH 3/5] Adding back function comment --- src/coreclr/jit/codegen.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/coreclr/jit/codegen.h b/src/coreclr/jit/codegen.h index d5777a63a7bc93..ddb5f06c525a91 100644 --- a/src/coreclr/jit/codegen.h +++ b/src/coreclr/jit/codegen.h @@ -1194,6 +1194,8 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #endif // !defined(TARGET_64BIT) void genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc); + // Do liveness update for register produced by the current node in codegen after + // code has been emitted for it. void genProduceReg(GenTree* tree); void genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclNode, regNumber regNum); void genUnspillLocal( From a83fbbedcaccc02cb3e8bf1f1198bd9892834a48 Mon Sep 17 00:00:00 2001 From: Brian Bohe Date: Tue, 21 Feb 2023 19:46:20 -0800 Subject: [PATCH 4/5] Forcing inline of store update on liveness --- src/coreclr/jit/codegen.h | 25 ++++++++++++++++++++++++- src/coreclr/jit/codegenlinear.cpp | 24 ------------------------ 2 files changed, 24 insertions(+), 25 deletions(-) diff --git a/src/coreclr/jit/codegen.h b/src/coreclr/jit/codegen.h index bc71a08915b335..46fb26ae2cbfd7 100644 --- a/src/coreclr/jit/codegen.h +++ b/src/coreclr/jit/codegen.h @@ -1026,7 +1026,30 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX #endif // !defined(TARGET_64BIT) - void genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc); + //------------------------------------------------------------------------- + // genUpdateLifeStore: Do liveness udpate after tree store instructions + // were emitted, update result var's home if it was stored on stack. + // + // Arguments: + // tree - Gentree node + // targetReg - of the tree + // varDsc - result value's variable + // + // Return Value: + // None. + __forceinline void genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc) + { + if (targetReg != REG_NA) + { + genProduceReg(tree); + } + else + { + genUpdateLife(tree); + varDsc->SetRegNum(REG_STK); + } + } + // Do liveness update for register produced by the current node in codegen after // code has been emitted for it. void genProduceReg(GenTree* tree); diff --git a/src/coreclr/jit/codegenlinear.cpp b/src/coreclr/jit/codegenlinear.cpp index 33fb4dce036a7f..3051aec3b67f10 100644 --- a/src/coreclr/jit/codegenlinear.cpp +++ b/src/coreclr/jit/codegenlinear.cpp @@ -2066,30 +2066,6 @@ void CodeGen::genSpillLocal(unsigned varNum, var_types type, GenTreeLclVar* lclN } } -//------------------------------------------------------------------------- -// genProduceReg: Do liveness udpate after tree store instructions were -// emitted, update result var's home if it was stored on stack. -// -// Arguments: -// tree - Gentree node -// targetReg - of the tree -// varDsc - result value's variable -// -// Return Value: -// None. -void CodeGen::genUpdateLifeStore(GenTree* tree, regNumber targetReg, LclVarDsc* varDsc) -{ - if (targetReg != REG_NA) - { - genProduceReg(tree); - } - else - { - genUpdateLife(tree); - varDsc->SetRegNum(REG_STK); - } -} - //------------------------------------------------------------------------- // genProduceReg: do liveness update for register produced by the current // node in codegen after code has been emitted for it. From e274d12cd7ddd1a1fcba14eca12a444327a27cac Mon Sep 17 00:00:00 2001 From: Brian Bohe Date: Tue, 21 Feb 2023 23:40:49 -0800 Subject: [PATCH 5/5] Fixing format --- src/coreclr/jit/codegen.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/coreclr/jit/codegen.h b/src/coreclr/jit/codegen.h index 46fb26ae2cbfd7..e84901a88bb76f 100644 --- a/src/coreclr/jit/codegen.h +++ b/src/coreclr/jit/codegen.h @@ -1049,7 +1049,7 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX varDsc->SetRegNum(REG_STK); } } - + // Do liveness update for register produced by the current node in codegen after // code has been emitted for it. void genProduceReg(GenTree* tree);