From a1850bdac60454be6df9a5ae8717b8fbc19b2590 Mon Sep 17 00:00:00 2001 From: Swapnil Gaikwad Date: Tue, 18 Jun 2024 12:22:18 +0100 Subject: [PATCH 1/6] Arm AdvSimd: Rename StoreVectorMxNAndZip to StoreVectorAndZip --- src/coreclr/jit/hwintrinsicarm64.cpp | 69 ++++++++++-- src/coreclr/jit/hwintrinsiclistarm64.h | 2 + .../src/System/Buffers/Text/Base64Decoder.cs | 2 +- .../src/System/Buffers/Text/Base64Encoder.cs | 2 +- .../Text/Base64Url/Base64UrlEncoder.cs | 4 +- .../Arm/AdvSimd.PlatformNotSupported.cs | 102 +++++++++--------- .../System/Runtime/Intrinsics/Arm/AdvSimd.cs | 102 +++++++++--------- .../ref/System.Runtime.Intrinsics.cs | 102 +++++++++--------- .../GenerateHWIntrinsicTests_Arm.cs | 102 +++++++++--------- 9 files changed, 273 insertions(+), 214 deletions(-) diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index 5a32b4cbeee3d9..dd6e0f26b7631f 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -2042,12 +2042,69 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic, break; } - case NI_AdvSimd_StoreVector64x2AndZip: - case NI_AdvSimd_StoreVector64x3AndZip: - case NI_AdvSimd_StoreVector64x4AndZip: - case NI_AdvSimd_Arm64_StoreVector128x2AndZip: - case NI_AdvSimd_Arm64_StoreVector128x3AndZip: - case NI_AdvSimd_Arm64_StoreVector128x4AndZip: + case NI_AdvSimd_StoreVectorAndZip: + case NI_AdvSimd_Arm64_StoreVectorAndZip: + { + assert(sig->numArgs == 2); + assert(retType == TYP_VOID); + + CORINFO_ARG_LIST_HANDLE arg1 = sig->args; + CORINFO_ARG_LIST_HANDLE arg2 = info.compCompHnd->getArgNext(arg1); + var_types argType = TYP_UNKNOWN; + CORINFO_CLASS_HANDLE argClass = NO_CLASS_HANDLE; + + argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg2, &argClass))); + op2 = impPopStack().val; + unsigned fieldCount = info.compCompHnd->getClassNumInstanceFields(argClass); + argType = JITtype2varType(strip(info.compCompHnd->getArgType(sig, arg1, &argClass))); + op1 = getArgForHWIntrinsic(argType, argClass); + + assert(op2->TypeGet() == TYP_STRUCT); + if (op1->OperIs(GT_CAST)) + { + // Although the API specifies a pointer, if what we have is a BYREF, that's what + // we really want, so throw away the cast. + if (op1->gtGetOp1()->TypeGet() == TYP_BYREF) + { + op1 = op1->gtGetOp1(); + } + } + + if (!op2->OperIs(GT_LCL_VAR)) + { + unsigned tmp = lvaGrabTemp(true DEBUGARG("StoreVectorNx2 temp tree")); + + impStoreToTemp(tmp, op2, CHECK_SPILL_NONE); + op2 = gtNewLclvNode(tmp, argType); + } + op2 = gtConvertTableOpToFieldList(op2, fieldCount); + + switch (fieldCount) + { + case 2: + intrinsic = + simdSize == 8 ? NI_AdvSimd_StoreVector64x2AndZip : NI_AdvSimd_Arm64_StoreVector128x2AndZip; + break; + + case 3: + intrinsic = + simdSize == 8 ? NI_AdvSimd_StoreVector64x3AndZip : NI_AdvSimd_Arm64_StoreVector128x3AndZip; + break; + + case 4: + intrinsic = + simdSize == 8 ? NI_AdvSimd_StoreVector64x4AndZip : NI_AdvSimd_Arm64_StoreVector128x4AndZip; + break; + + default: + assert("unsupported"); + } + + info.compNeedsConsecutiveRegisters = true; + retNode = gtNewSimdHWIntrinsicNode(retType, op1, op2, intrinsic, simdBaseJitType, simdSize); + break; + } + case NI_AdvSimd_StoreVector64x2: case NI_AdvSimd_StoreVector64x3: case NI_AdvSimd_StoreVector64x4: diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 4de6a416516e1d..0852a72fb61aa7 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -469,6 +469,7 @@ HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalar, HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x2, 8, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_invalid, INS_invalid, INS_st2, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x3, 8, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_invalid, INS_invalid, INS_st3, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x4, 8, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_invalid, INS_invalid, INS_st4, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd, StoreVectorAndZip, 8, 2, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x2AndZip, 8, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_invalid, INS_invalid, INS_st2, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x3AndZip, 8, 2, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_invalid, INS_invalid, INS_st3, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x4AndZip, 8, 2, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_invalid, INS_invalid, INS_st4, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) @@ -670,6 +671,7 @@ HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalar, HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x2, 16, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x3, 16, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x4, 16, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVectorAndZip, 16, 2, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x2AndZip, 16, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x3AndZip, 16, 2, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x4AndZip, 16, 2, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) diff --git a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Decoder.cs b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Decoder.cs index 9d3f35b3a00382..4f2b3c65add641 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Decoder.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Decoder.cs @@ -1003,7 +1003,7 @@ private static unsafe void AdvSimdDecode(ref T* srcBytes, ref // Step 6: Interleave and store decoded results. AssertWrite>(dest, destStart, destLength); - AdvSimd.Arm64.StoreVector128x3AndZip(dest, (res1, res2, res3)); + AdvSimd.Arm64.StoreVectorAndZip(dest, (res1, res2, res3)); src += 64; dest += 48; diff --git a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Encoder.cs b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Encoder.cs index 9df864b5bf6017..354ddead69b1a4 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Encoder.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Encoder.cs @@ -802,7 +802,7 @@ public static unsafe void StoreArmVector128x4ToDestination(byte* dest, byte* des Vector128 res1, Vector128 res2, Vector128 res3, Vector128 res4) { AssertWrite>(dest, destStart, destLength); - AdvSimd.Arm64.StoreVector128x4AndZip(dest, (res1, res2, res3, res4)); + AdvSimd.Arm64.StoreVectorAndZip(dest, (res1, res2, res3, res4)); } [MethodImpl(MethodImplOptions.AggressiveInlining)] diff --git a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Url/Base64UrlEncoder.cs b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Url/Base64UrlEncoder.cs index 13d210638fee37..c23b2b3578d0ae 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Url/Base64UrlEncoder.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Buffers/Text/Base64Url/Base64UrlEncoder.cs @@ -403,8 +403,8 @@ public static unsafe void StoreArmVector128x4ToDestination(ushort* dest, ushort* (Vector128 utf16LowVector2, Vector128 utf16HighVector2) = Vector128.Widen(res2); (Vector128 utf16LowVector3, Vector128 utf16HighVector3) = Vector128.Widen(res3); (Vector128 utf16LowVector4, Vector128 utf16HighVector4) = Vector128.Widen(res4); - AdvSimd.Arm64.StoreVector128x4AndZip(dest, (utf16LowVector1, utf16LowVector2, utf16LowVector3, utf16LowVector4)); - AdvSimd.Arm64.StoreVector128x4AndZip(dest + 32, (utf16HighVector1, utf16HighVector2, utf16HighVector3, utf16HighVector4)); + AdvSimd.Arm64.StoreVectorAndZip(dest, (utf16LowVector1, utf16LowVector2, utf16LowVector3, utf16LowVector4)); + AdvSimd.Arm64.StoreVectorAndZip(dest + 32, (utf16HighVector1, utf16HighVector2, utf16HighVector3, utf16HighVector4)); } [MethodImpl(MethodImplOptions.AggressiveInlining)] diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs index e358c5663db26b..851aab77c0854e 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.PlatformNotSupported.cs @@ -3953,152 +3953,152 @@ internal Arm64() { } /// /// A64: ST2 { Vn.16B, Vn+1.16B }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(byte* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.16B, Vn+1.16B }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.8H, Vn+1.8H }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(short* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.8H, Vn+1.8H }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(ushort* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(int* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(uint* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(long* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(ulong* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(float* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(double* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.16B, Vn+1.16B, Vn+2.16B }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.16B, Vn+1.16B, Vn+2.16B }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.8H, Vn+1.8H, Vn+2.8H }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.8H, Vn+1.8H, Vn+2.8H }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.16B, Vn+1.16B, Vn+2.16B, Vn+3.16B }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.16B, Vn+1.16B, Vn+2.16B, Vn+3.16B }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.8H, Vn+1.8H, Vn+2.8H, Vn+3.8H }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.8H, Vn+1.8H, Vn+2.8H, Vn+3.8H }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST1 { Vn.16B, Vn+1.16B }, [Xn] @@ -16045,107 +16045,107 @@ internal Arm64() { } /// /// A64: ST2 { Vn.8B, Vn+1.8B }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(byte* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.8B, Vn+1.8B }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.4H, Vn+1.4H }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(short* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.4H, Vn+1.4H }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(ushort* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(int* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(uint* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(float* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.8B, Vn+1.8B, Vn+2.8B }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.8B, Vn+1.8B, Vn+2.8B }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.4H, Vn+1.4H, Vn+2.4H }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.4H, Vn+1.4H, Vn+2.4H }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.8B, Vn+1.8B, Vn+2.8B, Vn+3.8B }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.8B, Vn+1.8B, Vn+2.8B, Vn+3.8B }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.4H, Vn+1.4H, Vn+2.4H, Vn+3.4H }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.4H, Vn+1.4H, Vn+2.4H, Vn+3.4H }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) { throw new PlatformNotSupportedException(); } /// /// A64: ST1 { Vn.8B, Vn+1.8B }, [Xn] diff --git a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs index d4354ca639a430..b5c04ddd16bf98 100644 --- a/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs +++ b/src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/AdvSimd.cs @@ -3951,152 +3951,152 @@ internal Arm64() { } /// /// A64: ST2 { Vn.16B, Vn+1.16B }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(byte* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.16B, Vn+1.16B }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.8H, Vn+1.8H }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(short* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.8H, Vn+1.8H }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(ushort* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(int* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(uint* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(long* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(ulong* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.4S, Vn+1.4S }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(float* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2D, Vn+1.2D }, [Xn] /// - public static unsafe void StoreVector128x2AndZip(double* address, (Vector128 Value1, Vector128 Value2) value) => StoreVector128x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.16B, Vn+1.16B, Vn+2.16B }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.16B, Vn+1.16B, Vn+2.16B }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.8H, Vn+1.8H, Vn+2.8H }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.8H, Vn+1.8H, Vn+2.8H }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.4S, Vn+1.4S, Vn+2.4S }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2D, Vn+1.2D, Vn+2.2D }, [Xn] /// - public static unsafe void StoreVector128x3AndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVector128x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.16B, Vn+1.16B, Vn+2.16B, Vn+3.16B }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.16B, Vn+1.16B, Vn+2.16B, Vn+3.16B }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.8H, Vn+1.8H, Vn+2.8H, Vn+3.8H }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.8H, Vn+1.8H, Vn+2.8H, Vn+3.8H }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(long* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(ulong* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.4S, Vn+1.4S, Vn+2.4S, Vn+3.4S }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2D, Vn+1.2D, Vn+2.2D, Vn+3.2D }, [Xn] /// - public static unsafe void StoreVector128x4AndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVector128x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(double* address, (Vector128 Value1, Vector128 Value2, Vector128 Value3, Vector128 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST1 { Vn.16B, Vn+1.16B }, [Xn] @@ -16042,107 +16042,107 @@ internal Arm64() { } /// /// A64: ST2 { Vn.8B, Vn+1.8B }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(byte* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.8B, Vn+1.8B }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.4H, Vn+1.4H }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(short* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.4H, Vn+1.4H }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(ushort* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(int* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(uint* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST2 { Vn.2S, Vn+1.2S }, [Xn] /// - public static unsafe void StoreVector64x2AndZip(float* address, (Vector64 Value1, Vector64 Value2) value) => StoreVector64x2AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.8B, Vn+1.8B, Vn+2.8B }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.8B, Vn+1.8B, Vn+2.8B }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.4H, Vn+1.4H, Vn+2.4H }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.4H, Vn+1.4H, Vn+2.4H }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST3 { Vn.2S, Vn+1.2S, Vn+2.2S }, [Xn] /// - public static unsafe void StoreVector64x3AndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVector64x3AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.8B, Vn+1.8B, Vn+2.8B, Vn+3.8B }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(byte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.8B, Vn+1.8B, Vn+2.8B, Vn+3.8B }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(sbyte* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.4H, Vn+1.4H, Vn+2.4H, Vn+3.4H }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(short* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.4H, Vn+1.4H, Vn+2.4H, Vn+3.4H }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(ushort* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(int* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(uint* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST4 { Vn.2S, Vn+1.2S, Vn+2.2S, Vn+3.2S }, [Xn] /// - public static unsafe void StoreVector64x4AndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVector64x4AndZip(address, value); + public static unsafe void StoreVectorAndZip(float* address, (Vector64 Value1, Vector64 Value2, Vector64 Value3, Vector64 Value4) value) => StoreVectorAndZip(address, value); /// /// A64: ST1 { Vn.8B, Vn+1.8B }, [Xn] diff --git a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs index bbd28de5219903..4d4170025b01eb 100644 --- a/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs +++ b/src/libraries/System.Runtime.Intrinsics/ref/System.Runtime.Intrinsics.cs @@ -2979,27 +2979,27 @@ public static unsafe void StoreSelectedScalar(ulong* address, System.Runtime.Int public static unsafe void StoreSelectedScalar(int* address, (System.Runtime.Intrinsics.Vector64 value1, System.Runtime.Intrinsics.Vector64 value2, System.Runtime.Intrinsics.Vector64 value3, System.Runtime.Intrinsics.Vector64 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(1))] byte index) { throw null; } public static unsafe void StoreSelectedScalar(uint* address, (System.Runtime.Intrinsics.Vector64 value1, System.Runtime.Intrinsics.Vector64 value2, System.Runtime.Intrinsics.Vector64 value3, System.Runtime.Intrinsics.Vector64 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(1))] byte index) { throw null; } public static unsafe void StoreSelectedScalar(float* address, (System.Runtime.Intrinsics.Vector64 value1, System.Runtime.Intrinsics.Vector64 value2, System.Runtime.Intrinsics.Vector64 value3, System.Runtime.Intrinsics.Vector64 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(1))] byte index) { throw null; } - public unsafe static void StoreVector64x2AndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public unsafe static void StoreVector64x2AndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x3AndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } - public static unsafe void StoreVector64x4AndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public unsafe static void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } + public static unsafe void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2, System.Runtime.Intrinsics.Vector64 Value3, System.Runtime.Intrinsics.Vector64 Value4) value) { throw null; } public unsafe static void StoreVector64x2(byte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } public unsafe static void StoreVector64x2(sbyte* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } public unsafe static void StoreVector64x2(short* address, (System.Runtime.Intrinsics.Vector64 Value1, System.Runtime.Intrinsics.Vector64 Value2) value) { throw null; } @@ -3832,36 +3832,36 @@ public static unsafe void StorePairScalarNonTemporal(uint* address, System.Runti public static unsafe void StoreSelectedScalar(ulong* address, (System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3, System.Runtime.Intrinsics.Vector128 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(1))] byte index) { throw null; } public static unsafe void StoreSelectedScalar(float* address, (System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3, System.Runtime.Intrinsics.Vector128 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(3))] byte index) { throw null; } public static unsafe void StoreSelectedScalar(double* address, (System.Runtime.Intrinsics.Vector128 value1, System.Runtime.Intrinsics.Vector128 value2, System.Runtime.Intrinsics.Vector128 value3, System.Runtime.Intrinsics.Vector128 value4) value, [System.Diagnostics.CodeAnalysis.ConstantExpectedAttribute(Max = (byte)(1))] byte index) { throw null; } - public unsafe static void StoreVector128x2AndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public unsafe static void StoreVector128x2AndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x3AndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } - public static unsafe void StoreVector128x4AndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public unsafe static void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public unsafe static void StoreVectorAndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } + public static unsafe void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3) value) { throw null; } + public static unsafe void StoreVectorAndZip(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(ushort* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(int* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(uint* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(long* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(ulong* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(float* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } + public static unsafe void StoreVectorAndZip(double* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2, System.Runtime.Intrinsics.Vector128 Value3, System.Runtime.Intrinsics.Vector128 Value4) value) { throw null; } public unsafe static void StoreVector128x2(byte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } public unsafe static void StoreVector128x2(sbyte* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } public unsafe static void StoreVector128x2(short* address, (System.Runtime.Intrinsics.Vector128 Value1, System.Runtime.Intrinsics.Vector128 Value2) value) { throw null; } diff --git a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs index 6a1b0391cdaff0..2c0abcada5074a 100644 --- a/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs +++ b/src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs @@ -1823,27 +1823,27 @@ ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4UInt32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4Int32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4Float", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2SByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2ByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2UShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2ShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2UInt32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2Int32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector64x2FloatAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x2AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3SByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3ByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3UShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3ShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3UInt32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3Int32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector64x3FloatAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x3AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4SByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4ByteAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4UShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4ShortAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4UInt32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4Int32AndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector64x4FloatAndZip", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector64x4AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2SByte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Byte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2UShort", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Short", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2UInt32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Int32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Float", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3SByte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Byte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3UShort", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Short", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3UInt32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Int32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Float", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4SByte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Byte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4UShort", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Short", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4UInt32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Int32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Float", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "8", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), ("VecBinOpTest.template", new Dictionary { ["TestName"] = "Subtract_Vector64_Byte", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "Subtract", ["RetVectorType"] = "Vector64", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector64", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "Helpers.Subtract(left[i], right[i]) != result[i]"}), ("VecBinOpTest.template", new Dictionary { ["TestName"] = "Subtract_Vector64_Int16", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "Subtract", ["RetVectorType"] = "Vector64", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector64", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "Helpers.Subtract(left[i], right[i]) != result[i]"}), ("VecBinOpTest.template", new Dictionary { ["TestName"] = "Subtract_Vector64_Int32", ["Isa"] = "AdvSimd", ["LoadIsa"] = "AdvSimd", ["Method"] = "Subtract", ["RetVectorType"] = "Vector64", ["RetBaseType"] = "Int32", ["Op1VectorType"] = "Vector64", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "8", ["NextValueOp1"] = "TestLibrary.Generator.GetInt32()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "Helpers.Subtract(left[i], right[i]) != result[i]"}), @@ -2678,36 +2678,36 @@ ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4Int64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4Float", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4Double", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i] || input2[i] != result[OpElementCount + i] || input3[i] != result[(OpElementCount * 2) + i] || input4[i] != result[(OpElementCount * 3) + i]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2SByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2ByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2UShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2ShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2UInt32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2Int32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2UInt64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2Int64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2FloatAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVector128x2DoubleAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x2AndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3SByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3ByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3UShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3ShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3UInt32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3Int32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3UInt64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3Int64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3FloatAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVector128x3DoubleAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x3AndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4SByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4ByteAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4UShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4ShortAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4UInt32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4Int32AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4UInt64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4Int64AndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4FloatAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), - ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVector128x4DoubleAndZip", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVector128x4AndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2SByte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Byte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2UShort", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Short", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2UInt32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Int32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2UInt64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Int64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Float", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx2Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx2Double", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 2] || input2[i] != result[(i * 2) + 1]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3SByte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Byte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3UShort", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Short", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3UInt32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Int32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3UInt64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Int64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Float", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx3Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx3Double", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 3] || input2[i] != result[(i * 3) + 1] || input3[i] != result[(i * 3) + 2]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4SByte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "SByte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "SByte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Byte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4UShort", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Short", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4UInt32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Int32", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int32", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int32", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt32()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4UInt64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "UInt64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "UInt64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetUInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Int64", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "Int64", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Int64", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetInt64()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Float", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "float", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "float", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetSingle()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), + ("StoreVectorx4Test.template", new Dictionary { ["TestName"] = "StoreVectorAndZipx4Double", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "StoreVectorAndZip", ["Op1BaseType"] = "double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "double", ["LargestVectorSize"] = "16", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "input1[i] != result[i * 4] || input2[i] != result[(i * 4) + 1] || input3[i] != result[(i * 4) + 2] || input4[i] != result[(i * 4) + 3]"}), ("VecBinOpTest.template", new Dictionary { ["TestName"] = "Subtract_Vector128_Double", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "Subtract", ["RetVectorType"] = "Vector128", ["RetBaseType"] = "Double", ["Op1VectorType"] = "Vector128", ["Op1BaseType"] = "Double", ["Op2VectorType"] = "Vector128", ["Op2BaseType"] = "Double", ["LargestVectorSize"] = "16", ["NextValueOp1"] = "TestLibrary.Generator.GetDouble()", ["NextValueOp2"] = "TestLibrary.Generator.GetDouble()", ["ValidateIterResult"] = "BitConverter.DoubleToInt64Bits(Helpers.Subtract(left[i], right[i])) != BitConverter.DoubleToInt64Bits(result[i])"}), ("SimpleBinOpTest.template", new Dictionary { ["TestName"] = "SubtractSaturateScalar_Vector64_Byte", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "SubtractSaturateScalar", ["RetVectorType"] = "Vector64", ["RetBaseType"] = "Byte", ["Op1VectorType"] = "Vector64", ["Op1BaseType"] = "Byte", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Byte", ["LargestVectorSize"] = "8", ["NextValueOp1"] = "TestLibrary.Generator.GetByte()", ["NextValueOp2"] = "TestLibrary.Generator.GetByte()", ["ValidateFirstResult"] = "Helpers.SubtractSaturate(left[0], right[0]) != result[0]", ["ValidateRemainingResults"] = "result[i] != 0"}), ("SimpleBinOpTest.template", new Dictionary { ["TestName"] = "SubtractSaturateScalar_Vector64_Int16", ["Isa"] = "AdvSimd.Arm64", ["LoadIsa"] = "AdvSimd", ["Method"] = "SubtractSaturateScalar", ["RetVectorType"] = "Vector64", ["RetBaseType"] = "Int16", ["Op1VectorType"] = "Vector64", ["Op1BaseType"] = "Int16", ["Op2VectorType"] = "Vector64", ["Op2BaseType"] = "Int16", ["LargestVectorSize"] = "8", ["NextValueOp1"] = "TestLibrary.Generator.GetInt16()", ["NextValueOp2"] = "TestLibrary.Generator.GetInt16()", ["ValidateFirstResult"] = "Helpers.SubtractSaturate(left[0], right[0]) != result[0]", ["ValidateRemainingResults"] = "result[i] != 0"}), From 92a7b53128d4d4a2ae08ef966726309bf89611c8 Mon Sep 17 00:00:00 2001 From: Swapnil Gaikwad Date: Tue, 18 Jun 2024 13:36:06 +0100 Subject: [PATCH 2/6] Mono: Rename StoreVectorMxNAndZip to StoreVectorAndZip --- src/mono/mono/mini/llvm-intrinsics.h | 6 ----- src/mono/mono/mini/mini-llvm.c | 35 +++++++++++++++++----------- src/mono/mono/mini/mini-ops.h | 1 + src/mono/mono/mini/simd-intrinsics.c | 26 ++++++--------------- src/mono/mono/mini/simd-methods.h | 7 +----- 5 files changed, 31 insertions(+), 44 deletions(-) diff --git a/src/mono/mono/mini/llvm-intrinsics.h b/src/mono/mono/mini/llvm-intrinsics.h index d4c7deea9ee8a3..f463ccabf0df64 100644 --- a/src/mono/mono/mini/llvm-intrinsics.h +++ b/src/mono/mono/mini/llvm-intrinsics.h @@ -398,12 +398,6 @@ INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X4_V64, aarch64_neon_st1x4, Arm64, AddP INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X2_V128, aarch64_neon_st1x2, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X3_V128, aarch64_neon_st1x3, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X4_V128, aarch64_neon_st1x4, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST2_V64, aarch64_neon_st2, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST3_V64, aarch64_neon_st3, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST4_V64, aarch64_neon_st4, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST2_V128, aarch64_neon_st2, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST3_V128, aarch64_neon_st3, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) -INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST4_V128, aarch64_neon_st4, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_SMAXV, aarch64_neon_smaxv, Arm64, Across, V64 | V128 | I1 | I2 | I4) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_UMAXV, aarch64_neon_umaxv, Arm64, Across, V64 | V128 | I1 | I2 | I4) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_SMINV, aarch64_neon_sminv, Arm64, Across, V64 | V128 | I1 | I2 | I4) diff --git a/src/mono/mono/mini/mini-llvm.c b/src/mono/mono/mini/mini-llvm.c index 650a5a775e6704..2d4adbef86dd3a 100644 --- a/src/mono/mono/mini/mini-llvm.c +++ b/src/mono/mono/mini/mini-llvm.c @@ -11813,6 +11813,7 @@ MONO_RESTORE_WARNING mono_llvm_build_aligned_store (builder, val, address, FALSE, alignment); break; } + case OP_ARM64_STM_ANDZIP: case OP_ARM64_STM_SCALAR: { LLVMTypeRef tuple_t = simd_class_to_llvm_type (ctx, ins->klass); LLVMTypeRef vec_t = LLVMGetElementType (tuple_t); @@ -11860,7 +11861,6 @@ MONO_RESTORE_WARNING default: g_assert_not_reached (); break; - } rhs = LLVMBuildLoad2 (builder, tuple_t, addresses [ins->sreg2]->value, ""); @@ -11870,23 +11870,32 @@ MONO_RESTORE_WARNING for ( ; idx < n_elem_tuple; idx++) { args [idx] = LLVMBuildExtractValue (builder, rhs, idx, "extract_elem"); } - args [idx++] = arg3; + if (ins->opcode == OP_ARM64_STM_SCALAR) + { + args [idx++] = arg3; + } args [idx] = lhs; - llvm_ovr_tag_t ovr_tag = ovr_tag_from_llvm_type (vec_t); - // convert arg3 to a constant - LLVMTypeRef ret_t = LLVMVoidType (); - ImmediateUnrollCtx ictx = immediate_unroll_begin (ctx, bb, 16, arg3, ret_t, ""); - int i = 0; - while (immediate_unroll_next (&ictx, &i)) { - args [idx - 1] = const_int64 (i); + if (ins->opcode == OP_ARM64_STM_SCALAR) + { + // convert arg3 to a constant + LLVMTypeRef ret_t = LLVMVoidType (); + ImmediateUnrollCtx ictx = immediate_unroll_begin (ctx, bb, 16, arg3, ret_t, ""); + int i = 0; + while (immediate_unroll_next (&ictx, &i)) { + args [idx - 1] = const_int64 (i); + call_overloaded_intrins (ctx, iid, ovr_tag, args, ""); + immediate_unroll_commit (&ictx, i, NULL); + } + immediate_unroll_default (&ictx); + immediate_unroll_commit_default (&ictx, NULL); + immediate_unroll_end (&ictx, &cbb); + } + else + { call_overloaded_intrins (ctx, iid, ovr_tag, args, ""); - immediate_unroll_commit (&ictx, i, NULL); } - immediate_unroll_default (&ictx); - immediate_unroll_commit_default (&ictx, NULL); - immediate_unroll_end (&ictx, &cbb); break; } case OP_ARM64_ADDHN: diff --git a/src/mono/mono/mini/mini-ops.h b/src/mono/mono/mini/mini-ops.h index edf7d1b3930db4..f28f1b1bf51924 100644 --- a/src/mono/mono/mini/mini-ops.h +++ b/src/mono/mono/mini/mini-ops.h @@ -1662,6 +1662,7 @@ MINI_OP(OP_ARM64_ZIP1, "arm64_zip1", XREG, XREG, XREG) MINI_OP(OP_ARM64_ZIP2, "arm64_zip2", XREG, XREG, XREG) MINI_OP3(OP_ARM64_ST1_SCALAR, "arm64_st1_scalar", NONE, IREG, XREG, IREG) MINI_OP3(OP_ARM64_STM_SCALAR, "arm64_stm_scalar", NONE, IREG, VREG, IREG) +MINI_OP(OP_ARM64_STM_ANDZIP, "arm64_stm_and_zip", NONE, IREG, VREG) MINI_OP3(OP_ARM64_STNP, "arm64_stnp", NONE, IREG, XREG, XREG) MINI_OP3(OP_ARM64_STNP_SCALAR, "arm64_stnp_scalar", NONE, IREG, XREG, XREG) MINI_OP3(OP_ARM64_STP, "arm64_stp", NONE, IREG, XREG, XREG) diff --git a/src/mono/mono/mini/simd-intrinsics.c b/src/mono/mono/mini/simd-intrinsics.c index 2fe59983f90d42..d5f24aa9d78181 100644 --- a/src/mono/mono/mini/simd-intrinsics.c +++ b/src/mono/mono/mini/simd-intrinsics.c @@ -3616,17 +3616,12 @@ static SimdIntrinsic advsimd_methods [] = { {SN_StorePairScalarNonTemporal, OP_ARM64_STNP_SCALAR}, {SN_StoreSelectedScalar}, {SN_StoreVector128x2}, - {SN_StoreVector128x2AndZip}, {SN_StoreVector128x3}, - {SN_StoreVector128x3AndZip}, {SN_StoreVector128x4}, - {SN_StoreVector128x4AndZip}, {SN_StoreVector64x2}, - {SN_StoreVector64x2AndZip}, {SN_StoreVector64x3}, - {SN_StoreVector64x3AndZip}, {SN_StoreVector64x4}, - {SN_StoreVector64x4AndZip}, + {SN_StoreVectorAndZip}, {SN_Subtract, OP_XBINOP, OP_ISUB, None, None, OP_XBINOP, OP_FSUB}, {SN_SubtractHighNarrowingLower, OP_ARM64_SUBHN}, {SN_SubtractHighNarrowingUpper, OP_ARM64_SUBHN2}, @@ -3875,6 +3870,11 @@ emit_arm64_intrinsics ( MonoClass* klass_tuple_var = mono_class_from_mono_type_internal (fsig->params [1]); return emit_simd_ins_for_sig (cfg, klass_tuple_var, store_op, 0, arg0_type, fsig, args); } + case SN_StoreVectorAndZip: { + int store_op = OP_ARM64_STM_ANDZIP; + MonoClass* klass_tuple_var = mono_class_from_mono_type_internal (fsig->params [1]); + return emit_simd_ins_for_sig (cfg, klass_tuple_var, store_op, 0, arg0_type, fsig, args); + } case SN_MultiplyRoundedDoublingBySelectedScalarSaturateHigh: case SN_MultiplyRoundedDoublingScalarBySelectedScalarSaturateHigh: case SN_MultiplyDoublingScalarBySelectedScalarSaturateHigh: @@ -4034,13 +4034,7 @@ emit_arm64_intrinsics ( case SN_StoreVector128x4: case SN_StoreVector64x2: case SN_StoreVector64x3: - case SN_StoreVector64x4: - case SN_StoreVector128x2AndZip: - case SN_StoreVector128x3AndZip: - case SN_StoreVector128x4AndZip: - case SN_StoreVector64x2AndZip: - case SN_StoreVector64x3AndZip: - case SN_StoreVector64x4AndZip: { + case SN_StoreVector64x4: { int iid = 0; switch (id) { case SN_StoreVector128x2: iid = INTRINS_AARCH64_ADV_SIMD_ST1X2_V128; break; @@ -4049,12 +4043,6 @@ emit_arm64_intrinsics ( case SN_StoreVector64x2: iid = INTRINS_AARCH64_ADV_SIMD_ST1X2_V64; break; case SN_StoreVector64x3: iid = INTRINS_AARCH64_ADV_SIMD_ST1X3_V64; break; case SN_StoreVector64x4: iid = INTRINS_AARCH64_ADV_SIMD_ST1X4_V64; break; - case SN_StoreVector128x2AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST2_V128; break; - case SN_StoreVector128x3AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST3_V128; break; - case SN_StoreVector128x4AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST4_V128; break; - case SN_StoreVector64x2AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST2_V64; break; - case SN_StoreVector64x3AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST3_V64; break; - case SN_StoreVector64x4AndZip: iid = INTRINS_AARCH64_ADV_SIMD_ST4_V64; break; default: g_assert_not_reached (); } diff --git a/src/mono/mono/mini/simd-methods.h b/src/mono/mono/mini/simd-methods.h index 70138b552685b2..caab1a5cd50ecc 100644 --- a/src/mono/mono/mini/simd-methods.h +++ b/src/mono/mono/mini/simd-methods.h @@ -627,15 +627,10 @@ METHOD(StoreSelectedScalar) METHOD(StoreVector128x2) METHOD(StoreVector128x3) METHOD(StoreVector128x4) -METHOD(StoreVector128x2AndZip) -METHOD(StoreVector128x3AndZip) -METHOD(StoreVector128x4AndZip) METHOD(StoreVector64x2) METHOD(StoreVector64x3) METHOD(StoreVector64x4) -METHOD(StoreVector64x2AndZip) -METHOD(StoreVector64x3AndZip) -METHOD(StoreVector64x4AndZip) +METHOD(StoreVectorAndZip) METHOD(SubtractHighNarrowingLower) METHOD(SubtractHighNarrowingUpper) METHOD(SubtractRoundedHighNarrowingLower) From c7ce1bdb75e8b3757de1c843000f8efcca5ab65a Mon Sep 17 00:00:00 2001 From: Swapnil Gaikwad Date: Tue, 18 Jun 2024 17:34:59 +0100 Subject: [PATCH 3/6] Use a single entry of StoreVectorAndZip instead of its NxM variants in hwintrinsiclistarm64.h --- src/coreclr/jit/hwintrinsicarm64.cpp | 21 +-------- src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 49 ++++++++++++++++++--- src/coreclr/jit/hwintrinsiclistarm64.h | 10 +---- src/coreclr/jit/lsraarm64.cpp | 8 +--- 4 files changed, 48 insertions(+), 40 deletions(-) diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index dd6e0f26b7631f..f20395bf4754c2 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -2079,26 +2079,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic, } op2 = gtConvertTableOpToFieldList(op2, fieldCount); - switch (fieldCount) - { - case 2: - intrinsic = - simdSize == 8 ? NI_AdvSimd_StoreVector64x2AndZip : NI_AdvSimd_Arm64_StoreVector128x2AndZip; - break; - - case 3: - intrinsic = - simdSize == 8 ? NI_AdvSimd_StoreVector64x3AndZip : NI_AdvSimd_Arm64_StoreVector128x3AndZip; - break; - - case 4: - intrinsic = - simdSize == 8 ? NI_AdvSimd_StoreVector64x4AndZip : NI_AdvSimd_Arm64_StoreVector128x4AndZip; - break; - - default: - assert("unsupported"); - } + intrinsic = simdSize == 8 ? NI_AdvSimd_StoreVectorAndZip : NI_AdvSimd_Arm64_StoreVectorAndZip; info.compNeedsConsecutiveRegisters = true; retNode = gtNewSimdHWIntrinsicNode(retType, op1, op2, intrinsic, simdBaseJitType, simdSize); diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 38a480ae77ef5a..b9d76ff33ece34 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -1267,12 +1267,6 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) break; } - case NI_AdvSimd_StoreVector64x2AndZip: - case NI_AdvSimd_StoreVector64x3AndZip: - case NI_AdvSimd_StoreVector64x4AndZip: - case NI_AdvSimd_Arm64_StoreVector128x2AndZip: - case NI_AdvSimd_Arm64_StoreVector128x3AndZip: - case NI_AdvSimd_Arm64_StoreVector128x4AndZip: case NI_AdvSimd_StoreVector64x2: case NI_AdvSimd_StoreVector64x3: case NI_AdvSimd_StoreVector64x4: @@ -1307,6 +1301,49 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) break; } + case NI_AdvSimd_StoreVectorAndZip: + case NI_AdvSimd_Arm64_StoreVectorAndZip: + { + unsigned regCount = 0; + + assert(intrin.op2->OperIsFieldList()); + + GenTreeFieldList* fieldList = intrin.op2->AsFieldList(); + GenTree* firstField = fieldList->Uses().GetHead()->GetNode(); + op2Reg = firstField->GetRegNum(); + + regNumber argReg = op2Reg; + for (GenTreeFieldList::Use& use : fieldList->Uses()) + { + regCount++; + + GenTree* argNode = use.GetNode(); + assert(argReg == argNode->GetRegNum()); + argReg = getNextSIMDRegWithWraparound(argReg); + } + + switch (regCount) + { + case 2: + ins = INS_st2; + break; + + case 3: + ins = INS_st3; + break; + + case 4: + ins = INS_st4; + break; + + default: + unreached(); + } + + GetEmitter()->emitIns_R_R(ins, emitSize, op2Reg, op1Reg, opt); + break; + } + case NI_Vector64_CreateScalarUnsafe: case NI_Vector128_CreateScalarUnsafe: if (intrin.op1->isContainedFltOrDblImmed()) diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 0852a72fb61aa7..487318354d2838 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -469,10 +469,7 @@ HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalar, HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x2, 8, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_invalid, INS_invalid, INS_st2, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x3, 8, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_invalid, INS_invalid, INS_st3, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x4, 8, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_invalid, INS_invalid, INS_st4, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd, StoreVectorAndZip, 8, 2, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd, StoreVector64x2AndZip, 8, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_invalid, INS_invalid, INS_st2, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd, StoreVector64x3AndZip, 8, 2, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_invalid, INS_invalid, INS_st3, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd, StoreVector64x4AndZip, 8, 2, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_invalid, INS_invalid, INS_st4, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd, StoreVectorAndZip, 8, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x2, 8, 2, true, {INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_invalid, INS_invalid, INS_st1_2regs, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x3, 8, 2, true, {INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_invalid, INS_invalid, INS_st1_3regs, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x4, 8, 2, true, {INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_invalid, INS_invalid, INS_st1_4regs, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) @@ -671,10 +668,7 @@ HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalar, HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x2, 16, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x3, 16, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x4, 16, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVectorAndZip, 16, 2, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x2AndZip, 16, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x3AndZip, 16, 2, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x4AndZip, 16, 2, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVectorAndZip, 16, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x2, 16, 2, true, {INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x3, 16, 2, true, {INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x4, 16, 2, true, {INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs, INS_st1_4regs}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) diff --git a/src/coreclr/jit/lsraarm64.cpp b/src/coreclr/jit/lsraarm64.cpp index 0256b105a774bf..20606240f440d9 100644 --- a/src/coreclr/jit/lsraarm64.cpp +++ b/src/coreclr/jit/lsraarm64.cpp @@ -1748,12 +1748,8 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou break; } - case NI_AdvSimd_StoreVector64x2AndZip: - case NI_AdvSimd_StoreVector64x3AndZip: - case NI_AdvSimd_StoreVector64x4AndZip: - case NI_AdvSimd_Arm64_StoreVector128x2AndZip: - case NI_AdvSimd_Arm64_StoreVector128x3AndZip: - case NI_AdvSimd_Arm64_StoreVector128x4AndZip: + case NI_AdvSimd_StoreVectorAndZip: + case NI_AdvSimd_Arm64_StoreVectorAndZip: case NI_AdvSimd_StoreVector64x2: case NI_AdvSimd_StoreVector64x3: case NI_AdvSimd_StoreVector64x4: From 757196cb95860e8f127621f6b605df0229f22132 Mon Sep 17 00:00:00 2001 From: Kunal Pathak Date: Tue, 18 Jun 2024 12:46:04 -0700 Subject: [PATCH 4/6] Wrap code in #ifdef DEBUG --- src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index b9d76ff33ece34..95cd39d3b9db2d 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -1316,10 +1316,11 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) for (GenTreeFieldList::Use& use : fieldList->Uses()) { regCount++; - +#ifdef DEBUG GenTree* argNode = use.GetNode(); assert(argReg == argNode->GetRegNum()); argReg = getNextSIMDRegWithWraparound(argReg); +#endif } switch (regCount) From 79851864742e8c35b1a252706a6510e06b27a7ec Mon Sep 17 00:00:00 2001 From: Swapnil Gaikwad Date: Tue, 18 Jun 2024 22:15:36 +0100 Subject: [PATCH 5/6] Refactor StoreSelectedScalar to match VectorTableLookup --- src/coreclr/jit/hwintrinsicarm64.cpp | 24 +------- src/coreclr/jit/hwintrinsiccodegenarm64.cpp | 65 +++++++++++++-------- src/coreclr/jit/hwintrinsiclistarm64.h | 10 +--- src/coreclr/jit/lowerarmarch.cpp | 6 -- src/coreclr/jit/lsraarm64.cpp | 27 +-------- 5 files changed, 45 insertions(+), 87 deletions(-) diff --git a/src/coreclr/jit/hwintrinsicarm64.cpp b/src/coreclr/jit/hwintrinsicarm64.cpp index f20395bf4754c2..0012013c0bc4b4 100644 --- a/src/coreclr/jit/hwintrinsicarm64.cpp +++ b/src/coreclr/jit/hwintrinsicarm64.cpp @@ -389,13 +389,7 @@ void HWIntrinsicInfo::lookupImmBounds( case NI_AdvSimd_Arm64_LoadAndInsertScalarVector128x3: case NI_AdvSimd_Arm64_LoadAndInsertScalarVector128x4: case NI_AdvSimd_StoreSelectedScalar: - case NI_AdvSimd_StoreSelectedScalarVector64x2: - case NI_AdvSimd_StoreSelectedScalarVector64x3: - case NI_AdvSimd_StoreSelectedScalarVector64x4: case NI_AdvSimd_Arm64_StoreSelectedScalar: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4: case NI_AdvSimd_Arm64_DuplicateSelectedScalarToVector128: case NI_AdvSimd_Arm64_InsertSelectedScalar: case NI_Sve_FusedMultiplyAddBySelectedScalar: @@ -2161,23 +2155,7 @@ GenTree* Compiler::impSpecialIntrinsic(NamedIntrinsic intrinsic, if (op2->TypeGet() == TYP_STRUCT) { info.compNeedsConsecutiveRegisters = true; - switch (fieldCount) - { - case 2: - intrinsic = simdSize == 8 ? NI_AdvSimd_StoreSelectedScalarVector64x2 - : NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2; - break; - case 3: - intrinsic = simdSize == 8 ? NI_AdvSimd_StoreSelectedScalarVector64x3 - : NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3; - break; - case 4: - intrinsic = simdSize == 8 ? NI_AdvSimd_StoreSelectedScalarVector64x4 - : NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4; - break; - default: - assert("unsupported"); - } + intrinsic = simdSize == 8 ? NI_AdvSimd_StoreSelectedScalar : NI_AdvSimd_Arm64_StoreSelectedScalar; if (!op2->OperIs(GT_LCL_VAR)) { diff --git a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp index 95cd39d3b9db2d..6729c0680a9367 100644 --- a/src/coreclr/jit/hwintrinsiccodegenarm64.cpp +++ b/src/coreclr/jit/hwintrinsiccodegenarm64.cpp @@ -1225,37 +1225,52 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node) GetEmitter()->emitIns_R_R_R(ins, emitTypeSize(intrin.baseType), op2Reg, op3Reg, op1Reg); break; - case NI_AdvSimd_StoreSelectedScalarVector64x2: - case NI_AdvSimd_StoreSelectedScalarVector64x3: - case NI_AdvSimd_StoreSelectedScalarVector64x4: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4: + case NI_AdvSimd_StoreSelectedScalar: + case NI_AdvSimd_Arm64_StoreSelectedScalar: { - assert(intrin.op2->OperIsFieldList()); - GenTreeFieldList* fieldList = intrin.op2->AsFieldList(); - GenTree* firstField = fieldList->Uses().GetHead()->GetNode(); - op2Reg = firstField->GetRegNum(); + unsigned regCount = 0; + if (intrin.op2->OperIsFieldList()) + { + GenTreeFieldList* fieldList = intrin.op2->AsFieldList(); + GenTree* firstField = fieldList->Uses().GetHead()->GetNode(); + op2Reg = firstField->GetRegNum(); + regNumber argReg = op2Reg; + for (GenTreeFieldList::Use& use : fieldList->Uses()) + { + regCount++; #ifdef DEBUG - unsigned regCount = 0; - regNumber argReg = op2Reg; - for (GenTreeFieldList::Use& use : fieldList->Uses()) + GenTree* argNode = use.GetNode(); + assert(argReg == argNode->GetRegNum()); + argReg = getNextSIMDRegWithWraparound(argReg); +#endif + } + } + else { - regCount++; + regCount = 1; + } - GenTree* argNode = use.GetNode(); - assert(argReg == argNode->GetRegNum()); - argReg = getNextSIMDRegWithWraparound(argReg); + switch (regCount) + { + case 2: + ins = INS_st2; + break; + + case 3: + ins = INS_st3; + break; + + case 4: + ins = INS_st4; + break; + + default: + assert(regCount == 1); + ins = INS_st1; + break; } - assert((ins == INS_st2 && regCount == 2) || (ins == INS_st3 && regCount == 3) || - (ins == INS_st4 && regCount == 4)); -#endif - FALLTHROUGH; - } - case NI_AdvSimd_StoreSelectedScalar: - case NI_AdvSimd_Arm64_StoreSelectedScalar: - { + HWIntrinsicImmOpHelper helper(this, intrin.op3, node); for (helper.EmitBegin(); !helper.Done(); helper.EmitCaseEnd()) diff --git a/src/coreclr/jit/hwintrinsiclistarm64.h b/src/coreclr/jit/hwintrinsiclistarm64.h index 487318354d2838..0c72190136d092 100644 --- a/src/coreclr/jit/hwintrinsiclistarm64.h +++ b/src/coreclr/jit/hwintrinsiclistarm64.h @@ -465,10 +465,7 @@ HARDWARE_INTRINSIC(AdvSimd, SignExtendWideningLower, HARDWARE_INTRINSIC(AdvSimd, SignExtendWideningUpper, 16, 1, true, {INS_sxtl2, INS_invalid, INS_sxtl2, INS_invalid, INS_sxtl2, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_BaseTypeFromFirstArg) HARDWARE_INTRINSIC(AdvSimd, SqrtScalar, 8, 1, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_fsqrt, INS_fsqrt}, HW_Category_SIMD, HW_Flag_SIMDScalar) HARDWARE_INTRINSIC(AdvSimd, Store, -1, 2, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Helper, HW_Flag_InvalidNodeId|HW_Flag_BaseTypeFromSecondArg) -HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalar, 8, 3, true, {INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport) -HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x2, 8, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_invalid, INS_invalid, INS_st2, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x3, 8, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_invalid, INS_invalid, INS_st3, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalarVector64x4, 8, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_invalid, INS_invalid, INS_st4, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd, StoreSelectedScalar, 8, 3, true, {INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1, INS_st1}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVectorAndZip, 8, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x2, 8, 2, true, {INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_invalid, INS_invalid, INS_st1_2regs, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd, StoreVector64x3, 8, 2, true, {INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_invalid, INS_invalid, INS_st1_3regs, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) @@ -664,10 +661,7 @@ HARDWARE_INTRINSIC(AdvSimd_Arm64, StorePair, HARDWARE_INTRINSIC(AdvSimd_Arm64, StorePairScalar, 8, 3, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_stp, INS_stp, INS_invalid, INS_invalid, INS_stp, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(AdvSimd_Arm64, StorePairScalarNonTemporal, 8, 3, true, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_stnp, INS_stnp, INS_invalid, INS_invalid, INS_stnp, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen) HARDWARE_INTRINSIC(AdvSimd_Arm64, StorePairNonTemporal, -1, 3, true, {INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stnp, INS_stp}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromSecondArg|HW_Flag_SpecialCodeGen) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalar, 16, 3, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x2, 16, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x3, 16, 3, true, {INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3, INS_st3}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) -HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalarVector128x4, 16, 3, true, {INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4, INS_st4}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) +HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreSelectedScalar, 16, 3, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_HasImmediateOperand|HW_Flag_SIMDScalar|HW_Flag_SpecialCodeGen|HW_Flag_SpecialImport|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVectorAndZip, 16, 2, true, {INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2, INS_st2}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x2, 16, 2, true, {INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs, INS_st1_2regs}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) HARDWARE_INTRINSIC(AdvSimd_Arm64, StoreVector128x3, 16, 2, true, {INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs, INS_st1_3regs}, HW_Category_MemoryStore, HW_Flag_BaseTypeFromFirstArg|HW_Flag_SpecialImport|HW_Flag_SpecialCodeGen|HW_Flag_NeedsConsecutiveRegisters) diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index 436c770065d3bf..17a0c0150e369c 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -3187,13 +3187,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node) case NI_AdvSimd_ExtractVector64: case NI_AdvSimd_ExtractVector128: case NI_AdvSimd_StoreSelectedScalar: - case NI_AdvSimd_StoreSelectedScalarVector64x2: - case NI_AdvSimd_StoreSelectedScalarVector64x3: - case NI_AdvSimd_StoreSelectedScalarVector64x4: case NI_AdvSimd_Arm64_StoreSelectedScalar: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4: case NI_Sve_PrefetchBytes: case NI_Sve_PrefetchInt16: case NI_Sve_PrefetchInt32: diff --git a/src/coreclr/jit/lsraarm64.cpp b/src/coreclr/jit/lsraarm64.cpp index 20606240f440d9..4d3d978e95d746 100644 --- a/src/coreclr/jit/lsraarm64.cpp +++ b/src/coreclr/jit/lsraarm64.cpp @@ -1440,13 +1440,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou case NI_AdvSimd_ExtractVector64: case NI_AdvSimd_ExtractVector128: case NI_AdvSimd_StoreSelectedScalar: - case NI_AdvSimd_StoreSelectedScalarVector64x2: - case NI_AdvSimd_StoreSelectedScalarVector64x3: - case NI_AdvSimd_StoreSelectedScalarVector64x4: case NI_AdvSimd_Arm64_StoreSelectedScalar: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4: case NI_Sve_PrefetchBytes: case NI_Sve_PrefetchInt16: case NI_Sve_PrefetchInt32: @@ -1716,28 +1710,11 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou case NI_AdvSimd_StoreSelectedScalar: case NI_AdvSimd_Arm64_StoreSelectedScalar: - assert(intrin.op1 != nullptr); - assert(intrin.op3 != nullptr); - srcCount += BuildOperandUses(intrin.op2); - if (!intrin.op3->isContainedIntOrIImmed()) - { - srcCount += BuildOperandUses(intrin.op3); - } - assert(dstCount == 0); - buildInternalRegisterUses(); - *pDstCount = 0; - break; - - case NI_AdvSimd_StoreSelectedScalarVector64x2: - case NI_AdvSimd_StoreSelectedScalarVector64x3: - case NI_AdvSimd_StoreSelectedScalarVector64x4: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x2: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x3: - case NI_AdvSimd_Arm64_StoreSelectedScalarVector128x4: { assert(intrin.op1 != nullptr); assert(intrin.op3 != nullptr); - srcCount += BuildConsecutiveRegistersForUse(intrin.op2); + srcCount += (intrin.op2->gtType == TYP_STRUCT) ? BuildConsecutiveRegistersForUse(intrin.op2) + : BuildOperandUses(intrin.op2); if (!intrin.op3->isContainedIntOrIImmed()) { srcCount += BuildOperandUses(intrin.op3); From 5b0aeff0986846145fe7901fa82849d22b1ed1e2 Mon Sep 17 00:00:00 2001 From: fanyang-mono Date: Tue, 18 Jun 2024 18:57:43 -0400 Subject: [PATCH 6/6] Fix the way that mono emits intrinsics of SN_StoreVectorAndZip --- src/mono/mono/mini/llvm-intrinsics.h | 6 ++ src/mono/mono/mini/mini-llvm.c | 83 ++++++++++++++++++++-------- src/mono/mono/mini/mini-ops.h | 1 - src/mono/mono/mini/simd-intrinsics.c | 9 +-- 4 files changed, 69 insertions(+), 30 deletions(-) diff --git a/src/mono/mono/mini/llvm-intrinsics.h b/src/mono/mono/mini/llvm-intrinsics.h index f463ccabf0df64..d4c7deea9ee8a3 100644 --- a/src/mono/mono/mini/llvm-intrinsics.h +++ b/src/mono/mono/mini/llvm-intrinsics.h @@ -398,6 +398,12 @@ INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X4_V64, aarch64_neon_st1x4, Arm64, AddP INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X2_V128, aarch64_neon_st1x2, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X3_V128, aarch64_neon_st1x3, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST1X4_V128, aarch64_neon_st1x4, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST2_V64, aarch64_neon_st2, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST3_V64, aarch64_neon_st3, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST4_V64, aarch64_neon_st4, Arm64, AddPointer, V64 | I1 | I2 | I4 | R4) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST2_V128, aarch64_neon_st2, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST3_V128, aarch64_neon_st3, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) +INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_ST4_V128, aarch64_neon_st4, Arm64, AddPointer, V128 | I1 | I2 | I4 | I8 | R4 | R8) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_SMAXV, aarch64_neon_smaxv, Arm64, Across, V64 | V128 | I1 | I2 | I4) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_UMAXV, aarch64_neon_umaxv, Arm64, Across, V64 | V128 | I1 | I2 | I4) INTRINS_OVR_TAG_KIND(AARCH64_ADV_SIMD_SMINV, aarch64_neon_sminv, Arm64, Across, V64 | V128 | I1 | I2 | I4) diff --git a/src/mono/mono/mini/mini-llvm.c b/src/mono/mono/mini/mini-llvm.c index 2d4adbef86dd3a..7eed504e5b6bdf 100644 --- a/src/mono/mono/mini/mini-llvm.c +++ b/src/mono/mono/mini/mini-llvm.c @@ -11780,7 +11780,6 @@ MONO_RESTORE_WARNING LLVMTypeRef tuple_t = simd_class_to_llvm_type (ctx, ins->klass); LLVMTypeRef vec_t = LLVMGetElementType (tuple_t); - IntrinsicId iid = (IntrinsicId) ins->inst_c0; llvm_ovr_tag_t ovr_tag = ovr_tag_from_llvm_type (vec_t); LLVMValueRef value_tuple = LLVMBuildLoad2 (builder, tuple_t, addresses [ins->sreg2]->value, "load_param"); @@ -11795,6 +11794,54 @@ MONO_RESTORE_WARNING } args [len] = lhs; + IntrinsicId iid = (IntrinsicId) ins->inst_c0; + if (iid == 0) { + unsigned int n_elem_vector = LLVMGetVectorSize (vec_t); + LLVMTypeRef elem_t = LLVMGetElementType (vec_t); + unsigned int elem_bits = mono_llvm_get_prim_size_bits (elem_t); + unsigned int vector_size = n_elem_vector * elem_bits; + switch (vector_size) { + case 64: { + switch (len) { + case 2: + iid = INTRINS_AARCH64_ADV_SIMD_ST2_V64; + break; + case 3: + iid = INTRINS_AARCH64_ADV_SIMD_ST3_V64; + break; + case 4: + iid = INTRINS_AARCH64_ADV_SIMD_ST4_V64; + break; + default: + g_assert_not_reached (); + break; + } + break; + } + case 128: { + switch (len) { + case 2: + iid = INTRINS_AARCH64_ADV_SIMD_ST2_V128; + break; + case 3: + iid = INTRINS_AARCH64_ADV_SIMD_ST3_V128; + break; + case 4: + iid = INTRINS_AARCH64_ADV_SIMD_ST4_V128; + break; + default: + g_assert_not_reached (); + break; + } + break; + } + default: + g_assert_not_reached (); + break; + + } + } + call_overloaded_intrins (ctx, iid, ovr_tag, args, ""); break; } @@ -11813,7 +11860,6 @@ MONO_RESTORE_WARNING mono_llvm_build_aligned_store (builder, val, address, FALSE, alignment); break; } - case OP_ARM64_STM_ANDZIP: case OP_ARM64_STM_SCALAR: { LLVMTypeRef tuple_t = simd_class_to_llvm_type (ctx, ins->klass); LLVMTypeRef vec_t = LLVMGetElementType (tuple_t); @@ -11870,32 +11916,23 @@ MONO_RESTORE_WARNING for ( ; idx < n_elem_tuple; idx++) { args [idx] = LLVMBuildExtractValue (builder, rhs, idx, "extract_elem"); } - if (ins->opcode == OP_ARM64_STM_SCALAR) - { - args [idx++] = arg3; - } + args [idx++] = arg3; args [idx] = lhs; + llvm_ovr_tag_t ovr_tag = ovr_tag_from_llvm_type (vec_t); - if (ins->opcode == OP_ARM64_STM_SCALAR) - { - // convert arg3 to a constant - LLVMTypeRef ret_t = LLVMVoidType (); - ImmediateUnrollCtx ictx = immediate_unroll_begin (ctx, bb, 16, arg3, ret_t, ""); - int i = 0; - while (immediate_unroll_next (&ictx, &i)) { - args [idx - 1] = const_int64 (i); - call_overloaded_intrins (ctx, iid, ovr_tag, args, ""); - immediate_unroll_commit (&ictx, i, NULL); - } - immediate_unroll_default (&ictx); - immediate_unroll_commit_default (&ictx, NULL); - immediate_unroll_end (&ictx, &cbb); - } - else - { + // convert arg3 to a constant + LLVMTypeRef ret_t = LLVMVoidType (); + ImmediateUnrollCtx ictx = immediate_unroll_begin (ctx, bb, 16, arg3, ret_t, ""); + int i = 0; + while (immediate_unroll_next (&ictx, &i)) { + args [idx - 1] = const_int64 (i); call_overloaded_intrins (ctx, iid, ovr_tag, args, ""); + immediate_unroll_commit (&ictx, i, NULL); } + immediate_unroll_default (&ictx); + immediate_unroll_commit_default (&ictx, NULL); + immediate_unroll_end (&ictx, &cbb); break; } case OP_ARM64_ADDHN: diff --git a/src/mono/mono/mini/mini-ops.h b/src/mono/mono/mini/mini-ops.h index f28f1b1bf51924..edf7d1b3930db4 100644 --- a/src/mono/mono/mini/mini-ops.h +++ b/src/mono/mono/mini/mini-ops.h @@ -1662,7 +1662,6 @@ MINI_OP(OP_ARM64_ZIP1, "arm64_zip1", XREG, XREG, XREG) MINI_OP(OP_ARM64_ZIP2, "arm64_zip2", XREG, XREG, XREG) MINI_OP3(OP_ARM64_ST1_SCALAR, "arm64_st1_scalar", NONE, IREG, XREG, IREG) MINI_OP3(OP_ARM64_STM_SCALAR, "arm64_stm_scalar", NONE, IREG, VREG, IREG) -MINI_OP(OP_ARM64_STM_ANDZIP, "arm64_stm_and_zip", NONE, IREG, VREG) MINI_OP3(OP_ARM64_STNP, "arm64_stnp", NONE, IREG, XREG, XREG) MINI_OP3(OP_ARM64_STNP_SCALAR, "arm64_stnp_scalar", NONE, IREG, XREG, XREG) MINI_OP3(OP_ARM64_STP, "arm64_stp", NONE, IREG, XREG, XREG) diff --git a/src/mono/mono/mini/simd-intrinsics.c b/src/mono/mono/mini/simd-intrinsics.c index d5f24aa9d78181..71c85d26c51b9c 100644 --- a/src/mono/mono/mini/simd-intrinsics.c +++ b/src/mono/mono/mini/simd-intrinsics.c @@ -3870,11 +3870,6 @@ emit_arm64_intrinsics ( MonoClass* klass_tuple_var = mono_class_from_mono_type_internal (fsig->params [1]); return emit_simd_ins_for_sig (cfg, klass_tuple_var, store_op, 0, arg0_type, fsig, args); } - case SN_StoreVectorAndZip: { - int store_op = OP_ARM64_STM_ANDZIP; - MonoClass* klass_tuple_var = mono_class_from_mono_type_internal (fsig->params [1]); - return emit_simd_ins_for_sig (cfg, klass_tuple_var, store_op, 0, arg0_type, fsig, args); - } case SN_MultiplyRoundedDoublingBySelectedScalarSaturateHigh: case SN_MultiplyRoundedDoublingScalarBySelectedScalarSaturateHigh: case SN_MultiplyDoublingScalarBySelectedScalarSaturateHigh: @@ -4034,7 +4029,8 @@ emit_arm64_intrinsics ( case SN_StoreVector128x4: case SN_StoreVector64x2: case SN_StoreVector64x3: - case SN_StoreVector64x4: { + case SN_StoreVector64x4: + case SN_StoreVectorAndZip: { int iid = 0; switch (id) { case SN_StoreVector128x2: iid = INTRINS_AARCH64_ADV_SIMD_ST1X2_V128; break; @@ -4043,6 +4039,7 @@ emit_arm64_intrinsics ( case SN_StoreVector64x2: iid = INTRINS_AARCH64_ADV_SIMD_ST1X2_V64; break; case SN_StoreVector64x3: iid = INTRINS_AARCH64_ADV_SIMD_ST1X3_V64; break; case SN_StoreVector64x4: iid = INTRINS_AARCH64_ADV_SIMD_ST1X4_V64; break; + case SN_StoreVectorAndZip: break; default: g_assert_not_reached (); }