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net: ethernet: mtk_eth_soc: ppe: add support for multiple PPEs
Add the missing pieces to allow multiple PPEs units, one for each GMAC. mtk_gdm_config has been modified to work on targted mac ID, the inner loop moved outside of the function to allow unrelated operations like setting the MAC's PPE index. Introduce a sanity check in flow_offload_replace to account for non-MTK ingress devices. Additional field 'ppe_idx' was added to struct mtk_mac in order to keep track on the assigned PPE unit. Signed-off-by: Elad Yifee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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-45
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3 files changed

+92
-45
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‎drivers/net/ethernet/mediatek/mtk_eth_soc.c‎

Lines changed: 72 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,9 @@ static const struct mtk_reg_map mtk_reg_map = {
8080
.fq_blen = 0x1b2c,
8181
},
8282
.gdm1_cnt = 0x2400,
83-
.gdma_to_ppe = 0x4444,
83+
.gdma_to_ppe = {
84+
[0] = 0x4444,
85+
},
8486
.ppe_base = 0x0c00,
8587
.wdma_base = {
8688
[0] = 0x2800,
@@ -144,7 +146,10 @@ static const struct mtk_reg_map mt7986_reg_map = {
144146
.tx_sch_rate = 0x4798,
145147
},
146148
.gdm1_cnt = 0x1c00,
147-
.gdma_to_ppe = 0x3333,
149+
.gdma_to_ppe = {
150+
[0] = 0x3333,
151+
[1] = 0x4444,
152+
},
148153
.ppe_base = 0x2000,
149154
.wdma_base = {
150155
[0] = 0x4800,
@@ -192,7 +197,11 @@ static const struct mtk_reg_map mt7988_reg_map = {
192197
.tx_sch_rate = 0x4798,
193198
},
194199
.gdm1_cnt = 0x1c00,
195-
.gdma_to_ppe = 0x3333,
200+
.gdma_to_ppe = {
201+
[0] = 0x3333,
202+
[1] = 0x4444,
203+
[2] = 0xcccc,
204+
},
196205
.ppe_base = 0x2000,
197206
.wdma_base = {
198207
[0] = 0x4800,
@@ -2015,6 +2024,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
20152024
struct mtk_rx_dma_v2 *rxd, trxd;
20162025
int done = 0, bytes = 0;
20172026
dma_addr_t dma_addr = DMA_MAPPING_ERROR;
2027+
int ppe_idx = 0;
20182028

20192029
while (done < budget) {
20202030
unsigned int pktlen, *rxdcsum;
@@ -2058,6 +2068,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
20582068
goto release_desc;
20592069

20602070
netdev = eth->netdev[mac];
2071+
ppe_idx = eth->mac[mac]->ppe_idx;
20612072

20622073
if (unlikely(test_bit(MTK_RESETTING, &eth->state)))
20632074
goto release_desc;
@@ -2181,7 +2192,7 @@ static int mtk_poll_rx(struct napi_struct *napi, int budget,
21812192
}
21822193

21832194
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
2184-
mtk_ppe_check_skb(eth->ppe[0], skb, hash);
2195+
mtk_ppe_check_skb(eth->ppe[ppe_idx], skb, hash);
21852196

21862197
skb_record_rx_queue(skb, 0);
21872198
napi_gro_receive(napi, skb);
@@ -3276,37 +3287,27 @@ static int mtk_start_dma(struct mtk_eth *eth)
32763287
return 0;
32773288
}
32783289

3279-
static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
3290+
static void mtk_gdm_config(struct mtk_eth *eth, u32 id, u32 config)
32803291
{
3281-
int i;
3292+
u32 val;
32823293

32833294
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
32843295
return;
32853296

3286-
for (i = 0; i < MTK_MAX_DEVS; i++) {
3287-
u32 val;
3288-
3289-
if (!eth->netdev[i])
3290-
continue;
3297+
val = mtk_r32(eth, MTK_GDMA_FWD_CFG(id));
32913298

3292-
val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
3299+
/* default setup the forward port to send frame to PDMA */
3300+
val &= ~0xffff;
32933301

3294-
/* default setup the forward port to send frame to PDMA */
3295-
val &= ~0xffff;
3302+
/* Enable RX checksum */
3303+
val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
32963304

3297-
/* Enable RX checksum */
3298-
val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
3305+
val |= config;
32993306

3300-
val |= config;
3307+
if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id]))
3308+
val |= MTK_GDMA_SPECIAL_TAG;
33013309

3302-
if (netdev_uses_dsa(eth->netdev[i]))
3303-
val |= MTK_GDMA_SPECIAL_TAG;
3304-
3305-
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
3306-
}
3307-
/* Reset and enable PSE */
3308-
mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
3309-
mtk_w32(eth, 0, MTK_RST_GL);
3310+
mtk_w32(eth, val, MTK_GDMA_FWD_CFG(id));
33103311
}
33113312

33123313

@@ -3366,7 +3367,10 @@ static int mtk_open(struct net_device *dev)
33663367
{
33673368
struct mtk_mac *mac = netdev_priv(dev);
33683369
struct mtk_eth *eth = mac->hw;
3369-
int i, err;
3370+
struct mtk_mac *target_mac;
3371+
int i, err, ppe_num;
3372+
3373+
ppe_num = eth->soc->ppe_num;
33703374

33713375
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
33723376
if (err) {
@@ -3390,18 +3394,38 @@ static int mtk_open(struct net_device *dev)
33903394
for (i = 0; i < ARRAY_SIZE(eth->ppe); i++)
33913395
mtk_ppe_start(eth->ppe[i]);
33923396

3393-
gdm_config = soc->offload_version ? soc->reg_map->gdma_to_ppe
3394-
: MTK_GDMA_TO_PDMA;
3395-
mtk_gdm_config(eth, gdm_config);
3397+
for (i = 0; i < MTK_MAX_DEVS; i++) {
3398+
if (!eth->netdev[i])
3399+
break;
3400+
3401+
target_mac = netdev_priv(eth->netdev[i]);
3402+
if (!soc->offload_version) {
3403+
target_mac->ppe_idx = 0;
3404+
gdm_config = MTK_GDMA_TO_PDMA;
3405+
} else if (ppe_num >= 3 && target_mac->id == 2) {
3406+
target_mac->ppe_idx = 2;
3407+
gdm_config = soc->reg_map->gdma_to_ppe[2];
3408+
} else if (ppe_num >= 2 && target_mac->id == 1) {
3409+
target_mac->ppe_idx = 1;
3410+
gdm_config = soc->reg_map->gdma_to_ppe[1];
3411+
} else {
3412+
target_mac->ppe_idx = 0;
3413+
gdm_config = soc->reg_map->gdma_to_ppe[0];
3414+
}
3415+
mtk_gdm_config(eth, target_mac->id, gdm_config);
3416+
}
3417+
/* Reset and enable PSE */
3418+
mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
3419+
mtk_w32(eth, 0, MTK_RST_GL);
33963420

33973421
napi_enable(&eth->tx_napi);
33983422
napi_enable(&eth->rx_napi);
33993423
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
34003424
mtk_rx_irq_enable(eth, soc->rx.irq_done_mask);
34013425
refcount_set(&eth->dma_refcnt, 1);
3402-
}
3403-
else
3426+
} else {
34043427
refcount_inc(&eth->dma_refcnt);
3428+
}
34053429

34063430
phylink_start(mac->phylink);
34073431
netif_tx_start_all_queues(dev);
@@ -3478,7 +3502,8 @@ static int mtk_stop(struct net_device *dev)
34783502
if (!refcount_dec_and_test(&eth->dma_refcnt))
34793503
return 0;
34803504

3481-
mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
3505+
for (i = 0; i < MTK_MAX_DEVS; i++)
3506+
mtk_gdm_config(eth, i, MTK_GDMA_DROP_ALL);
34823507

34833508
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
34843509
mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask);
@@ -4959,23 +4984,24 @@ static int mtk_probe(struct platform_device *pdev)
49594984
}
49604985

49614986
if (eth->soc->offload_version) {
4962-
u32 num_ppe = mtk_is_netsys_v2_or_greater(eth) ? 2 : 1;
4987+
u8 ppe_num = eth->soc->ppe_num;
49634988

4964-
num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe);
4965-
for (i = 0; i < num_ppe; i++) {
4966-
u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
4989+
ppe_num = min_t(u8, ARRAY_SIZE(eth->ppe), ppe_num);
4990+
for (i = 0; i < ppe_num; i++) {
4991+
u32 ppe_addr = eth->soc->reg_map->ppe_base;
49674992

4993+
ppe_addr += (i == 2 ? 0xc00 : i * 0x400);
49684994
eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i);
49694995

49704996
if (!eth->ppe[i]) {
49714997
err = -ENOMEM;
49724998
goto err_deinit_ppe;
49734999
}
4974-
}
5000+
err = mtk_eth_offload_init(eth, i);
49755001

4976-
err = mtk_eth_offload_init(eth);
4977-
if (err)
4978-
goto err_deinit_ppe;
5002+
if (err)
5003+
goto err_deinit_ppe;
5004+
}
49795005
}
49805006

49815007
for (i = 0; i < MTK_MAX_DEVS; i++) {
@@ -5083,6 +5109,7 @@ static const struct mtk_soc_data mt7621_data = {
50835109
.required_pctl = false,
50845110
.version = 1,
50855111
.offload_version = 1,
5112+
.ppe_num = 1,
50865113
.hash_offset = 2,
50875114
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
50885115
.tx = {
@@ -5111,6 +5138,7 @@ static const struct mtk_soc_data mt7622_data = {
51115138
.required_pctl = false,
51125139
.version = 1,
51135140
.offload_version = 2,
5141+
.ppe_num = 1,
51145142
.hash_offset = 2,
51155143
.has_accounting = true,
51165144
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
@@ -5139,6 +5167,7 @@ static const struct mtk_soc_data mt7623_data = {
51395167
.required_pctl = true,
51405168
.version = 1,
51415169
.offload_version = 1,
5170+
.ppe_num = 1,
51425171
.hash_offset = 2,
51435172
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
51445173
.disable_pll_modes = true,
@@ -5194,6 +5223,7 @@ static const struct mtk_soc_data mt7981_data = {
51945223
.required_pctl = false,
51955224
.version = 2,
51965225
.offload_version = 2,
5226+
.ppe_num = 2,
51975227
.hash_offset = 4,
51985228
.has_accounting = true,
51995229
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
@@ -5223,6 +5253,7 @@ static const struct mtk_soc_data mt7986_data = {
52235253
.required_pctl = false,
52245254
.version = 2,
52255255
.offload_version = 2,
5256+
.ppe_num = 2,
52265257
.hash_offset = 4,
52275258
.has_accounting = true,
52285259
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
@@ -5252,6 +5283,7 @@ static const struct mtk_soc_data mt7988_data = {
52525283
.required_pctl = false,
52535284
.version = 3,
52545285
.offload_version = 2,
5286+
.ppe_num = 3,
52555287
.hash_offset = 4,
52565288
.has_accounting = true,
52575289
.foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,

‎drivers/net/ethernet/mediatek/mtk_eth_soc.h‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1132,7 +1132,7 @@ struct mtk_reg_map {
11321132
u32 tx_sch_rate; /* tx scheduler rate control registers */
11331133
} qdma;
11341134
u32 gdm1_cnt;
1135-
u32 gdma_to_ppe;
1135+
u32 gdma_to_ppe[3];
11361136
u32 ppe_base;
11371137
u32 wdma_base[3];
11381138
u32 pse_iq_sta;
@@ -1170,6 +1170,7 @@ struct mtk_soc_data {
11701170
u8 offload_version;
11711171
u8 hash_offset;
11721172
u8 version;
1173+
u8 ppe_num;
11731174
u16 foe_entry_size;
11741175
netdev_features_t hw_features;
11751176
bool has_accounting;
@@ -1294,7 +1295,7 @@ struct mtk_eth {
12941295

12951296
struct metadata_dst *dsa_meta[MTK_MAX_DSA_PORTS];
12961297

1297-
struct mtk_ppe *ppe[2];
1298+
struct mtk_ppe *ppe[3];
12981299
struct rhashtable flow_table;
12991300

13001301
struct bpf_prog __rcu *prog;
@@ -1319,6 +1320,7 @@ struct mtk_eth {
13191320
struct mtk_mac {
13201321
int id;
13211322
phy_interface_t interface;
1323+
u8 ppe_idx;
13221324
int speed;
13231325
struct device_node *of_node;
13241326
struct phylink *phylink;
@@ -1440,7 +1442,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
14401442
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
14411443
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
14421444

1443-
int mtk_eth_offload_init(struct mtk_eth *eth);
1445+
int mtk_eth_offload_init(struct mtk_eth *eth, u8 id);
14441446
int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
14451447
void *type_data);
14461448
int mtk_flow_offload_cmd(struct mtk_eth *eth, struct flow_cls_offload *cls,

‎drivers/net/ethernet/mediatek/mtk_ppe_offload.c‎

Lines changed: 15 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -245,10 +245,10 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f,
245245
int ppe_index)
246246
{
247247
struct flow_rule *rule = flow_cls_offload_flow_rule(f);
248+
struct net_device *idev = NULL, *odev = NULL;
248249
struct flow_action_entry *act;
249250
struct mtk_flow_data data = {};
250251
struct mtk_foe_entry foe;
251-
struct net_device *odev = NULL;
252252
struct mtk_flow_entry *entry;
253253
int offload_type = 0;
254254
int wed_index = -1;
@@ -264,6 +264,17 @@ mtk_flow_offload_replace(struct mtk_eth *eth, struct flow_cls_offload *f,
264264
struct flow_match_meta match;
265265

266266
flow_rule_match_meta(rule, &match);
267+
if (mtk_is_netsys_v2_or_greater(eth)) {
268+
idev = __dev_get_by_index(&init_net, match.key->ingress_ifindex);
269+
if (idev) {
270+
struct mtk_mac *mac = netdev_priv(idev);
271+
272+
if (WARN_ON(mac->ppe_idx >= eth->soc->ppe_num))
273+
return -EINVAL;
274+
275+
ppe_index = mac->ppe_idx;
276+
}
277+
}
267278
} else {
268279
return -EOPNOTSUPP;
269280
}
@@ -637,7 +648,9 @@ int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
637648
}
638649
}
639650

640-
int mtk_eth_offload_init(struct mtk_eth *eth)
651+
int mtk_eth_offload_init(struct mtk_eth *eth, u8 id)
641652
{
653+
if (!eth->ppe[id] || !eth->ppe[id]->foe_table)
654+
return 0;
642655
return rhashtable_init(&eth->flow_table, &mtk_flow_ht_params);
643656
}

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