@@ -1066,8 +1066,8 @@ EXPORT_SYMBOL(ath10k_ce_revoke_recv_next);
10661066 * Guts of ath10k_ce_completed_send_next.
10671067 * The caller takes responsibility for any necessary locking.
10681068 */
1069- int ath10k_ce_completed_send_next_nolock (struct ath10k_ce_pipe * ce_state ,
1070- void * * per_transfer_contextp )
1069+ static int _ath10k_ce_completed_send_next_nolock (struct ath10k_ce_pipe * ce_state ,
1070+ void * * per_transfer_contextp )
10711071{
10721072 struct ath10k_ce_ring * src_ring = ce_state -> src_ring ;
10731073 u32 ctrl_addr = ce_state -> ctrl_addr ;
@@ -1118,6 +1118,66 @@ int ath10k_ce_completed_send_next_nolock(struct ath10k_ce_pipe *ce_state,
11181118
11191119 return 0 ;
11201120}
1121+
1122+ static int _ath10k_ce_completed_send_next_nolock_64 (struct ath10k_ce_pipe * ce_state ,
1123+ void * * per_transfer_contextp )
1124+ {
1125+ struct ath10k_ce_ring * src_ring = ce_state -> src_ring ;
1126+ u32 ctrl_addr = ce_state -> ctrl_addr ;
1127+ struct ath10k * ar = ce_state -> ar ;
1128+ unsigned int nentries_mask = src_ring -> nentries_mask ;
1129+ unsigned int sw_index = src_ring -> sw_index ;
1130+ unsigned int read_index ;
1131+ struct ce_desc_64 * desc ;
1132+
1133+ if (src_ring -> hw_index == sw_index ) {
1134+ /*
1135+ * The SW completion index has caught up with the cached
1136+ * version of the HW completion index.
1137+ * Update the cached HW completion index to see whether
1138+ * the SW has really caught up to the HW, or if the cached
1139+ * value of the HW index has become stale.
1140+ */
1141+
1142+ read_index = ath10k_ce_src_ring_read_index_get (ar , ctrl_addr );
1143+ if (read_index == 0xffffffff )
1144+ return - ENODEV ;
1145+
1146+ read_index &= nentries_mask ;
1147+ src_ring -> hw_index = read_index ;
1148+ }
1149+
1150+ if (ar -> hw_params .rri_on_ddr )
1151+ read_index = ath10k_ce_src_ring_read_index_get (ar , ctrl_addr );
1152+ else
1153+ read_index = src_ring -> hw_index ;
1154+
1155+ if (read_index == sw_index )
1156+ return - EIO ;
1157+
1158+ if (per_transfer_contextp )
1159+ * per_transfer_contextp =
1160+ src_ring -> per_transfer_context [sw_index ];
1161+
1162+ /* sanity */
1163+ src_ring -> per_transfer_context [sw_index ] = NULL ;
1164+ desc = CE_SRC_RING_TO_DESC_64 (src_ring -> base_addr_owner_space ,
1165+ sw_index );
1166+ desc -> nbytes = 0 ;
1167+
1168+ /* Update sw_index */
1169+ sw_index = CE_RING_IDX_INCR (nentries_mask , sw_index );
1170+ src_ring -> sw_index = sw_index ;
1171+
1172+ return 0 ;
1173+ }
1174+
1175+ int ath10k_ce_completed_send_next_nolock (struct ath10k_ce_pipe * ce_state ,
1176+ void * * per_transfer_contextp )
1177+ {
1178+ return ce_state -> ops -> ce_completed_send_next_nolock (ce_state ,
1179+ per_transfer_contextp );
1180+ }
11211181EXPORT_SYMBOL (ath10k_ce_completed_send_next_nolock );
11221182
11231183static void ath10k_ce_extract_desc_data (struct ath10k * ar ,
@@ -1839,6 +1899,7 @@ static const struct ath10k_ce_ops ce_ops = {
18391899 .ce_send_nolock = _ath10k_ce_send_nolock ,
18401900 .ce_set_src_ring_base_addr_hi = NULL ,
18411901 .ce_set_dest_ring_base_addr_hi = NULL ,
1902+ .ce_completed_send_next_nolock = _ath10k_ce_completed_send_next_nolock ,
18421903};
18431904
18441905static const struct ath10k_ce_ops ce_64_ops = {
@@ -1853,6 +1914,7 @@ static const struct ath10k_ce_ops ce_64_ops = {
18531914 .ce_send_nolock = _ath10k_ce_send_nolock_64 ,
18541915 .ce_set_src_ring_base_addr_hi = ath10k_ce_set_src_ring_base_addr_hi ,
18551916 .ce_set_dest_ring_base_addr_hi = ath10k_ce_set_dest_ring_base_addr_hi ,
1917+ .ce_completed_send_next_nolock = _ath10k_ce_completed_send_next_nolock_64 ,
18561918};
18571919
18581920static void ath10k_ce_set_ops (struct ath10k * ar ,
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