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ssuthiku-amdjoergroedel
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iommu/amd: Process all IVHDs before enabling IOMMU features
The ACPI IVRS table can contain multiple IVHD blocks. Each block contains information used to initialize each IOMMU instance. Currently, init_iommu_all sequentially process IVHD block and initialize IOMMU instance one-by-one. However, certain features require all IOMMUs to be configured in the same way system-wide. In case certain IVHD blocks contain inconsistent information (most likely FW bugs), the driver needs to go through and try to revert settings on IOMMUs that have already been configured. A solution is to split IOMMU initialization into 3 phases: Phase1 : Processes information of the IVRS table for all IOMMU instances. This allow all IVHDs to be processed prior to enabling features. Phase2 : Early feature support check on all IOMMUs (using information in IVHD blocks. Phase3 : Iterates through all IOMMU instances and enabling features. Signed-off-by: Suravee Suthikulpanit <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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drivers/iommu/amd/init.c

Lines changed: 19 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1721,7 +1721,6 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h,
17211721
struct acpi_table_header *ivrs_base)
17221722
{
17231723
struct amd_iommu_pci_seg *pci_seg;
1724-
int ret;
17251724

17261725
pci_seg = get_pci_segment(h->pci_seg, ivrs_base);
17271726
if (pci_seg == NULL)
@@ -1802,6 +1801,13 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h,
18021801
if (!iommu->mmio_base)
18031802
return -ENOMEM;
18041803

1804+
return init_iommu_from_acpi(iommu, h);
1805+
}
1806+
1807+
static int __init init_iommu_one_late(struct amd_iommu *iommu)
1808+
{
1809+
int ret;
1810+
18051811
if (alloc_cwwb_sem(iommu))
18061812
return -ENOMEM;
18071813

@@ -1823,10 +1829,6 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h,
18231829
if (amd_iommu_pre_enabled)
18241830
amd_iommu_pre_enabled = translation_pre_enabled(iommu);
18251831

1826-
ret = init_iommu_from_acpi(iommu, h);
1827-
if (ret)
1828-
return ret;
1829-
18301832
if (amd_iommu_irq_remap) {
18311833
ret = amd_iommu_create_irq_domain(iommu);
18321834
if (ret)
@@ -1837,7 +1839,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h,
18371839
* Make sure IOMMU is not considered to translate itself. The IVRS
18381840
* table tells us so, but this is a lie!
18391841
*/
1840-
pci_seg->rlookup_table[iommu->devid] = NULL;
1842+
iommu->pci_seg->rlookup_table[iommu->devid] = NULL;
18411843

18421844
return 0;
18431845
}
@@ -1882,6 +1884,7 @@ static int __init init_iommu_all(struct acpi_table_header *table)
18821884
end += table->length;
18831885
p += IVRS_HEADER_LENGTH;
18841886

1887+
/* Phase 1: Process all IVHD blocks */
18851888
while (p < end) {
18861889
h = (struct ivhd_header *)p;
18871890
if (*p == amd_iommu_target_ivhd_type) {
@@ -1907,6 +1910,16 @@ static int __init init_iommu_all(struct acpi_table_header *table)
19071910
}
19081911
WARN_ON(p != end);
19091912

1913+
/* Phase 2 : Early feature support check */
1914+
get_global_efr();
1915+
1916+
/* Phase 3 : Enabling IOMMU features */
1917+
for_each_iommu(iommu) {
1918+
ret = init_iommu_one_late(iommu);
1919+
if (ret)
1920+
return ret;
1921+
}
1922+
19101923
return 0;
19111924
}
19121925

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