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abelvesamartinkpetersen
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scsi: ufs: ufs-qcom: Clear qunipro_g4_sel for HW version major 5
On SM8550, depending on the Qunipro, we can run with G5 or G4. For now, when the major version is 5 or above, we go with G5. Therefore, we need to specifically tell UFS HC that. Signed-off-by: Abel Vesa <[email protected]> Signed-off-by: Martin K. Petersen <[email protected]>
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-3
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2 files changed

+11
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lines changed

drivers/ufs/host/ufs-qcom.c

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -224,6 +224,10 @@ static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host)
224224
ufshcd_rmwl(host->hba, QUNIPRO_SEL,
225225
ufs_qcom_cap_qunipro(host) ? QUNIPRO_SEL : 0,
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REG_UFS_CFG1);
227+
228+
if (host->hw_ver.major == 0x05)
229+
ufshcd_rmwl(host->hba, QUNIPRO_G4_SEL, 0, REG_UFS_CFG0);
230+
227231
/* make sure above configuration is applied before we return */
228232
mb();
229233
}
@@ -513,9 +517,9 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear,
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mb();
514518
}
515519

516-
if (update_link_startup_timer) {
520+
if (update_link_startup_timer && host->hw_ver.major != 0x5) {
517521
ufshcd_writel(hba, ((core_clk_rate / MSEC_PER_SEC) * 100),
518-
REG_UFS_PA_LINK_STARTUP_TIMER);
522+
REG_UFS_CFG0);
519523
/*
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* make sure that this configuration is applied before
521525
* we return

drivers/ufs/host/ufs-qcom.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,8 @@ enum {
3636
REG_UFS_PA_ERR_CODE = 0xCC,
3737
/* On older UFS revisions, this register is called "RETRY_TIMER_REG" */
3838
REG_UFS_PARAM0 = 0xD0,
39-
REG_UFS_PA_LINK_STARTUP_TIMER = 0xD8,
39+
/* On older UFS revisions, this register is called "REG_UFS_PA_LINK_STARTUP_TIMER" */
40+
REG_UFS_CFG0 = 0xD8,
4041
REG_UFS_CFG1 = 0xDC,
4142
REG_UFS_CFG2 = 0xE0,
4243
REG_UFS_HW_VERSION = 0xE4,
@@ -80,6 +81,9 @@ enum {
8081
#define UFS_CNTLR_2_x_x_VEN_REGS_OFFSET(x) (0x000 + x)
8182
#define UFS_CNTLR_3_x_x_VEN_REGS_OFFSET(x) (0x400 + x)
8283

84+
/* bit definitions for REG_UFS_CFG0 register */
85+
#define QUNIPRO_G4_SEL BIT(5)
86+
8387
/* bit definitions for REG_UFS_CFG1 register */
8488
#define QUNIPRO_SEL BIT(0)
8589
#define UFS_PHY_SOFT_RESET BIT(1)

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