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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/clock/mediatek,mt7621-sysc.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: MT7621 Clock Device Tree Bindings |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Sergio Paracuellos <[email protected]> |
| 11 | + |
| 12 | +description: | |
| 13 | + The MT7621 has a PLL controller from where the cpu clock is provided |
| 14 | + as well as derived clocks for the bus and the peripherals. It also |
| 15 | + can gate SoC device clocks. |
| 16 | +
|
| 17 | + Each clock is assigned an identifier and client nodes use this identifier |
| 18 | + to specify the clock which they consume. |
| 19 | +
|
| 20 | + All these identifiers could be found in: |
| 21 | + [1]: <include/dt-bindings/clock/mt7621-clk.h>. |
| 22 | +
|
| 23 | + The clocks are provided inside a system controller node. |
| 24 | +
|
| 25 | +properties: |
| 26 | + compatible: |
| 27 | + items: |
| 28 | + - const: mediatek,mt7621-sysc |
| 29 | + - const: syscon |
| 30 | + |
| 31 | + reg: |
| 32 | + maxItems: 1 |
| 33 | + |
| 34 | + "#clock-cells": |
| 35 | + description: |
| 36 | + The first cell indicates the clock number, see [1] for available |
| 37 | + clocks. |
| 38 | + const: 1 |
| 39 | + |
| 40 | + ralink,memctl: |
| 41 | + $ref: /schemas/types.yaml#/definitions/phandle |
| 42 | + description: |
| 43 | + phandle of syscon used to control memory registers |
| 44 | + |
| 45 | + clock-output-names: |
| 46 | + maxItems: 8 |
| 47 | + |
| 48 | +required: |
| 49 | + - compatible |
| 50 | + - reg |
| 51 | + - '#clock-cells' |
| 52 | + - ralink,memctl |
| 53 | + |
| 54 | +additionalProperties: false |
| 55 | + |
| 56 | +examples: |
| 57 | + - | |
| 58 | + #include <dt-bindings/clock/mt7621-clk.h> |
| 59 | +
|
| 60 | + sysc: sysc@0 { |
| 61 | + compatible = "mediatek,mt7621-sysc", "syscon"; |
| 62 | + reg = <0x0 0x100>; |
| 63 | + #clock-cells = <1>; |
| 64 | + ralink,memctl = <&memc>; |
| 65 | + clock-output-names = "xtal", "cpu", "bus", |
| 66 | + "50m", "125m", "150m", |
| 67 | + "250m", "270m"; |
| 68 | + }; |
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