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RISC-V: Device, timer, IRQs, and the SBI
This patch contains code that interfaces with devices that are mandated by the RISC-V supervisor specification and that don't have explicit drivers anywhere else in the tree. This includes the staticly defined interrupts, the CSR-mapped timer, and virtualized SBI devices. Signed-off-by: Palmer Dabbelt <[email protected]>
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‎arch/riscv/include/asm/delay.h‎

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/*
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* Copyright (C) 2009 Chen Liqin <[email protected]>
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* Copyright (C) 2016 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_DELAY_H
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#define _ASM_RISCV_DELAY_H
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extern unsigned long riscv_timebase;
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#define udelay udelay
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extern void udelay(unsigned long usecs);
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#define ndelay ndelay
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extern void ndelay(unsigned long nsecs);
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extern void __delay(unsigned long cycles);
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#endif /* _ASM_RISCV_DELAY_H */

‎arch/riscv/include/asm/dma-mapping.h‎

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/*
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* Copyright (C) 2003-2004 Hewlett-Packard Co
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* David Mosberger-Tang <[email protected]>
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* Copyright (C) 2012 ARM Ltd.
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* Copyright (C) 2016 SiFive, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_RISCV_DMA_MAPPING_H
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#define __ASM_RISCV_DMA_MAPPING_H
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/* Use ops->dma_mapping_error (if it exists) or assume success */
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// #undef DMA_ERROR_CODE
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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{
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return &dma_noop_ops;
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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return false;
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return addr + size - 1 <= *dev->dma_mask;
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}
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#endif /* __ASM_RISCV_DMA_MAPPING_H */

‎arch/riscv/include/asm/irq.h‎

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/*
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* Copyright (C) 2012 Regents of the University of California
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* Copyright (C) 2017 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_IRQ_H
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#define _ASM_RISCV_IRQ_H
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#define NR_IRQS 0
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#define INTERRUPT_CAUSE_SOFTWARE 1
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#define INTERRUPT_CAUSE_TIMER 5
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#define INTERRUPT_CAUSE_EXTERNAL 9
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void riscv_timer_interrupt(void);
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#include <asm-generic/irq.h>
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#endif /* _ASM_RISCV_IRQ_H */

‎arch/riscv/include/asm/irqflags.h‎

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/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_IRQFLAGS_H
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#define _ASM_RISCV_IRQFLAGS_H
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#include <asm/processor.h>
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#include <asm/csr.h>
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/* read interrupt enabled status */
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static inline unsigned long arch_local_save_flags(void)
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{
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return csr_read(sstatus);
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}
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/* unconditionally enable interrupts */
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static inline void arch_local_irq_enable(void)
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{
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csr_set(sstatus, SR_IE);
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}
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/* unconditionally disable interrupts */
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static inline void arch_local_irq_disable(void)
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{
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csr_clear(sstatus, SR_IE);
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}
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/* get status and disable interrupts */
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static inline unsigned long arch_local_irq_save(void)
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{
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return csr_read_clear(sstatus, SR_IE);
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}
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/* test flags */
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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return !(flags & SR_IE);
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}
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/* test hardware interrupt enable bit */
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static inline int arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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/* set interrupt enabled status */
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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csr_set(sstatus, flags & SR_IE);
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}
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#endif /* _ASM_RISCV_IRQFLAGS_H */

‎arch/riscv/include/asm/pci.h‎

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/*
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* Copyright (C) 2016 SiFive
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_RISCV_PCI_H
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#define __ASM_RISCV_PCI_H
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/dma-mapping.h>
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#include <asm/io.h>
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#define PCIBIOS_MIN_IO 0
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#define PCIBIOS_MIN_MEM 0
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/* RISC-V shim does not initialize PCI bus */
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#define pcibios_assign_all_busses() 1
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/* We do not have an IOMMU */
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#define PCI_DMA_BUS_IS_PHYS 1
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extern int isa_dma_bridge_buggy;
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#ifdef CONFIG_PCI
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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/* no legacy IRQ on risc-v */
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return -ENODEV;
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}
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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/* always show the domain in /proc */
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return 1;
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}
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#endif /* CONFIG_PCI */
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#endif /* __ASM_PCI_H */

‎arch/riscv/include/asm/sbi.h‎

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/*
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* Copyright (C) 2015 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_SBI_H
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#define _ASM_RISCV_SBI_H
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#include <linux/types.h>
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#define SBI_SET_TIMER 0
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#define SBI_CONSOLE_PUTCHAR 1
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#define SBI_CONSOLE_GETCHAR 2
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#define SBI_CLEAR_IPI 3
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#define SBI_SEND_IPI 4
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#define SBI_REMOTE_FENCE_I 5
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#define SBI_REMOTE_SFENCE_VMA 6
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#define SBI_REMOTE_SFENCE_VMA_ASID 7
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#define SBI_SHUTDOWN 8
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#define SBI_CALL(which, arg0, arg1, arg2) ({ \
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register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
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register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
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register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
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register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
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asm volatile ("ecall" \
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: "+r" (a0) \
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: "r" (a1), "r" (a2), "r" (a7) \
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: "memory"); \
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a0; \
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})
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/* Lazy implementations until SBI is finalized */
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#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0)
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#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0)
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#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0)
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static inline void sbi_console_putchar(int ch)
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{
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SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
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}
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static inline int sbi_console_getchar(void)
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{
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return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
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}
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static inline void sbi_set_timer(uint64_t stime_value)
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{
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#if __riscv_xlen == 32
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SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
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#else
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SBI_CALL_1(SBI_SET_TIMER, stime_value);
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#endif
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}
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static inline void sbi_shutdown(void)
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{
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SBI_CALL_0(SBI_SHUTDOWN);
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}
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static inline void sbi_clear_ipi(void)
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{
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SBI_CALL_0(SBI_CLEAR_IPI);
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}
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static inline void sbi_send_ipi(const unsigned long *hart_mask)
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{
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SBI_CALL_1(SBI_SEND_IPI, hart_mask);
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}
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static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
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{
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SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
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}
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static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
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unsigned long start,
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unsigned long size)
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{
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SBI_CALL_1(SBI_REMOTE_SFENCE_VMA, hart_mask);
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}
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static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
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unsigned long start,
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unsigned long size,
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unsigned long asid)
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{
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SBI_CALL_1(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask);
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}
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#endif

‎arch/riscv/include/asm/timex.h‎

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/*
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* Copyright (C) 2012 Regents of the University of California
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _ASM_RISCV_TIMEX_H
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#define _ASM_RISCV_TIMEX_H
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#include <asm/param.h>
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typedef unsigned long cycles_t;
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static inline cycles_t get_cycles(void)
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{
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cycles_t n;
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__asm__ __volatile__ (
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"rdtime %0"
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: "=r" (n));
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return n;
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}
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#ifdef CONFIG_64BIT
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static inline uint64_t get_cycles64(void)
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{
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return get_cycles();
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}
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#else
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static inline uint64_t get_cycles64(void)
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{
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u32 lo, hi, tmp;
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__asm__ __volatile__ (
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"1:\n"
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"rdtimeh %0\n"
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"rdtime %1\n"
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"rdtimeh %2\n"
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"bne %0, %2, 1b"
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: "=&r" (hi), "=&r" (lo), "=&r" (tmp));
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return ((u64)hi << 32) | lo;
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}
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#endif
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#define ARCH_HAS_READ_CURRENT_TIMER
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static inline int read_current_timer(unsigned long *timer_val)
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{
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*timer_val = get_cycles();
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return 0;
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}
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#endif /* _ASM_RISCV_TIMEX_H */

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