5959#define PLA_WDT6_CTRL 0xe428
6060#define PLA_TCR0 0xe610
6161#define PLA_TCR1 0xe612
62+ #define PLA_MTPS 0xe615
6263#define PLA_TXFIFO_CTRL 0xe618
6364#define PLA_RSTTALLY 0xe800
6465#define PLA_CR 0xe813
180181/* PLA_TCR1 */
181182#define VERSION_MASK 0x7cf0
182183
184+ /* PLA_MTPS */
185+ #define MTPS_JUMBO (12 * 1024 / 64)
186+ #define MTPS_DEFAULT (6 * 1024 / 64)
187+
183188/* PLA_RSTTALLY */
184189#define TALLY_RESET 0x0001
185190
@@ -440,7 +445,10 @@ enum rtl_register_content {
440445#define BYTE_EN_START_MASK 0x0f
441446#define BYTE_EN_END_MASK 0xf0
442447
448+ #define RTL8153_MAX_PACKET 9216 /* 9K */
449+ #define RTL8153_MAX_MTU (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
443450#define RTL8152_RMS (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
451+ #define RTL8153_RMS RTL8153_MAX_PACKET
444452#define RTL8152_TX_TIMEOUT (5 * HZ)
445453
446454/* rtl8152 flags */
@@ -2522,7 +2530,8 @@ static void r8153_first_init(struct r8152 *tp)
25222530 ocp_data &= ~CPCR_RX_VLAN ;
25232531 ocp_write_word (tp , MCU_TYPE_PLA , PLA_CPCR , ocp_data );
25242532
2525- ocp_write_word (tp , MCU_TYPE_PLA , PLA_RMS , RTL8152_RMS );
2533+ ocp_write_word (tp , MCU_TYPE_PLA , PLA_RMS , RTL8153_RMS );
2534+ ocp_write_byte (tp , MCU_TYPE_PLA , PLA_MTPS , MTPS_JUMBO );
25262535
25272536 ocp_data = ocp_read_word (tp , MCU_TYPE_PLA , PLA_TCR0 );
25282537 ocp_data |= TCR0_AUTO_FIFO ;
@@ -2572,7 +2581,7 @@ static void r8153_enter_oob(struct r8152 *tp)
25722581 mdelay (1 );
25732582 }
25742583
2575- ocp_write_word (tp , MCU_TYPE_PLA , PLA_RMS , RTL8152_RMS );
2584+ ocp_write_word (tp , MCU_TYPE_PLA , PLA_RMS , RTL8153_RMS );
25762585
25772586 ocp_data = ocp_read_word (tp , MCU_TYPE_PLA , PLA_TEREDO_CFG );
25782587 ocp_data &= ~TEREDO_WAKE_MASK ;
@@ -3284,6 +3293,26 @@ static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
32843293 return res ;
32853294}
32863295
3296+ static int rtl8152_change_mtu (struct net_device * dev , int new_mtu )
3297+ {
3298+ struct r8152 * tp = netdev_priv (dev );
3299+
3300+ switch (tp -> version ) {
3301+ case RTL_VER_01 :
3302+ case RTL_VER_02 :
3303+ return eth_change_mtu (dev , new_mtu );
3304+ default :
3305+ break ;
3306+ }
3307+
3308+ if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU )
3309+ return - EINVAL ;
3310+
3311+ dev -> mtu = new_mtu ;
3312+
3313+ return 0 ;
3314+ }
3315+
32873316static const struct net_device_ops rtl8152_netdev_ops = {
32883317 .ndo_open = rtl8152_open ,
32893318 .ndo_stop = rtl8152_close ,
@@ -3292,8 +3321,7 @@ static const struct net_device_ops rtl8152_netdev_ops = {
32923321 .ndo_tx_timeout = rtl8152_tx_timeout ,
32933322 .ndo_set_rx_mode = rtl8152_set_rx_mode ,
32943323 .ndo_set_mac_address = rtl8152_set_mac_address ,
3295-
3296- .ndo_change_mtu = eth_change_mtu ,
3324+ .ndo_change_mtu = rtl8152_change_mtu ,
32973325 .ndo_validate_addr = eth_validate_addr ,
32983326};
32993327
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